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address_generator_v1_0 Update averager (#180) Jun 23, 2016
at93c46d_spi_v1_0 add calibration to laser controller Jul 5, 2017
averager_counter_v1_0 Update averager (#180) Jun 23, 2016
axi_ctl_register_v1_0 update fpga/ Apr 8, 2017
axi_sts_register_v1_0 v0.13.0 (#383) Feb 8, 2017
axis_constant_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
axis_lfsr_v1_0 add red-pitaya/phase-noise-analyzer Jul 8, 2018
axis_red_pitaya_adc_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
axis_red_pitaya_dac_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
axis_variable_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
boxcar_filter_v1_0 add red-pitaya/phase-noise-analyzer Jul 8, 2018
bus_multiplexer_v1_0 Change core signals (#328) Sep 25, 2016
comparator_v1_0 update fpga/ Apr 8, 2017
delay_trig_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
dna_reader_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
edge_detector_v1_0 Server version (#204) Jul 23, 2016
kcpsm6_v1_0 move picoblaze VHDL core to fpga/cores May 30, 2017
latched_mux_v1_0 Change core signals (#328) Sep 25, 2016
pdm_v1_0 Change core signals (#328) Sep 25, 2016
phase_unwrapper_v1_0 add red-pitaya/phase-noise-analyzer Jul 8, 2018
psd_counter_v1_0 fix module name in psd_counter.v May 30, 2019
pulse_generator_v1_0 start pulse_generator on rst posedge (#288) Sep 6, 2016
pwm_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
redp_adc_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
redp_dac_v1_0 move lib/ and cores/ in fpga/, move templates/ in scripts/ Jun 2, 2016
saturation_v1_0 add saturation core Jun 30, 2017
tlast_gen_v1_0
unrandomizer_v1_0 Unrandomize Alpha250 ADC bits using Verilog instead of Tcl Jul 12, 2018
vhdl_counter_v1_0 add support for VHDL cores May 25, 2017
README.md Add latched_mux core (#145) Jun 10, 2016

README.md

Cores

Cores are written in Verilog HDL and can be tested using commands similar to:

make CORE=address_generator_v1_0 test_core
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