MultiFPGA

Michael Adler edited this page Mar 3, 2015 · 1 revision

MultiFPGA

Model of Computation

The LEAP multiFPGA compiler operates on programs consisting of latency-insensitive modules.

This model of computation are similar to Kahn Process Networks . However, latency-insensitive channels do not have blocking reads.

LIM Compilation Flow

LIM compilation has a strong correspondence to the compilation of soft connections for a single FPGA. Indeed, LIM compilation targeting a single FPGA is functionally equivalent to the basic LEAP soft_connections compilation flow.

Input Files

The multiple FPGA compiler accepts all LEAP connected_applications describe in terms of AWB .apm files. In addition to the .apm describing the program, two additional input files are required:

  • Environment File describing the set of FPGAs to which the program will be mapped
  • Mapping File describes how the program will be mapped onto the environment. Eventually this will be automated.

Documentation

document#15 (FPGA ’12)

document#17 (MIT ’12)

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