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Board editor: Add initial design rule check #581

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merged 11 commits into from Nov 25, 2019

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ubruhin commented Nov 16, 2019

Actually I planned to implement only a very simple DRC for now, but it became much better than expected 馃榿

  • Add "Design Rule Check" dialog to the board editor, to run the DRC.
  • Add "DRC" dock widget to the board editor, to see the messages even after closing the dialog. By clicking on a message, the issue is highlighted and centered on the board view.

drc

Limitations:

  • The "missing connections" check does not really check the copper layers, but only emits a message for each existing airwire. If there is a false-positive airwire, you will also get a false-positive DRC message.
  • Settings (like clearance) are not yet permanently saved in the board file (needs file format change, will do in the next major release).
  • Messages cannot be suppressed yet (needs file format change, will do in the next major release).
  • Not yet integrated into the CLI (does not make sense as long as settings and suppressions are not saved).
  • Not yet tested intensively, i.e. there might still be some bugs.

Fixes #539

@ubruhin ubruhin added this to the 0.1.3 milestone Nov 16, 2019
@ubruhin ubruhin self-assigned this Nov 16, 2019
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EdizonTN commented Nov 16, 2019

Perfect!
Some comments:

Add "DRC" dock widget to the board editor, to see the messages even after closing the dialog. By clicking on a message, the issue is highlighted and centered on the board view.

DRC settings and Run DRC should be separate dialog.
Why? - DRC settings are valid for design rule check but for gerber output (export) also!

the issue is highlighted and centered on the board view.

  • the issue is highlighted OR centered on the board view.

Settings (like clearance) are not yet permanently saved in the board file (needs file format change, will do in the next major release).

Settings should be saved into new separate file. Settings is manufacturer depends. Settings file can have name as manufacturer or PCB constuction density.
This file can by in separate library - for sharing between users.

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ubruhin commented Nov 16, 2019

DRC settings and Run DRC should be separate dialog.
Why? - DRC settings are valid for design rule check but for gerber output (export) also!

I agree - thus there is still the separate dialog "Design Rules" in the "Board" menu. But since the new design rules are not yet saved in files, you would have to check/adjust the design rules every time after opening a project, and afterwards opening the DRC dialog to run the checks. I think this is too cumbersome, thus I added the new design rules to the new dialog instead.

We can fix this issue once design rules are really saved to files, i.e. moving the new options into the "Design Rules" dialog.

the issue is highlighted OR centered on the board view.

I'm not sure what you mean with that, could you explain it?

Settings should be saved into new separate file. Settings is manufacturer depends. Settings file can have name as manufacturer or PCB constuction density.
This file can by in separate library - for sharing between users.

Generally I agree - but it's not the topic of this PR since the new options aren't saved to files at all. As explained above, this will be the topic of the next major release ;)

@ubruhin ubruhin force-pushed the implement-simple-drc branch from b50124d to d9fbc8c Nov 17, 2019
The parameter "close" did not always work as expected because of
caching. A new method "toClosed()" is cleaner and works always properly.
@ubruhin ubruhin force-pushed the implement-simple-drc branch 2 times, most recently from dc95f49 to 26b8b4e Nov 20, 2019
@ubruhin ubruhin force-pushed the implement-simple-drc branch from 26b8b4e to 7cad8b3 Nov 20, 2019
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EternityForest commented Nov 21, 2019

This is amazing! Looks like LibrePCB is so close to being the premier FOSS editor!

I'm not sure checking the copper for disconnection is actually needed.

IIRC eagle doesn't have "disconnected" DRC at all, they just directly call it "airsides". If you have a false positive airwire, you treat it like a compiler warning and fix it even if you know it's a false positive.

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EdizonTN commented Nov 21, 2019

the issue is highlighted OR centered on the board view.

I'm not sure what you mean with that, could you explain it?

I mean some option for select way of show error on board.
Option 1: Highlight - when I click on error in DRC panel, error blikn (or highlight) on board without zoom. This option is good for locate error on board. Ideal for big board design.

Option 2: Zoom (jump) - when I click on error in DRC panel, error will zoomed on board to center to screen. This option is good for show directly error. Zoomed part of PCB is litlle bit lost on whole design.

Example (highlight vs zoom/jump):
drc

p.s. in this example, highlight mode is not ideal (and this is commercial, not cheap software). It's hard to find on bigger design this small error (even highlighted).

And next question: Is any way howe to I find which error just see on PCB on screen (reverse way as you present on video from start of this thread)?
For example: when I move cursor over error mark on PCB, in status bar I see error description for this mark or error is highlighted in DRC toolbox. Can be applied this?

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dbrgn commented Nov 23, 2019

Very cool! I ran it on my current project, and it found this gem 馃槄

short

So, thanks for saving me some time and hardware costs.

Some of the errors are a bit strange though:

triangle

Why this irregularly shaped triangle? I assume the algorithm approximates some irregular shapes with rough triangles, right?

@ubruhin ubruhin force-pushed the implement-simple-drc branch from 7cad8b3 to b51c2b7 Nov 24, 2019
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ubruhin commented Nov 24, 2019

I'm not sure checking the copper for disconnection is actually needed.

IMHO that's one of the most important checks, since a missing connection could make a board useless. In my experience it's easy to forget checking the airwires before generating the fabrication data, especially if there are short airwires which you could overlook, or if the airwires layer is hidden.

I mean some option for select way of show error on board.
Option 1: Highlight - when I click on error in DRC panel, error blikn (or highlight) on board without zoom. This option is good for locate error on board. Ideal for big board design.

Option 2: Zoom (jump) - when I click on error in DRC panel, error will zoomed on board to center to screen. This option is good for show directly error. Zoomed part of PCB is litlle bit lost on whole design.

Good idea! I implemented it with a checkbox in the DRC dock. And a double-click on a message item will always zoom to the corresponding location, independent of the checkbox.

And next question: Is any way howe to I find which error just see on PCB on screen (reverse way as you present on video from start of this thread)?
For example: when I move cursor over error mark on PCB, in status bar I see error description for this mark or error is highlighted in DRC toolbox. Can be applied this?

No that's currently not possible. And it doesn't make much sense since only a single DRC violation is shown in the board editor (instead of all at the same time). We might change that behavior in future...

Why this irregularly shaped triangle? I assume the algorithm approximates some irregular shapes with rough triangles, right?

An expanded rectangular pad results in a rounded rectangular, but ClipperLib (which I use for clearance checks) doesn't support arcs, thus I had to approximate arcs by straight line segments (like we already do for copper planes).

Btw, now I also added a check for overlapping courtyards of packages, with a user-defined additional offset. And I moved the missing connection messages to the bottom since during the design phase these messages are a bit annoying.

board_editor_drc

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EternityForest commented Nov 24, 2019

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dbrgn commented Nov 24, 2019

Thanks, the courtyard checker immediately found two problematic parts in my project.

What's this white line when selecting a courtyard clearance error in the DRC? A leftover from debugging?

2019-11-24-234211_1123x823_scrot

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doom-fr commented Nov 24, 2019

I think it is to highlight the error place.
Without this it will be hard to see the location of the problem.

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ubruhin commented Nov 24, 2019

Yes, that's to easily locate even very small DRC issues independent of the zoom level. Some other EDA tools also do it like this, thus I just did it the same way 馃槈

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dbrgn commented Nov 24, 2019

Ok, never saw this before but seems reasonable for now. I think there could be better ways to visualize, but that can still be done later on 馃檪

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doom-fr commented Nov 25, 2019

Is it possible to have a board view with all DRC ?
It will be helpful to solve problems when you have multiple DRC in same area.

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ubruhin commented Nov 25, 2019

Is it possible to have a board view with all DRC ?

No that's currently not possible. But we can add it in a later release.

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doom-fr commented Nov 25, 2019

Yes sure the actual DRC is already more that just a simple DRC. Thanks for that.

As improvement, I would say we can :

  1. view all DRC in the board editor (maybe via DRC layer)
  2. make live DRC (DRC change each time we move something or draw something)
  3. add component spacing clearance ;-)
  4. let the user decide the rules he want to apply or not
@ubruhin ubruhin merged commit f0555f9 into master Nov 25, 2019
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@ubruhin ubruhin deleted the implement-simple-drc branch Nov 25, 2019
ubruhin added a commit that referenced this pull request Nov 25, 2019
Board editor: Add initial design rule check
(cherry picked from commit f0555f9)
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