msix: Delay MSI-X enable till MASKALL is cleared

Since the kernel commit 4385539: PCI/MSI: Enable and mask MSI-X early,the MSIX is enabled early but vectors remained masked. This creates a problem in Qemu especially when it tries to read the MSI doorbell address(eg: S1 MSI setup). So check both MSIX_ENABLE_MASK is set and MSIX_MASKALL_MASK is cleared before we go ahead and setup MSI-X ToDo: Needs further tests and analysis to verify we don't break anything. Reported-by: qubingbing <qubingbing@hisilicon.com> Reported-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Linaro · Oct 15, 2021 · 568820e · 568820e
1 parent 1644c81
commit 568820e
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
@@ -479,9 +479,9 @@ int msix_present(PCIDevice *dev)
 /* Is MSI-X enabled? */
 int msix_enabled(PCIDevice *dev)
 {
-    return (dev->cap_present & QEMU_PCI_CAP_MSIX) &&
-        (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &
-         MSIX_ENABLE_MASK);
+    return ((dev->cap_present & QEMU_PCI_CAP_MSIX) &&
+        ((dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &
+        (MSIX_ENABLE_MASK | MSIX_MASKALL_MASK)) == MSIX_ENABLE_MASK));
 }
 
 /* Send an MSI-X message */