Skip to content
Permalink
Branch: master
Find file Copy path
Find file Copy path
Fetching contributors…
Cannot retrieve contributors at this time
63 lines (50 sloc) 3.53 KB
title layout youtube_playlist permalink css-package js-package members image related_resources_tracks jumbotron flow
High Performance Computing
flow
/engineering/high-performance-computing/
landing-page
engineering-landing-page
key
hpc-sig
/assets/images/content/HPCCol.svg
HPC
title title-class description background-image
High Performance Computing
big-title
/assets/images/content/hpc-bg.jpg
row style sections
container_row
large_type introduction_row
format style text_content
text
text-left no-padding
text
With its debut on the Top500, the 125,000-core Astra at New Mexico's Sandia Labs uses Cavium ThunderX2 chips to mark Arm's entry into the petascale world. In Japan, the Armv8-A 512bit SVE Post-K prototype CPU by Fujitsu and RIKEN has been optimized to achieve high-level, real-world application performance, anticipating up to one hundred times the application execution performance of the K computer. K was the first computer to top 10 petaflops in 2011.
format style text_content
text
text-left no-padding
text
The world’s fastest 500 computers run Linux-based operating systems and thus, High Performance Computing (HPC) relies on Open Source. HPC has a large and growing open source component. Toolchains can be offered to those who want a choice and engineering can be focused on library optimisation that will benefit all micro architectures. Linaro provides a forum where SoCs, system vendors, integrators, users, distros, hyperscalers can co-develop the foundational software necessary for the ecosystem.
format style text_content
text
text-left no-padding
text
Linaro and its members created the HPC Special Interest Group (SIG) in 2016 to drive the adoption of Arm in HPC through standardisation, interoperability, orchestration and use case development. The HPC SIG is currently working to leverage Arm hardware around server class infrastructure, multi-gigabit interconnect support, scalable vector extensions and software ecosystem support to build exascale HPC deployments. The engineering focus is on OpenHPC, compiler performance,SVE enablement and hardware deployment.
format style text_content
text
text-left no-padding
text
- OpenHPC: Fully automating OpenHPC CI & releases and deploying dynamic clusters on varied vendors/hardware configurations/OS distros - Compiler performance: Running a variety of HPC benchmarks for CPU-bound issues and detecting common outliers for bottlenecks - SVE enablement: Improving SVE support in GCC for more vectorisation cases, enabling LLVM to generate SVE code, and finishing (and upstreaming) QEMU support - Hardware deployment: Work in Linaro's own HPC lab for best-in-class stability & repeatability, close-to-production ennironment, upstream technology, vendor isolation.
row source
custom_include_row
engineering_related_resources.html

Linaro HPC Upcoming Events and Resources from Previous Events:

You can’t perform that action at this time.