zcu102 boot "SF: unrecognized JEDEC id bytes: 00, 00, 00"

[leepoly]

Describe the bug

Hi, I want to boot the original labeled RISC-V on the zcu102 board, but after following the steps in the README, I get the following u-boot error:

SF: unrecognized JEDEC id bytes: 00, 00, 00
Failed to initialize SPI flash at 0:0 (error -2)
SCRIPT FAILED: continuing...
starting USB...
USB0: "Synchronous Abort" handler, esr 0x96000210

To Reproduce
By following all steps in fpga/README.md and fpga/boot/README.md. I already applied the zcu102 patch.

Expected behavior
I can successfully emulate with verilator. And I used another pre-build image to boot the zcu102 board, it works well. In the pre-built u-boot image, I can check the flash model info.

ZynqMP> sf probe
SF: Detected n25q512a with page size 512 Bytes, erase size 128 KiB, total 128 MiB

So I think it is not a hardware problem.

Screenshots
The serial output log:

Xilinx Zynq MP First Stage Boot Loader
Release 2019.1 Sep 9 2022 - 17:08:10
NOTICE: ATF running on XCZU9EG/silicon v4/RTL5.1 at 0xfffea000
NOTICE: BL31: Secure code at 0x0
NOTICE: BL31: Non secure code at 0x8000000
NOTICE: BL31: v2.0(release):xilinx-v2019.1
NOTICE: BL31: Built : 09:35:16, Sep 8 2022
PMUFW: v1.1

U-Boot 2019.01 (Sep 08 2022 - 09:37:49 +0800)

Model: ZynqMP ZCU102 Rev1.0
Board: Xilinx ZynqMP
DRAM: 4 GiB
EL Level: EL2
Chip ID: zu9eg
MMC: mmc@ff170000: 0
Loading Environment from FAT... *** Warning - bad CRC, using default environment

In: serial@ff000000
Out: serial@ff000000
Err: serial@ff000000
Bootmode: LVL_SHFT_SD_MODE1
Reset reason: EXTERNAL
Net: ZYNQ GEM: ff0e0000, phyaddr c, interface rgmii-id

Warning: ethernet@ff0e0000 (eth0) using random MAC address - 0a:64:48:dd:e8:1e
eth0: ethernet@ff0e0000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
MMC Device 1 not found
no mmc device at slot 1
SF: unrecognized JEDEC id bytes: 00, 00, 00
Failed to initialize SPI flash at 0:0 (error -2)
SCRIPT FAILED: continuing...
starting USB...
USB0: "Synchronous Abort" handler, esr 0x96000210
elr: 0000000008059418 lr : 0000000008059414 (reloc)
elr: 000000007ff36418 lr : 000000007ff36414
x0 : 00000000fe200000 x1 : 000000007decd050
x2 : 00000000fe200000 x3 : 000000007dec20e8
x4 : 0000000000000000 x5 : 0000000000000000
x6 : 000000007decb63c x7 : 0000000000000003
x8 : 000000007dec2e28 x9 : 0000000000000008
x10: 0000000000001ff4 x11: 000000007dec1fbc
x12: 0000000000001fad x13: 0000000000001fa4
x14: 000000007dec204c x15: 000000007dec2e28
x16: 0000000000008110 x17: 0000000000000000
x18: 000000007deccdc8 x19: 00000000fe200000
x20: 000000007decf970 x21: 000000007ff9bc50
x22: 0000000000000001 x23: 000000007decf950
x24: 000000007ff91d55 x25: 000000007ffade38
x26: 0000000000000000 x27: 0000000000000000
x28: 000000007deebab0 x29: 000000007dec2130

Resetting CPU ...

ERROR ### Please RESET the board

Environment (optional, if necessary):

• Vivado 2019.1
• zcu102 board
• latest commit: f6895ab

[leepoly]

Hi, I have resolved this issue by replacing the instructions in fpga/boot/README.md by PetaLinux tools. To be brief, we need PetaLinux 2019.2 and zcu102 BSP file. Use petalinux to create, configure and build the project, and eventually package the BOOT.BIN and Image. Thus the corresponding instructions in the repo can be skipped.

Please check my blog (in Chinese) for details: https://leepoly.com/2022/09/18/fpga-zcu102-lvna-reproduction