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serial/8250: add support for Ingenic jz47xx UART quirks

The UART block used in Ingenic SoCs is advertised as NS16550 compatible,
however it isn't quite. The only difference relevant to basic usage is
the presence of a 'UART module enable' bit in the FCR register which
must be set at all times in order for the UART block to function. This
patch introduces a new UART port type for Ingenic jz47xx UARTs which
simply sets that bit.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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paulburton committed Jul 9, 2013
1 parent 52f31dc commit 3939d3a65122eb40beec6aed1484c04ffc20cc27
Showing with 28 additions and 2 deletions.
  1. +25 −1 drivers/tty/serial/8250/8250_core.c
  2. +1 −0 drivers/tty/serial/of_serial.c
  3. +2 −1 include/uapi/linux/serial_core.h
@@ -323,6 +323,13 @@ static const struct serial8250_config uart_config[] = {
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
[PORT_INGENIC_JZ] = {
.name = "Ingenic JZ UART",
.fifo_size = 64,
.tx_loadsz = 32,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_RTOIE,
},
};

/* Uart divisor latch read */
@@ -434,6 +441,20 @@ static void io_serial_out(struct uart_port *p, int offset, int value)
outb(value, p->iobase + offset);
}

static void jz_serial_out(struct uart_port *p, int offset, int value)
{
switch (offset) {
case UART_FCR:
value |= 0x10; /* Enable uart module */
break;
default:
break;
}

offset = offset << p->regshift;
writeb(value, p->membase + offset);
}

static int serial8250_default_handle_irq(struct uart_port *port);
static int exar_handle_irq(struct uart_port *port);

@@ -453,7 +474,10 @@ static void set_io_from_upio(struct uart_port *p)

case UPIO_MEM:
p->serial_in = mem_serial_in;
p->serial_out = mem_serial_out;
if (p->type == PORT_INGENIC_JZ)
p->serial_out = jz_serial_out;
else
p->serial_out = mem_serial_out;
break;

case UPIO_MEM32:
@@ -266,6 +266,7 @@ static struct of_device_id of_platform_serial_table[] = {
{ .compatible = "ibm,qpace-nwp-serial",
.data = (void *)PORT_NWPSERIAL, },
#endif
{ .compatible = "ingenic,jz-uart", .data = (void *)PORT_INGENIC_JZ, },
{ .type = "serial", .data = (void *)PORT_UNKNOWN, },
{ /* end of list */ },
};
@@ -54,7 +54,8 @@
#define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
#define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
#define PORT_MAX_8250 28 /* max port ID */
#define PORT_INGENIC_JZ 29
#define PORT_MAX_8250 29 /* max port ID */

/*
* ARM specific type numbers. These are not currently guaranteed

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