{"payload":{"header_redesign_enabled":false,"results":[{"id":"110151336","archived":false,"color":"#b2b7f8","followers":21,"has_funding_file":false,"hl_name":"MIPSfpga/digital-design-lab-manual","hl_trunc_description":"Digital Design Labs","language":"Verilog","mirror":false,"owned_by_organization":true,"public":true,"repo":{"repository":{"id":110151336,"name":"digital-design-lab-manual","owner_id":13701443,"owner_login":"MIPSfpga","updated_at":"2018-12-21T23:46:49.231Z","has_issues":false}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":48,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253AMIPSfpga%252Fdigital-design-lab-manual%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/MIPSfpga/digital-design-lab-manual/star":{"post":"HY2aoHwUk_qnkKqK3JbhUk9HLFsmW9K-An1y_ou3byjp4cajZxF29t-ADtFHaBCH3qAQwSdJMXjTKYyXJfkVMQ"},"/MIPSfpga/digital-design-lab-manual/unstar":{"post":"lywLk5jy_urt1JbGtNmVIaD8phXPE6Ph13KJa6cO9OKNzJ-lTndpM9HuKz3fxWDcKYVAd9awhsjKzkWVH5EMfw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"CTbLVkknyhNvoF-hXu4XymQ8sMtWzr_uaEJngFf9uOjx3fPYQu3en4PQAPN9uAgLGI-lKbIW04Hme0c0Vzf4ug"}}},"title":"Repository search results"}