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Hi there 👋

MJoergen | LinkedIn

Popular repositories

  1. Various projects for the Nexys4DDR board from Digilent

    VHDL 116 15

  2. mchess Public

    A very simple chess engine

    C++ 49 17

  3. formal Public

    Playing around with Formal Verification of Verilog and VHDL

    Assembly 35

  4. mchess2 Public

    A fully functioning chess engine

    C++ 19 7

  5. 65c02 Public

    Implementation of the 65C02 CPU suitable for FPGA.

    Assembly 14

  6. Forked from sy2002/MiSTer2MEGA65

    Commodore 64 core for the MEGA65 based on the MiSTer FPGA C64 core

    VHDL 11

377 contributions in the last year

Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Mon Wed Fri

Contribution activity

September 2022

Created 4 commits in 1 repository

Created an issue in ghdl/ghdl that received 2 comments

GHDL Bug occurred

Description GHDL crashes when running simulation. Output on terminal: ../../src/ieee2008/numeric_std-body.vhdl:1265:7:@0ms:(assertion warning): NUM…

1 of 3 tasks
10 contributions in private repositories Sep 2 – Sep 30

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