{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":21527084,"defaultBranch":"MrChromebox-4.22","name":"coreboot","ownerLogin":"MrChromebox","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2014-07-05T19:48:17.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/948902?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1715792866.0","currentOid":""},"activityList":{"items":[{"before":"6d5b0a94cff478e57351e66ace88d632e4b91396","after":"86a37a86a3f6a4294793e5380d12a242b8149d5a","ref":"refs/heads/MrChromebox-2405","pushedAt":"2024-05-15T00:25:40.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"[NOT FOR RELEASE] CREC hacks\n\nChange-Id: Ia61ddfa8f32ef8ff715b095b2ad9039239993ba2\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"[NOT FOR RELEASE] CREC hacks"}},{"before":"6f6434fa92fd689ddc548fe46f1301034b12ea9a","after":"6d5b0a94cff478e57351e66ace88d632e4b91396","ref":"refs/heads/MrChromebox-2405","pushedAt":"2024-05-07T03:01:44.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"build: add configs, build scripts, cfbs files for supported boards\n\nChange-Id: I9ba1b3dc448cc447ab83d64f08d14406826fcede\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"build: add configs, build scripts, cfbs files for supported boards"}},{"before":"80de2f3d79ef8f4acfbc760dda69bc00e7d8c312","after":"6f6434fa92fd689ddc548fe46f1301034b12ea9a","ref":"refs/heads/MrChromebox-2405","pushedAt":"2024-05-07T02:47:05.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"ec/google/chromeec: Re-scope CREC under \\_SB so that the Sync IRQ is accessible\n\nSync IRQ is not accessible under the limited resources of LPCB\nin Windows.\n\nIRQ is accessible under \\_SB or \\_SB.PCI0. However, since the EC\nis not a PCIe device, it makes more sense under \\_SB.\n\nMove to \\_SB so that sync IRQ doesn't cause a Code 12 in Windows\n\nTEST=build+boot google/nocturne to Win11 and verify EC device shows\nup and sync IRQ works for volume buttons in Windows\n\nChange-Id: Ib7d6ef8214e72590851487f62faa96842814db3d\nSigned-off-by: CoolStar ","shortMessageHtmlLink":"ec/google/chromeec: Re-scope CREC under \\_SB so that the Sync IRQ is …"}},{"before":null,"after":"80de2f3d79ef8f4acfbc760dda69bc00e7d8c312","ref":"refs/heads/MrChromebox-2405","pushedAt":"2024-05-06T21:56:59.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"ec/google/chromeec: Re-scope CREC under \\_SB so that the Sync IRQ is accessible\n\nSync IRQ is not accessible under the limited resources of LPCB\nin Windows.\n\nIRQ is accessible under \\_SB or \\_SB.PCI0. However, since the EC\nis not a PCIe device, it makes more sense under \\_SB.\n\nMove to \\_SB so that sync IRQ doesn't cause a Code 12 in Windows\n\nTEST=build+boot google/nocturne to Win11 and verify EC device shows\nup and sync IRQ works for volume buttons in Windows\n\nChange-Id: Ib7d6ef8214e72590851487f62faa96842814db3d\nSigned-off-by: CoolStar ","shortMessageHtmlLink":"ec/google/chromeec: Re-scope CREC under \\_SB so that the Sync IRQ is …"}},{"before":"0ce8c39f0a084a5a93d76d7fd3d36b0d665149f9","after":"9071e69522e38bef841253dc5970ca6b806d2e55","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-04-16T16:18:06.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"mb/google/brya: Enable UFS driver for edk2 payload\n\nSeveral brya-based boards use UFS for storage, so enable the edk2 UFS\ndriver when using the edk2 payload.\n\nTEST=build/boot google/brya (banshee, craaskov), verify internal boot\nmedia functional with edk2 payload.\n\nChange-Id: I3dc018582e974bf73c7668f78da9b81eeb038c01\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"mb/google/brya: Enable UFS driver for edk2 payload"}},{"before":"ec30961aef5893deee92e4f27e4986ec5c2bb2ec","after":"0ce8c39f0a084a5a93d76d7fd3d36b0d665149f9","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-04-15T13:09:58.000Z","pushType":"push","commitsCount":8,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfgs: CZN,MDN - enable SMMSTORE\n\nChange-Id: Ifa1966335d3e8eed2810a492c7eddbb9bf12fa05\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfgs: CZN,MDN - enable SMMSTORE"}},{"before":"e3c9fb235af2c9e601d07be12728915abb045175","after":"df3f5db88a70f9ac73965616b75e353da0e02db1","ref":"refs/heads/next","pushedAt":"2024-04-15T13:09:43.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"3rdparty/blobs: pull in zork ECRW updates\n\nChange-Id: I0a045f77936091e8f5e50ba4a27f8af3d8db454c\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"3rdparty/blobs: pull in zork ECRW updates"}},{"before":"531fc9c84c4f9164748d13faba6b8595260017f2","after":"e3c9fb235af2c9e601d07be12728915abb045175","ref":"refs/heads/next","pushedAt":"2024-04-12T20:01:42.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"3rdparty/blobs: add zork ECRW updates\n\nChange-Id: I1854865246604ceeb4fed73abfe76001b780bc17\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"3rdparty/blobs: add zork ECRW updates"}},{"before":"fb0c0fff0f475bb42fb07a391b5a871da3fc6140","after":"f063753d235b67547736eb022f54ac0cc8dcfa61","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-03-11T21:08:17.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"SL: set edk2 branch to uefipayload_2402\n\nChange-Id: I0140bae3bcdaa35ac1f08fef597f3651be19ff37\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"SL: set edk2 branch to uefipayload_2402"}},{"before":"05d0a69d0887e497a73a207ab641f9808d626156","after":"ec30961aef5893deee92e4f27e4986ec5c2bb2ec","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-03-09T15:36:19.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: add cfg for VELL\n\nChange-Id: I8062a35850b709e269a6b348a315b2be0ef5460b\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: add cfg for VELL"}},{"before":"822782a100162752353afe93315be0f43ce1e46b","after":"05d0a69d0887e497a73a207ab641f9808d626156","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-03-02T01:10:25.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: KARMA fix audio blob selection\n\nChange-Id: I15df4f43127c73b2c1bb99b0e60a2d591c6ce5a5\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: KARMA fix audio blob selection"}},{"before":"eb0ca286af1796d14903e44b7a7ebaa3cb267438","after":"fb0c0fff0f475bb42fb07a391b5a871da3fc6140","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-25T22:22:36.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: fix krako cfg\n\nChange-Id: I62606996a3729b414d8e8a7f6f434c3337982dcf\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: fix krako cfg"}},{"before":"b5dcc87918bd14cb1edbd1d3f11df04eefac256a","after":"eb0ca286af1796d14903e44b7a7ebaa3cb267438","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-24T00:32:31.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: fix krako cfg\n\nChange-Id: I62606996a3729b414d8e8a7f6f434c3337982dcf\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: fix krako cfg"}},{"before":"42edb73808ea4c7c5c80e46e339fbe099371c74a","after":"b5dcc87918bd14cb1edbd1d3f11df04eefac256a","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-22T15:56:55.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: fix krako cfg\n\nChange-Id: I62606996a3729b414d8e8a7f6f434c3337982dcf\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: fix krako cfg"}},{"before":"42cb5b7e1aece0d3c307a878b8581d899ee8f3b1","after":"42edb73808ea4c7c5c80e46e339fbe099371c74a","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-20T02:18:05.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: fix krako cfg\n\nChange-Id: I62606996a3729b414d8e8a7f6f434c3337982dcf\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: fix krako cfg"}},{"before":"a98a262a433ba13380337de0388ba4c23c03cd68","after":"42cb5b7e1aece0d3c307a878b8581d899ee8f3b1","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-18T17:17:15.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/common/lpc_lib: Demote printk for IO base value 0\n\nAn IO base of 0 set for a LPC-attached PNP device is more likely a sign\nthat the IO register is unused than an error, so demote the printk\nmessage from ERROR to SPEW and adjust the text accordingly.\n\nTEST=build/boot purism/librem_cnl (Mini v2), verify no errors in cbmem\nlog for unused registers in the SIO RTC.\n\nChange-Id: I593f8e3c7eb9e877f89568fd63eabe12bb777f93\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/common/lpc_lib: Demote printk for IO base value 0"}},{"before":"1faffc7db9c5a22e26326f74aa6a5f8144cd783b","after":"a98a262a433ba13380337de0388ba4c23c03cd68","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-18T01:45:05.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/common/lpc_lib: Demote printk for IO base value 0\n\nAn IO base of 0 set for a LPC-attached PNP device is more likely a sign\nthat the IO register is unused than an error, so demote the printk\nmessage from ERROR to SPEW and adjust the text accordingly.\n\nTEST=build/boot purism/librem_cnl (Mini v2), verify no errors in cbmem\nlog for unused registers in the SIO RTC.\n\nChange-Id: I593f8e3c7eb9e877f89568fd63eabe12bb777f93\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/common/lpc_lib: Demote printk for IO base value 0"}},{"before":"5ee42e409cf771978e492e78d67de270d65ecf05","after":"1faffc7db9c5a22e26326f74aa6a5f8144cd783b","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-17T02:32:00.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"site-local/Kconfig: Don't select USE_LEGACY_8254_TIMER by default\n\nCauses S0ix issues on CML/TGL/ADL\n\nChange-Id: I91bc8ebc745c3b4316cd35ac088d7605d61db918\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"site-local/Kconfig: Don't select USE_LEGACY_8254_TIMER by default"}},{"before":null,"after":"5ee42e409cf771978e492e78d67de270d65ecf05","ref":"refs/heads/MrChromebox-2402","pushedAt":"2024-02-14T23:02:36.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfgs: clean up defconfigs\n\nChange-Id: I6b13e08632013b29dd9d71ef56d1b27073746efc\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfgs: clean up defconfigs"}},{"before":"4dec5e7f67a160a7e8a59dddd80daef96cb7d0e4","after":"822782a100162752353afe93315be0f43ce1e46b","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-02-13T17:47:23.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"build-uefi.sh: drop creation of json file\n\nChange-Id: I9729f11c9885834469860bd2b856bc7e4a4157ab\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"build-uefi.sh: drop creation of json file"}},{"before":"6ff158ddcf4e266a8363c7e5a19e4c105ef9d4d3","after":"4dec5e7f67a160a7e8a59dddd80daef96cb7d0e4","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-02-05T21:58:28.000Z","pushType":"push","commitsCount":4,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfg: Add cfgs for landia, magister, maglet\n\nChange-Id: Ic92867f7d074e3f32d0f7c1fccca273daa30ee34\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfg: Add cfgs for landia, magister, maglet"}},{"before":"0aa86b22078188a9032303f4c24dabe91559a185","after":"6ff158ddcf4e266a8363c7e5a19e4c105ef9d4d3","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-20T20:26:35.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"cfgs: add cfg for redrix4es\n\nChange-Id: Ic6aafae868983e11e8a35c6e05325e09a3cd1053\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"cfgs: add cfg for redrix4es"}},{"before":"8f330dbe036ea4897d72661db7746ee5ac88643e","after":"0aa86b22078188a9032303f4c24dabe91559a185","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-20T03:00:35.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/commonlake: Re-add SATA to soc_api_name() list\n\nNow that we've added an ACPI device for SATA, add the name back\nto the soc_acpi_name() list so the PEPD LPI constraint list\ngenerates a valid reference to the SATA device.\n\nTEST=build/boot Win11 on google/puff (kaisa).\n\nChange-Id: I134058f5ef78f419dc5538452614125ad44bf29d\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/commonlake: Re-add SATA to soc_api_name() list"}},{"before":"fbe7083797e505826f4b96be9707e84a382425a2","after":"8f330dbe036ea4897d72661db7746ee5ac88643e","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-20T02:03:10.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/commonlake: Re-add SATA to soc_api_name() list\n\nNow that we've added an ACPI device for SATA, add the name back\nto the soc_acpi_name() list so the PEPD LPI constraint list\ngenerates a valid reference to the SATA device.\n\nTEST=build/boot Win11 on google/puff (kaisa).\n\nChange-Id: I134058f5ef78f419dc5538452614125ad44bf29d\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/commonlake: Re-add SATA to soc_api_name() list"}},{"before":"ec5b99304eb6f5546187ee02df300d6899b78faf","after":"fbe7083797e505826f4b96be9707e84a382425a2","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-20T00:44:44.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/commonlake: Re-add SATA to soc_api_name() list\n\nNow that we've added an ACPI device for SATA, add the name back\nto the soc_acpi_name() list so the PEPD LPI constraint list\ngenerates a valid reference to the SATA device.\n\nTEST=build/boot Win11 on google/puff (kaisa).\n\nChange-Id: I134058f5ef78f419dc5538452614125ad44bf29d\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/commonlake: Re-add SATA to soc_api_name() list"}},{"before":"e68ba5fbd81260ca1ed036bfa56847f9b2991d8b","after":"ec5b99304eb6f5546187ee02df300d6899b78faf","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-18T04:52:34.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/intel/commonlake: Re-add SATA to soc_api_name() list\n\nNow that we've added an ACPI device for SATA, add the name back\nto the soc_acpi_name() list so the PEPD LPI constraint list\ngenerates a valid reference to the SATA device.\n\nTEST=build/boot Win11 on google/puff (kaisa).\n\nChange-Id: I134058f5ef78f419dc5538452614125ad44bf29d\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"soc/intel/commonlake: Re-add SATA to soc_api_name() list"}},{"before":"1da777613710c5cf32291bfeacbe8310e05a9958","after":"e68ba5fbd81260ca1ed036bfa56847f9b2991d8b","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-17T01:18:11.000Z","pushType":"push","commitsCount":6,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"mb/google/drallion: Drop GMA default panel\n\nRedundant when generic gfx driver is used\n\nChange-Id: I8ed1eede05f531f4c76e7fa168c2b92fae7e45cb\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"mb/google/drallion: Drop GMA default panel"}},{"before":"7a404865580da95ae02881dc73908463e56e757f","after":"1da777613710c5cf32291bfeacbe8310e05a9958","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2024-01-08T02:32:22.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"soc/amd/picasso/Kconfig: select SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF\n\nCommit 850b6c6254ab (\"soc/amd/picasso: add eMMC MMIO device to\ndevicetree\") broke both S3 resume on Morphius SKUs that use an NVMe SSD\ninstead of an eMMC and boot on the currently out-of-tree ASRock X370\nKiller SLI board. In the latter case, commenting out the\npower_off_aoac_device call inside the emmc_enable function fixed things.\n\nSigned-off-by: Felix Held \nChange-Id: Id976734c64efe7e0c3d8b073c8009849be291241","shortMessageHtmlLink":"soc/amd/picasso/Kconfig: select SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF"}},{"before":"661b2f6af6ec478b0252803b14a06802251e77bb","after":"7a404865580da95ae02881dc73908463e56e757f","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2023-12-26T00:01:26.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"Revert \"soc/amd/picasso: add eMMC MMIO device to devicetree\"\n\nThis reverts commit 850b6c6254ab34cdbda24818cb0ecca484c01c86.\n\nReverting as this breaks S3 resume on Picasso\n\nSigned-off-by: Matt DeVillier","shortMessageHtmlLink":"Revert \"soc/amd/picasso: add eMMC MMIO device to devicetree\""}},{"before":"209b167567818df791161a69228cf838624beeb5","after":"661b2f6af6ec478b0252803b14a06802251e77bb","ref":"refs/heads/MrChromebox-4.22","pushedAt":"2023-12-24T01:28:31.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"MrChromebox","name":"MrChromebox","path":"/MrChromebox","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/948902?s=80&v=4"},"commit":{"message":"site-local/Kconfig: disable FMAP cache for PCO\n\nneeded to boot with signed verstage\n\nChange-Id: I15e2f9be092cf418b6366b255295cb2eeaac61a3\nSigned-off-by: Matt DeVillier ","shortMessageHtmlLink":"site-local/Kconfig: disable FMAP cache for PCO"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAESgKT9QA","startCursor":null,"endCursor":null}},"title":"Activity · MrChromebox/coreboot"}