hdl: fpga_v0.9.0

Nuand · Oct 26, 2018 · a0f89f4 · a0f89f4
1 parent 95aa183
commit a0f89f4
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Showing 3 changed files with 17 additions and 2 deletions.
diff --git a/hdl/CHANGELOG b/hdl/CHANGELOG
@@ -5,6 +5,21 @@ For more detailed information, please see the git change log and issue tracker
 hosted on GitHub: https://github.com/nuand/bladeRF
 ================================================================================
 
+--------------------------------
+v0.9.0 (2018-10-26)
+--------------------------------
+ * bladeRF: hosted: fix typo in toggle_led1
+ * bladeRF: move AGC SPI driver into 80 MHz clock domain (fixes #640) (#642)
+ * bladeRF: timing improvements (fixes #395) (#652)
+ * build: Cygwin compatibility (#660)
+ * bladeRF: adsb: adjust build and FIFO type to match bladeRF-micro impl
+ * bladeRF-micro: adsb: implement support for ADS-B core on bladeRF micro
+ * fx3_gpif: clean up metadata flags field in GPIF
+ * fifo_writer: add metadata flags for miniexp{1,2} IO pin status
+ * nios: clarify README.md
+ * bladeRF-micro: add false path constraint for pwr_status (#681)
+ * bladeRF-micro: weak pull-up on fx3_uart_rxd (fixes #679) (#683)
+
 --------------------------------
 v0.8.0 (2018-09-05)
 --------------------------------

diff --git a/hdl/fpga/platforms/bladerf-micro/software/bladeRF_nios/src/fpga_version.h b/hdl/fpga/platforms/bladerf-micro/software/bladeRF_nios/src/fpga_version.h
@@ -7,7 +7,7 @@
 
 #define FPGA_VERSION_ID         0x7777
 #define FPGA_VERSION_MAJOR      0
-#define FPGA_VERSION_MINOR      8
+#define FPGA_VERSION_MINOR      9
 #define FPGA_VERSION_PATCH      0
 #define FPGA_VERSION ((uint32_t)( FPGA_VERSION_MAJOR        | \
                                  (FPGA_VERSION_MINOR << 8)  | \

diff --git a/hdl/fpga/platforms/bladerf/software/bladeRF_nios/src/fpga_version.h b/hdl/fpga/platforms/bladerf/software/bladeRF_nios/src/fpga_version.h
@@ -7,7 +7,7 @@
 
 #define FPGA_VERSION_ID         0x7777
 #define FPGA_VERSION_MAJOR      0
-#define FPGA_VERSION_MINOR      8
+#define FPGA_VERSION_MINOR      9
 #define FPGA_VERSION_PATCH      0
 #define FPGA_VERSION ((uint32_t)( FPGA_VERSION_MAJOR        | \
                                  (FPGA_VERSION_MINOR << 8)  | \