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hdl: fpga_v0.9.0
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hdl/CHANGELOG

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hosted on GitHub: https://github.com/nuand/bladeRF
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================================================================================
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v0.9.0 (2018-10-26)
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--------------------------------
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* bladeRF: hosted: fix typo in toggle_led1
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* bladeRF: move AGC SPI driver into 80 MHz clock domain (fixes #640) (#642)
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* bladeRF: timing improvements (fixes #395) (#652)
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* build: Cygwin compatibility (#660)
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* bladeRF: adsb: adjust build and FIFO type to match bladeRF-micro impl
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* bladeRF-micro: adsb: implement support for ADS-B core on bladeRF micro
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* fx3_gpif: clean up metadata flags field in GPIF
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* fifo_writer: add metadata flags for miniexp{1,2} IO pin status
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* nios: clarify README.md
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* bladeRF-micro: add false path constraint for pwr_status (#681)
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* bladeRF-micro: weak pull-up on fx3_uart_rxd (fixes #679) (#683)
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v0.8.0 (2018-09-05)
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hdl/fpga/platforms/bladerf-micro/software/bladeRF_nios/src/fpga_version.h

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#define FPGA_VERSION_ID 0x7777
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#define FPGA_VERSION_MAJOR 0
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#define FPGA_VERSION_MINOR 8
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#define FPGA_VERSION_MINOR 9
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#define FPGA_VERSION_PATCH 0
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#define FPGA_VERSION ((uint32_t)( FPGA_VERSION_MAJOR | \
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(FPGA_VERSION_MINOR << 8) | \

hdl/fpga/platforms/bladerf/software/bladeRF_nios/src/fpga_version.h

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#define FPGA_VERSION_ID 0x7777
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#define FPGA_VERSION_MAJOR 0
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#define FPGA_VERSION_MINOR 8
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#define FPGA_VERSION_MINOR 9
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#define FPGA_VERSION_PATCH 0
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#define FPGA_VERSION ((uint32_t)( FPGA_VERSION_MAJOR | \
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(FPGA_VERSION_MINOR << 8) | \

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