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hdl: Modified constraints of GPIF drive strength.

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bpadalino committed Feb 1, 2014
1 parent a827282 commit bc88a82090fc90397b34a71a446eae2a3e259f04
@@ -26,7 +26,7 @@ set_input_delay -clock [get_clocks fx3_virtual] -max 8.0 [get_ports {fx3_gpif* f
set_input_delay -clock [get_clocks fx3_virtual] -min 0.5 [get_ports {fx3_gpif* fx3_ctl*}] -add_delay
set_output_delay -clock [get_clocks fx3_virtual] -max 2.0 [get_ports {fx3_gpif* fx3_ctl*}]
set_output_delay -clock [get_clocks fx3_virtual] -min 1.5 [get_ports {fx3_gpif* fx3_ctl*}] -add_delay
set_output_delay -clock [get_clocks fx3_virtual] -min -0.5 [get_ports {fx3_gpif* fx3_ctl*}] -add_delay
# LMS sample interface
set_input_delay -clock [get_clocks lms_rx_virtual] -max 6.0 [get_ports {lms_rx_data* lms_rx_iq_select}]
@@ -306,3 +306,7 @@ set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION "USE AS RE
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Drive Strength and Slew Rate
set_instance_assignment -name SLEW_RATE 2 -to fx3_gpif[*]
set_instance_assignment -name CURRENT_STRENGTH_NEW 16MA -to fx3_gpif[*]

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