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rename Nvdla -> NvDla.

This is used to follow NvDla SW naming convention.
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lubatang committed Jan 10, 2019
1 parent 5c8dfab commit d9ef1afbbbb243a2e5d40e69f379349b33b31ac6
@@ -66,6 +66,7 @@ class Quadruple
x86_64, // X86-64: amd64, x86_64
xcore, // XCore: xcore
mblaze, // MBlaze: mblaze
nvdla, // NvDla
nvptx, // NVPTX: 32-bit
nvptx64, // NVPTX: 64-bit
le32, // le32: generic little-endian 32-bit CPU (PNaCl / Emscripten)
@@ -504,7 +504,7 @@ include $(srcdir)/Target/X86/Makefile.am
endif

if ENABLE_NVDLA_TARGET
include $(srcdir)/Target/NVDLA/Makefile.am
include $(srcdir)/Target/NvDla/Makefile.am
endif

# FIXME: embraced by flag?

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@@ -12,7 +12,7 @@
#include <onnc/IR/Compute/InputOperator.h>
#include <onnc/IR/Compute/OutputOperator.h>
#include <onnc/IR/ComputeVisitor.h>
#include "NvdlaMeta.h"
#include "NvDlaMeta.h"

namespace onnc {

@@ -21,7 +21,7 @@ namespace nvdla {
class CodeEmitVisitor : public ComputeVisitor
{
public:
NvdlaBackendMeta *m_pMeta;
NvDlaBackendMeta *m_pMeta;
static char ID;

/// ONNC defined operators @{
@@ -46,10 +46,10 @@ class CodeEmitVisitor : public ComputeVisitor
int packWeight(const Tensor *t, int dims[4], int gidx);
int packBias(const Tensor *t, int dims[4], int gidx);

void issueEmuOp(NvdlaEmuOperation *op);
void issueEmuOp(NvDlaEmuOperation *op);
int issueEmuAddr(int mid);
void issueDlaOp(NvdlaDlaOperation *op, NvdlaDlaOperation *op_fuse, NvdlaDlaOperation *op_prev);
int issueDlaAddr(int mid, NvdlaCubeInfo cube, int groups, int gidx, int hofs);
void issueDlaOp(NvDlaDlaOperation *op, NvDlaDlaOperation *op_fuse, NvDlaDlaOperation *op_prev);
int issueDlaAddr(int mid, NvDlaCubeInfo cube, int groups, int gidx, int hofs);
};

} // namespace nvdla
@@ -1,14 +1,14 @@
ONNC_TARGET_SOURCES += \
Target/Nvdla/NvdlaBackend.cpp \
Target/Nvdla/CodeEmitVisitor.cpp \
Target/Nvdla/Loadable.cpp \
Target/Nvdla/NvdlaMeta.cpp \
Target/Nvdla/NvdlaMemInfoPass.cpp \
Target/Nvdla/NvdlaFileGenPass.cpp \
Target/Nvdla/NvdlaTaskSubmitPass.cpp \
Target/Nvdla/fp16.c \
Target/Nvdla/TargetInfo/NvdlaTargetInfo.cpp \
Target/Nvdla/TargetInfo/NvdlaTargetMemInfo.cpp
Target/NvDla/NvDlaBackend.cpp \
Target/NvDla/CodeEmitVisitor.cpp \
Target/NvDla/Loadable.cpp \
Target/NvDla/NvDlaMeta.cpp \
Target/NvDla/NvDlaMemInfoPass.cpp \
Target/NvDla/NvDlaFileGenPass.cpp \
Target/NvDla/NvDlaTaskSubmitPass.cpp \
Target/NvDla/fp16.c \
Target/NvDla/TargetInfo/NvDlaTargetInfo.cpp \
Target/NvDla/TargetInfo/NvDlaTargetMemInfo.cpp

ONNC_INCLUDES += \
-I${srcdir}/Target/Nvdla/include
-I${srcdir}/Target/NvDla/include
@@ -1,17 +1,17 @@
//===- NvdlaBackend.cpp -----------------------------------------------------===//
//===- NvDlaBackend.cpp -----------------------------------------------------===//
//
// The ONNC Project
//
// See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "NvdlaBackend.h"
#include "TargetInfo/NvdlaTargetInfo.h"
#include "TargetInfo/NvdlaTargetMemInfo.h"
#include "NvdlaMemInfoPass.h"
#include "NvDlaBackend.h"
#include "TargetInfo/NvDlaTargetInfo.h"
#include "TargetInfo/NvDlaTargetMemInfo.h"
#include "NvDlaMemInfoPass.h"
#include "CodeEmitVisitor.h"
#include "NvdlaTaskSubmitPass.h"
#include "NvdlaFileGenPass.h"
#include "NvDlaTaskSubmitPass.h"
#include "NvDlaFileGenPass.h"

#include <onnc/Analysis/UpdateGraphOutputSize.h>
#include <onnc/Analysis/NodeIRScheduler.h>
@@ -58,25 +58,25 @@
using namespace onnc;

//===----------------------------------------------------------------------===//
// NvdlaBackend
// NvDlaBackend
//===----------------------------------------------------------------------===//
NvdlaBackend::NvdlaBackend(const TargetOptions& pOptions)
NvDlaBackend::NvDlaBackend(const TargetOptions& pOptions)
: TargetBackend(pOptions) {
m_pMemInfo = new NvdlaTargetMemInfo();
m_pMeta = new NvdlaBackendMeta();
m_pMemInfo = new NvDlaTargetMemInfo();
m_pMeta = new NvDlaBackendMeta();
}

NvdlaBackend::~NvdlaBackend()
NvDlaBackend::~NvDlaBackend()
{
// clear the contents of loadable before delete
delete m_pMeta;
delete m_pMemInfo;
}


void NvdlaBackend::addTensorSel(PassManager& pPM)
void NvDlaBackend::addTensorSel(PassManager& pPM)
{
errs() << "Nvdla is invoked\n";
errs() << "NvDla is invoked\n";

// Do ONNX graph IR optimization here.

@@ -88,15 +88,15 @@ void NvdlaBackend::addTensorSel(PassManager& pPM)
// adds your ONNC IR operators.
}

void NvdlaBackend::addTensorSched(PassManager& pPM)
void NvDlaBackend::addTensorSched(PassManager& pPM)
{
// After method AddTensorSel, operators have been scheduled in an
// topological order, which totally respects the data dependency.
// However, that might not be an optimized order for certain objective.
// Add a scheduling optimization pass here.
}

void NvdlaBackend::addMemAlloc(PassManager& pPM)
void NvDlaBackend::addMemAlloc(PassManager& pPM)
{
// Input: Module
// Output: LiveIntervals
@@ -111,18 +111,18 @@ void NvdlaBackend::addMemAlloc(PassManager& pPM)
addStandardSetMemOperands(pPM);
}

void NvdlaBackend::addCodeEmit(PassManager& pPM, const Path& pOutput)
void NvDlaBackend::addCodeEmit(PassManager& pPM, const Path& pOutput)
{

m_CodeEmitVisitor.m_pMeta = m_pMeta;
pPM.add(CreateNvdlaMemInfoPass(this, m_pMeta));
pPM.add(CreateNvDlaMemInfoPass(this, m_pMeta));
pPM.add(CreateCodeEmitPass(m_CodeEmitVisitor));
pPM.add(CreateNvdlaTaskSubmitPass(this, m_pMeta));
pPM.add(CreateNvdlaFileGenPass(this, m_pMeta));
pPM.add(CreateNvDlaTaskSubmitPass(this, m_pMeta));
pPM.add(CreateNvDlaFileGenPass(this, m_pMeta));

}

void NvdlaBackend::RegisterLowers(LowerRegistry& pRegistry) const
void NvDlaBackend::RegisterLowers(LowerRegistry& pRegistry) const
{
//CONV
pRegistry.emplace<ConvLower>();
@@ -165,13 +165,13 @@ void NvdlaBackend::RegisterLowers(LowerRegistry& pRegistry) const
//===----------------------------------------------------------------------===//
// Non member functions
//===----------------------------------------------------------------------===//
TargetBackend* CreateNvdlaBackend(const TargetOptions& pOptions)
TargetBackend* CreateNvDlaBackend(const TargetOptions& pOptions)
{
return new NvdlaBackend(pOptions);
return new NvDlaBackend(pOptions);
}

extern "C" void InitializeNvdlaONNCBackend()
extern "C" void InitializeNvDlaONNCBackend()
{
onnc::TargetRegistry::RegisterTargetBackend(getTheNvdlaTarget(),
CreateNvdlaBackend);
onnc::TargetRegistry::RegisterTargetBackend(getTheNvDlaTarget(),
CreateNvDlaBackend);
}
@@ -1,4 +1,4 @@
//===- NvdlaBackend.h -------------------------------------------------------===//
//===- NvDlaBackend.h -------------------------------------------------------===//
//
// The ONNC Project
//
@@ -10,17 +10,17 @@
#include <string>
#include <onnc/Target/TargetBackend.h>

#include "NvdlaMeta.h"
#include "NvDlaMeta.h"
#include "CodeEmitVisitor.h"

namespace onnc {

class NvdlaBackend : public TargetBackend
class NvDlaBackend : public TargetBackend
{
public:
NvdlaBackend(const TargetOptions& pOptions);
NvDlaBackend(const TargetOptions& pOptions);

virtual ~NvdlaBackend();
virtual ~NvDlaBackend();

void addTensorSel(PassManager& pPM) override;

@@ -53,7 +53,7 @@ class NvdlaBackend : public TargetBackend
std::vector<ILoadable::EventListEntry> m_EventListEntries;
#endif

NvdlaBackendMeta *m_pMeta;
NvDlaBackendMeta *m_pMeta;
nvdla::CodeEmitVisitor m_CodeEmitVisitor;
//Loadable m_loadable;
};
@@ -5,7 +5,7 @@
// See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "NvdlaFileGenPass.h"
#include "NvDlaFileGenPass.h"

#include <onnc/IR/Compute/Tensor.h>
#include <onnc/IR/Compute/Initializer.h>
@@ -18,15 +18,15 @@
using namespace onnc;

//===----------------------------------------------------------------------===//
// NvdlaFileGenPass
// NvDlaFileGenPass
//===----------------------------------------------------------------------===//
NvdlaFileGenPass::NvdlaFileGenPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta)
NvDlaFileGenPass::NvDlaFileGenPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta)
: ModulePass(ID),
m_pBackend(pBackend), m_pMeta(pMeta){
}

Pass::ReturnType NvdlaFileGenPass::runOnModule(Module &pModule)
Pass::ReturnType NvDlaFileGenPass::runOnModule(Module &pModule)
{
//file output
//priv::LoadableFactory::LoadablePrivPair loadable = priv::LoadableFactory::newLoadable();
@@ -44,9 +44,9 @@ Pass::ReturnType NvdlaFileGenPass::runOnModule(Module &pModule)
//===----------------------------------------------------------------------===//
// Factory method
//===----------------------------------------------------------------------===//
char NvdlaFileGenPass::ID = 0;
char NvDlaFileGenPass::ID = 0;

NvdlaFileGenPass *onnc::CreateNvdlaFileGenPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta) {
return new NvdlaFileGenPass(pBackend, pMeta);
NvDlaFileGenPass *onnc::CreateNvDlaFileGenPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta) {
return new NvDlaFileGenPass(pBackend, pMeta);
}
@@ -10,32 +10,32 @@

#include <onnc/Core/ModulePass.h>

#include "NvdlaMeta.h"
#include "NvDlaMeta.h"

namespace onnc {

class TargetBackend;

class NvdlaFileGenPass : public ModulePass
class NvDlaFileGenPass : public ModulePass
{
public:
static char ID;

public:
NvdlaFileGenPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta);
NvDlaFileGenPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta);

ReturnType runOnModule(Module& pModule) override;

private:

TargetBackend *m_pBackend;
NvdlaBackendMeta *m_pMeta;
NvDlaBackendMeta *m_pMeta;
};

// XXX: Experimental
NvdlaFileGenPass *CreateNvdlaFileGenPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta);
NvDlaFileGenPass *CreateNvDlaFileGenPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta);

} // namespace of onnc

@@ -5,7 +5,7 @@
// See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "NvdlaMemInfoPass.h"
#include "NvDlaMemInfoPass.h"

#include <onnc/IR/Compute/Tensor.h>
#include <onnc/IR/Compute/Initializer.h>
@@ -20,15 +20,15 @@
using namespace onnc;

//===----------------------------------------------------------------------===//
// NvdlaMemInfoPass
// NvDlaMemInfoPass
//===----------------------------------------------------------------------===//
NvdlaMemInfoPass::NvdlaMemInfoPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta)
NvDlaMemInfoPass::NvDlaMemInfoPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta)
: ModulePass(ID),
m_pBackend(pBackend), m_pMeta(pMeta){
}

Pass::ReturnType NvdlaMemInfoPass::runOnModule(Module &pModule)
Pass::ReturnType NvDlaMemInfoPass::runOnModule(Module &pModule)
{
// [0] entry of memory & address list
{
@@ -128,7 +128,7 @@ Pass::ReturnType NvdlaMemInfoPass::runOnModule(Module &pModule)
int idx = 0;
for (auto i: t->getDimensions())
dims[idx++] = i;
NvdlaCubeInfo cubeinfo(NVDLA_CUBE_FEATURE, dims[0], dims[1], dims[2], dims[3], sizeof(unsigned short));
NvDlaCubeInfo cubeinfo(NVDLA_CUBE_FEATURE, dims[0], dims[1], dims[2], dims[3], sizeof(unsigned short));
mle.size = cubeinfo.size;

mle.alignment = 4096;
@@ -211,9 +211,9 @@ Pass::ReturnType NvdlaMemInfoPass::runOnModule(Module &pModule)
//===----------------------------------------------------------------------===//
// Factory method
//===----------------------------------------------------------------------===//
char NvdlaMemInfoPass::ID = 0;
char NvDlaMemInfoPass::ID = 0;

NvdlaMemInfoPass *onnc::CreateNvdlaMemInfoPass(TargetBackend *pBackend,
NvdlaBackendMeta *pMeta) {
return new NvdlaMemInfoPass(pBackend, pMeta);
NvDlaMemInfoPass *onnc::CreateNvDlaMemInfoPass(TargetBackend *pBackend,
NvDlaBackendMeta *pMeta) {
return new NvDlaMemInfoPass(pBackend, pMeta);
}
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