Permalink
Browse files

Add fsl ls1021a platform support.

Added plat-ls, with initial support for fsl ls1021a platform.
Added uart driver (ns16550).

Signed-off-by: Sumit Garg <b49020@freescale.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
  • Loading branch information...
Sumit Garg Pascal Brand
Sumit Garg authored and Pascal Brand committed Oct 12, 2015
1 parent 35ade1d commit 85278139a8f914dddb36808861c86a472ecb0271
@@ -124,5 +124,9 @@ script:
# Texas Instruments dra7xx
- PLATFORM=ti PLATFORM_FLAVOR=dra7xx make -j8 all -s

# FSL ls1021a
- PLATFORM=ls PLATFORM_FLAVOR=ls1021atwr make -j8 all -s
- PLATFORM=ls PLATFORM_FLAVOR=ls1021aqds make -j8 all -s

# Run regression tests (xtest in QEMU)
- (cd ${HOME}/optee_repo/build && make -s -j8 check CROSS_COMPILE="ccache arm-linux-gnueabihf-" DUMP_LOGS_ON_ERROR=1)
@@ -71,6 +71,7 @@ please read the file [build_system.md](documentation/build_system.md).
| [HiKey Board (HiSilicon Kirin 620)](https://www.96boards.org/products/hikey/)|`PLATFORM=hikey`|
| [MediaTek MT8173 EVB Board](http://www.mediatek.com/en/products/mobile-communications/tablet/mt8173/)|`PLATFORM=mediatek-mt8173`|
| Texas Instruments DRA7xx|`PLATFORM=ti-dra7xx`|
| [FSL ls1021a](http://www.freescale.com/tools/embedded-software-and-tools/hardware-development-tools/tower-development-boards/mcu-and-processor-modules/powerquicc-and-qoriq-modules/qoriq-ls1021a-tower-system-module:TWR-LS1021A?lang_cd=en)|`PLATFORM=ls-ls1021atwr`|

### 3.1 Development board for community user
For community users, we suggest using [Hikey board](https://www.96boards.org/products/ce/hikey/)
@@ -0,0 +1,28 @@
include core/arch/$(ARCH)/plat-$(PLATFORM)/platform_flags.mk

CROSS_PREFIX ?= arm-linux-gnueabihf
CROSS_COMPILE ?= $(CROSS_PREFIX)-
include mk/gcc.mk

PLATFORM_FLAVOR ?= ls1021atwr

CFG_ARM32_core ?= y
CFG_MMU_V7_TTB ?= y

core-platform-cppflags = -I$(arch-dir)/include
core-platform-subdirs += \
$(addprefix $(arch-dir)/, kernel mm tee sta) $(platform-dir)

core-platform-subdirs += $(arch-dir)/sm

libutil_with_isoc := y
CFG_SECURE_TIME_SOURCE_CNTPCT := y
CFG_WITH_STACK_CANARIES := y
CFG_16550_UART ?= y
CFG_GENERIC_BOOT ?= y
CFG_PM_STUBS ?= y
CFG_BOOT_SYNC_CPU ?= y

include mk/config.mk

CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= n
@@ -0,0 +1 @@
#include "../kernel/kern.ld.S"
@@ -0,0 +1 @@
include core/arch/arm/kernel/link.mk
@@ -0,0 +1,38 @@
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

#include <asm.S>
#include <arm.h>
#include <arm32_macros.S>

/* Layerscape platform specific function to calculate core position. */
FUNC get_core_pos , :
read_mpidr r0
/* Calculate CorePos = CoreId */
and r0, r0, #MPIDR_CPU_MASK
bx lr
END_FUNC get_core_pos
@@ -0,0 +1,84 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

#include <platform_config.h>

#include <console.h>
#include <drivers/ns16550.h>
#include <kernel/generic_boot.h>
#include <kernel/thread.h>
#include <kernel/panic.h>
#include <kernel/pm_stubs.h>
#include <mm/tee_pager.h>
#include <tee/entry.h>
#include <tee/arch_svc.h>

static void main_fiq(void);

static const struct thread_handlers handlers = {
.std_smc = tee_entry,
.fast_smc = tee_entry,
.fiq = main_fiq,
.svc = tee_svc_handler,
.abort = tee_pager_abort_handler,
.cpu_on = pm_panic,
.cpu_off = pm_panic,
.cpu_suspend = pm_panic,
.cpu_resume = pm_panic,
.system_off = pm_panic,
.system_reset = pm_panic,
};

const struct thread_handlers *generic_boot_get_handlers(void)
{
return &handlers;
}

static void main_fiq(void)
{
panic();
}

void console_init(void)
{
/*
* Do nothing, uart driver shared with normal world,
* everything for uart driver intialization is done in bootloader.
*/
}

void console_putc(int ch)
{
ns16550_putc(ch, CONSOLE_UART_BASE);
if (ch == '\n')
ns16550_putc('\r', CONSOLE_UART_BASE);
}

void console_flush(void)
{
ns16550_flush(CONSOLE_UART_BASE);
}
@@ -0,0 +1,143 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

#ifndef PLATFORM_CONFIG_H
#define PLATFORM_CONFIG_H

#define PLATFORM_FLAVOR_ID_ls1021aqds 0
#define PLATFORM_FLAVOR_ID_ls1021atwr 1
#define PLATFORM_FLAVOR_IS(flav) \
(PLATFORM_FLAVOR == PLATFORM_FLAVOR_ID_ ## flav)

#define STACK_ALIGNMENT 64

#define GIC_BASE 0x01400000
#define GICC_OFFSET 0x2000
#define GICD_OFFSET 0x1000

/* DUART 1 */
#define UART0_BASE 0x021C0500
/* DUART 2 */
#define UART1_BASE 0x021D0500
/* LPUART 1 */
#define UART2_BASE 0x02950000
/* LPUART 2 */
#define UART3_BASE 0x02960000


/* console uart define */
#define CONSOLE_UART_BASE UART0_BASE

#define DRAM0_BASE 0x80000000
#if PLATFORM_FLAVOR_IS(ls1021aqds)
#define DRAM0_SIZE 0x80000000
#endif

#if PLATFORM_FLAVOR_IS(ls1021atwr)
#define DRAM0_SIZE 0x40000000
#endif

/* Location of trusted dram on layerscape */

#if PLATFORM_FLAVOR_IS(ls1021atwr)
#define CFG_DDR_TEETZ_RESERVED_START 0xBC000000
#endif

#if PLATFORM_FLAVOR_IS(ls1021aqds)
#define CFG_DDR_TEETZ_RESERVED_START 0xFC000000
#endif

#define CFG_DDR_TEETZ_RESERVED_SIZE 0x03F00000

#define HEAP_SIZE (24 * 1024)

#define CFG_TEE_RAM_VA_SIZE (1024 * 1024)

#define CFG_TEE_CORE_NB_CORE 2

#define DDR_PHYS_START DRAM0_BASE
#define DDR_SIZE DRAM0_SIZE

#define CFG_DDR_START DDR_PHYS_START
#define CFG_DDR_SIZE DDR_SIZE

#ifndef CFG_DDR_TEETZ_RESERVED_START
#error "TEETZ reserved DDR start address undef: CFG_DDR_TEETZ_RESERVED_START"
#endif
#ifndef CFG_DDR_TEETZ_RESERVED_SIZE
#error "TEETZ reserved DDR siez undefined: CFG_DDR_TEETZ_RESERVED_SIZE"
#endif

/*
* TEE/TZ RAM layout:
*
* +-----------------------------------------+ <- CFG_DDR_TEETZ_RESERVED_START
* | TEETZ private RAM | TEE_RAM | ^
* | +--------------------+ |
* | | TA_RAM | |
* +-----------------------------------------+ | CFG_DDR_TEETZ_RESERVED_SIZE
* | | teecore alloc | |
* | TEE/TZ and NSec | PUB_RAM --------| |
* | shared memory | NSec alloc | |
* +-----------------------------------------+ v
*
* TEE_RAM : 1MByte
* PUB_RAM : 1MByte
* TA_RAM : all what is left (at least 2MByte !)
*/

/* define the several memory area sizes */
#if (CFG_DDR_TEETZ_RESERVED_SIZE < (4 * 1024 * 1024))
#error "Invalid CFG_DDR_TEETZ_RESERVED_SIZE: at least 4MB expected"
#endif

#define CFG_PUB_RAM_SIZE (1 * 1024 * 1024)
#define CFG_TEE_RAM_PH_SIZE (1 * 1024 * 1024)
#define CFG_TA_RAM_SIZE (CFG_DDR_TEETZ_RESERVED_SIZE - \
CFG_TEE_RAM_PH_SIZE - CFG_PUB_RAM_SIZE)

/* define the secure/unsecure memory areas */
#define TZDRAM_BASE (CFG_DDR_TEETZ_RESERVED_START)
#define TZDRAM_SIZE (CFG_TEE_RAM_PH_SIZE + CFG_TA_RAM_SIZE)

#define CFG_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
#define CFG_SHMEM_SIZE CFG_PUB_RAM_SIZE

/* define the memory areas (TEE_RAM must start at reserved DDR start addr */
#define CFG_TEE_RAM_START TZDRAM_BASE
#define CFG_TA_RAM_START (CFG_TEE_RAM_START + \
CFG_TEE_RAM_PH_SIZE)
#ifndef CFG_TEE_LOAD_ADDR
#define CFG_TEE_LOAD_ADDR CFG_TEE_RAM_START
#endif

#define DEVICE0_BASE ROUNDDOWN(CONSOLE_UART_BASE, \
CORE_MMU_DEVICE_SIZE)
#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE
#define DEVICE0_TYPE MEM_AREA_IO_NSEC

#endif /*PLATFORM_CONFIG_H*/
@@ -0,0 +1,25 @@
platform-cpuarch = cortex-a7
platform-cflags = -mcpu=$(platform-cpuarch) -mthumb
platform-cflags += -pipe -mthumb-interwork -mlong-calls
platform-cflags += -fno-short-enums -mno-apcs-float -fno-common
platform-cflags += -mfloat-abi=soft
platform-cflags += -mno-unaligned-access
platform-aflags = -mcpu=$(platform-cpuarch)

platform-cflags += -ffunction-sections -fdata-sections

DEBUG ?= 1
ifeq ($(DEBUG),1)
platform-cflags += -O0
else
platform-cflags += -Os
endif

platform-cflags += -g
platform-aflags += -g

platform-cflags += -g3
platform-aflags += -g3

CFG_ARM32_user_ta := y
user_ta-platform-cflags = -fpie
@@ -0,0 +1,3 @@
global-incdirs-y += .
srcs-y += main.c
srcs-y += ls_core_pos.S
Oops, something went wrong.

0 comments on commit 8527813

Please sign in to comment.