From 127ef3b09234327b1b30fa31593224f05e4ead27 Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Thu, 20 Mar 2014 17:04:22 +0100 Subject: [PATCH 1/2] stm32f103_rey6: implement std periph driver --- stm32f103rey6/Makefile | 1 + stm32f103rey6/Makefile.include | 1 + stm32f103rey6/include/hwtimer_cpu.h | 6 +- stm32f103rey6/include/timer.h | 131 +++++++++++ stm32f103rey6/periph/Makefile | 5 + stm32f103rey6/periph/timer.c | 316 ++++++++++++++++++++++++++ stm32f103rey6/stm32f103rey6-hwtimer.c | 216 ++++-------------- 7 files changed, 506 insertions(+), 170 deletions(-) create mode 100644 stm32f103rey6/include/timer.h create mode 100644 stm32f103rey6/periph/Makefile create mode 100644 stm32f103rey6/periph/timer.c diff --git a/stm32f103rey6/Makefile b/stm32f103rey6/Makefile index 5f62770..c93b52b 100644 --- a/stm32f103rey6/Makefile +++ b/stm32f103rey6/Makefile @@ -8,6 +8,7 @@ endif DIRS += $(RIOTCPU)/STM32F10x_StdPeriph_Lib_V3.5.0 DIRS += $(RIOTCPU)/cortex_common +DIRS += $(RIOTCPU)/$(CPU)/periph all: $(BINDIR)$(MODULE).a @for i in $(DIRS) ; do "$(MAKE)" -C $$i ; done ; diff --git a/stm32f103rey6/Makefile.include b/stm32f103rey6/Makefile.include index 7557e98..6d763b6 100644 --- a/stm32f103rey6/Makefile.include +++ b/stm32f103rey6/Makefile.include @@ -6,4 +6,5 @@ INCLUDES += -I$(RIOTCPU)/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdP INCLUDES += -I$(RIOTBASE)/core/include -I$(RIOTBASE)/sys/include -I$(RIOTBASE)/sys/lib export USEMODULE += cortex_common +export USEMODULE += periph diff --git a/stm32f103rey6/include/hwtimer_cpu.h b/stm32f103rey6/include/hwtimer_cpu.h index 12d6eb0..dc3a600 100644 --- a/stm32f103rey6/include/hwtimer_cpu.h +++ b/stm32f103rey6/include/hwtimer_cpu.h @@ -1,8 +1,8 @@ #ifndef HWTIMER_CPU_H_ #define HWTIMER_CPU_H_ -#define HWTIMER_MAXTIMERS 4 -#define HWTIMER_SPEED 2000 -#define HWTIMER_MAXTICKS (0xFFFF) +#define HWTIMER_MAXTIMERS (4) +#define HWTIMER_SPEED (2303U) +#define HWTIMER_MAXTICKS (0xFFFF) #endif /* HWTIMER_CPU_H_ */ diff --git a/stm32f103rey6/include/timer.h b/stm32f103rey6/include/timer.h new file mode 100644 index 0000000..dd241f1 --- /dev/null +++ b/stm32f103rey6/include/timer.h @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2014 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the LGPLv2 License. + * See the file LICENSE in the top level directory for more details. + */ + +/** + * @ingroup driver_periph + * @brief Low-level timer peripheral driver + * @{ + * + * @file timer.h + * @brief Low-level timer peripheral driver interface definitions + * + * @author Hauke Petersen + */ + +#ifndef __TIMER_H +#define __TIMER_H + +#include "periph_conf.h" + + +/** + * @brief Definition of available timers + * + * Each timer is based on a hardware timer, which can further have 1 or more channels. + * To this point 4 timers are possible, might need to be expanded for some cases. + */ +typedef enum { +#if TIMER_0_EN + TIMER_0 = 0, /*< 1st timer */ +#endif +#if TIMER_1_EN + TIMER_1, /*< 2nd timer */ +#endif +#if TIMER_2_EN + TIMER_2, /*< 3rd timer */ +#endif +#if TIMER_3_EN + TIMER_3, /*< 4th timer */ +#endif + TIMER_UNDEFINED /*< fall-back if no timer is defined */ +} tim_t; /* named tim instead of timer to avoid conflicts with vendor libraries */ + +/** + * @brief Initialize the given timer + * + * Each timer device is running with the given speed. Each can contain one or more channels + * as defined in periph_conf.h. The timer is configured in up-counting mode and will count + * until TIMER_x_MAX_VALUE as defined in used board's periph_conf.h until overflowing. + * + * The timer will be started automatically after initialization with interrupts enabled. + * + * @param dev the timer to initialize + * @param ticks_per_us the timers speed in ticks per us + * @param callback this callback is called in interrupt context, the emitting channel is + * passed as argument + * @return returns 0 on success, -1 if speed not applicable of unknown device given + */ +int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)); + +/** + * @brief Set a given timer channel for the given timer device. The callback given during + * initialization is called when timeout ticks have passed after calling this function + * + * @param dev the timer device to set + * @param channel the channel to set + * @param timeout timeout in ticks after that the registered callback is executed + * @return 1 on success, -1 on error + */ +int timer_set(tim_t dev, int channel, unsigned int timeout); + +/** + * @brief Clear the given channel of the given timer device + * + * @param dev the timer device to clear + * @param channel the channel on the given device to clear + * @return 1 on success, -1 on error + */ +int timer_clear(tim_t dev, int channel); + +/** + * @brief Read the current value of the given timer device + * + * @param dev the timer to read the current value from + * @return the timers current value + */ +unsigned int timer_read(tim_t dev); + +/** + * @brief Start the given timer. This function is only needed if the timer was stopped manually before + * + * @param dev the timer device to stop + */ +void timer_start(tim_t dev); + +/** + * @brief Stop the given timer - this will effect all of the timer's channels + * + * @param dev the timer to stop + */ +void timer_stop(tim_t dev); + +/** + * @brief Enable the interrupts for the given timer + * + * @param dev timer to enable interrupts for + */ +void timer_irq_enable(tim_t dev); + +/** + * @brief Disable interrupts for the given timer + * + * @param dev the timer to disable interrupts for + */ +void timer_irq_disable(tim_t dev); + +/** + * @brief Reset the up-counting value to zero for the given timer + * + * Note that this function effects all currently set channels and it can lead to non-deterministic timeouts + * if any channel is active when this function is called. + * + * @param dev the timer to reset + */ +void timer_reset(tim_t dev); + +#endif /* __TIMER_H */ +/** @} */ diff --git a/stm32f103rey6/periph/Makefile b/stm32f103rey6/periph/Makefile new file mode 100644 index 0000000..1be36f4 --- /dev/null +++ b/stm32f103rey6/periph/Makefile @@ -0,0 +1,5 @@ +# define the module name +MODULE = periph + +# include RIOTs generic Makefile +include $(RIOTBASE)/Makefile.base diff --git a/stm32f103rey6/periph/timer.c b/stm32f103rey6/periph/timer.c new file mode 100644 index 0000000..1c17921 --- /dev/null +++ b/stm32f103rey6/periph/timer.c @@ -0,0 +1,316 @@ +/* + * Copyright (C) 2014 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + */ + +/** + * @ingroup driver_periph + * @{ + * + * @file timer.c + * @brief Low-level timer driver implementation + * + * @author Hauke Petersen + * @author Thomas Eichinger + * + * @} + */ + +#include + +#include "stm32f10x.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_tim.h" + +#include "timer.h" +#include "periph_conf.h" + +#include "board.h" + +#define ENABLE_DEBUG (0) +#include "debug.h" + +static inline void irq_handler(tim_t timer, TIM_TypeDef *dev); + +typedef struct { + void (*cb)(int); +} timer_conf_t; + +/** + * Timer state memory + */ +timer_conf_t config[TIMER_NUMOF]; + + + +int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) +{ + TIM_TimeBaseInitTypeDef tim_init; + NVIC_InitTypeDef nvic_init; + + /* init generic timer options */ + tim_init.TIM_ClockDivision = TIM_CKD_DIV1; + tim_init.TIM_CounterMode = TIM_CounterMode_Up; + + /* setup the interrupt controller */ + nvic_init.NVIC_IRQChannelCmd = ENABLE; + nvic_init.NVIC_IRQChannelSubPriority = 0; + + /* set callback routine */ + config[dev].cb = callback; + + switch (dev) { + case TIMER_0: + /* enable clocks */ + TIMER_0_CLKEN(); + /* timer init */ + tim_init.TIM_Period = TIMER_0_MAX_VALUE; + tim_init.TIM_Prescaler = TIMER_0_PRESCALER * ticks_per_us; + TIM_TimeBaseInit(TIMER_0_DEV, &tim_init); + /* irq setup */ + nvic_init.NVIC_IRQChannel = TIMER_0_IRQCHAN; + nvic_init.NVIC_IRQChannelPreemptionPriority = TIMER_0_IRQ_PRIO; + NVIC_Init(&nvic_init); + /* enable timer */ + TIM_Cmd(TIMER_0_DEV, ENABLE); + /* clear the compare IT bits else first hwtimer_set for each channel fires instantly*/ + TIM_ClearITPendingBit(TIMER_0_DEV, TIM_IT_CC1); + TIM_ClearITPendingBit(TIMER_0_DEV, TIM_IT_CC2); + TIM_ClearITPendingBit(TIMER_0_DEV, TIM_IT_CC3); + TIM_ClearITPendingBit(TIMER_0_DEV, TIM_IT_CC4); + break; + case TIMER_1: + /* enable clocks */ + TIMER_1_CLKEN(); + /* timer init */ + tim_init.TIM_Period = TIMER_1_MAX_VALUE; + tim_init.TIM_Prescaler = TIMER_1_PRESCALER * ticks_per_us; + TIM_TimeBaseInit(TIMER_1_DEV, &tim_init); + /* irq setup */ + nvic_init.NVIC_IRQChannel = TIMER_1_IRQCHAN; + nvic_init.NVIC_IRQChannelPreemptionPriority = TIMER_1_IRQ_PRIO; + NVIC_Init(&nvic_init); + /* enable timer */ + TIM_Cmd(TIMER_1_DEV, ENABLE); + /* clear the compare IT bits else first hwtimer_set for each channel fires instantly*/ + TIM_ClearITPendingBit(TIMER_1_DEV, TIM_IT_CC1); + TIM_ClearITPendingBit(TIMER_1_DEV, TIM_IT_CC2); + TIM_ClearITPendingBit(TIMER_1_DEV, TIM_IT_CC3); + TIM_ClearITPendingBit(TIMER_1_DEV, TIM_IT_CC4); + break; + default: + return -1; + } + return 0; +} + +int timer_set(tim_t dev, int channel, unsigned int timeout) +{ + int now = timer_read(dev); + TIM_TypeDef *timer = NULL; + switch (dev) { + case TIMER_0: + timer = TIMER_0_DEV; + break; + case TIMER_1: + timer = TIMER_1_DEV; + break; + default: + return -1; + } + DEBUG("set timer %i to %i + %i\n", channel-1, now, timeout); + switch (channel) { + case 1: + TIM_SetCompare1(timer, now + timeout - 1); + TIM_ITConfig(timer, TIM_IT_CC1, ENABLE); + break; + case 2: + TIM_SetCompare2(timer, now + timeout - 1); + TIM_ITConfig(timer, TIM_IT_CC2, ENABLE); + break; + case 3: + TIM_SetCompare3(timer, now + timeout - 1); + TIM_ITConfig(timer, TIM_IT_CC3, ENABLE); + break; + case 4: + TIM_SetCompare4(timer, now + timeout - 1); + TIM_ITConfig(timer, TIM_IT_CC4, ENABLE); + break; + } + return 0; +} + + +int timer_clear(tim_t dev, int channel) +{ + TIM_TypeDef *timer = NULL; + switch (dev) { + case TIMER_0: + timer = TIMER_0_DEV; + break; + case TIMER_1: + timer = TIMER_1_DEV; + break; + default: + return -1; + } + switch (channel) { + case 1: + TIM_ITConfig(timer, TIM_IT_CC1, DISABLE); + break; + case 2: + TIM_ITConfig(timer, TIM_IT_CC2, DISABLE); + break; + case 3: + TIM_ITConfig(timer, TIM_IT_CC3, DISABLE); + break; + case 4: + TIM_ITConfig(timer, TIM_IT_CC4, DISABLE); + break; + } + return 0; +} + +unsigned int timer_read(tim_t dev) +{ + int value = -1; + switch (dev) { + case TIMER_0: + value = TIM_GetCounter(TIMER_0_DEV); + break; + case TIMER_1: + value = TIM_GetCounter(TIMER_1_DEV); + break; + default: + return -1; + } + return value; +} + +void timer_stop(tim_t dev) +{ + switch (dev) { + case TIMER_0: + TIM_Cmd(TIMER_0_DEV, DISABLE); + break; + case TIMER_1: + TIM_Cmd(TIMER_1_DEV, DISABLE); + break; + default: + break; + } +} + +void timer_start(tim_t dev) +{ + switch (dev) { + case TIMER_0: + TIM_Cmd(TIMER_0_DEV, ENABLE); + break; + case TIMER_1: + TIM_Cmd(TIMER_1_DEV, ENABLE); + break; + default: + break; + } +} + +void timer_irq_enable(tim_t dev) +{ + switch (dev) { + case TIMER_0: + NVIC_EnableIRQ(TIMER_0_IRQCHAN); + break; + case TIMER_1: + NVIC_EnableIRQ(TIMER_1_IRQCHAN); + break; + default: + break; + } +} + +void timer_irq_disable(tim_t dev) +{ + switch (dev) { + case TIMER_0: + NVIC_DisableIRQ(TIMER_0_IRQCHAN); + break; + case TIMER_1: + NVIC_DisableIRQ(TIMER_1_IRQCHAN); + break; + default: + break; + } +} + +void timer_reset(tim_t dev) +{ + switch (dev) { + case TIMER_0: + TIM_SetCompare1(TIMER_0_DEV, 0); + TIM_SetCompare2(TIMER_0_DEV, 0); + TIM_SetCompare3(TIMER_0_DEV, 0); + TIM_SetCompare4(TIMER_0_DEV, 0); + break; + case TIMER_1: + TIM_SetCompare1(TIMER_1_DEV, 0); + TIM_SetCompare2(TIMER_1_DEV, 0); + TIM_SetCompare3(TIMER_1_DEV, 0); + TIM_SetCompare4(TIMER_1_DEV, 0); + break; + default: + break; + } +} + + +static inline void irq_handler(tim_t timer, TIM_TypeDef *dev) +{ + if (TIM_GetITStatus(dev, TIM_IT_CC1) == SET) { + TIM_ClearITPendingBit(dev, TIM_IT_CC1); + TIM_ITConfig(dev, TIM_IT_CC1, DISABLE); + config[timer].cb(1); + DEBUG("Firing 0 at %i\n", TIM_GetCounter(TIMER_0_DEV)); + } else if (TIM_GetITStatus(dev, TIM_IT_CC2) == SET) { + TIM_ClearITPendingBit(dev, TIM_IT_CC2); + TIM_ITConfig(dev, TIM_IT_CC2, DISABLE); + config[timer].cb(2); + DEBUG("Firing 1 at %i\n", TIM_GetCounter(TIMER_0_DEV)); + } else if (TIM_GetITStatus(dev, TIM_IT_CC3) == SET) { + TIM_ClearITPendingBit(dev, TIM_IT_CC3); + TIM_ITConfig(dev, TIM_IT_CC3, DISABLE); + config[timer].cb(3); + DEBUG("Firing 2 at %i\n", TIM_GetCounter(TIMER_0_DEV)); + } else if (TIM_GetITStatus(dev, TIM_IT_CC4) == SET) { + TIM_ClearITPendingBit(dev, TIM_IT_CC4); + TIM_ITConfig(dev, TIM_IT_CC4, DISABLE); + config[timer].cb(4); + DEBUG("Firing 3 at %i\n", TIM_GetCounter(TIMER_0_DEV)); + } +} + + +#ifdef TIMER_0_EN +__attribute__((naked)) +void TIMER_0_ISR(void) +{ + asm("push {LR}"); + irq_handler(TIMER_0, TIMER_0_DEV); + asm("pop {r0}"); + asm("bx r0"); +} +#endif + +#ifdef TIMER_1_EN +__attribute__((naked)) +void TIMER_1_ISR(void) +{ + asm("push {r0}"); + irq_handler(TIMER_1, TIMER_1_DEV); + asm("pop {r0}"); + asm("bx r0"); +} +#endif diff --git a/stm32f103rey6/stm32f103rey6-hwtimer.c b/stm32f103rey6/stm32f103rey6-hwtimer.c index 317f1a5..4683b93 100644 --- a/stm32f103rey6/stm32f103rey6-hwtimer.c +++ b/stm32f103rey6/stm32f103rey6-hwtimer.c @@ -1,196 +1,78 @@ -#include "cpu.h" -#include "sched.h" -#include "hwtimer.h" - +/* + * Copyright (C) 2013 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + */ + +/** + * @ingroup cpu_stm32f303vg + * @{ + * + * @file hwtimer_arch.c + * @brief Implementation of the kernels hwtimer interface + * + * The hardware timer implementation uses the Coretex build-in system timer as backend. + * + * @author Hauke Petersen + * + * @} + */ + +#include +#include + +#include "hwtimer_arch.h" #include "board.h" +#include "timer.h" +#include "thread.h" -#define ENABLE_DEBUG (0) +#define ENABLE_DEBUG (0) #include "debug.h" -static void (*int_handler)(int); - -unsigned long hwtimer_arch_now(void) -{ - return TIM_GetCounter(TIM2); -} - -/*---------------------------------------------------------------------------*/ - -__attribute__((naked)) -void TIM2_IRQHandler(void) -{ - interrupt_entry(); - if(TIM_GetITStatus(TIM2, TIM_IT_CC1) != RESET) - { - DEBUG("Firing 0 at %lu\n", hwtimer_now()); - int_handler(0); - TIM_ClearITPendingBit(TIM2, TIM_IT_CC1); - TIM_ITConfig(TIM2, TIM_IT_CC1, DISABLE); - } - if(TIM_GetITStatus(TIM2, TIM_IT_CC2) != RESET) - { - DEBUG("Firing 1 at %lu\n", hwtimer_now()); - int_handler(1); - TIM_ClearITPendingBit(TIM2, TIM_IT_CC2); - TIM_ITConfig(TIM2, TIM_IT_CC2, DISABLE); - } - if(TIM_GetITStatus(TIM2, TIM_IT_CC3) != RESET) - { - DEBUG("Firing 2 at %lu\n", hwtimer_now()); - int_handler(2); - TIM_ClearITPendingBit(TIM2, TIM_IT_CC3); - TIM_ITConfig(TIM2, TIM_IT_CC3, DISABLE); - } - if(TIM_GetITStatus(TIM2, TIM_IT_CC4) != RESET) - { - DEBUG("Firing 3 at %lu\n", hwtimer_now()); - int_handler(3); - TIM_ClearITPendingBit(TIM2, TIM_IT_CC4); - TIM_ITConfig(TIM2, TIM_IT_CC4, DISABLE); - } - - if (sched_context_switch_request) { - thread_yield(); - } - interrupt_return(); -} - -__attribute__((naked)) -void TIM3_IRQHandler(void) -{ - save_context(); - - if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET) { - TIM_ClearITPendingBit(TIM3, TIM_IT_Update); - - if (!(TIM3->CR1 & TIM_CR1_CEN)) { - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, DISABLE); - int_handler(1); - } - - if (sched_context_switch_request) { - // scheduler - sched_run(); - } - } - - restore_context(); -} +void irq_handler(int channel); +void (*timeout_handler)(int); -/*---------------------------------------------------------------------------*/ void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) { - DEBUG("hwtimer : arch_init\n"); - int_handler = handler; - TIM_TimeBaseInitTypeDef tim_init; - NVIC_InitTypeDef nvic_init; - - // init generic timer options - tim_init.TIM_ClockDivision = TIM_CKD_DIV1; - tim_init.TIM_CounterMode = TIM_CounterMode_Up; - - // setup the interrupt controller - nvic_init.NVIC_IRQChannelCmd = ENABLE; - nvic_init.NVIC_IRQChannelSubPriority = 0; - - // enable clocks - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); - - // timer init - tim_init.TIM_Period = 0xFFFF; - tim_init.TIM_Prescaler = 36000; - TIM_TimeBaseInit(TIM2, &tim_init); - // irq setup - nvic_init.NVIC_IRQChannel = TIM2_IRQn; - nvic_init.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_Init(&nvic_init); - // enable timer - TIM_Cmd(TIM2, ENABLE); + timeout_handler = handler; + timer_init(HW_TIMER, 1, &irq_handler); } -/*---------------------------------------------------------------------------*/ - void hwtimer_arch_enable_interrupt(void) { - NVIC_EnableIRQ(TIM2_IRQn); + timer_irq_enable(HW_TIMER); } -/*---------------------------------------------------------------------------*/ - void hwtimer_arch_disable_interrupt(void) { - NVIC_DisableIRQ(TIM2_IRQn); + timer_irq_disable(HW_TIMER); } -/*---------------------------------------------------------------------------*/ +void hwtimer_arch_set(unsigned long offset, short timer) +{ + timer_set(HW_TIMER, timer + 1, offset); +} void hwtimer_arch_set_absolute(unsigned long value, short timer) { - DEBUG("set absolute timer %hu to %lu\n", timer, value); - switch (timer) { - case 0: - TIM_SetCompare1(TIM2, value); - TIM_ITConfig(TIM2, TIM_IT_CC1, ENABLE); - break; - case 1: - TIM_SetCompare2(TIM2, value); - TIM_ITConfig(TIM2, TIM_IT_CC2, ENABLE); - break; - case 2: - TIM_SetCompare3(TIM2, value); - TIM_ITConfig(TIM2, TIM_IT_CC3, ENABLE); - break; - case 3: - TIM_SetCompare4(TIM2, value); - TIM_ITConfig(TIM2, TIM_IT_CC4, ENABLE); - break; - } + // will not be implemented } -/*---------------------------------------------------------------------------*/ - -void hwtimer_arch_set(unsigned long offset, short timer) +void hwtimer_arch_unset(short timer) { - unsigned long now = hwtimer_now(); - DEBUG("set timer %hu to %lu + %lu\n", timer, now, offset); - switch (timer) { - case 0: - TIM_SetCompare1(TIM2, now + offset- 1); - TIM_ITConfig(TIM2, TIM_IT_CC1, ENABLE); - break; - case 1: - TIM_SetCompare2(TIM2, now + offset- 1); - TIM_ITConfig(TIM2, TIM_IT_CC2, ENABLE); - break; - case 2: - TIM_SetCompare3(TIM2, now + offset- 1); - TIM_ITConfig(TIM2, TIM_IT_CC3, ENABLE); - break; - case 3: - TIM_SetCompare4(TIM2, now + offset- 1); - TIM_ITConfig(TIM2, TIM_IT_CC4, ENABLE); - break; - } + timer_clear(HW_TIMER, timer + 1); } -/*---------------------------------------------------------------------------*/ +unsigned long hwtimer_arch_now(void) +{ + return timer_read(HW_TIMER); +} -void hwtimer_arch_unset(short timer) +void irq_handler(int channel) { - switch (timer) { - case 0: - TIM_ITConfig(TIM2, TIM_IT_CC1, DISABLE); - break; - case 1: - TIM_ITConfig(TIM2, TIM_IT_CC2, DISABLE); - break; - case 2: - TIM_ITConfig(TIM2, TIM_IT_CC3, DISABLE); - break; - case 3: - TIM_ITConfig(TIM2, TIM_IT_CC4, DISABLE); - break; - } + timeout_handler((short)(channel - 1)); + thread_yield(); } -/*---------------------------------------------------------------------------*/ From 7ef1b70e60a386228a6c19a61c840ede1e5abdaf Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Wed, 21 May 2014 11:31:37 +0200 Subject: [PATCH 2/2] adopt to renaming from active_thread to sched_active_thread --- stm32f103rey6/cpu.c | 10 +++++----- stm32f103rey6/include/cpu.h | 4 ++-- stm32f103rey6/syscalls.c | 2 +- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/stm32f103rey6/cpu.c b/stm32f103rey6/cpu.c index 94c5bde..25128a5 100644 --- a/stm32f103rey6/cpu.c +++ b/stm32f103rey6/cpu.c @@ -128,9 +128,9 @@ void ctx_switch(void) asm("mov r12, sp"); asm("stmfd r12!, {r4-r11}"); - /* save user mode stack pointer in *active_thread */ - asm("ldr r1, =active_thread"); /* r1 = &active_thread */ - asm("ldr r1, [r1]"); /* r1 = *r1 = active_thread */ + /* save user mode stack pointer in *sched_active_thread */ + asm("ldr r1, =sched_active_thread"); /* r1 = &sched_active_thread */ + asm("ldr r1, [r1]"); /* r1 = *r1 = sched_active_thread */ asm("str r12, [r1]"); /* store stack pointer in tasks pdc*/ sched_task_return(); @@ -145,8 +145,8 @@ void sched_task_return(void) mode.b.nPRIV = 0; // privilege __set_CONTROL(mode.w); /* load pdc->stackpointer in r0 */ - asm("ldr r0, =active_thread"); /* r0 = &active_thread */ - asm("ldr r0, [r0]"); /* r0 = *r0 = active_thread */ + asm("ldr r0, =sched_active_thread"); /* r0 = &sched_active_thread */ + asm("ldr r0, [r0]"); /* r0 = *r0 = sched_active_thread */ asm("ldr sp, [r0]"); /* sp = r0 restore stack pointer*/ asm("pop {r4}"); /* skip exception return */ asm("pop {r4-r11}"); diff --git a/stm32f103rey6/include/cpu.h b/stm32f103rey6/include/cpu.h index 2663a3d..77195e6 100644 --- a/stm32f103rey6/include/cpu.h +++ b/stm32f103rey6/include/cpu.h @@ -73,7 +73,7 @@ __attribute__((always_inline)) __INLINE void save_context(void) asm("stmdb r0!,{lr}" ); // exception return value // asm("vstmdb sp!, {s16-s31}" ); // FIXME save fpu registers if needed /* load address of currend pdc */ - asm("ldr r1, =active_thread" ); /* load address of currend tcb */ + asm("ldr r1, =sched_active_thread" );/* load address of currend tcb */ /* deref pdc */ asm("ldr r1, [r1]" ); /* deref pdc */ /* write r0 to pdc->sp means current threads stack pointer */ @@ -82,7 +82,7 @@ __attribute__((always_inline)) __INLINE void save_context(void) __attribute__((always_inline)) __INLINE void restore_context(void) { - asm("ldr r0, =active_thread" ); /* load address of currend tcb */ + asm("ldr r0, =sched_active_thread" );/* load address of currend tcb */ asm("ldr r0, [r0]" ); /* deref tcb */ asm("ldr r1, [r0]" ); /* load tcb->sp to register 1 */ asm("ldmia r1!, {r0}" ); /* restore exception retrun value from stack */ diff --git a/stm32f103rey6/syscalls.c b/stm32f103rey6/syscalls.c index 6324a8e..4f887e9 100644 --- a/stm32f103rey6/syscalls.c +++ b/stm32f103rey6/syscalls.c @@ -314,7 +314,7 @@ void _exit(int n) /*---------------------------------------------------------------------------*/ int _getpid(void) { - return active_thread->pid; + return sched_active_thread->pid; } /*---------------------------------------------------------------------------*/ int _kill_r(struct _reent *r, int pid, int sig)