From 4d820094d1790ac2fd276e8e05cb109411d40f13 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 4 Mar 2021 20:05:26 +0100 Subject: [PATCH 01/25] changes to support vitis HLS Signed-off-by: Bruno Mesnet --- actions/hls.mk | 16 ++++++++-------- .../hls_decimal_mult/hw/action_decimal_mult.cpp | 3 ++- .../hw/hw_action_hbm_memcopy_1024.cpp | 5 +++-- .../hls_helloworld_1024/hw/action_uppercase.cpp | 3 ++- .../hls_helloworld_512/hw/action_uppercase.cpp | 3 ++- .../hw/action_uppercase.cpp | 3 ++- .../hls_image_filter/hw/action_pixel_filter.cpp | 3 ++- .../hw/hw_action_memcopy_1024.cpp | 3 ++- .../hls_memcopy_512/hw/hw_action_memcopy_512.cpp | 3 ++- actions/hls_udp_512/hw/hls_udp.cpp | 3 ++- actions/scripts/create_run_hls_script.sh | 2 +- 11 files changed, 28 insertions(+), 19 deletions(-) diff --git a/actions/hls.mk b/actions/hls.mk index d889c6dc1..2a0aa157a 100644 --- a/actions/hls.mk +++ b/actions/hls.mk @@ -51,9 +51,9 @@ $(syn_dir): $(srcs) run_hls_script.tcl @if [ ! -d "$(SNAP_ROOT)/hardware/logs" ]; then \ mkdir -p $(SNAP_ROOT)/hardware/logs; \ fi - @echo " Compiling action with Vivado HLS `vivado_hls -version|head -n1|cut -d " " -f 11`" + @echo " Compiling action with Vivado HLS `vitis_hls -version|head -n1|cut -d " " -f 11`" @echo " Clock period used for HLS is $(HLS_ACTION_CLOCK) ns" - vivado_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log + vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log $(RM) -rf $@/systemc $@/verilog # Create symlinks for simpler access @@ -76,7 +76,7 @@ $(SOLUTION_NAME): $(objs) # FIXME That those things are not resulting in an error is problematic. # If we get critical warnings we stay away from continuing now, -# since that will according to our experience with vivado_hls, lead +# since that will according to our experience with vitis_hls, lead # to strange problems later on. So let us work on fixing the design # if they occur. Rather than challenging our luck. # @@ -86,19 +86,19 @@ $(SOLUTION_NAME): $(objs) # Check for reserved HLS MMIO reg at offset 0x17c. # check: $(syn_dir) - @if [ X$(HLS_ACTION_CLOCK) != X$(shell grep "Setting up clock" vivado_hls.log |cut -d " " -f 12|cut -d "n" -f 1) ]; then \ + @if [ X$(HLS_ACTION_CLOCK) != X$(shell grep "Setting up clock" vitis_hls.log |cut -d " " -f 12|cut -d "n" -f 1) ]; then \ echo " ---------------------------------------------------------- "; \ echo " ERROR: Action was last compiled with a different HLS clock."; \ echo " Please force the recompilation with a 'make clean' command"; \ echo " ---------------------------------------------------------- "; exit -1; \ fi @echo -n " Checking for critical warnings during HLS synthesis .... " - @grep -A8 CRITICAL vivado_hls.log; \ + @grep -A8 CRITICAL vitis_hls.log; \ test $$? = 1 @echo "OK" @if [ $(HLS_ACTION_CLOCK) == $(HLS_ACTION_CLOCK_DEFAULT) ]; then \ echo -n " Checking for critical timings during HLS synthesis .... "; \ - grep -A8 critical vivado_hls.log; \ + grep -A8 critical vitis_hls.log; \ if [ $$? -eq 0 ]; then \ echo "------------------------------------------------------------------ "; \ echo "TIMING ERROR: Please correct your action code before going further"!; \ @@ -113,11 +113,11 @@ check: $(syn_dir) echo " By defining a HLS clock different than the default 5ns, the automatic checking"; \ echo " of the critical timings is disabled. You need to manually check them."; \ echo " FYI action was compiled with following HLS clock:"; \ - grep "Setting up clock" vivado_hls.log ; \ + grep "Setting up clock" vitis_hls.log ; \ echo " --------------------------------------------------------------------------- "; \ echo " please CHECK the below list (if any) for HLS synthesis critical timing .... "; \ echo " --------------------------------------------------------------------------- "; \ - grep -A8 critical vivado_hls.log ; \ + grep -A8 critical vitis_hls.log ; \ echo " --------------------------------------------------------------------------- "; \ if [ $$? -ne 0 ]; then \ echo "OK"; \ diff --git a/actions/hls_decimal_mult/hw/action_decimal_mult.cpp b/actions/hls_decimal_mult/hw/action_decimal_mult.cpp index f9832c120..d1132e14e 100644 --- a/actions/hls_decimal_mult/hw/action_decimal_mult.cpp +++ b/actions/hls_decimal_mult/hw/action_decimal_mult.cpp @@ -140,7 +140,8 @@ void hls_action(snap_membus_512_t *din_gmem, // Host Memory AXI Lite Master Interface -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp index 451ff6456..213062e77 100644 --- a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp +++ b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp @@ -32,7 +32,7 @@ // the application shouldn't use more interfaces than the number you have defined in Kconfig menu. // (extra interfaces not connected will be removed if not connected to the wrapper) -#define HBM_AXI_IF_NB 12 +#define HBM_AXI_IF_NB 8 //===================================================================================// @@ -835,7 +835,8 @@ void hls_action(snap_membus_1024_t *din_gmem, max_read_burst_length=64 max_write_burst_length=64 // Host Memory AXI Lite Master Interface -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_1024/hw/action_uppercase.cpp b/actions/hls_helloworld_1024/hw/action_uppercase.cpp index e13603873..62df8d894 100644 --- a/actions/hls_helloworld_1024/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_1024/hw/action_uppercase.cpp @@ -96,7 +96,8 @@ void hls_action(snap_membus_1024_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_512/hw/action_uppercase.cpp b/actions/hls_helloworld_512/hw/action_uppercase.cpp index cdac4933e..2023f1b89 100644 --- a/actions/hls_helloworld_512/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_512/hw/action_uppercase.cpp @@ -97,7 +97,8 @@ void hls_action(snap_membus_512_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_python/hw/action_uppercase.cpp b/actions/hls_helloworld_python/hw/action_uppercase.cpp index 166a526ef..2d0e0704f 100644 --- a/actions/hls_helloworld_python/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_python/hw/action_uppercase.cpp @@ -95,7 +95,8 @@ void hls_action(snap_membus_1024_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_image_filter/hw/action_pixel_filter.cpp b/actions/hls_image_filter/hw/action_pixel_filter.cpp index b64e9b761..004d93882 100644 --- a/actions/hls_image_filter/hw/action_pixel_filter.cpp +++ b/actions/hls_image_filter/hw/action_pixel_filter.cpp @@ -226,7 +226,8 @@ void hls_action(snap_membus_512_t *din_gmem, */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp b/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp index 5a8826ba4..f5d8aa708 100644 --- a/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp +++ b/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp @@ -257,7 +257,8 @@ void hls_action(snap_membus_1024_t *din_gmem, // Host Memory AXI Lite Master Interface -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp b/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp index 0ad0a762f..016034eb3 100644 --- a/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp +++ b/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp @@ -217,7 +217,8 @@ void hls_action(snap_membus_512_t *din_gmem, // Host Memory AXI Lite Master Interface -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_udp_512/hw/hls_udp.cpp b/actions/hls_udp_512/hw/hls_udp.cpp index 493f4a0a9..769c806d2 100644 --- a/actions/hls_udp_512/hw/hls_udp.cpp +++ b/actions/hls_udp_512/hw/hls_udp.cpp @@ -144,7 +144,8 @@ void hls_action(snap_membus_512_t *din_gmem, #pragma HLS INTERFACE s_axilite port=dout_gmem bundle=ctrl_reg offset=0x040 // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -#pragma HLS DATA_PACK variable=act_reg +//#pragma HLS DATA_PACK variable=act_reg +#pragma HLS AGGREGATE variable=act_reg #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/scripts/create_run_hls_script.sh b/actions/scripts/create_run_hls_script.sh index 7079f0ff5..7d132a092 100755 --- a/actions/scripts/create_run_hls_script.sh +++ b/actions/scripts/create_run_hls_script.sh @@ -115,7 +115,7 @@ foreach file [ list ${files} ] { add_files -tb \${file} -cflags "$cflags -DNO_SYNTH -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include" } -open_solution "${name}" +open_solution -flow_target vivado "${name}" set_part ${part_number} create_clock -period ${clock_period} -name default From 1ac2c110f271b4aa9f8b3509e5bf17be7f1d67f9 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 5 Mar 2021 12:45:19 +0100 Subject: [PATCH 02/25] add variable to handle hls_vitis Signed-off-by: Bruno Mesnet --- scripts/snap_cfg | 11 +++++++++++ snap_env | 12 ++++++++++++ 2 files changed, 23 insertions(+) diff --git a/scripts/snap_cfg b/scripts/snap_cfg index 8fbef975d..9a79e5b5d 100755 --- a/scripts/snap_cfg +++ b/scripts/snap_cfg @@ -135,6 +135,17 @@ if [ $Vivado_Major_release -gt 2019 ] && [ $ethernet_used != "" ]; then echo "SNAP_CFLAGS += \"-DCONFIG_ENABLE_EMAC_V3_1=TRUE\"" >> $snap_config_cflags fi +#Starting with Vivado 2020.2 vivado_hls is replaced by vitis_hls +hls_support=`grep HLS_SUPPORT $snap_config|grep TRUE` +Vivado_Major_release=`vivado -version |grep Vivado| cut -d'(' -f1|tr -d "Vivado "|cut -d '.' -f1` +Vivado_Minor_release=`vivado -version |grep Vivado| cut -d'(' -f1|tr -d "Vivado "|cut -d '.' -f2` +if [ $Vivado_Major_release -ge 2020 ] && [ $hls_support != "" ]; then + if [ $Vivado_Minor_release -gt 1 ]; then + echo "export HLS_VITIS_USED=TRUE" >> $snap_config_sh + echo "SNAP_CFLAGS += \"-DCONFIG_HLS_VITIS_USED=TRUE\"" >> $snap_config_cflags + fi +fi + echo "Generation of SNAP config files done." echo diff --git a/snap_env b/snap_env index 94c5dce66..51978d593 100755 --- a/snap_env +++ b/snap_env @@ -92,6 +92,18 @@ while [ -z "$SETUP_DONE" ]; do echo "Vivado version is set to: `vivado -version|head -n1`" fi +VIVADO_MAJOR_RELEASE=`vivado -version | grep Vivado | cut -d '(' -f1 | tr -d "Vivado "|cut -d '.' -f1` +VIVADO_MINOR_RELEASE=`vivado -version | grep Vivado | cut -d '(' -f1 | tr -d "Vivado "|cut -d '.' -f2` +if [ "$VIVADO_MAJOR_RELEASE" -ge "2020" ]; then + if [ "$VIVADO_MINOR_RELEASE" -gt "1" ]; then + echo "HLS tool is set to: `vitis_hls -version |head -n1`" + else + #echo "Using Vivado HLS (could use Vitis HLS)" + echo "HLS tool is set to: `vivado_hls -version |head -n1`" + fi +else + echo "HLS tool is set to: `vivado_hls -version |head -n1`" +fi ####### checking path to OCSE (only if simulation is enabled) # Note: SIMULATOR is defined via snap_config From b6c18497d3e01fdf439a33f1650123870914a2c0 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Mon, 8 Mar 2021 14:24:28 +0100 Subject: [PATCH 03/25] adapt to vitis_hls Signed-off-by: Bruno Mesnet --- snap_env | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/snap_env b/snap_env index 51978d593..a7e152aae 100755 --- a/snap_env +++ b/snap_env @@ -92,8 +92,9 @@ while [ -z "$SETUP_DONE" ]; do echo "Vivado version is set to: `vivado -version|head -n1`" fi -VIVADO_MAJOR_RELEASE=`vivado -version | grep Vivado | cut -d '(' -f1 | tr -d "Vivado "|cut -d '.' -f1` -VIVADO_MINOR_RELEASE=`vivado -version | grep Vivado | cut -d '(' -f1 | tr -d "Vivado "|cut -d '.' -f2` +VIVADO_RELEASE=`vivado -version | grep Vivado | cut -d '(' -f1 | tr -d "Vivado "` +VIVADO_MAJOR_RELEASE=`echo ${VIVADO_RELEASE} |cut -d '.' -f1` +VIVADO_MINOR_RELEASE=`echo ${VIVADO_RELEASE} |cut -d '.' -f2` if [ "$VIVADO_MAJOR_RELEASE" -ge "2020" ]; then if [ "$VIVADO_MINOR_RELEASE" -gt "1" ]; then echo "HLS tool is set to: `vitis_hls -version |head -n1`" From 6c83134befb3575b9c7e7ed95c0e89190370608d Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 11 Mar 2021 17:12:56 +0100 Subject: [PATCH 04/25] create a vitis variable Signed-off-by: Bruno Mesnet --- actions/hls.mk | 9 +++++++-- actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp | 7 +++++-- actions/scripts/create_run_hls_script.sh | 4 ++-- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/actions/hls.mk b/actions/hls.mk index 2a0aa157a..811af8c6f 100644 --- a/actions/hls.mk +++ b/actions/hls.mk @@ -51,9 +51,14 @@ $(syn_dir): $(srcs) run_hls_script.tcl @if [ ! -d "$(SNAP_ROOT)/hardware/logs" ]; then \ mkdir -p $(SNAP_ROOT)/hardware/logs; \ fi - @echo " Compiling action with Vivado HLS `vitis_hls -version|head -n1|cut -d " " -f 11`" @echo " Clock period used for HLS is $(HLS_ACTION_CLOCK) ns" - vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log + @if [ "$(HLS_VITIS_USED)" == "TRUE" ]; then \ + echo " Compiling action with Vitis HLS `vitis_hls -version|head -n1|cut -d " " -f 11`"; \ + vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \ + else \ + echo " Compiling action with Vivado HLS `vivado_hls -version|head -n1|cut -d " " -f 11`"; \ + vivado_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \ + fi $(RM) -rf $@/systemc $@/verilog # Create symlinks for simpler access diff --git a/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp b/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp index f5d8aa708..9c152e269 100644 --- a/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp +++ b/actions/hls_memcopy_1024/hw/hw_action_memcopy_1024.cpp @@ -257,8 +257,11 @@ void hls_action(snap_membus_1024_t *din_gmem, // Host Memory AXI Lite Master Interface -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/scripts/create_run_hls_script.sh b/actions/scripts/create_run_hls_script.sh index 7d132a092..cb23ec89a 100755 --- a/actions/scripts/create_run_hls_script.sh +++ b/actions/scripts/create_run_hls_script.sh @@ -111,8 +111,8 @@ set_top ${wrapper} # Can that be a list? foreach file [ list ${files} ] { - add_files \${file} -cflags "$cflags -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include" - add_files -tb \${file} -cflags "$cflags -DNO_SYNTH -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include" + add_files \${file} -cflags "$cflags -DHLS_VITIS_USED -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include" + add_files -tb \${file} -cflags "$cflags -DHLS_VITIS_USED -DNO_SYNTH -I$snap_root/actions/include -I$snap_root/software/include -I../../../software/examples -I../include" } open_solution -flow_target vivado "${name}" From 1129bd9910474c03d9e5bf654252cc38de1a52f5 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 12 Mar 2021 17:09:20 +0100 Subject: [PATCH 05/25] remove unused Flash wrapper Signed-off-by: Bruno Mesnet --- hardware/setup/create_framework.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hardware/setup/create_framework.tcl b/hardware/setup/create_framework.tcl index baa4105c1..cec1bbb5e 100644 --- a/hardware/setup/create_framework.tcl +++ b/hardware/setup/create_framework.tcl @@ -318,7 +318,7 @@ if { $unit_sim_used == "TRUE" } { if {$fpga_card == "BW250SOC"} { puts " adding Flash IP " - add_files $ip_dir/flash_ip_project/flash_ip_project.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd -norecurse >> $log_file + #add_files $ip_dir/flash_ip_project/flash_ip_project.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd -norecurse >> $log_file add_files -norecurse $ip_dir/flash_ip_project/flash_ip_project.srcs/sources_1/bd/design_1/design_1.bd >> $log_file export_ip_user_files -of_objects [get_files $ip_dir/flash_ip_project/flash_ip_project.srcs/sources_1/bd/design_1/design_1.bd] -lib_map_path [list {{ies=$root_dir/viv_project/framework.cache/compile_simlib/ies}}] -no_script -sync -force -quiet # puts " adding $fpga_card_dir/ip/qspi_mb.elf" From 6f6955b3a2e428c59c379b89cd07928473bc4318 Mon Sep 17 00:00:00 2001 From: acastellane Date: Mon, 15 Mar 2021 12:04:35 +0100 Subject: [PATCH 06/25] restore 12 HBM Signed-off-by: acastellane --- actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp index 213062e77..a6244e8fb 100644 --- a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp +++ b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp @@ -32,7 +32,7 @@ // the application shouldn't use more interfaces than the number you have defined in Kconfig menu. // (extra interfaces not connected will be removed if not connected to the wrapper) -#define HBM_AXI_IF_NB 8 +#define HBM_AXI_IF_NB 12 //===================================================================================// From c920828f99c763cef1a8e1f4400c963dce742b81 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Mon, 15 Mar 2021 14:13:10 +0100 Subject: [PATCH 07/25] adapt scripts for hbm Signed-off-by: Bruno Mesnet --- hardware/setup/create_framework.tcl | 15 ++++++++++----- hardware/setup/create_hbm.tcl | 24 +++++++++--------------- 2 files changed, 19 insertions(+), 20 deletions(-) diff --git a/hardware/setup/create_framework.tcl b/hardware/setup/create_framework.tcl index cec1bbb5e..b3e160751 100644 --- a/hardware/setup/create_framework.tcl +++ b/hardware/setup/create_framework.tcl @@ -272,15 +272,18 @@ if { $eth_used == TRUE } { # Add HBM if { $hbm_used == TRUE } { - add_files -norecurse $ip_dir/hbm/hbm.srcs/sources_1/bd/hbm_top/hdl/hbm_top_wrapper.vhd >> $log_file + #add_files -norecurse $ip_dir/hbm/hbm.srcs/sources_1/bd/hbm_top/hdl/hbm_top_wrapper.vhd >> $log_file + add_files -norecurse $ip_dir/hbm/hbm.gen/sources_1/bd/hbm_top/hdl/hbm_top_wrapper.vhd >> $log_file if { $bram_used == TRUE } { puts " adding HBM-like block design (BRAM)" } else { # if BRAM model used replacing HBM do not add specific hbm init files puts " adding HBM block design" puts " adding HBM initialization files " - add_files -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_1.mem - add_files -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_0.mem + #add_files -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_1.mem + #add_files -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_0.mem + add_files -norecurse $ip_dir/hbm/hbm.gen/sources_1/bd/hbm_top/ip/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_1.mem + add_files -norecurse $ip_dir/hbm/hbm.gen/sources_1/bd/hbm_top/ip/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_0.mem update_ip_catalog >> $log_file } @@ -291,8 +294,10 @@ if { $hbm_used == TRUE } { #puts " adding HBM initialization files " # if BRAM model used to replace HBM then do not add specific hbm init files if { $bram_used != TRUE } { - import_files -fileset sim_1 -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_1.mem - import_files -fileset sim_1 -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_0.mem + #import_files -fileset sim_1 -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_1.mem + #import_files -fileset sim_1 -norecurse $hbm_ip_dir/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_0.mem + import_files -fileset sim_1 -norecurse $ip_dir/hbm/hbm.gen/sources_1/bd/hbm_top/ip/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_1.mem + import_files -fileset sim_1 -norecurse $ip_dir/hbm/hbm.gen/sources_1/bd/hbm_top/ip/hbm_top_hbm_0/hdl/rtl/xpm_internal_config_file_sim_0.mem } update_compile_order -fileset sim_1 >> $log_file } diff --git a/hardware/setup/create_hbm.tcl b/hardware/setup/create_hbm.tcl index 968dc4800..790f7a3b9 100644 --- a/hardware/setup/create_hbm.tcl +++ b/hardware/setup/create_hbm.tcl @@ -39,20 +39,10 @@ set bd_name hbm_top # _______________________________________________________________________________ # In this file, we define all the logic to have independent 256MB/2Gb memories # each with an independent AXI interfaces which will be connected to the action -# Default is hbm_axi_if_num = 12 interfaces -# TO increase/decrease the number of memory needed, just look to #CHANGE_HBM_INTERFACES_NUMBER -# param and 1) change in menu the HBM_AXI_IF_NUM with a value between 1 and 32. -# and 2) set the right params enabling AXI and MC -# ------------------------------------------------------- -# If you modify the number of AXI interfaces, don't forget to modify also : -# actions/hls_hbm_memcopy/hw/hw_action_memcopy.cpp -# hardware/hdl/hls/action_wrapper.v -# hardware/hdl/core/framework_afu.v -# --> follow HBM names <-- +# The number of HBM interfaces is selected by the Kconfig menu +# It needs to be in sync with the param #define HBM_AXI_IF_NB which should be +# defined in actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp # _______________________________________________________________________________ -#CHANGE_HBM_INTERFACES_NUMBER -#set HBM_MEM_NUM 12 -##This number is now taken from the Kmenu => hbm_axi_if_num # Create HBM project create_project $prj_name $root_dir/ip/hbm -part $fpga_part -force >> $log_file @@ -110,6 +100,7 @@ set port [create_bd_port -dir I CRESETN] #LEFT stack is used for SNAP/CAPI2.0 since BSP/PSL logic is using right resources of the FPGA #RIGHT stack is used for OC-Accel/OCAPI3.0 since TLX/DLX logic is using left resources of the FPGA set cell [create_bd_cell -quiet -type ip -vlnv {xilinx.com:ip:hbm:*} hbm] + #create_bd_cell -type ip -vlnv xilinx.com:ip:hbm:1.0 hbm #Common params for the HBM not depending on the number of memories enabled # The reference clock provided to HBM is AXI clock @@ -320,6 +311,9 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { CONFIG.REG_B {10} \ } $cell + + + #create the ports create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 S_AXI_p$i\_HBM set_property -dict [list \ @@ -352,11 +346,11 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { if { $i < 10} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_0$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_0$i\_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i] + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i\_RT] } else { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_$i\_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i] + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i\_RT] } } #--------------------- end loop ------------------ From 9c6700e08c0a5502b09afb826b71cc272751691c Mon Sep 17 00:00:00 2001 From: Alexandre CASTELLANE Date: Tue, 16 Mar 2021 17:12:09 +0100 Subject: [PATCH 08/25] updated create_hbm.tcl Signed-off-by: Alexandre CASTELLANE --- hardware/setup/create_hbm.tcl | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hardware/setup/create_hbm.tcl b/hardware/setup/create_hbm.tcl index 790f7a3b9..67267a983 100644 --- a/hardware/setup/create_hbm.tcl +++ b/hardware/setup/create_hbm.tcl @@ -346,11 +346,21 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { if { $i < 10} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_0$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_0$i\_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i\_RT] + # AD9H7 cards require a different AXI name + if { ($fpga_card != "AD9H7" && $vivadoVer >= "2019.2") } { + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i\_RT] + } else { + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i] + } } else { - connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_$i\_ARESET_N] - connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_$i\_ACLK] - connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i\_RT] + connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_$i\_ARESET_N] + connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_$i\_ACLK] + + if { ($fpga_card != "AD9H7" && $vivadoVer >= "2019.2") } { + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i\_RT] + } else { + connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i] + } } } #--------------------- end loop ------------------ From 2a0dd4cf73e1ed449d8c89e2a4360ba929532136 Mon Sep 17 00:00:00 2001 From: acastellane Date: Wed, 17 Mar 2021 18:15:43 +0100 Subject: [PATCH 09/25] update for ubuntu default shell Signed-off-by: acastellane --- actions/hls.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/actions/hls.mk b/actions/hls.mk index 811af8c6f..f0bb8014e 100644 --- a/actions/hls.mk +++ b/actions/hls.mk @@ -52,7 +52,7 @@ $(syn_dir): $(srcs) run_hls_script.tcl mkdir -p $(SNAP_ROOT)/hardware/logs; \ fi @echo " Clock period used for HLS is $(HLS_ACTION_CLOCK) ns" - @if [ "$(HLS_VITIS_USED)" == "TRUE" ]; then \ + @if [ "$(HLS_VITIS_USED)" = "TRUE" ]; then \ echo " Compiling action with Vitis HLS `vitis_hls -version|head -n1|cut -d " " -f 11`"; \ vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \ else \ From 8b052347bc4f106d3f8a2a62b2303d8569fca298 Mon Sep 17 00:00:00 2001 From: acastellane Date: Fri, 26 Mar 2021 16:37:31 +0100 Subject: [PATCH 10/25] solved vitis issues Signed-off-by: acastellane --- actions/hls.mk | 23 +++++----- .../hw/action_decimal_mult.cpp | 8 +++- .../hw/hw_action_hbm_memcopy_1024.cpp | 9 +++- .../hw/action_uppercase.cpp | 7 ++- .../hw/action_uppercase.cpp | 7 ++- .../hw/action_uppercase.cpp | 7 ++- .../hw/action_pixel_filter.cpp | 8 ++-- .../hw/hw_action_memcopy_512.cpp | 7 ++- actions/hls_udp_512/hw/hls_udp.cpp | 7 ++- actions/scripts/create_run_hls_script.sh | 44 +++++++++++++++++-- 10 files changed, 95 insertions(+), 32 deletions(-) diff --git a/actions/hls.mk b/actions/hls.mk index f0bb8014e..2da7d2b5f 100644 --- a/actions/hls.mk +++ b/actions/hls.mk @@ -52,7 +52,7 @@ $(syn_dir): $(srcs) run_hls_script.tcl mkdir -p $(SNAP_ROOT)/hardware/logs; \ fi @echo " Clock period used for HLS is $(HLS_ACTION_CLOCK) ns" - @if [ "$(HLS_VITIS_USED)" = "TRUE" ]; then \ + @if [ "X$(HLS_VITIS_USED)" = "XTRUE" ]; then \ echo " Compiling action with Vitis HLS `vitis_hls -version|head -n1|cut -d " " -f 11`"; \ vitis_hls -f run_hls_script.tcl > $(SNAP_ROOT)/hardware/logs/action_make.log; \ else \ @@ -81,7 +81,7 @@ $(SOLUTION_NAME): $(objs) # FIXME That those things are not resulting in an error is problematic. # If we get critical warnings we stay away from continuing now, -# since that will according to our experience with vitis_hls, lead +# since that will according to our experience with vivado/vitis_hls, lead # to strange problems later on. So let us work on fixing the design # if they occur. Rather than challenging our luck. # @@ -89,21 +89,20 @@ $(SOLUTION_NAME): $(objs) # Check for CRITICAL warnings and exit if those occur. Add more if needed. # Check for critical warnings and exit if those occur. Add more if needed. # Check for reserved HLS MMIO reg at offset 0x17c. -# + check: $(syn_dir) - @if [ X$(HLS_ACTION_CLOCK) != X$(shell grep "Setting up clock" vitis_hls.log |cut -d " " -f 12|cut -d "n" -f 1) ]; then \ - echo " ---------------------------------------------------------- "; \ - echo " ERROR: Action was last compiled with a different HLS clock."; \ - echo " Please force the recompilation with a 'make clean' command"; \ - echo " ---------------------------------------------------------- "; exit -1; \ + @if [ "${HLS_ACTION_CLOCK}" != "${shell grep "Setting up clock" *_hls.log |cut -d " " -f 12|cut -d "n" -f 1}" ]; then \ + echo " ERROR with VivadoVitis HLS Action was last compiled with a different HLS clock."; \ + echo " Please force the recompilation with a 'make clean' command"; \ + echo " ---------------------------------------------------------- "; exit 1; \ fi @echo -n " Checking for critical warnings during HLS synthesis .... " - @grep -A8 CRITICAL vitis_hls.log; \ + @grep -A8 CRITICAL *_hls.log; \ test $$? = 1 @echo "OK" @if [ $(HLS_ACTION_CLOCK) == $(HLS_ACTION_CLOCK_DEFAULT) ]; then \ echo -n " Checking for critical timings during HLS synthesis .... "; \ - grep -A8 critical vitis_hls.log; \ + grep -A8 critical *_hls.log; \ if [ $$? -eq 0 ]; then \ echo "------------------------------------------------------------------ "; \ echo "TIMING ERROR: Please correct your action code before going further"!; \ @@ -118,11 +117,11 @@ check: $(syn_dir) echo " By defining a HLS clock different than the default 5ns, the automatic checking"; \ echo " of the critical timings is disabled. You need to manually check them."; \ echo " FYI action was compiled with following HLS clock:"; \ - grep "Setting up clock" vitis_hls.log ; \ + grep "Setting up clock" *_hls.log ; \ echo " --------------------------------------------------------------------------- "; \ echo " please CHECK the below list (if any) for HLS synthesis critical timing .... "; \ echo " --------------------------------------------------------------------------- "; \ - grep -A8 critical vitis_hls.log ; \ + grep -A8 critical *_hls.log ; \ echo " --------------------------------------------------------------------------- "; \ if [ $$? -ne 0 ]; then \ echo "OK"; \ diff --git a/actions/hls_decimal_mult/hw/action_decimal_mult.cpp b/actions/hls_decimal_mult/hw/action_decimal_mult.cpp index d1132e14e..ee9a82516 100644 --- a/actions/hls_decimal_mult/hw/action_decimal_mult.cpp +++ b/actions/hls_decimal_mult/hw/action_decimal_mult.cpp @@ -140,8 +140,12 @@ void hls_action(snap_membus_512_t *din_gmem, // Host Memory AXI Lite Master Interface -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif + #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp index a6244e8fb..e089043b8 100644 --- a/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp +++ b/actions/hls_hbm_memcopy_1024/hw/hw_action_hbm_memcopy_1024.cpp @@ -835,8 +835,13 @@ void hls_action(snap_membus_1024_t *din_gmem, max_read_burst_length=64 max_write_burst_length=64 // Host Memory AXI Lite Master Interface -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg + + #ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif + #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_1024/hw/action_uppercase.cpp b/actions/hls_helloworld_1024/hw/action_uppercase.cpp index 62df8d894..1ac94c02e 100644 --- a/actions/hls_helloworld_1024/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_1024/hw/action_uppercase.cpp @@ -96,8 +96,11 @@ void hls_action(snap_membus_1024_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_512/hw/action_uppercase.cpp b/actions/hls_helloworld_512/hw/action_uppercase.cpp index 2023f1b89..329015d58 100644 --- a/actions/hls_helloworld_512/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_512/hw/action_uppercase.cpp @@ -97,8 +97,11 @@ void hls_action(snap_membus_512_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_helloworld_python/hw/action_uppercase.cpp b/actions/hls_helloworld_python/hw/action_uppercase.cpp index 2d0e0704f..7d3866b32 100644 --- a/actions/hls_helloworld_python/hw/action_uppercase.cpp +++ b/actions/hls_helloworld_python/hw/action_uppercase.cpp @@ -95,8 +95,11 @@ void hls_action(snap_membus_1024_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_image_filter/hw/action_pixel_filter.cpp b/actions/hls_image_filter/hw/action_pixel_filter.cpp index 004d93882..4d31f58f2 100644 --- a/actions/hls_image_filter/hw/action_pixel_filter.cpp +++ b/actions/hls_image_filter/hw/action_pixel_filter.cpp @@ -225,9 +225,11 @@ void hls_action(snap_membus_512_t *din_gmem, * #pragma HLS INTERFACE s_axilite port=d_ddrmem bundle=ctrl_reg offset=0x050 */ // Host Memory AXI Lite Master Interface - NO CHANGE BELOW - -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp b/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp index 016034eb3..8c3571a39 100644 --- a/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp +++ b/actions/hls_memcopy_512/hw/hw_action_memcopy_512.cpp @@ -217,8 +217,11 @@ void hls_action(snap_membus_512_t *din_gmem, // Host Memory AXI Lite Master Interface -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/hls_udp_512/hw/hls_udp.cpp b/actions/hls_udp_512/hw/hls_udp.cpp index 769c806d2..9c616fa10 100644 --- a/actions/hls_udp_512/hw/hls_udp.cpp +++ b/actions/hls_udp_512/hw/hls_udp.cpp @@ -144,8 +144,11 @@ void hls_action(snap_membus_512_t *din_gmem, #pragma HLS INTERFACE s_axilite port=dout_gmem bundle=ctrl_reg offset=0x040 // Host Memory AXI Lite Master Interface - NO CHANGE BELOW -//#pragma HLS DATA_PACK variable=act_reg -#pragma HLS AGGREGATE variable=act_reg +#ifdef HLS_VITIS_USED + #pragma HLS AGGREGATE variable=act_reg +#else + #pragma HLS DATA_PACK variable=act_reg +#endif #pragma HLS INTERFACE s_axilite port=act_reg bundle=ctrl_reg offset=0x100 #pragma HLS INTERFACE s_axilite port=return bundle=ctrl_reg diff --git a/actions/scripts/create_run_hls_script.sh b/actions/scripts/create_run_hls_script.sh index cb23ec89a..c30a1bb53 100755 --- a/actions/scripts/create_run_hls_script.sh +++ b/actions/scripts/create_run_hls_script.sh @@ -15,7 +15,10 @@ ## limitations under the License. ## -version=1.0 +version=1.1 +# 1.0 : Creation +# 1.1 : adding Vitis_hls support - March 2021 + program=`basename "$0"` # output formatting @@ -103,7 +106,38 @@ done shift $((OPTIND-1)) # now do something with $@ -#### TCL config script for vivado_hls ######################################### +if [ -z $HLS_VITIS_USED ]; then + printf " HLS_VITIS_USED is not set\n" >&2; + #### TCL config script for vivado_hls ######################################### +cat <&2; + #### TCL config script for vitis_hls ######################################### cat < Date: Mon, 29 Mar 2021 12:03:33 +0200 Subject: [PATCH 11/25] corrected HBM for 9H335 Signed-off-by: acastellane --- hardware/setup/create_hbm.tcl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hardware/setup/create_hbm.tcl b/hardware/setup/create_hbm.tcl index 67267a983..e413fe4c9 100644 --- a/hardware/setup/create_hbm.tcl +++ b/hardware/setup/create_hbm.tcl @@ -347,7 +347,7 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_0$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_0$i\_ACLK] # AD9H7 cards require a different AXI name - if { ($fpga_card != "AD9H7" && $vivadoVer >= "2019.2") } { + if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2019.2") } { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i\_RT] } else { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i] @@ -356,7 +356,7 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_$i\_ACLK] - if { ($fpga_card != "AD9H7" && $vivadoVer >= "2019.2") } { + if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2019.2") } { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i\_RT] } else { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i] From 532dcfecacfd54c15699879078ea88a5d20d8f5f Mon Sep 17 00:00:00 2001 From: acastellane Date: Mon, 29 Mar 2021 17:35:33 +0200 Subject: [PATCH 12/25] bsp_wo_pblock_1 Signed-off-by: acastellane --- hardware/oc-bip | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hardware/oc-bip b/hardware/oc-bip index f7fd12ab7..16d684a82 160000 --- a/hardware/oc-bip +++ b/hardware/oc-bip @@ -1 +1 @@ -Subproject commit f7fd12ab7c54667b38ba2a1c1bc2533cb6836103 +Subproject commit 16d684a821b40e6f11707166a63bf2b7a6fdb756 From 036b096414f6396721ba6136c7c65a47e74cef8b Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 1 Apr 2021 12:57:04 +0200 Subject: [PATCH 13/25] correct lib calls Signed-off-by: Bruno Mesnet --- actions/hls_udp_512/{tests => hw}/action_test.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) rename actions/hls_udp_512/{tests => hw}/action_test.h (93%) diff --git a/actions/hls_udp_512/tests/action_test.h b/actions/hls_udp_512/hw/action_test.h similarity index 93% rename from actions/hls_udp_512/tests/action_test.h rename to actions/hls_udp_512/hw/action_test.h index 886ee8db3..4f7747d18 100644 --- a/actions/hls_udp_512/tests/action_test.h +++ b/actions/hls_udp_512/hw/action_test.h @@ -1,7 +1,6 @@ #include -#include -//#define NO_SYNTH -#include "../hw/hls_udp.h" +//#include +//#include "hls_udp.h" #pragma pack(push) From 7800303d50c68b4c9ac5225610ff9357c7c7e6c8 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 1 Apr 2021 12:59:32 +0200 Subject: [PATCH 14/25] correct lib calls Signed-off-by: Bruno Mesnet --- actions/hls_udp_512/hw/eth_decode.cpp | 6 +++--- actions/hls_udp_512/hw/hls_udp.cpp | 8 +++++--- actions/hls_udp_512/hw/hls_udp.h | 2 +- actions/hls_udp_512/hw/write_data.cpp | 6 +++--- 4 files changed, 12 insertions(+), 10 deletions(-) diff --git a/actions/hls_udp_512/hw/eth_decode.cpp b/actions/hls_udp_512/hw/eth_decode.cpp index a4327def5..f57105596 100644 --- a/actions/hls_udp_512/hw/eth_decode.cpp +++ b/actions/hls_udp_512/hw/eth_decode.cpp @@ -14,11 +14,11 @@ * limitations under the License. */ -#include "hls_udp.h" #include -#include "osnap_hls_if.h" +//#include "osnap_hls_if.h" #include "ap_int.h" -#include +//#include +#include "hls_udp.h" enum rcv_state_t {RCV_INIT, RCV_JF_HEADER, RCV_GOOD, RCV_BAD, RCV_IGNORE}; diff --git a/actions/hls_udp_512/hw/hls_udp.cpp b/actions/hls_udp_512/hw/hls_udp.cpp index 9c616fa10..8ae0b32b5 100644 --- a/actions/hls_udp_512/hw/hls_udp.cpp +++ b/actions/hls_udp_512/hw/hls_udp.cpp @@ -18,9 +18,10 @@ #include #include "ap_int.h" #include -#include "osnap_hls_if.h" - -#include "../tests/action_test.h" +//#include "osnap_hls_if.h" +//#include "hls_snap_1024.H" +#include "hls_udp.h" +#include "action_test.h" void process_frames(AXI_STREAM &din_eth, eth_settings_t eth_settings, eth_stat_t ð_stat, snap_membus_512_t *dout_gmem, uint64_t out_frame_buffer_addr) { #pragma HLS DATAFLOW @@ -169,6 +170,7 @@ void hls_action(snap_membus_512_t *din_gmem, } else process_action(din_gmem, dout_gmem, din_eth, dout_eth, act_reg); + } //--------------------------------------------------------------------------------------// diff --git a/actions/hls_udp_512/hw/hls_udp.h b/actions/hls_udp_512/hw/hls_udp.h index e0b2c6601..14952d391 100644 --- a/actions/hls_udp_512/hw/hls_udp.h +++ b/actions/hls_udp_512/hw/hls_udp.h @@ -25,7 +25,7 @@ #include "hls_snap_1024.H" #include "action_udp.H" /* Job definition */ -typedef char word_t[BPERDW_1024]; +//typedef char word_t[BPERDW_512]; //--------------------------------------------------------------------- // This is generic. Just adapt names for a new action // CONTROL is defined and handled by SNAP diff --git a/actions/hls_udp_512/hw/write_data.cpp b/actions/hls_udp_512/hw/write_data.cpp index 1d7395f0d..46cea10d1 100644 --- a/actions/hls_udp_512/hw/write_data.cpp +++ b/actions/hls_udp_512/hw/write_data.cpp @@ -15,11 +15,11 @@ */ -#include "hls_udp.h" #include #include "ap_int.h" -#include "osnap_hls_if.h" -#include +//#include "osnap_hls_if.h" +//#include +#include "hls_udp.h" void write_data(DATA_STREAM &in, snap_membus_512_t *dout_gmem, uint64_t out_frame_buffer_addr) { data_packet_t packet_in; From 4a74d90e83d584478d4f93a274d31ae4b5d064a3 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 1 Apr 2021 15:43:22 +0200 Subject: [PATCH 15/25] correct lib calls Signed-off-by: Bruno Mesnet --- hardware/hdl/core/framework_afu.v | 15 +++++-- hardware/hdl/core/snap_global_vars.v_source | 4 ++ hardware/hdl/hls/action_wrapper.v | 47 +++++++++++++++++++-- 3 files changed, 58 insertions(+), 8 deletions(-) diff --git a/hardware/hdl/core/framework_afu.v b/hardware/hdl/core/framework_afu.v index 4baf92963..694a7b635 100644 --- a/hardware/hdl/core/framework_afu.v +++ b/hardware/hdl/core/framework_afu.v @@ -4149,16 +4149,20 @@ module framework_afu ( .din_eth_tdata ( eth1_rx_tdata ) , .din_eth_tvalid ( eth1_rx_tvalid ) , .din_eth_tready ( eth1_rx_tready ) , + `ifndef HLS_VITIS_USED .din_eth_tkeep ( eth1_rx_tkeep ) , .din_eth_tuser ( eth1_rx_tuser ) , .din_eth_tlast ( eth1_rx_tlast ) , + `endif //Enable for ethernet TX .dout_eth_tdata ( eth1_tx_tdata ) , .dout_eth_tvalid ( eth1_tx_tvalid ) , .dout_eth_tready ( eth1_tx_tready ) , + `ifndef HLS_VITIS_USED .dout_eth_tkeep ( eth1_tx_tkeep ) , .dout_eth_tuser ( eth1_tx_tuser ) , .dout_eth_tlast ( eth1_tx_tlast ) , + `endif .eth_rx_fifo_reset ( eth_m_axis_rx_rst ) , .eth_stat_rx_status ( eth_stat_rx_status ) , .eth_stat_rx_aligned ( eth_stat_rx_aligned ) , @@ -6612,16 +6616,19 @@ eth_100G eth_100G_0 `endif .m_axis_rx_tdata ( eth1_rx_tdata ), + .m_axis_rx_tvalid ( eth1_rx_tvalid ), + .m_axis_rx_tready ( eth1_rx_tready ), + `ifndef HLS_VITIS_USED .m_axis_rx_tkeep ( eth1_rx_tkeep ), .m_axis_rx_tlast ( eth1_rx_tlast ), - .m_axis_rx_tvalid ( eth1_rx_tvalid ), .m_axis_rx_tuser ( eth1_rx_tuser ), - .m_axis_rx_tready ( eth1_rx_tready ), - .s_axis_tx_tdata ( eth1_tx_tdata ), + .s_axis_tx_tkeep ( eth1_tx_tkeep ), .s_axis_tx_tlast ( eth1_tx_tlast ), - .s_axis_tx_tvalid ( eth1_tx_tvalid ), .s_axis_tx_tuser ( eth1_tx_tuser ), + `endif + .s_axis_tx_tdata ( eth1_tx_tdata ), + .s_axis_tx_tvalid ( eth1_tx_tvalid ), .s_axis_tx_tready ( eth1_tx_tready ), .i_sys_reset ( eth_rst ), diff --git a/hardware/hdl/core/snap_global_vars.v_source b/hardware/hdl/core/snap_global_vars.v_source index 316c60197..eb9bd111a 100644 --- a/hardware/hdl/core/snap_global_vars.v_source +++ b/hardware/hdl/core/snap_global_vars.v_source @@ -83,6 +83,10 @@ `define ENABLE_EMAC_V3_1 #endif +#if defined(CONFIG_HLS_VITIS_USED) +`define HLS_VITIS_USED +#endif + #if defined(CONFIG_ENABLE_9H3_LED) `define ENABLE_9H3_LED #endif diff --git a/hardware/hdl/hls/action_wrapper.v b/hardware/hdl/hls/action_wrapper.v index 75ad4722b..172ef3c84 100644 --- a/hardware/hdl/hls/action_wrapper.v +++ b/hardware/hdl/hls/action_wrapper.v @@ -3416,8 +3416,46 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; `endif `endif // ETHERNET interface -`ifdef ENABLE_ETHERNET -`ifndef ENABLE_ETH_LOOP_BACK +`ifdef HLS_VITIS_USED + `ifdef ENABLE_ETHERNET + `ifndef ENABLE_ETH_LOOP_BACK +//ethernet enabled without loopback + .din_eth_V_TDATA (din_eth_tdata ) , + .din_eth_V_TVALID (din_eth_tvalid ) , + .din_eth_V_TREADY (din_eth_tready ) , + //.din_eth_V_TKEEP (din_eth_tkeep ) , + //.din_eth_V_TUSER (din_eth_tuser ) , + //.din_eth_V_TLAST (din_eth_tlast ) , +//Enable for ethernet TX + .dout_eth_V_TDATA (dout_eth_tdata ) , + .dout_eth_V_TVALID (dout_eth_tvalid ) , + .dout_eth_V_TREADY (dout_eth_tready ) , + //.dout_eth_V_TKEEP (dout_eth_tkeep ) , + //.dout_eth_V_TUSER (dout_eth_tuser ) , + //.dout_eth_V_TLAST (dout_eth_tlast ) , + .eth_reset (eth_rx_fifo_reset ) , + `else + .din_eth_V_TDATA (dwrap_eth_TDATA ) , + .din_eth_V_TVALID (dwrap_eth_TVALID ) , + .din_eth_V_TREADY ( ) , + //.din_eth_V_TKEEP (dwrap_eth_TKEEP ) , + //.din_eth_V_TUSER (dwrap_eth_TUSER ) , + //.din_eth_V_TLAST (dwrap_eth_TLAST[0] ) , +//Enable for ethernet TX + .dout_eth_V_TDATA (dwrap_eth_TDATA ) , + .dout_eth_V_TVALID (dwrap_eth_TVALID ) , +//Force the TREADY signal to 1 to mimic the mac + .dout_eth_V_TREADY ('b1 ) , + //.dout_eth_V_TKEEP (dwrap_eth_TKEEP ) , + //.dout_eth_V_TUSER (dwrap_eth_TUSER ) , + //.dout_eth_V_TLAST (dwrap_eth_TLAST[0] ) , + .eth_reset ( ) , +//Enable ethernet with loopback + `endif + `endif +`else + `ifdef ENABLE_ETHERNET + `ifndef ENABLE_ETH_LOOP_BACK //ethernet enabled without loopback .din_eth_TDATA (din_eth_tdata ) , .din_eth_TVALID (din_eth_tvalid ) , @@ -3433,7 +3471,7 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; .dout_eth_TUSER (dout_eth_tuser ) , .dout_eth_TLAST (dout_eth_tlast ) , .eth_reset_V (eth_rx_fifo_reset ) , -`else + `else .din_eth_TDATA (dwrap_eth_TDATA ) , .din_eth_TVALID (dwrap_eth_TVALID ) , .din_eth_TREADY ( ) , @@ -3450,7 +3488,8 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; .dout_eth_TLAST (dwrap_eth_TLAST[0] ) , .eth_reset_V ( ) , //Enable ethernet with loopback -`endif + `endif + `endif `endif // .s_axi_ctrl_reg_araddr (s_axi_ctrl_reg_araddr ) , From efa0c0a981d9af572c66c9ad53b2fe10d4f310d8 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 2 Apr 2021 17:53:54 +0200 Subject: [PATCH 16/25] tune axis for vitis Signed-off-by: Bruno Mesnet --- actions/hls_udp_512/hw/hls_udp.h | 14 +++++-- hardware/hdl/hls/action_wrapper.v | 62 +++++++++---------------------- 2 files changed, 28 insertions(+), 48 deletions(-) diff --git a/actions/hls_udp_512/hw/hls_udp.h b/actions/hls_udp_512/hw/hls_udp.h index 14952d391..bb910be5f 100644 --- a/actions/hls_udp_512/hw/hls_udp.h +++ b/actions/hls_udp_512/hw/hls_udp.h @@ -21,7 +21,9 @@ #include #include #include - +#ifdef HLS_VITIS_USED +#include +#endif #include "hls_snap_1024.H" #include "action_udp.H" /* Job definition */ @@ -36,13 +38,18 @@ typedef struct { uint8_t padding[SNAP_HLS_JOBSIZE - sizeof(rx100G_job_t)]; } action_reg; +#ifdef HLS_VITIS_USED + //redefining the structure to get keep, user and last signals + typedef ap_axiu<512,1,0,0> ap_axiu_for_eth; +#else // Based on https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/ap-axiu-parameters/td-p/635138 -struct ap_axiu_for_eth { + struct ap_axiu_for_eth { ap_uint<512> data; ap_uint<64> keep; ap_uint<1> user; ap_uint<1> last; -}; + }; +#endif struct eth_settings_t { uint64_t expected_packets; @@ -100,7 +107,6 @@ struct packet_header_t { ap_uint<8> jf_detector_type; ap_uint<8> jf_header_version_type; }; - typedef hls::stream AXI_STREAM; typedef hls::stream DATA_STREAM; diff --git a/hardware/hdl/hls/action_wrapper.v b/hardware/hdl/hls/action_wrapper.v index 172ef3c84..42ea497ed 100644 --- a/hardware/hdl/hls/action_wrapper.v +++ b/hardware/hdl/hls/action_wrapper.v @@ -3416,51 +3416,16 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; `endif `endif // ETHERNET interface -`ifdef HLS_VITIS_USED - `ifdef ENABLE_ETHERNET - `ifndef ENABLE_ETH_LOOP_BACK -//ethernet enabled without loopback - .din_eth_V_TDATA (din_eth_tdata ) , - .din_eth_V_TVALID (din_eth_tvalid ) , - .din_eth_V_TREADY (din_eth_tready ) , - //.din_eth_V_TKEEP (din_eth_tkeep ) , - //.din_eth_V_TUSER (din_eth_tuser ) , - //.din_eth_V_TLAST (din_eth_tlast ) , -//Enable for ethernet TX - .dout_eth_V_TDATA (dout_eth_tdata ) , - .dout_eth_V_TVALID (dout_eth_tvalid ) , - .dout_eth_V_TREADY (dout_eth_tready ) , - //.dout_eth_V_TKEEP (dout_eth_tkeep ) , - //.dout_eth_V_TUSER (dout_eth_tuser ) , - //.dout_eth_V_TLAST (dout_eth_tlast ) , - .eth_reset (eth_rx_fifo_reset ) , - `else - .din_eth_V_TDATA (dwrap_eth_TDATA ) , - .din_eth_V_TVALID (dwrap_eth_TVALID ) , - .din_eth_V_TREADY ( ) , - //.din_eth_V_TKEEP (dwrap_eth_TKEEP ) , - //.din_eth_V_TUSER (dwrap_eth_TUSER ) , - //.din_eth_V_TLAST (dwrap_eth_TLAST[0] ) , -//Enable for ethernet TX - .dout_eth_V_TDATA (dwrap_eth_TDATA ) , - .dout_eth_V_TVALID (dwrap_eth_TVALID ) , -//Force the TREADY signal to 1 to mimic the mac - .dout_eth_V_TREADY ('b1 ) , - //.dout_eth_V_TKEEP (dwrap_eth_TKEEP ) , - //.dout_eth_V_TUSER (dwrap_eth_TUSER ) , - //.dout_eth_V_TLAST (dwrap_eth_TLAST[0] ) , - .eth_reset ( ) , -//Enable ethernet with loopback - `endif - `endif -`else - `ifdef ENABLE_ETHERNET - `ifndef ENABLE_ETH_LOOP_BACK +`ifdef ENABLE_ETHERNET + `ifndef ENABLE_ETH_LOOP_BACK //ethernet enabled without loopback .din_eth_TDATA (din_eth_tdata ) , .din_eth_TVALID (din_eth_tvalid ) , .din_eth_TREADY (din_eth_tready ) , .din_eth_TKEEP (din_eth_tkeep ) , +`ifdef HLS_VITIS_USED + .din_eth_TSTRB (64'b0 ) , +`endif .din_eth_TUSER (din_eth_tuser ) , .din_eth_TLAST (din_eth_tlast ) , //Enable for ethernet TX @@ -3468,14 +3433,21 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; .dout_eth_TVALID (dout_eth_tvalid ) , .dout_eth_TREADY (dout_eth_tready ) , .dout_eth_TKEEP (dout_eth_tkeep ) , +`ifdef HLS_VITIS_USED + .dout_eth_TSTRB ( ) , +`endif .dout_eth_TUSER (dout_eth_tuser ) , .dout_eth_TLAST (dout_eth_tlast ) , - .eth_reset_V (eth_rx_fifo_reset ) , - `else + .eth_reset (eth_rx_fifo_reset ) , +//ethernet enabled with loopback + `else .din_eth_TDATA (dwrap_eth_TDATA ) , .din_eth_TVALID (dwrap_eth_TVALID ) , .din_eth_TREADY ( ) , .din_eth_TKEEP (dwrap_eth_TKEEP ) , +`ifdef HLS_VITIS_USED + .din_eth_TSTRB (64'b0 ) , +`endif .din_eth_TUSER (dwrap_eth_TUSER ) , .din_eth_TLAST (dwrap_eth_TLAST[0] ) , //Enable for ethernet TX @@ -3484,11 +3456,13 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; //Force the TREADY signal to 1 to mimic the mac .dout_eth_TREADY ('b1 ) , .dout_eth_TKEEP (dwrap_eth_TKEEP ) , +`ifdef HLS_VITIS_USED + .dout_eth_TSTRB ( ) , +`endif .dout_eth_TUSER (dwrap_eth_TUSER ) , .dout_eth_TLAST (dwrap_eth_TLAST[0] ) , - .eth_reset_V ( ) , + .eth_reset ( ) , //Enable ethernet with loopback - `endif `endif `endif // From d48d7f29f0952289f64a2cd3b9ac029552b81fb2 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 2 Apr 2021 18:30:05 +0200 Subject: [PATCH 17/25] tune axis for vitis Signed-off-by: Bruno Mesnet --- hardware/hdl/hls/action_wrapper.v | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/hardware/hdl/hls/action_wrapper.v b/hardware/hdl/hls/action_wrapper.v index 42ea497ed..0c5ca7a5b 100644 --- a/hardware/hdl/hls/action_wrapper.v +++ b/hardware/hdl/hls/action_wrapper.v @@ -3423,9 +3423,6 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; .din_eth_TVALID (din_eth_tvalid ) , .din_eth_TREADY (din_eth_tready ) , .din_eth_TKEEP (din_eth_tkeep ) , -`ifdef HLS_VITIS_USED - .din_eth_TSTRB (64'b0 ) , -`endif .din_eth_TUSER (din_eth_tuser ) , .din_eth_TLAST (din_eth_tlast ) , //Enable for ethernet TX @@ -3433,21 +3430,21 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; .dout_eth_TVALID (dout_eth_tvalid ) , .dout_eth_TREADY (dout_eth_tready ) , .dout_eth_TKEEP (dout_eth_tkeep ) , -`ifdef HLS_VITIS_USED - .dout_eth_TSTRB ( ) , -`endif .dout_eth_TUSER (dout_eth_tuser ) , .dout_eth_TLAST (dout_eth_tlast ) , + `ifdef HLS_VITIS_USED .eth_reset (eth_rx_fifo_reset ) , + .din_eth_TSTRB (64'b0 ) , + .dout_eth_TSTRB ( ) , + `else + .eth_reset_V (eth_rx_fifo_reset ) , + `endif //ethernet enabled with loopback `else .din_eth_TDATA (dwrap_eth_TDATA ) , .din_eth_TVALID (dwrap_eth_TVALID ) , .din_eth_TREADY ( ) , .din_eth_TKEEP (dwrap_eth_TKEEP ) , -`ifdef HLS_VITIS_USED - .din_eth_TSTRB (64'b0 ) , -`endif .din_eth_TUSER (dwrap_eth_TUSER ) , .din_eth_TLAST (dwrap_eth_TLAST[0] ) , //Enable for ethernet TX @@ -3456,12 +3453,15 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; //Force the TREADY signal to 1 to mimic the mac .dout_eth_TREADY ('b1 ) , .dout_eth_TKEEP (dwrap_eth_TKEEP ) , -`ifdef HLS_VITIS_USED - .dout_eth_TSTRB ( ) , -`endif .dout_eth_TUSER (dwrap_eth_TUSER ) , .dout_eth_TLAST (dwrap_eth_TLAST[0] ) , + `ifdef HLS_VITIS_USED + .din_eth_TSTRB (64'b0 ) , + .dout_eth_TSTRB ( ) , .eth_reset ( ) , + `else + .eth_reset_V ( ) , + `endif //Enable ethernet with loopback `endif `endif From 00dddc637e0a3fa7aa9af1fd037a71cbce8bffe8 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 9 Apr 2021 12:32:45 +0200 Subject: [PATCH 18/25] tune signals Signed-off-by: Bruno Mesnet --- hardware/hdl/core/framework_afu.v | 6 +++--- hardware/hdl/hls/action_wrapper.v | 4 ++-- hardware/setup/create_framework.tcl | 2 +- hardware/setup/create_hbm.tcl | 13 +++++++------ 4 files changed, 13 insertions(+), 12 deletions(-) diff --git a/hardware/hdl/core/framework_afu.v b/hardware/hdl/core/framework_afu.v index 694a7b635..3b5d88894 100644 --- a/hardware/hdl/core/framework_afu.v +++ b/hardware/hdl/core/framework_afu.v @@ -2222,7 +2222,7 @@ module framework_afu ( .desc_cfg_echo_cmd_valid ( desc_cfg_echo_cmd_valid ) , // output // // Error indicator - .err_unimplemented_addr ( err_unimplemented_addr ) // // output + .err_unimplemented_addr ( vpd_err_unimplemented_addr ) // // output ); @@ -4991,7 +4991,7 @@ block_RAM block_ram_i1 .c0_ddr4_s_axi_rresp ( memctl0_axi_rresp ) , .c0_ddr4_s_axi_rid ( memctl0_axi_rid ) , .c0_ddr4_s_axi_rdata ( memctl0_axi_rdata ) , - .sys_rst ( memctl0_reset_q ) + .sys_rst ( input_reset_q ) ); `endif `ifdef BW250SOC @@ -5076,7 +5076,7 @@ block_RAM block_ram_i1 .c0_ddr4_s_axi_rresp ( memctl0_axi_rresp ) , .c0_ddr4_s_axi_rid ( memctl0_axi_rid ) , .c0_ddr4_s_axi_rdata ( memctl0_axi_rdata ) , - .sys_rst ( memctl0_reset_q ) + .sys_rst ( input_reset_q ) ); `endif `endif diff --git a/hardware/hdl/hls/action_wrapper.v b/hardware/hdl/hls/action_wrapper.v index 0c5ca7a5b..f14e4e049 100644 --- a/hardware/hdl/hls/action_wrapper.v +++ b/hardware/hdl/hls/action_wrapper.v @@ -3466,10 +3466,10 @@ wire [31:0] temp_s_axi_ctrl_reg_rdata; `endif `endif // - .s_axi_ctrl_reg_araddr (s_axi_ctrl_reg_araddr ) , + .s_axi_ctrl_reg_araddr (s_axi_ctrl_reg_araddr[8:0] ) , .s_axi_ctrl_reg_arready (s_axi_ctrl_reg_arready ) , .s_axi_ctrl_reg_arvalid (s_axi_ctrl_reg_arvalid ) , - .s_axi_ctrl_reg_awaddr (s_axi_ctrl_reg_awaddr ) , + .s_axi_ctrl_reg_awaddr (s_axi_ctrl_reg_awaddr[8:0] ) , .s_axi_ctrl_reg_awready (s_axi_ctrl_reg_awready ) , .s_axi_ctrl_reg_awvalid (s_axi_ctrl_reg_awvalid ) , .s_axi_ctrl_reg_bready (s_axi_ctrl_reg_bready ) , diff --git a/hardware/setup/create_framework.tcl b/hardware/setup/create_framework.tcl index b3e160751..cf928bca9 100644 --- a/hardware/setup/create_framework.tcl +++ b/hardware/setup/create_framework.tcl @@ -115,7 +115,7 @@ if { ( $simulator == "irun" ) } { } } elseif { $simulator == "xcelium" } { set_property target_simulator Xcelium [current_project] - set_property compxlib.ies_compiled_library_dir $::env(IES_LIBS) [current_project] + set_property compxlib.xcelium_compiled_library_dir $::env(IES_LIBS) [current_project] if { $hbm_used == TRUE } { #NEW - 2 following lines to circumvent Xilinx bug when simulating HBM (PG276) set_property -name {xcelium.simulate.xmsim.more_options} -value {-notimingcheck} -objects [get_filesets sim_1] diff --git a/hardware/setup/create_hbm.tcl b/hardware/setup/create_hbm.tcl index e413fe4c9..c8c0792dc 100644 --- a/hardware/setup/create_hbm.tcl +++ b/hardware/setup/create_hbm.tcl @@ -118,8 +118,8 @@ set_property -dict [list \ CONFIG.USER_XSDB_INTF_EN {FALSE} \ ] $cell >> $log_file - -if { $hbm_axi_if_num < 16 } { +# if less or equal than 16 HBM then 1 stack used +if { $hbm_axi_if_num <= 16 } { set_property -dict [list \ CONFIG.USER_HBM_DENSITY {4GB} \ CONFIG.USER_HBM_STACK {1} \ @@ -134,6 +134,7 @@ if { $hbm_axi_if_num < 16 } { CONFIG.USER_SINGLE_STACK_SELECTION {LEFT} \ ] $cell >> $log_file } +# 2 stacks } else { set_property -dict [list \ CONFIG.USER_SINGLE_STACK_SELECTION {LEFT} \ @@ -268,7 +269,7 @@ connect_bd_net [get_bd_pins constant_1_zero/dout] [get_bd_pins hbm/APB_0_PWRITE] connect_bd_net [get_bd_pins refclk_bufg_apb_clk/BUFGCE_O] [get_bd_pins hbm/APB_0_PCLK] connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/APB_0_PRESET_N] -if { $hbm_axi_if_num > 15 } { +if { $hbm_axi_if_num > 16 } { connect_bd_net [get_bd_pins constant_1_zero/dout] [get_bd_pins hbm/APB_1_PENABLE] >> $log_file connect_bd_net [get_bd_pins constant_22_zero/dout] [get_bd_pins hbm/APB_1_PADDR] >> $log_file connect_bd_net [get_bd_pins constant_1_zero/dout] [get_bd_pins hbm/APB_1_PSEL] >> $log_file @@ -347,7 +348,7 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_0$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_0$i\_ACLK] # AD9H7 cards require a different AXI name - if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2019.2") } { + if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2020.2") } { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i\_RT] } else { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_0$i] @@ -356,7 +357,7 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { connect_bd_net [get_bd_pins ARESETN] [get_bd_pins hbm/AXI_$i\_ARESET_N] connect_bd_net [get_bd_pins axi4_to_axi3_$i/aclk] [get_bd_pins hbm/AXI_$i\_ACLK] - if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2019.2") } { + if { (($fpga_card != "AD9H7" && $fpga_card != "AD9H335") && $vivadoVer >= "2020.2") } { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i\_RT] } else { connect_bd_intf_net [get_bd_intf_pins axi_register_slice_$i\/M_AXI] [get_bd_intf_pins hbm/SAXI_$i] @@ -368,7 +369,7 @@ for {set i 0} {$i < $hbm_axi_if_num} {incr i} { #This line need to be added after the loop since the S_AXI_p0_HBM_ACLK is not defined before connect_bd_net [get_bd_pins hbm/HBM_REF_CLK_0] [get_bd_pins S_AXI_p0_HBM_ACLK] connect_bd_net [get_bd_ports S_AXI_p0_HBM_ACLK] [get_bd_pins refclk_bufg_apb_clk/BUFGCE_I] -if { $hbm_axi_if_num > 15 } { +if { $hbm_axi_if_num > 16 } { connect_bd_net [get_bd_pins hbm/HBM_REF_CLK_1] [get_bd_pins S_AXI_p0_HBM_ACLK] } From 5609184b00cde243c3c9f5fb86490c5d77aa7cf7 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Fri, 2 Jul 2021 16:31:18 +0200 Subject: [PATCH 19/25] temporaru add for debug Signed-off-by: Bruno Mesnet --- hardware/setup/create_framework.tcl | 25 +++++++++++++++++++++++++ hardware/sim/run_sim | 4 +++- scripts/Kconfig | 2 +- 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/hardware/setup/create_framework.tcl b/hardware/setup/create_framework.tcl index cf928bca9..ae3482f88 100644 --- a/hardware/setup/create_framework.tcl +++ b/hardware/setup/create_framework.tcl @@ -165,6 +165,17 @@ puts " importing design files" add_files -scan_for_includes $hdl_dir/core >> $log_file add_files -scan_for_includes $hdl_dir/oc >> $log_file add_files -scan_for_includes $fpga_top_src_dir/oc_fpga_top.v >> $log_file +#add mem files (needed starting vivado 2019.2 and later +#if { ($fpga_card == "AD9V3") && ($sdram_used == "TRUE") } { + ##add_files -norecurse $ip_dir/ddr4sdram_ex/imports/*.mem + #add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem + #add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem + #update_ip_catalog >> $log_file + ##add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/*.mem + #import_files -fileset sim_1 -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem + #import_files -fileset sim_1 -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem + ##update_compile_order -fileset sim_1 >> $log_file +#} set file "snap_global_vars.v" set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] @@ -213,6 +224,20 @@ if { $simulator != "nosim" } { # DDR4 Sim Files if { ($fpga_card == "AD9V3") && ($sdram_used == "TRUE") } { + #keep the 3 following lines + add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem + add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem + update_ip_catalog >> $log_file + + #add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem + #add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem + # Import local files from the original project + #set files [list \ + #[file normalize "$ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem"]\ + #[file normalize "$ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem"]\ + #] + #set imported_files [import_files -fileset sources_1 $files] + add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/ddr4_model.sv >> $log_file add_files -fileset sim_1 -norecurse -scan_for_includes $sim_dir/src/ddr4_dimm_ad9v3.sv >> $log_file set_property used_in_synthesis false [get_files $sim_dir/src/ddr4_dimm_ad9v3.sv] diff --git a/hardware/sim/run_sim b/hardware/sim/run_sim index 82376ea82..73776d459 100755 --- a/hardware/sim/run_sim +++ b/hardware/sim/run_sim @@ -299,10 +299,12 @@ `sed -i "s/ input ncinject.tcl/#input ncinject.tcl/g" ncrun.tcl` # disable/comment error injection in ncrun.tcl fi elif [ "$SIMDIR" == "xsim" ];then + #SIM_INIT='-key {Behavioral:sim_1:Functional:top} -protoinst "/afs/vlsilab.boeblingen.ibm.com/projects/fpga/framework/mesnet/oc-accel_VITIS/hardware/sim/xsim/protoinst_files/bd_2a05.protoinst"' # default init value for simulator SIM_INIT='' # default init value for simulator SIM_ARG='' # -batch overrides -tcl VPI_OPT='libdpi.so' - SIM_ARG+=" -t xsrun.tcl" + SIM_ARG+=" -t xsrun.tcl" # -tclbatch arg + #SIM_ARG+=" -t /afs/vlsilab.boeblingen.ibm.com/projects/fpga/framework/mesnet/oc-accel_VITIS/hardware/sim/xsim/cmd.tcl" # -tclbatch arg # SIM_ARG+=" -t xsrun.tcl +model_data+." # syntax errors if [ "$AET" == "1" ];then `sed -i "s/#source xsaet.tcl/ source xsaet.tcl/g" xsrun.tcl` # enable/uncomment AET generation in xsrun.tcl diff --git a/scripts/Kconfig b/scripts/Kconfig index 0f8508123..15257f3fa 100644 --- a/scripts/Kconfig +++ b/scripts/Kconfig @@ -757,7 +757,7 @@ config ACTION_USER_CLOCK config HLS_CLOCK_PERIOD_CONSTRAINT prompt "The HLS clock period constraint used when C code (only used for hls action)" string - default "4ns" + default "5ns" range "1ns" "20ns" help The HLS clock period constraint in "ns" used when C code is compiled to rtl, From f89546e3f89ea0e4b9b53ae7046e3221f3a0eef3 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 22 Jul 2021 17:04:35 +0200 Subject: [PATCH 20/25] tune path before calling xsim with vivado 2020.1 and later Signed-off-by: Bruno Mesnet --- hardware/sim/run_sim | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/hardware/sim/run_sim b/hardware/sim/run_sim index 73776d459..2d25f2e4c 100755 --- a/hardware/sim/run_sim +++ b/hardware/sim/run_sim @@ -299,12 +299,13 @@ `sed -i "s/ input ncinject.tcl/#input ncinject.tcl/g" ncrun.tcl` # disable/comment error injection in ncrun.tcl fi elif [ "$SIMDIR" == "xsim" ];then - #SIM_INIT='-key {Behavioral:sim_1:Functional:top} -protoinst "/afs/vlsilab.boeblingen.ibm.com/projects/fpga/framework/mesnet/oc-accel_VITIS/hardware/sim/xsim/protoinst_files/bd_2a05.protoinst"' # default init value for simulator SIM_INIT='' # default init value for simulator SIM_ARG='' # -batch overrides -tcl VPI_OPT='libdpi.so' - SIM_ARG+=" -t xsrun.tcl" # -tclbatch arg - #SIM_ARG+=" -t /afs/vlsilab.boeblingen.ibm.com/projects/fpga/framework/mesnet/oc-accel_VITIS/hardware/sim/xsim/cmd.tcl" # -tclbatch arg +#DEBUG 7/22 - add cd later so need to add path + #SIM_ARG+=" -t xsrun.tcl" # -tclbatch arg + SIM_ARG+=" -t $SNAP_ROOT/hardware/sim/xsrun.tcl" # -tclbatch arg + # SIM_ARG+=" -t xsrun.tcl +model_data+." # syntax errors if [ "$AET" == "1" ];then `sed -i "s/#source xsaet.tcl/ source xsaet.tcl/g" xsrun.tcl` # enable/uncomment AET generation in xsrun.tcl @@ -336,7 +337,11 @@ ##### call Simulator if [ "$SIMULATOR" == "irun" ]||[ "$SIMULATOR" == "xrun" ];then SIM_ARG+=" -r";fi echo "**** call simulator=$SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM in background, wait for socket in $SIMULATOR.log->shim_host.dat"|tee -a sim.log & - $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a sim.log & +#DEBUG 7/22 - add cd to remove the 2020.1 issue + cd $SNAP_ROOT/hardware/sim/xsim + $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a $SIMOUT/sim.log & + cd $SIMOUT + SIMLOG_PID=$! # sim.log records 1st socket SIMLOG_PPID=`ps -ef|grep $SIMLOG_PID |grep tee |awk '{print $3}'` if [ "$SIMLOG_PPID" == "" ];then echo "could not start $SIMULATOR, did you successfully compile the model ?";TCRC=-1;fi From 4adb5664233432fc02470c55b66fbaf9798d0a0d Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 22 Jul 2021 17:23:47 +0200 Subject: [PATCH 21/25] tune path before calling xsim with vivado 2020.1 and later Signed-off-by: Bruno Mesnet --- hardware/sim/run_sim | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hardware/sim/run_sim b/hardware/sim/run_sim index 2d25f2e4c..c23f33ad1 100755 --- a/hardware/sim/run_sim +++ b/hardware/sim/run_sim @@ -338,7 +338,7 @@ if [ "$SIMULATOR" == "irun" ]||[ "$SIMULATOR" == "xrun" ];then SIM_ARG+=" -r";fi echo "**** call simulator=$SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM in background, wait for socket in $SIMULATOR.log->shim_host.dat"|tee -a sim.log & #DEBUG 7/22 - add cd to remove the 2020.1 issue - cd $SNAP_ROOT/hardware/sim/xsim + cd $SNAP_ROOT/hardware/sim/$SIMDIR $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a $SIMOUT/sim.log & cd $SIMOUT From 265831c83ff0e8896bb48b71e3d407de135e96b1 Mon Sep 17 00:00:00 2001 From: Bruno Mesnet Date: Thu, 22 Jul 2021 18:23:18 +0200 Subject: [PATCH 22/25] tune path before calling xsim with vivado 2020.1 and later Signed-off-by: Bruno Mesnet --- hardware/sim/run_sim | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/hardware/sim/run_sim b/hardware/sim/run_sim index c23f33ad1..b0b108dc6 100755 --- a/hardware/sim/run_sim +++ b/hardware/sim/run_sim @@ -338,9 +338,13 @@ if [ "$SIMULATOR" == "irun" ]||[ "$SIMULATOR" == "xrun" ];then SIM_ARG+=" -r";fi echo "**** call simulator=$SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM in background, wait for socket in $SIMULATOR.log->shim_host.dat"|tee -a sim.log & #DEBUG 7/22 - add cd to remove the 2020.1 issue - cd $SNAP_ROOT/hardware/sim/$SIMDIR - $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a $SIMOUT/sim.log & - cd $SIMOUT + if [ "$SIMULATOR" == "xsim" ];then + cd $SNAP_ROOT/hardware/sim/$SIMDIR; + $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a $SIMOUT/sim.log & + cd $SIMOUT; + else + $SIMULATOR $SIM_ARG $SIMTOP $SIM_PARM |tee -a sim.log & + fi SIMLOG_PID=$! # sim.log records 1st socket SIMLOG_PPID=`ps -ef|grep $SIMLOG_PID |grep tee |awk '{print $3}'` From 549739340fb4f5577a029132664dd83a67b41f01 Mon Sep 17 00:00:00 2001 From: Bruno MESNET Date: Mon, 26 Jul 2021 19:54:35 +0200 Subject: [PATCH 23/25] Update hls.mk typos in comments --- actions/hls.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/actions/hls.mk b/actions/hls.mk index 2da7d2b5f..797fc1a98 100644 --- a/actions/hls.mk +++ b/actions/hls.mk @@ -92,7 +92,7 @@ $(SOLUTION_NAME): $(objs) check: $(syn_dir) @if [ "${HLS_ACTION_CLOCK}" != "${shell grep "Setting up clock" *_hls.log |cut -d " " -f 12|cut -d "n" -f 1}" ]; then \ - echo " ERROR with VivadoVitis HLS Action was last compiled with a different HLS clock."; \ + echo " ERROR with Vivado/Vitis HLS. HLS Action was last compiled with a different HLS clock."; \ echo " Please force the recompilation with a 'make clean' command"; \ echo " ---------------------------------------------------------- "; exit 1; \ fi From db7192c25bc3a66f4c74a4535ed329203f61cdcc Mon Sep 17 00:00:00 2001 From: Bruno MESNET Date: Mon, 26 Jul 2021 20:04:08 +0200 Subject: [PATCH 24/25] Update create_framework.tcl clean commented lines --- hardware/setup/create_framework.tcl | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/hardware/setup/create_framework.tcl b/hardware/setup/create_framework.tcl index ae3482f88..8fad82715 100644 --- a/hardware/setup/create_framework.tcl +++ b/hardware/setup/create_framework.tcl @@ -165,17 +165,6 @@ puts " importing design files" add_files -scan_for_includes $hdl_dir/core >> $log_file add_files -scan_for_includes $hdl_dir/oc >> $log_file add_files -scan_for_includes $fpga_top_src_dir/oc_fpga_top.v >> $log_file -#add mem files (needed starting vivado 2019.2 and later -#if { ($fpga_card == "AD9V3") && ($sdram_used == "TRUE") } { - ##add_files -norecurse $ip_dir/ddr4sdram_ex/imports/*.mem - #add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem - #add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem - #update_ip_catalog >> $log_file - ##add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/*.mem - #import_files -fileset sim_1 -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem - #import_files -fileset sim_1 -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem - ##update_compile_order -fileset sim_1 >> $log_file -#} set file "snap_global_vars.v" set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]] @@ -229,15 +218,6 @@ if { $simulator != "nosim" } { add_files -norecurse $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem update_ip_catalog >> $log_file - #add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem - #add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem - # Import local files from the original project - #set files [list \ - #[file normalize "$ip_dir/ddr4sdram_ex/imports/bd_2a05_lmb_bram_I_0.mem"]\ - #[file normalize "$ip_dir/ddr4sdram_ex/imports/bd_2a05_second_lmb_bram_I_0.mem"]\ - #] - #set imported_files [import_files -fileset sources_1 $files] - add_files -fileset sim_1 -norecurse -scan_for_includes $ip_dir/ddr4sdram_ex/imports/ddr4_model.sv >> $log_file add_files -fileset sim_1 -norecurse -scan_for_includes $sim_dir/src/ddr4_dimm_ad9v3.sv >> $log_file set_property used_in_synthesis false [get_files $sim_dir/src/ddr4_dimm_ad9v3.sv] From 27be960c193b9ed0c1a30248140f0e76fbc63b83 Mon Sep 17 00:00:00 2001 From: Alexandre CASTELLANE Date: Wed, 28 Jul 2021 10:39:18 +0200 Subject: [PATCH 25/25] synchro with oc-bip Signed-off-by: Alexandre CASTELLANE --- hardware/oc-bip | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hardware/oc-bip b/hardware/oc-bip index 16d684a82..9552e094f 160000 --- a/hardware/oc-bip +++ b/hardware/oc-bip @@ -1 +1 @@ -Subproject commit 16d684a821b40e6f11707166a63bf2b7a6fdb756 +Subproject commit 9552e094f45a1acbcc635e6b23db3a05088ad3c3