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NUC131BSP/SampleCode/StdDriver/ADC_SingleMode/main.c
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| /**************************************************************************** | |
| * @file main.c | |
| * @version V2.0 | |
| * $Revision: 6 $ | |
| * $Date: 15/01/15 1:33p $ | |
| * @brief Perform A/D Conversion with ADC single mode. | |
| * @note | |
| * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved. | |
| * | |
| ******************************************************************************/ | |
| #include <stdio.h> | |
| #include "NUC131.h" | |
| #define PLL_CLOCK 50000000 | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Define Function Prototypes */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| void SYS_Init(void); | |
| void UART0_Init(void); | |
| void AdcSingleModeTest(void); | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Define global variables and constants */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| volatile uint32_t g_u32AdcIntFlag; | |
| void SYS_Init(void) | |
| { | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Init System Clock */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Enable Internal RC 22.1184MHz clock */ | |
| CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk); | |
| /* Waiting for Internal RC clock ready */ | |
| CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk); | |
| /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */ | |
| CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1)); | |
| /* Enable external XTAL 12MHz clock */ | |
| CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk); | |
| /* Waiting for external XTAL clock ready */ | |
| CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk); | |
| /* Set core clock as PLL_CLOCK from PLL */ | |
| CLK_SetCoreClock(PLL_CLOCK); | |
| /* Enable UART module clock */ | |
| CLK_EnableModuleClock(UART0_MODULE); | |
| /* Enable ADC module clock */ | |
| CLK_EnableModuleClock(ADC_MODULE); | |
| /* Select UART module clock source */ | |
| CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_PLL, CLK_CLKDIV_UART(1)); | |
| /* ADC clock source is 22.1184MHz, set divider to 7, ADC clock is 22.1184/7 MHz */ | |
| CLK_SetModuleClock(ADC_MODULE, CLK_CLKSEL1_ADC_S_HIRC, CLK_CLKDIV_ADC(7)); | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Init I/O Multi-function */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Set GPB multi-function pins for UART0 RXD and TXD */ | |
| SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB0_Msk | SYS_GPB_MFP_PB1_Msk); | |
| SYS->GPB_MFP |= SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD; | |
| /* Disable the GPA0 - GPA3 digital input path to avoid the leakage current. */ | |
| GPIO_DISABLE_DIGITAL_PATH(PA, 0xF); | |
| /* Configure the GPA0 - GPA3 ADC analog input pins */ | |
| SYS->GPA_MFP &= ~(SYS_GPA_MFP_PA0_Msk | SYS_GPA_MFP_PA1_Msk | SYS_GPA_MFP_PA2_Msk | SYS_GPA_MFP_PA3_Msk) ; | |
| SYS->GPA_MFP |= SYS_GPA_MFP_PA0_ADC0 | SYS_GPA_MFP_PA1_ADC1 | SYS_GPA_MFP_PA2_ADC2 | SYS_GPA_MFP_PA3_ADC3 ; | |
| } | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Init UART */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| void UART0_Init() | |
| { | |
| /* Reset IP */ | |
| SYS_ResetModule(UART0_RST); | |
| /* Configure UART0 and set UART0 Baudrate */ | |
| UART_Open(UART0, 115200); | |
| } | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* Function: AdcSingleModeTest */ | |
| /* */ | |
| /* Parameters: */ | |
| /* None. */ | |
| /* */ | |
| /* Returns: */ | |
| /* None. */ | |
| /* */ | |
| /* Description: */ | |
| /* ADC single mode test. */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| void AdcSingleModeTest() | |
| { | |
| uint8_t u8Option; | |
| int32_t i32ConversionData; | |
| uint32_t u32TimeOutCnt; | |
| printf("\n"); | |
| printf("+----------------------------------------------------------------------+\n"); | |
| printf("| ADC single mode sample code |\n"); | |
| printf("+----------------------------------------------------------------------+\n"); | |
| while(1) | |
| { | |
| printf("Select input mode:\n"); | |
| printf(" [1] Single end input (channel 2 only)\n"); | |
| printf(" [2] Differential input (channel pair 1 only)\n"); | |
| printf(" Other keys: exit single mode test\n"); | |
| u8Option = getchar(); | |
| if(u8Option == '1') | |
| { | |
| /* Power on ADC module */ | |
| ADC_POWER_ON(ADC); | |
| /* Set the ADC operation mode as single, input mode as single-end and enable the analog input channel 2 */ | |
| ADC_Open(ADC, ADC_ADCR_DIFFEN_SINGLE_END, ADC_ADCR_ADMD_SINGLE, 0x1 << 2); | |
| /* Clear the A/D interrupt flag for safe */ | |
| ADC_CLR_INT_FLAG(ADC, ADC_ADF_INT); | |
| /* Enable the ADC interrupt */ | |
| ADC_EnableInt(ADC, ADC_ADF_INT); | |
| NVIC_EnableIRQ(ADC_IRQn); | |
| /* Reset the ADC interrupt indicator and Start A/D conversion */ | |
| g_u32AdcIntFlag = 0; | |
| ADC_START_CONV(ADC); | |
| /* Wait ADC interrupt (g_u32AdcIntFlag will be set at IRQ_Handler function)*/ | |
| u32TimeOutCnt = SystemCoreClock; /* 1 second time-out */ | |
| while(g_u32AdcIntFlag == 0) | |
| { | |
| if(--u32TimeOutCnt == 0) | |
| { | |
| printf("Wait for ADC interrupt time-out!\n"); | |
| return; | |
| } | |
| } | |
| /* Disable the ADC interrupt */ | |
| ADC_DisableInt(ADC, ADC_ADF_INT); | |
| /* Get the conversion result of the ADC channel 2 */ | |
| i32ConversionData = ADC_GET_CONVERSION_DATA(ADC, 2); | |
| printf("Conversion result of channel 2: 0x%X (%d)\n\n", i32ConversionData, i32ConversionData); | |
| } | |
| else if(u8Option == '2') | |
| { | |
| /* Power on ADC module */ | |
| ADC_POWER_ON(ADC); | |
| /* Set the ADC operation mode as single, input mode as differential and | |
| enable analog input channel 2 for differential input channel pair 1 */ | |
| ADC_Open(ADC, ADC_ADCR_DIFFEN_DIFFERENTIAL, ADC_ADCR_ADMD_SINGLE, 0x1 << 2); | |
| /* Clear the A/D interrupt flag for safe */ | |
| ADC_CLR_INT_FLAG(ADC, ADC_ADF_INT); | |
| /* Enable the ADC interrupt */ | |
| ADC_EnableInt(ADC, ADC_ADF_INT); | |
| NVIC_EnableIRQ(ADC_IRQn); | |
| /* Reset the ADC interrupt indicator and Start A/D conversion */ | |
| g_u32AdcIntFlag = 0; | |
| ADC_START_CONV(ADC); | |
| /* Wait ADC interrupt (g_u32AdcIntFlag will be set at IRQ_Handler function)*/ | |
| u32TimeOutCnt = SystemCoreClock; /* 1 second time-out */ | |
| while(g_u32AdcIntFlag == 0) | |
| { | |
| if(--u32TimeOutCnt == 0) | |
| { | |
| printf("Wait for ADC interrupt time-out!\n"); | |
| return; | |
| } | |
| } | |
| /* Disable the ADC interrupt */ | |
| ADC_DisableInt(ADC, ADC_ADF_INT); | |
| /* Get the conversion result of the specified ADC channel */ | |
| i32ConversionData = ADC_GET_CONVERSION_DATA(ADC, 2); | |
| printf("Conversion result of channel pair 1: 0x%X (%d)\n\n", i32ConversionData, i32ConversionData); | |
| } | |
| else | |
| return ; | |
| } | |
| } | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* ADC interrupt handler */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| void ADC_IRQHandler(void) | |
| { | |
| g_u32AdcIntFlag = 1; | |
| ADC_CLR_INT_FLAG(ADC, ADC_ADF_INT); /* clear the A/D conversion flag */ | |
| } | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* MAIN function */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| int32_t main(void) | |
| { | |
| /* Unlock protected registers */ | |
| SYS_UnlockReg(); | |
| /* Init System, IP clock and multi-function I/O */ | |
| SYS_Init(); | |
| /* Lock protected registers */ | |
| SYS_LockReg(); | |
| /* Init UART0 for printf */ | |
| UART0_Init(); | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| /* SAMPLE CODE */ | |
| /*---------------------------------------------------------------------------------------------------------*/ | |
| printf("\nSystem clock rate: %d Hz", SystemCoreClock); | |
| /* Single Mode test */ | |
| AdcSingleModeTest(); | |
| /* Disable ADC module */ | |
| ADC_Close(ADC); | |
| /* Disable ADC IP clock */ | |
| CLK_DisableModuleClock(ADC_MODULE); | |
| /* Disable External Interrupt */ | |
| NVIC_DisableIRQ(ADC_IRQn); | |
| printf("\nExit ADC sample code\n"); | |
| while(1); | |
| } | |