diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala
index f2c1987170..492528dcd1 100644
--- a/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala
+++ b/src/main/scala/xiangshan/backend/fu/wrapper/FALU.scala
@@ -8,8 +8,7 @@ import xiangshan.backend.fu.FuConfig
 import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpPipedFuncUnit
 import yunsuan.{VfaluType, VfpuType}
-import yunsuan.vector.VectorFloatAdder
-import yunsuan.fpulite.FloatAdder
+import yunsuan.fpu.FloatAdder
 
 class FAlu(cfg: FuConfig)(implicit p: Parameters) extends FpPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "falu OpType not supported")
diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala
index 56ab45bcfd..8d8e35fbe4 100644
--- a/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala
+++ b/src/main/scala/xiangshan/backend/fu/wrapper/FDivSqrt.scala
@@ -9,8 +9,7 @@ import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpNonPipedFuncUnit
 import xiangshan.backend.rob.RobPtr
 import yunsuan.VfpuType
-import yunsuan.vector.VectorFloatDivider
-import yunsuan.fpulite.FloatDivider
+import yunsuan.fpu.FloatDivider
 
 class FDivSqrt(cfg: FuConfig)(implicit p: Parameters) extends FpNonPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "fdiv OpType not supported")
diff --git a/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala b/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala
index 5fa1d6052f..bbc39af40a 100644
--- a/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala
+++ b/src/main/scala/xiangshan/backend/fu/wrapper/FMA.scala
@@ -8,8 +8,7 @@ import xiangshan.backend.fu.FuConfig
 import xiangshan.backend.fu.vector.Bundles.VSew
 import xiangshan.backend.fu.fpu.FpPipedFuncUnit
 import yunsuan.{VfmaType, VfpuType}
-import yunsuan.vector.VectorFloatFMA
-import yunsuan.fpulite.FloatFMA
+import yunsuan.fpu.FloatFMA
 
 class FMA(cfg: FuConfig)(implicit p: Parameters) extends FpPipedFuncUnit(cfg) {
   XSError(io.in.valid && io.in.bits.ctrl.fuOpType === VfpuType.dummy, "fma OpType not supported")
diff --git a/yunsuan b/yunsuan
index 84b4f64c04..aed34d123f 160000
--- a/yunsuan
+++ b/yunsuan
@@ -1 +1 @@
-Subproject commit 84b4f64c04ebc042c200b41c05843def9088d6bc
+Subproject commit aed34d123ff663b24b07aaffdf6188428c00a686