From 7afa54c24c8023badefda8550934127b1484f73c Mon Sep 17 00:00:00 2001 From: BuddyZhang1 Date: Fri, 18 Nov 2016 15:48:45 +0800 Subject: [PATCH 1/5] [PATCH] dts: fix up tx/rx delay of gmac --- kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts | 4 ++-- kernel/drivers/video/sunxi/disp2/disp/dev_composer.c | 11 ++++++----- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts index 5a69e1999..e185fe319 100644 --- a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts +++ b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts @@ -2983,8 +2983,8 @@ clocks = <0x94 0x95>; clock-names = "gmac", "ephy"; phy-mode = "rgmii"; - tx-delay = <0x0>; - rx-delay = <0x0>; + tx-delay = <0x7>; + rx-delay = <0x1f>; phy_power_on = <0x3a 0x3 0x6 0x1 0x0 0x0 0x0>; status = "okay"; device_type = "gmac0"; diff --git a/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c b/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c index 79e69e9a1..b37c268da 100755 --- a/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c +++ b/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c @@ -912,8 +912,8 @@ static void hwc_commit_work(struct work_struct *work) acquire_fence = (struct sync_fence **)(&frame->acquire_fence[0]); for (i = 0; i < frame->hwc_data.layer_num; i++, acquire_fence++) { if (acquire_fence != NULL && *acquire_fence != NULL) { - err = sync_fence_wait(*acquire_fence, 1000); - sync_fence_put(*acquire_fence); + //err = sync_fence_wait(*acquire_fence, 1000); + //sync_fence_put(*acquire_fence); if (err < 0) { printk("synce_fence_wait timeout AcquireFence:%p\n", *acquire_fence); sw_sync_timeline_inc(composer_priv.relseastimeline, 1); @@ -1022,7 +1022,8 @@ static int hwc_commit(setup_dispc_data_t *disp_data) /* get fence object by acquire fencefd */ for (i = 0; i < setup->layer_num; i++) { if (acquire_fencefd[i] != -1) - fence[i] = sync_fence_fdget(acquire_fencefd[i]); + //fence[i] = sync_fence_fdget(acquire_fencefd[i]); + ; } } @@ -1046,8 +1047,8 @@ static int hwc_commit(setup_dispc_data_t *disp_data) composer_priv.timeline_max++; pt = sw_sync_pt_create(composer_priv.relseastimeline, composer_priv.timeline_max); - release_fence = sync_fence_create("sunxi_display", pt); - sync_fence_install(release_fence, release_fencefd); + //release_fence = sync_fence_create("sunxi_display", pt); + //sync_fence_install(release_fence, release_fencefd); disp_data_list->framenumber = composer_priv.timeline_max; mutex_lock(&(composer_priv.update_regs_list_lock)); From 1945cc3f1c3bba5c76f382f2772b68bb8a2e6355 Mon Sep 17 00:00:00 2001 From: BuddyZhang1 Date: Fri, 18 Nov 2016 15:52:40 +0800 Subject: [PATCH 2/5] [PATCH]dts: fix up tx/rx delay of gmac --- kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts index 5a69e1999..e185fe319 100644 --- a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts +++ b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts @@ -2983,8 +2983,8 @@ clocks = <0x94 0x95>; clock-names = "gmac", "ephy"; phy-mode = "rgmii"; - tx-delay = <0x0>; - rx-delay = <0x0>; + tx-delay = <0x7>; + rx-delay = <0x1f>; phy_power_on = <0x3a 0x3 0x6 0x1 0x0 0x0 0x0>; status = "okay"; device_type = "gmac0"; From d43584c45fd535ef7e0c7344ce62c6d62b017c2a Mon Sep 17 00:00:00 2001 From: BuddyZhang1 Date: Fri, 18 Nov 2016 15:56:11 +0800 Subject: [PATCH 3/5] Merge warning,sync --- kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts | 4 ++-- kernel/drivers/video/sunxi/disp2/disp/dev_composer.c | 11 +++++------ 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts index e185fe319..5a69e1999 100644 --- a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts +++ b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts @@ -2983,8 +2983,8 @@ clocks = <0x94 0x95>; clock-names = "gmac", "ephy"; phy-mode = "rgmii"; - tx-delay = <0x7>; - rx-delay = <0x1f>; + tx-delay = <0x0>; + rx-delay = <0x0>; phy_power_on = <0x3a 0x3 0x6 0x1 0x0 0x0 0x0>; status = "okay"; device_type = "gmac0"; diff --git a/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c b/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c index b37c268da..79e69e9a1 100755 --- a/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c +++ b/kernel/drivers/video/sunxi/disp2/disp/dev_composer.c @@ -912,8 +912,8 @@ static void hwc_commit_work(struct work_struct *work) acquire_fence = (struct sync_fence **)(&frame->acquire_fence[0]); for (i = 0; i < frame->hwc_data.layer_num; i++, acquire_fence++) { if (acquire_fence != NULL && *acquire_fence != NULL) { - //err = sync_fence_wait(*acquire_fence, 1000); - //sync_fence_put(*acquire_fence); + err = sync_fence_wait(*acquire_fence, 1000); + sync_fence_put(*acquire_fence); if (err < 0) { printk("synce_fence_wait timeout AcquireFence:%p\n", *acquire_fence); sw_sync_timeline_inc(composer_priv.relseastimeline, 1); @@ -1022,8 +1022,7 @@ static int hwc_commit(setup_dispc_data_t *disp_data) /* get fence object by acquire fencefd */ for (i = 0; i < setup->layer_num; i++) { if (acquire_fencefd[i] != -1) - //fence[i] = sync_fence_fdget(acquire_fencefd[i]); - ; + fence[i] = sync_fence_fdget(acquire_fencefd[i]); } } @@ -1047,8 +1046,8 @@ static int hwc_commit(setup_dispc_data_t *disp_data) composer_priv.timeline_max++; pt = sw_sync_pt_create(composer_priv.relseastimeline, composer_priv.timeline_max); - //release_fence = sync_fence_create("sunxi_display", pt); - //sync_fence_install(release_fence, release_fencefd); + release_fence = sync_fence_create("sunxi_display", pt); + sync_fence_install(release_fence, release_fencefd); disp_data_list->framenumber = composer_priv.timeline_max; mutex_lock(&(composer_priv.update_regs_list_lock)); From c0ebb184f11823f53823be8bf09da05558149ca4 Mon Sep 17 00:00:00 2001 From: BuddyZhang1 Date: Fri, 18 Nov 2016 15:57:18 +0800 Subject: [PATCH 4/5] [PATCH] dts: fix up tx/rx delay of gmac --- kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts index 5a69e1999..e185fe319 100644 --- a/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts +++ b/kernel/arch/arm64/boot/dts/OrangePiH5_PC2.dts @@ -2983,8 +2983,8 @@ clocks = <0x94 0x95>; clock-names = "gmac", "ephy"; phy-mode = "rgmii"; - tx-delay = <0x0>; - rx-delay = <0x0>; + tx-delay = <0x7>; + rx-delay = <0x1f>; phy_power_on = <0x3a 0x3 0x6 0x1 0x0 0x0 0x0>; status = "okay"; device_type = "gmac0"; From 494adcca90cd5992c33157c59f6cb67a7aabde56 Mon Sep 17 00:00:00 2001 From: BuddyZhang1 Date: Mon, 21 Nov 2016 16:09:37 +0800 Subject: [PATCH 5/5] [PATCH] Audio: add configure of ALSA audio --- external/asound.state | 1202 +++----------------- scripts/00_rootfs_build.sh | 17 + scripts/platform-scripts/OrangePi_Audio.sh | 5 + 3 files changed, 152 insertions(+), 1072 deletions(-) create mode 100755 scripts/platform-scripts/OrangePi_Audio.sh diff --git a/external/asound.state b/external/asound.state index d58f7a303..9f0b9ae7f 100644 --- a/external/asound.state +++ b/external/asound.state @@ -1,197 +1,5 @@ state.audiocodec { control.1 { - iface MIXER - name 'AIF1 ADC timeslot 0 volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.2 { - iface MIXER - name 'AIF1 ADC timeslot 1 volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.3 { - iface MIXER - name 'AIF1 DAC timeslot 0 volume' - value.0 153 - value.1 153 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -450 - dbvalue.1 -450 - } - } - control.4 { - iface MIXER - name 'AIF1 DAC timeslot 1 volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.5 { - iface MIXER - name 'AIF1 ADC timeslot 0 mixer gain' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 15' - dbmin -600 - dbmax 8400 - dbvalue.0 -600 - dbvalue.1 -600 - } - } - control.6 { - iface MIXER - name 'AIF1 ADC timeslot 1 mixer gain' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 3' - dbmin -600 - dbmax 1200 - dbvalue.0 -600 - dbvalue.1 -600 - } - } - control.7 { - iface MIXER - name 'AIF2 ADC volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.8 { - iface MIXER - name 'AIF2 DAC volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.9 { - iface MIXER - name 'AIF2 ADC mixer gain' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 15' - dbmin -600 - dbmax 8400 - dbvalue.0 -600 - dbvalue.1 -600 - } - } - control.10 { - iface MIXER - name 'ADC volume' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 -11925 - dbvalue.1 -11925 - } - } - control.11 { - iface MIXER - name 'DAC volume' - value.0 160 - value.1 160 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 255' - dbmin -11925 - dbmax 7200 - dbvalue.0 75 - dbvalue.1 75 - } - } - control.12 { - iface MIXER - name 'DAC mixer gain' - value.0 0 - value.1 0 - comment { - access 'read write' - type INTEGER - count 2 - range '0 - 15' - dbmin -600 - dbmax 8400 - dbvalue.0 -600 - dbvalue.1 -600 - } - } - control.13 { iface MIXER name 'digital volume' value 0 @@ -200,57 +8,29 @@ state.audiocodec { type INTEGER count 1 range '0 - 63' - dbmin -7308 - dbmax 0 - dbvalue.0 -7308 - } - } - control.14 { - iface MIXER - name 'earpiece volume' - value 0 - comment { - access 'read write' - type INTEGER - count 1 - range '0 - 31' - dbmin -4350 - dbmax 300 - dbvalue.0 -4350 + dbmin -7424 + dbmax -7424 + dbvalue.0 -7424 } } - control.15 { + control.2 { iface MIXER - name 'speaker volume' - value 0 + name 'Lineout volume' + value 31 comment { access 'read write' type INTEGER count 1 range '0 - 31' - dbmin -4800 - dbmax -150 - dbvalue.0 -4800 - } - } - control.16 { - iface MIXER - name 'headphone volume' - value 44 - comment { - access 'read write' - type INTEGER - count 1 - range '0 - 63' - dbmin -6300 - dbmax 0 - dbvalue.0 -1900 + dbmin -480 + dbmax -480 + dbvalue.0 -480 } } - control.17 { + control.3 { iface MIXER name 'MIC1_G boost stage output mixer control' - value 0 + value 3 comment { access 'read write' type INTEGER @@ -258,55 +38,55 @@ state.audiocodec { range '0 - 7' dbmin -450 dbmax 600 - dbvalue.0 -450 + dbvalue.0 0 } } - control.18 { + control.4 { iface MIXER - name 'MIC1 boost AMP gain control' - value 0 + name 'MIC2_G boost stage output mixer control' + value 3 comment { access 'read write' type INTEGER count 1 range '0 - 7' - dbmin 0 - dbmax 1400 + dbmin -450 + dbmax 600 dbvalue.0 0 } } - control.19 { + control.5 { iface MIXER - name 'MIC2 BST stage to L_R outp mixer gain' - value 0 + name 'MIC1 boost AMP gain control' + value 3 comment { access 'read write' type INTEGER count 1 range '0 - 7' - dbmin -450 - dbmax 600 - dbvalue.0 -450 + dbmin 0 + dbmax 2100 + dbvalue.0 900 } } - control.20 { + control.6 { iface MIXER name 'MIC2 boost AMP gain control' - value 0 + value 4 comment { access 'read write' type INTEGER count 1 range '0 - 7' dbmin 0 - dbmax 1400 - dbvalue.0 0 + dbmax 2100 + dbvalue.0 1200 } } - control.21 { + control.7 { iface MIXER name 'LINEINL/R to L_R output mixer gain' - value 0 + value 4 comment { access 'read write' type INTEGER @@ -314,40 +94,39 @@ state.audiocodec { range '0 - 7' dbmin -450 dbmax 600 - dbvalue.0 -450 + dbvalue.0 150 } } - control.22 { + control.8 { iface MIXER name 'ADC input gain control' - value 0 + value 5 comment { access 'read write' type INTEGER count 1 range '0 - 7' dbmin -450 - dbmax 600 - dbvalue.0 -450 + dbmax 3750 + dbvalue.0 2550 } } - control.23 { + control.9 { iface MIXER - name 'Phoneout gain control' - value 0 + name 'codec hub mode' + value hub_enable comment { access 'read write' - type INTEGER + type ENUMERATED count 1 - range '0 - 7' - dbmin -450 - dbmax 600 - dbvalue.0 -450 + item.0 null + item.1 hub_disable + item.2 hub_enable } } - control.24 { + control.10 { iface MIXER - name 'SRC FUCTION' + name 'RADC input Mixer r_output mixer Switch' value false comment { access 'read write' @@ -355,9 +134,9 @@ state.audiocodec { count 1 } } - control.25 { + control.11 { iface MIXER - name 'I2S HUB FUNC' + name 'RADC input Mixer l_output mixer Switch' value false comment { access 'read write' @@ -365,9 +144,9 @@ state.audiocodec { count 1 } } - control.26 { + control.12 { iface MIXER - name 'Phoneout Mixer MIC1 boost Switch' + name 'RADC input Mixer LINEINR Switch' value false comment { access 'read write' @@ -375,19 +154,19 @@ state.audiocodec { count 1 } } - control.27 { + control.13 { iface MIXER - name 'Phoneout Mixer MIC2 boost Switch' - value false + name 'RADC input Mixer MIC1 boost Switch' + value true comment { access 'read write' type BOOLEAN count 1 } } - control.28 { + control.14 { iface MIXER - name 'Phoneout Mixer Rout_Mixer_Switch' + name 'RADC input Mixer MIC2 boost Switch' value false comment { access 'read write' @@ -395,9 +174,9 @@ state.audiocodec { count 1 } } - control.29 { + control.15 { iface MIXER - name 'Phoneout Mixer Lout_Mixer_Switch' + name 'LADC input Mixer r_output mixer Switch' value false comment { access 'read write' @@ -405,45 +184,39 @@ state.audiocodec { count 1 } } - control.30 { + control.16 { iface MIXER - name 'ADCR Mux' - value DMIC + name 'LADC input Mixer l_output mixer Switch' + value false comment { access 'read write' - type ENUMERATED + type BOOLEAN count 1 - item.0 ADC - item.1 DMIC } } - control.31 { + control.17 { iface MIXER - name 'ADCL Mux' - value DMIC + name 'LADC input Mixer LINEINL Switch' + value false comment { access 'read write' - type ENUMERATED + type BOOLEAN count 1 - item.0 ADC - item.1 DMIC } } - control.32 { + control.18 { iface MIXER - name 'MIC2 SRC' - value MIC2 + name 'LADC input Mixer MIC1 boost Switch' + value true comment { access 'read write' - type ENUMERATED + type BOOLEAN count 1 - item.0 MIC3 - item.1 MIC2 } } - control.33 { + control.19 { iface MIXER - name 'RADC input Mixer MIC1 boost Switch' + name 'LADC input Mixer MIC2 boost Switch' value false comment { access 'read write' @@ -451,39 +224,43 @@ state.audiocodec { count 1 } } - control.34 { + control.20 { iface MIXER - name 'RADC input Mixer MIC2 boost Switch' - value false + name 'Lineout_L Mux' + value 'MIXER_L Switch' comment { access 'read write' - type BOOLEAN + type ENUMERATED count 1 + item.0 'MIXER_L Switch' + item.1 'MIXER_R+MIXER_L Switch' } } - control.35 { + control.21 { iface MIXER - name 'RADC input Mixer LINEINR Switch' - value false + name 'Lineout_R Mux' + value 'MIXER_R Switch' comment { access 'read write' - type BOOLEAN + type ENUMERATED count 1 + item.0 'MIXER_R Switch' + item.1 'MIXER_L Switch' } } - control.36 { + control.22 { iface MIXER - name 'RADC input Mixer r_output mixer Switch' - value false + name 'Right Output Mixer DACL Switch' + value true comment { access 'read write' type BOOLEAN count 1 } } - control.37 { + control.23 { iface MIXER - name 'RADC input Mixer l_output mixer Switch' + name 'Right Output Mixer DACR Switch' value false comment { access 'read write' @@ -491,9 +268,9 @@ state.audiocodec { count 1 } } - control.38 { + control.24 { iface MIXER - name 'RADC input Mixer PHONINN Switch' + name 'Right Output Mixer LINEINR Switch' value false comment { access 'read write' @@ -501,9 +278,9 @@ state.audiocodec { count 1 } } - control.39 { + control.25 { iface MIXER - name 'RADC input Mixer PHONINN-PHONINP Switch' + name 'Right Output Mixer MIC1Booststage Switch' value false comment { access 'read write' @@ -511,9 +288,9 @@ state.audiocodec { count 1 } } - control.40 { + control.26 { iface MIXER - name 'LADC input Mixer MIC1 boost Switch' + name 'Right Output Mixer MIC2Booststage Switch' value false comment { access 'read write' @@ -521,19 +298,19 @@ state.audiocodec { count 1 } } - control.41 { + control.27 { iface MIXER - name 'LADC input Mixer MIC2 boost Switch' - value false + name 'Left Output Mixer DACR Switch' + value true comment { access 'read write' type BOOLEAN count 1 } } - control.42 { + control.28 { iface MIXER - name 'LADC input Mixer LINEINL Switch' + name 'Left Output Mixer DACL Switch' value false comment { access 'read write' @@ -541,9 +318,9 @@ state.audiocodec { count 1 } } - control.43 { + control.29 { iface MIXER - name 'LADC input Mixer l_output mixer Switch' + name 'Left Output Mixer LINEINL Switch' value false comment { access 'read write' @@ -551,9 +328,9 @@ state.audiocodec { count 1 } } - control.44 { + control.30 { iface MIXER - name 'LADC input Mixer r_output mixer Switch' + name 'Left Output Mixer MIC1Booststage Switch' value false comment { access 'read write' @@ -561,9 +338,9 @@ state.audiocodec { count 1 } } - control.45 { + control.31 { iface MIXER - name 'LADC input Mixer PHONINP Switch' + name 'Left Output Mixer MIC2Booststage Switch' value false comment { access 'read write' @@ -571,772 +348,53 @@ state.audiocodec { count 1 } } - control.46 { + control.32 { iface MIXER - name 'LADC input Mixer PHONINP-PHONINN Switch' - value false + name 'External Speaker Switch' + value true comment { access 'read write' type BOOLEAN count 1 } } - control.47 { +} +state.sndhdmi { + control.1 { iface MIXER - name 'AIF3OUT Mux' - value 'AIF2 ADC left channel' + name 'hdmi audio format Function' + value pcm comment { access 'read write' type ENUMERATED count 1 - item.0 'AIF2 ADC left channel' - item.1 'AIF2 ADC right channel' + item.0 null + item.1 pcm + item.2 AC3 + item.3 MPEG1 + item.4 MP3 + item.5 MPEG2 + item.6 AAC + item.7 DTS + item.8 ATRAC + item.9 ONE_BIT_AUDIO + item.10 DOLBY_DIGITAL_PLUS + item.11 DTS_HD + item.12 MAT + item.13 WMAPRO } } - control.48 { + control.2 { iface MIXER - name 'AIF2 ADR Mixer AIF1 DA0R Switch' - value false + name 'sunxi daudio audio hub mode' + value hub_disable comment { access 'read write' - type BOOLEAN - count 1 - } - } - control.49 { - iface MIXER - name 'AIF2 ADR Mixer AIF1 DA1R Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.50 { - iface MIXER - name 'AIF2 ADR Mixer AIF2 DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.51 { - iface MIXER - name 'AIF2 ADR Mixer ADCR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.52 { - iface MIXER - name 'AIF2 ADL Mixer AIF1 DA0L Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.53 { - iface MIXER - name 'AIF2 ADL Mixer AIF1 DA1L Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.54 { - iface MIXER - name 'AIF2 ADL Mixer AIF2 DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.55 { - iface MIXER - name 'AIF2 ADL Mixer ADCL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.56 { - iface MIXER - name 'AIF2INR Mux' - value AIF2_DACR - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF2_DACR - item.1 AIF2_DACL - item.2 SUM_AIF2DACL_AIF2DACR - item.3 AVE_AIF2DACL_AIF2DACR - } - } - control.57 { - iface MIXER - name 'AIF2INL Mux' - value AIF2_DACL - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF2_DACL - item.1 AIF2_DACR - item.2 SUM_AIF2DACL_AIF2DACR - item.3 AVE_AIF2DACL_AIF2DACR - } - } - control.58 { - iface MIXER - name 'AIF2OUTR Mux' - value AIF2_ADCR - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF2_ADCR - item.1 AIF2_ADCL - item.2 SUM_AIF2_ADCL_AIF2_ADCR - item.3 AVE_AIF2_ADCL_AIF2_ADCR - } - } - control.59 { - iface MIXER - name 'AIF2OUTL Mux' - value AIF2_ADCL - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF2_ADCL - item.1 AIF2_ADCR - item.2 SUM_AIF2_ADCL_AIF2_ADCR - item.3 AVE_AIF2_ADCL_AIF2_ADCR - } - } - control.60 { - iface MIXER - name 'EAR Mux' - value DACR - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 DACR - item.1 DACL - item.2 'Right Analog Mixer' - item.3 'Left Analog Mixer' - } - } - control.61 { - iface MIXER - name 'SPK_L Mux' - value 'MIXEL Switch' - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 'MIXEL Switch' - item.1 'MIXL MIXR Switch' - } - } - control.62 { - iface MIXER - name 'SPK_R Mux' - value 'MIXER Switch' - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 'MIXER Switch' - item.1 'MIXR MIXL Switch' - } - } - control.63 { - iface MIXER - name 'HP_L Mux' - value 'DACL HPL Switch' - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 'DACL HPL Switch' - item.1 'Left Analog Mixer HPL Switch' - } - } - control.64 { - iface MIXER - name 'HP_R Mux' - value 'DACR HPR Switch' - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 'DACR HPR Switch' - item.1 'Right Analog Mixer HPR Switch' - } - } - control.65 { - iface MIXER - name 'Right Output Mixer DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.66 { - iface MIXER - name 'Right Output Mixer DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.67 { - iface MIXER - name 'Right Output Mixer LINEINR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.68 { - iface MIXER - name 'Right Output Mixer MIC2Booststage Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.69 { - iface MIXER - name 'Right Output Mixer MIC1Booststage Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.70 { - iface MIXER - name 'Right Output Mixer PHONEINN Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.71 { - iface MIXER - name 'Right Output Mixer PHONEINN-PHONEINP Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.72 { - iface MIXER - name 'Left Output Mixer DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.73 { - iface MIXER - name 'Left Output Mixer DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.74 { - iface MIXER - name 'Left Output Mixer LINEINL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.75 { - iface MIXER - name 'Left Output Mixer MIC2Booststage Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.76 { - iface MIXER - name 'Left Output Mixer MIC1Booststage Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.77 { - iface MIXER - name 'Left Output Mixer PHONEINP Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.78 { - iface MIXER - name 'Left Output Mixer PHONEINP-PHONEINN Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.79 { - iface MIXER - name 'DACR Mixer ADCR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.80 { - iface MIXER - name 'DACR Mixer AIF2DACR Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.81 { - iface MIXER - name 'DACR Mixer AIF1DA1R Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.82 { - iface MIXER - name 'DACR Mixer AIF1DA0R Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.83 { - iface MIXER - name 'DACL Mixer ADCL Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.84 { - iface MIXER - name 'DACL Mixer AIF2DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.85 { - iface MIXER - name 'DACL Mixer AIF1DA1L Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.86 { - iface MIXER - name 'DACL Mixer AIF1DA0L Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.87 { - iface MIXER - name 'AIF1 AD1R Mixer AIF2 DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.88 { - iface MIXER - name 'AIF1 AD1R Mixer ADCR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.89 { - iface MIXER - name 'AIF1 AD1L Mixer AIF2 DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.90 { - iface MIXER - name 'AIF1 AD1L Mixer ADCL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.91 { - iface MIXER - name 'AIF1 AD0R Mixer AIF1 DA0R Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.92 { - iface MIXER - name 'AIF1 AD0R Mixer AIF2 DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.93 { - iface MIXER - name 'AIF1 AD0R Mixer ADCR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.94 { - iface MIXER - name 'AIF1 AD0R Mixer AIF2 DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.95 { - iface MIXER - name 'AIF1 AD0L Mixer AIF1 DA0L Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.96 { - iface MIXER - name 'AIF1 AD0L Mixer AIF2 DACL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.97 { - iface MIXER - name 'AIF1 AD0L Mixer ADCL Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.98 { - iface MIXER - name 'AIF1 AD0L Mixer AIF2 DACR Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.99 { - iface MIXER - name 'AIF1IN1R Mux' - value AIF1_DA1L - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_DA1R - item.1 AIF1_DA1L - item.2 SUM_AIF1DA1L_AIF1DA1R - item.3 AVE_AIF1DA1L_AIF1DA1R - } - } - control.100 { - iface MIXER - name 'AIF1IN1L Mux' - value AIF1_DA1L - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_DA1L - item.1 AIF1_DA1R - item.2 SUM_AIF1DA1L_AIF1DA1R - item.3 AVE_AIF1DA1L_AIF1DA1R - } - } - control.101 { - iface MIXER - name 'AIF1IN0R Mux' - value AIF1_DA0R - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_DA0R - item.1 AIF1_DA0L - item.2 SUM_AIF1DA0L_AIF1DA0R - item.3 AVE_AIF1DA0L_AIF1DA0R - } - } - control.102 { - iface MIXER - name 'AIF1IN0L Mux' - value AIF1_DA0L - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_DA0L - item.1 AIF1_DA0R - item.2 SUM_AIF1DA0L_AIF1DA0R - item.3 AVE_AIF1DA0L_AIF1DA0R - } - } - control.103 { - iface MIXER - name 'AIF1OUT1R Mux' - value AIF1_AD1R - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_AD1R - item.1 AIF1_AD1L - item.2 SUM_AIF1ADC1L_AIF1ADC1R - item.3 AVE_AIF1ADC1L_AIF1ADC1R - } - } - control.104 { - iface MIXER - name 'AIF1OUT1L Mux' - value AIF1_AD1L - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_AD1L - item.1 AIF1_AD1R - item.2 SUM_AIF1ADC1L_AIF1ADC1R - item.3 AVE_AIF1ADC1L_AIF1ADC1R - } - } - control.105 { - iface MIXER - name 'AIF1OUT0R Mux' - value AIF1_AD0R - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_AD0R - item.1 AIF1_AD0L - item.2 SUM_AIF1AD0L_AIF1AD0R - item.3 AVE_AIF1AD0L_AIF1AD0R - } - } - control.106 { - iface MIXER - name 'AIF1OUT0L Mux' - value AIF1_AD0L - comment { - access 'read write' - type ENUMERATED - count 1 - item.0 AIF1_AD0L - item.1 AIF1_AD0R - item.2 SUM_AIF1AD0L_AIF1AD0R - item.3 AVE_AIF1AD0L_AIF1AD0R - } - } - control.107 { - iface MIXER - name 'AIF2INR Mux VIR switch aif2inr aif3' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.108 { - iface MIXER - name 'AIF2INL Mux VIR switch aif2inl aif3' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.109 { - iface MIXER - name 'AIF2INR Mux switch aif2inr aif2' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.110 { - iface MIXER - name 'AIF2INL Mux switch aif2inl aif2' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.111 { - iface MIXER - name 'External Speaker Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.112 { - iface MIXER - name 'Headphone Switch' - value true - comment { - access 'read write' - type BOOLEAN - count 1 - } - } - control.113 { - iface MIXER - name 'Earpiece Switch' - value false - comment { - access 'read write' - type BOOLEAN - count 1 - } - } -} -state.sndhdmi { - control.1 { - iface MIXER - name 'hdmi audio format Function' - value pcm - comment { - access 'read write' - type ENUMERATED + type ENUMERATED count 1 item.0 null - item.1 pcm - item.2 AC3 - item.3 MPEG1 - item.4 MP3 - item.5 MPEG2 - item.6 AAC - item.7 DTS - item.8 ATRAC - item.9 ONE_BIT_AUDIO - item.10 DOLBY_DIGITAL_PLUS - item.11 DTS_HD - item.12 MAT - item.13 WMAPRO + item.1 hub_disable + item.2 hub_enable } } } diff --git a/scripts/00_rootfs_build.sh b/scripts/00_rootfs_build.sh index 6d658d162..3a025323f 100755 --- a/scripts/00_rootfs_build.sh +++ b/scripts/00_rootfs_build.sh @@ -195,6 +195,21 @@ EOF do_chroot systemctl enable cpu-corekeeper } +add_audio_record_player_service() { + cat > "$DEST/etc/systemd/system/audio_record_player.service" < "$DEST/etc/systemd/system/ssh-keygen.service" <