From 3356c63cdc168ca245fb8af4a9c185d213934102 Mon Sep 17 00:00:00 2001 From: Akash Date: Tue, 10 Oct 2017 19:53:44 +0530 Subject: [PATCH] PS2-HW: Fix DMA channel register addresses The macro for address of channel 9 was wrongly having the address of channel 8, fixed it. (Luckily MADR and QWC were unused so we should be safe) Thanks to Fireboyd78 for notifying us about this. (Closes #2091) Also fixed some inconsistencies where some of the DMA channel register addresses weren't defined for all the bitfields. --- pcsx2/Hw.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/pcsx2/Hw.h b/pcsx2/Hw.h index 9e901956dd06d..a7a92ec6c66cd 100644 --- a/pcsx2/Hw.h +++ b/pcsx2/Hw.h @@ -275,6 +275,7 @@ enum EERegisterAddresses D7_CHCR = 0x1000C800, D7_MADR = 0x1000C810, D7_QWC = 0x1000C820, + D7_TADR = 0x1000C830, SIF2_CHCR = 0x1000C800, SIF2_MADR = 0x1000C810, @@ -285,6 +286,8 @@ enum EERegisterAddresses D8_CHCR = 0x1000D000, D8_MADR = 0x1000D010, D8_QWC = 0x1000D020, + D8_TADR = 0x1000D030, + D8_SADR = 0x1000D080, fromSPR_CHCR = 0x1000D000, fromSPR_MADR = 0x1000D010, @@ -294,8 +297,10 @@ enum EERegisterAddresses //toSPR D9_CHCR = 0x1000D400, - D9_MADR = 0x1000D010, - D9_QWC = 0x1000D020, + D9_MADR = 0x1000D410, + D9_QWC = 0x1000D420, + D9_TADR = 0x1000D430, + D9_SADR = 0x1000D480, toSPR_CHCR = 0x1000D400, toSPR_MADR = 0x1000D410,