Please sign in to comment.
interpreter: fix a subtle bug in a QFSRV
Math is correct but a shift of 64 bits is illegal in x86 because the cl register is masked From the x86 spec: The destination operand can be a register or a memory location. The count operand can be an immediate value or the CL register. The count is masked to 5 bits (or 6 bits if in 64-bit mode and REX.W is used). The count range is limited to 0 to 31 (or 63 if 64-bit mode and REX.W is used). A special opcode encoding is provided for a count of 1.
- Loading branch information...