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Changes to px4fmu-v3 for upstream Nuttx

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1 parent d957596 commit c89c47e57e87ca33cf3fe7deec227cdffa3a98ec @davids5 davids5 committed with LorenzMeier Dec 12, 2016
@@ -1,9 +1,9 @@
{
- "board_id": 9,
- "magic": "PX4FWv1",
- "description": "Firmware for the PX4FMUv3 board",
- "image": "",
- "build_time": 0,
+ "board_id": 9,
+ "magic": "PX4FWv1",
+ "description": "Firmware for the PX4FMUv3 board",
+ "image": "",
+ "build_time": 0,
"summary": "PX4FMUv3",
"version": "0.1",
"image_size": 0,
@@ -1,5 +1,7 @@
include(nuttx/px4_impl_nuttx)
+px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
+
set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
set(config_uavcan_num_ifaces 2)
@@ -210,11 +212,13 @@ set(config_io_extra_libs
add_custom_target(sercon)
set_target_properties(sercon PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT"
- MAIN "sercon" STACK_MAIN "2048"
+ MAIN "sercon"
+ STACK_MAIN "2048"
COMPILE_FLAGS "-Os")
add_custom_target(serdis)
set_target_properties(serdis PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT"
- MAIN "serdis" STACK_MAIN "2048"
+ MAIN "serdis"
+ STACK_MAIN "2048"
COMPILE_FLAGS "-Os")
@@ -0,0 +1,22 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+
+if ARCH_BOARD_PX4FMU_V2
+
+config BOARD_HAS_PROBES
+ bool "Board provides GPIO or other Hardware for signaling to timing analyze."
+ default y
+ ---help---
+ This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers.
+
+config BOARD_USE_PROBES
+ bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers"
+ default n
+ depends on BOARD_HAS_PROBES
+
+ ---help---
+ Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers.
+
+endif
@@ -1,5 +1,5 @@
/************************************************************************************
- * configs/px4fmu/include/board.h
+ * configs/px4fmu-v3/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
@@ -147,11 +147,23 @@
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
- * Note: TIM1,8 are on APB2, others on APB1
+ * Note: TIM1,8-11 are on APB2, others on APB1
*/
-#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
-#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
+#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
+#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
+#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
+#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
+#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
+#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
+#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
+#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
+#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
+#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
+#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
+#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
+#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -196,81 +208,127 @@
/* Alternate function pin selections ************************************************/
-/*
- * UARTs.
- */
-#define GPIO_USART1_RX GPIO_USART1_RX_1 /* console in from IO */
-#define GPIO_USART1_TX 0 /* USART1 is RX-only */
+/* UARTs */
+
+#define GPIO_USART1_RX GPIO_USART1_RX_1 /* Console in from IO */
+#define GPIO_USART1_TX 0 /* USART1 is RX-only */
-#define GPIO_USART2_RX GPIO_USART2_RX_2
-#define GPIO_USART2_TX GPIO_USART2_TX_2
-#define GPIO_USART2_RTS GPIO_USART2_RTS_2
-#define GPIO_USART2_CTS GPIO_USART2_CTS_2
+#define GPIO_USART2_RX GPIO_USART2_RX_2
+#define GPIO_USART2_TX GPIO_USART2_TX_2
+#define GPIO_USART2_RTS GPIO_USART2_RTS_2
+#define GPIO_USART2_CTS GPIO_USART2_CTS_2
-#define GPIO_USART3_RX GPIO_USART3_RX_3
-#define GPIO_USART3_TX GPIO_USART3_TX_3
-#define GPIO_USART3_RTS GPIO_USART3_RTS_2
-#define GPIO_USART3_CTS GPIO_USART3_CTS_2
+#define GPIO_USART3_RX GPIO_USART3_RX_3
+#define GPIO_USART3_TX GPIO_USART3_TX_3
+#define GPIO_USART3_RTS GPIO_USART3_RTS_2
+#define GPIO_USART3_CTS GPIO_USART3_CTS_2
-#define GPIO_UART4_RX GPIO_UART4_RX_1
-#define GPIO_UART4_TX GPIO_UART4_TX_1
+#define GPIO_UART4_RX GPIO_UART4_RX_1
+#define GPIO_UART4_TX GPIO_UART4_TX_1
-#define GPIO_USART6_RX GPIO_USART6_RX_1
-#define GPIO_USART6_TX GPIO_USART6_TX_1
+#define GPIO_USART6_RX GPIO_USART6_RX_1
+#define GPIO_USART6_TX GPIO_USART6_TX_1
-#define GPIO_UART7_RX GPIO_UART7_RX_1
-#define GPIO_UART7_TX GPIO_UART7_TX_1
+#define GPIO_UART7_RX GPIO_UART7_RX_1
+#define GPIO_UART7_TX GPIO_UART7_TX_1
/* UART8 has no alternate pin config */
/* UART RX DMA configurations */
+
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
-/*
- * CAN
+/* CAN
*
* CAN1 is routed to the onboard transceiver.
* CAN2 is routed to the expansion connector.
*/
-#define GPIO_CAN1_RX GPIO_CAN1_RX_3
-#define GPIO_CAN1_TX GPIO_CAN1_TX_3
-#define GPIO_CAN2_RX GPIO_CAN2_RX_1
-#define GPIO_CAN2_TX GPIO_CAN2_TX_2
-/*
- * I2C
+#define GPIO_CAN1_RX GPIO_CAN1_RX_3
+#define GPIO_CAN1_TX GPIO_CAN1_TX_3
+#define GPIO_CAN2_RX GPIO_CAN2_RX_1
+#define GPIO_CAN2_TX GPIO_CAN2_TX_2
+
+/* I2C
*
* The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs.
*/
-#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
-#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
-#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
-#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
-
-#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
-#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
-#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
-
-/*
- * SPI
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
+#define GPIO_I2C1_SCL_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_I2C1_SDA_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
+
+#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
+#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
+#define GPIO_I2C2_SCL_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO \
+ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
+
+/* SPI
*
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
-#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
+#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
+
+#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
+#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
+#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
+
+#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1
+#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1
+#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1
+
+/* LED Definitions. Needed if CONFIG_ARCH_LEDs is defined */
+
+#define LED_STARTED 0
+#define LED_HEAPALLOCATE 0
+#define LED_IRQSENABLED 0
+#define LED_STACKCREATED 1
+#define LED_INIRQ 1
+#define LED_SIGNAL 1
+#define LED_ASSERTION 1
+#define LED_PANIC 1
+
+/* Board provides GPIO or other Hardware for signaling to timing analyzer */
+
+#if defined(CONFIG_BOARD_USE_PROBES)
+# define PROBE_N(n) (1<<((n)-1))
+# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14)
+# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
+# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)
+# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)
+# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
+# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)
+
+# define PROBE_INIT(mask) \
+ do { \
+ if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
+ if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
+ if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
+ if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
+ if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
+ if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
+ } while(0)
+
+# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
+# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
+#else
+# define PROBE_INIT(mask)
+# define PROBE(n,s)
+# define PROBE_MARK(n)
+#endif
+
-#define GPIO_SPI4_MISO (GPIO_SPI4_MISO_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI4_MOSI (GPIO_SPI4_MOSI_1|GPIO_SPEED_50MHz)
-#define GPIO_SPI4_SCK (GPIO_SPI4_SCK_1|GPIO_SPEED_50MHz)
/************************************************************************************
* Public Data
@@ -35,14 +35,14 @@
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
-
include $(TOPDIR)/PX4_Warnings.mk
+include $(TOPDIR)/PX4_Config.mk
#
# We only support building with the ARM bare-metal toolchain from
# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
#
-CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI
+CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
@@ -62,17 +62,19 @@ ARCHCPUFLAGS = -mcpu=cortex-m4 \
-mfpu=fpv4-sp-d16 \
-mfloat-abi=hard
+# Enable precise stack overflow tracking
-# enable precise stack overflow tracking
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
endif
-# pull in *just* libm from the toolchain ... this is grody
+# Pull in *just* libm from the toolchain ... this is grody
+
LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
EXTRA_LIBS += $(LIBM)
-# use our linker script
+# Use our linker script
+
LDSCRIPT = ld.script
ifeq ($(WINTOOL),y)
@@ -94,18 +96,20 @@ else
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
else
# Linux/Cygwin-native toolchain
- MKDEP = $(TOPDIR)/tools/mkdeps.sh
+ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
endif
-# tool versions
+# Tool versions
+
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-# optimisation flags
+# Optimization flags
+
ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
-fno-strict-aliasing \
-fno-strength-reduce \
@@ -127,7 +131,8 @@ ARCHWARNINGSXX = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-# this seems to be the only way to add linker flags
+# This seems to be the only way to add linker flags
+
EXTRA_LIBS += --warn-common \
--gc-sections
@@ -146,8 +151,8 @@ OBJEXT = .o
LIBEXT = .a
EXEEXT =
+# Produce partially-linked $1 from files in $2
-# produce partially-linked $1 from files in $2
define PRELINK
@echo "PRELINK: $1"
$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
@@ -157,4 +162,3 @@ HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
HOSTLDFLAGS =
-
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