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A Java API for the commission free, algo friendly, stock trading broker "Alpaca" https://alpaca.markets
Java 166 70
A Java API for the high quality, market-data-vendor "DTN IQFeed" https://iqfeed.net
Java 14 7
CompactRISC (CR16) CPU (with an assembler) for the Computer Design Laboratory ECE 3710 class at The University of Utah
SystemVerilog 4 2
ASIC that outputs a rasterized form of an edge detection algorithm applied to a video input.
Verilog 3
Fully-Synchronized Synthesizer (FSS) prototype repository demonstrating the future of synthesizer interfacing.
Assembly 3
Uses a large "3D" capacitor to measure the XYZ coordinates of a user's hand in physical space.
C
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