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drm: sun4i: fix potential overflow when calculating DSI dotclock rate
When calculating DSI dotclock rate, the clock rate is first multiplied
by 1000 (to convert kHz to Hz), then bit per pixel value, and finally
divided by (lanes * 4).

Putting the two multiplication at first makes it risky to overflow when
the panel expected clock rate is >= 90MHz, which is possible at least on
1080p panel.

Move the *1000 multiplication to the end to prevent overflow.

Signed-off-by: Icenowy Zheng <>
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Icenowy committed Sep 9, 2021
1 parent 0fa91c2 commit 4e59b93
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions drivers/gpu/drm/sun4i/sun4i_tcon.c
Expand Up @@ -389,8 +389,8 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
tcon->dclk_max_div = SUN6I_DSI_TCON_DIV;

/* Configure the dot clock */
clk_set_rate(tcon->dclk, mode->crtc_clock * 1000
* bpp / (lanes * SUN6I_DSI_TCON_DIV));
clk_set_rate(tcon->dclk, mode->crtc_clock * bpp
/ (lanes * SUN6I_DSI_TCON_DIV) * 1000);

/* Set the resolution */
regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
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