diff --git a/tests/extension/thread_/stream_counter/thread_stream_counter.py b/tests/extension/thread_/stream_counter/thread_stream_counter.py index 48f35795..f0ec4069 100644 --- a/tests/extension/thread_/stream_counter/thread_stream_counter.py +++ b/tests/extension/thread_/stream_counter/thread_stream_counter.py @@ -25,10 +25,15 @@ def mkLed(): ram_c = vthread.RAM(m, 'ram_c', clk, rst, datawidth, addrwidth) strm = vthread.Stream(m, 'mystream', clk, rst) - cnt = strm.Counter() + cnt1 = strm.Counter() + cnt2 = strm.Counter(initval=1) + cnt3 = strm.Counter(initval=2, size=3) + cnt4 = strm.Counter(initval=3, interval=3) + cnt5 = strm.Counter(initval=4, interval=3, size=4) + cnt6 = strm.Counter(initval=4, step=2, interval=2) a = strm.source('a') b = strm.source('b') - c = a + b + cnt + c = a + b - a - b + cnt1 + cnt2 + cnt3 + cnt4 + cnt5 + cnt6 strm.sink(c, 'c') def comp_stream(size, offset): @@ -39,14 +44,19 @@ def comp_stream(size, offset): strm.join() def comp_sequential(size, offset): - sum = 0 cnt = 0 for i in range(size): + cnt1 = cnt + cnt2 = 1 + cnt + cnt3 = cnt%3 + 2 + cnt4 = (cnt//3) + 3 + cnt5 = (cnt//3)%4 + 4 + cnt6 = (cnt//2)*2 + 4 a = ram_a.read(i + offset) b = ram_b.read(i + offset) - cnt += 1 - sum = a + b + cnt + sum = a + b - a - b + cnt1 + cnt2 + cnt3 + cnt4 + cnt5 + cnt6 ram_c.write(i + offset, sum) + cnt += 1 def check(size, offset_stream, offset_seq): all_ok = True diff --git a/tests/extension/thread_/stream_graph_ringbuffer_multi/thread_stream_graph_ringbuffer_multi.py b/tests/extension/thread_/stream_graph_ringbuffer_multi/thread_stream_graph_ringbuffer_multi.py index 070be5cd..2c4756e1 100644 --- a/tests/extension/thread_/stream_graph_ringbuffer_multi/thread_stream_graph_ringbuffer_multi.py +++ b/tests/extension/thread_/stream_graph_ringbuffer_multi/thread_stream_graph_ringbuffer_multi.py @@ -46,7 +46,7 @@ def mkLed(): #b = a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + a8 b = strm.AddN(a0, a1, a2, a3, a4, a5, a6, a7, a8) - strm.sink(b, 'b', when=counter > img_width + img_width + 2) + strm.sink(b, 'b', when=counter >= img_width + img_width + 2) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 3) diff --git a/tests/extension/thread_/stream_graph_scratchpad_multi/thread_stream_graph_scratchpad_multi.py b/tests/extension/thread_/stream_graph_scratchpad_multi/thread_stream_graph_scratchpad_multi.py index a6112a34..8b1ed62d 100644 --- a/tests/extension/thread_/stream_graph_scratchpad_multi/thread_stream_graph_scratchpad_multi.py +++ b/tests/extension/thread_/stream_graph_scratchpad_multi/thread_stream_graph_scratchpad_multi.py @@ -29,7 +29,7 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() sp = strm.Scratchpad(a, a_addr, length=128) a0 = a @@ -49,7 +49,7 @@ def mkLed(): #b = a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + a8 b = strm.AddN(a0, a1, a2, a3, a4, a5, a6, a7, a8) - strm.sink(b, 'b', when=counter > img_width + img_width + 2) + strm.sink(b, 'b', when=counter >= img_width + img_width + 2) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 3) diff --git a/tests/extension/thread_/stream_read_ram_counter/thread_stream_read_ram_counter.py b/tests/extension/thread_/stream_read_ram_counter/thread_stream_read_ram_counter.py index 9594f3a0..5044c150 100644 --- a/tests/extension/thread_/stream_read_ram_counter/thread_stream_read_ram_counter.py +++ b/tests/extension/thread_/stream_read_ram_counter/thread_stream_read_ram_counter.py @@ -28,7 +28,7 @@ def mkLed(): strm = vthread.Stream(m, 'mystream', clk, rst) a = strm.source('a') - r_addr = strm.Counter() - 1 + r_addr = strm.Counter() r_addr = strm.Mux(r_addr < 3, 3, r_addr) r = strm.read_RAM('ext', r_addr) diff --git a/tests/extension/thread_/stream_ringbuffer/thread_stream_ringbuffer.py b/tests/extension/thread_/stream_ringbuffer/thread_stream_ringbuffer.py index 57869065..e3c3e44c 100644 --- a/tests/extension/thread_/stream_ringbuffer/thread_stream_ringbuffer.py +++ b/tests/extension/thread_/stream_ringbuffer/thread_stream_ringbuffer.py @@ -35,7 +35,7 @@ def mkLed(): b = a + a_old - strm.sink(b, 'b', when=counter > img_width) + strm.sink(b, 'b', when=counter >= img_width) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/tests/extension/thread_/stream_ringbuffer_multi/thread_stream_ringbuffer_multi.py b/tests/extension/thread_/stream_ringbuffer_multi/thread_stream_ringbuffer_multi.py index b124aac0..dd0439ce 100644 --- a/tests/extension/thread_/stream_ringbuffer_multi/thread_stream_ringbuffer_multi.py +++ b/tests/extension/thread_/stream_ringbuffer_multi/thread_stream_ringbuffer_multi.py @@ -46,7 +46,7 @@ def mkLed(): #b = a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + a8 b = strm.AddN(a0, a1, a2, a3, a4, a5, a6, a7, a8) - strm.sink(b, 'b', when=counter > img_width + img_width + 2) + strm.sink(b, 'b', when=counter >= img_width + img_width + 2) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 3) diff --git a/tests/extension/thread_/stream_ringbuffer_reuse/thread_stream_ringbuffer_reuse.py b/tests/extension/thread_/stream_ringbuffer_reuse/thread_stream_ringbuffer_reuse.py index 1adeff87..e4acb8f1 100644 --- a/tests/extension/thread_/stream_ringbuffer_reuse/thread_stream_ringbuffer_reuse.py +++ b/tests/extension/thread_/stream_ringbuffer_reuse/thread_stream_ringbuffer_reuse.py @@ -36,7 +36,7 @@ def mkLed(): b = a + a_old - strm.sink(b, 'b', when=counter > wait_num) + strm.sink(b, 'b', when=counter >= wait_num) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/tests/extension/thread_/stream_scratchpad/thread_stream_scratchpad.py b/tests/extension/thread_/stream_scratchpad/thread_stream_scratchpad.py index 1b11b7a4..e7b6b7ae 100644 --- a/tests/extension/thread_/stream_scratchpad/thread_stream_scratchpad.py +++ b/tests/extension/thread_/stream_scratchpad/thread_stream_scratchpad.py @@ -29,16 +29,16 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() sp = strm.Scratchpad(a, a_addr, length=128) - a_old_addr = strm.Counter() - img_width - 1 + a_old_addr = strm.Counter() - img_width a_old = sp.read(a_old_addr) b = a + a_old - strm.sink(b, 'b', when=counter > img_width) + strm.sink(b, 'b', when=counter >= img_width) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/tests/extension/thread_/stream_scratchpad_multi/thread_stream_scratchpad_multi.py b/tests/extension/thread_/stream_scratchpad_multi/thread_stream_scratchpad_multi.py index ad8e7e2c..83188f6c 100644 --- a/tests/extension/thread_/stream_scratchpad_multi/thread_stream_scratchpad_multi.py +++ b/tests/extension/thread_/stream_scratchpad_multi/thread_stream_scratchpad_multi.py @@ -29,7 +29,7 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() sp = strm.Scratchpad(a, a_addr, length=128) a0 = a @@ -49,7 +49,7 @@ def mkLed(): #b = a0 + a1 + a2 + a3 + a4 + a5 + a6 + a7 + a8 b = strm.AddN(a0, a1, a2, a3, a4, a5, a6, a7, a8) - strm.sink(b, 'b', when=counter > img_width + img_width + 2) + strm.sink(b, 'b', when=counter >= img_width + img_width + 2) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 3) diff --git a/tests/extension/thread_/stream_scratchpad_when/thread_stream_scratchpad_when.py b/tests/extension/thread_/stream_scratchpad_when/thread_stream_scratchpad_when.py index 83319f50..348e1a70 100644 --- a/tests/extension/thread_/stream_scratchpad_when/thread_stream_scratchpad_when.py +++ b/tests/extension/thread_/stream_scratchpad_when/thread_stream_scratchpad_when.py @@ -29,16 +29,16 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() sp = strm.Scratchpad(a, a_addr, when=counter <= img_width, length=128) - a_old_addr = strm.Counter() - img_width - 1 + a_old_addr = strm.Counter() - img_width a_old = sp.read(a_old_addr) b = a + a_old - strm.sink(b, 'b', when=counter > img_width) + strm.sink(b, 'b', when=counter >= img_width) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/tests/extension/thread_/stream_write_ram/thread_stream_write_ram.py b/tests/extension/thread_/stream_write_ram/thread_stream_write_ram.py index 7395d76c..4aa3bfd5 100644 --- a/tests/extension/thread_/stream_write_ram/thread_stream_write_ram.py +++ b/tests/extension/thread_/stream_write_ram/thread_stream_write_ram.py @@ -31,16 +31,16 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() - strm.write_RAM('write_ext', a_addr, a, when=counter <= img_width) + strm.write_RAM('write_ext', a_addr, a, when=counter < img_width) - a_old_addr = strm.Counter() - img_width - 1 + a_old_addr = strm.Counter() - img_width a_old = strm.read_RAM('read_ext', a_old_addr) b = a + a_old - strm.sink(b, 'b', when=counter > img_width) + strm.sink(b, 'b', when=counter >= img_width) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/tests/extension/thread_/stream_write_ram_dump/thread_stream_write_ram_dump.py b/tests/extension/thread_/stream_write_ram_dump/thread_stream_write_ram_dump.py index f380b5e8..f560ac28 100644 --- a/tests/extension/thread_/stream_write_ram_dump/thread_stream_write_ram_dump.py +++ b/tests/extension/thread_/stream_write_ram_dump/thread_stream_write_ram_dump.py @@ -32,16 +32,16 @@ def mkLed(): counter = strm.Counter() a = strm.source('a') - a_addr = strm.Counter() - 1 + a_addr = strm.Counter() - strm.write_RAM('write_ext', a_addr, a, when=counter <= img_width) + strm.write_RAM('write_ext', a_addr, a, when=counter < img_width) - a_old_addr = strm.Counter() - img_width - 1 + a_old_addr = strm.Counter() - img_width a_old = strm.read_RAM('read_ext', a_old_addr) b = a + a_old - strm.sink(b, 'b', when=counter > img_width) + strm.sink(b, 'b', when=counter >= img_width) def comp_stream(size, offset): strm.set_source('a', ram_a, offset, size * 2) diff --git a/veriloggen/stream/stypes.py b/veriloggen/stream/stypes.py index 6a36aa6c..1f83a374 100644 --- a/veriloggen/stream/stypes.py +++ b/veriloggen/stream/stypes.py @@ -2465,10 +2465,12 @@ class _Accumulator(_UnaryOperator): latency = 1 ops = (vtypes.Plus, ) - def __init__(self, right, size=None, initval=None, + def __init__(self, right, size=None, initval=None, interval=None, enable=None, reset=None, width=32, signed=True): - self.size = _to_constant(size) if size is not None else None + self.interval = _to_constant(interval) if interval is not None else None + self.size = (_to_constant(size * interval) if size is not None and interval is not None + else (_to_constant(size) if size is not None else None)) self.initval = (_to_constant(initval) if initval is not None else _to_constant(0)) @@ -2509,6 +2511,7 @@ def _implement(self, m, seq, svalid=None, senable=None): (self.latency, 1)) size_data = self.size.sig_data if self.size is not None else None + interval_data = self.interval.sig_data if self.interval is not None else None initval_data = self.initval.sig_data width = self.bit_length() @@ -2527,6 +2530,11 @@ def _implement(self, m, seq, svalid=None, senable=None): next_count_value = vtypes.Mux(count >= size_data - 1, 0, count + 1) count_zero = (count == 0) + + if self.interval is not None: + interval_count = m.Reg(self.name('interval_count'), width, initval=0) + next_interval_count = vtypes.Mux(interval_count >= interval_data - 1, 0, interval_count + 1) + interval_enable = (interval_count == 0) self.sig_data = data @@ -2551,7 +2559,9 @@ def _implement(self, m, seq, svalid=None, senable=None): if not self.ops and self.size is not None: value = (count >= (size_data - 1)) - if self.reset is not None or self.size is not None: + reset_value = initval_data + if self.size is not None: + # if self.reset is not None or self.size is not None: reset_value = initval_data for op in self.ops: if not isinstance(op, type): @@ -2569,24 +2579,43 @@ def _implement(self, m, seq, svalid=None, senable=None): reset_value = (count >= (size_data - 1)) if self.enable is not None: - enable_cond = _and_vars(svalid, senable, enabledata) - seq(data(value), cond=enable_cond) + if self.interval is not None: + enable_cond = _and_vars(svalid, senable, enabledata, interval_enable) + seq(data(value), cond = enable_cond) + else: + enable_cond = _and_vars(svalid, senable, enabledata) + seq(data(value), cond = enable_cond) + enable_cond = _and_vars(svalid, senable, enabledata) if self.size is not None: seq(count(next_count_value), cond=enable_cond) + if self.interval is not None: + seq(interval_count(next_interval_count), cond=enable_cond) + else: + if self.interval is not None: + enable_cond = _and_vars(svalid, senable, interval_enable) + seq(data(value), cond = enable_cond) + else: + enable_cond = _and_vars(svalid, senable) + seq(data(value), cond = enable_cond) + enable_cond = _and_vars(svalid, senable) - seq(data(value), cond=enable_cond) if self.size is not None: seq(count(next_count_value), cond=enable_cond) + + if self.interval is not None: + seq(interval_count(next_interval_count), cond=enable_cond) if self.reset is not None: if self.enable is None: reset_cond = _and_vars(svalid, senable, resetdata) seq(data(reset_value), cond=reset_cond) - + + if self.interval is not None: + seq(interval_count(0), cond=reset_cond) if self.size is not None: seq(count(0), cond=reset_cond) reset_cond = _and_vars(svalid, senable, count_zero) @@ -2600,6 +2629,8 @@ def _implement(self, m, seq, svalid=None, senable=None): svalid, senable, enabledata, resetdata) seq(data(reset_value), cond=reset_enable_cond) + if self.interval is not None: + seq(interval_count(0), cond=reset_enable_cond) if self.size is not None: seq(count(0), cond=reset_enable_cond) reset_enable_cond = _and_vars( @@ -2619,9 +2650,9 @@ def _implement(self, m, seq, svalid=None, senable=None): class ReduceAdd(_Accumulator): ops = (vtypes.Plus, ) - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceAdd' @@ -2629,9 +2660,9 @@ def __init__(self, right, size=None, initval=0, class ReduceSub(_Accumulator): ops = (vtypes.Minus, ) - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceSub' @@ -2640,9 +2671,9 @@ class ReduceMul(_Accumulator): latency = 1 ops = (vtypes.Times, ) - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceMul' @@ -2651,10 +2682,10 @@ class ReduceDiv(_Accumulator): latency = 32 ops = () - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): raise NotImplementedError() - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceDiv' @@ -2662,9 +2693,9 @@ def __init__(self, right, size=None, initval=0, class ReduceMax(_Accumulator): ops = (lambda x, y: vtypes.Mux(x < y, y, x), ) - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceMax' @@ -2672,18 +2703,18 @@ def __init__(self, right, size=None, initval=0, class ReduceMin(_Accumulator): ops = (lambda x, y: vtypes.Mux(x > y, y, x), ) - def __init__(self, right, size=None, initval=0, + def __init__(self, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) self.graph_label = 'ReduceMin' class ReduceCustom(_Accumulator): - def __init__(self, ops, right, size=None, initval=0, + def __init__(self, ops, right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True, label=None): - _Accumulator.__init__(self, right, size, initval, + _Accumulator.__init__(self, right, size, initval, interval, enable, reset, width, signed) if not isinstance(ops, (tuple, list)): ops = tuple([ops]) @@ -2693,7 +2724,7 @@ def __init__(self, ops, right, size=None, initval=0, class Counter(_Accumulator): - def __init__(self, size=None, step=1, initval=0, + def __init__(self, size=None, step=1, initval=0, interval=None, control=None, enable=None, reset=None, width=32, signed=False): self.ops = (lambda x, y: x + step, ) @@ -2703,7 +2734,7 @@ def __init__(self, size=None, step=1, initval=0, initval -= step - _Accumulator.__init__(self, control, size, initval, + _Accumulator.__init__(self, control, size, initval, interval, enable, reset, width, signed) self.graph_label = 'Counter' @@ -2711,7 +2742,7 @@ def __init__(self, size=None, step=1, initval=0, class Pulse(_Accumulator): ops = () - def __init__(self, size, control=None, enable=None, reset=None): + def __init__(self, size, control=None, enable=None, reset=None, interval=None): if control is None: control = 0 @@ -2721,83 +2752,83 @@ def __init__(self, size, control=None, enable=None, reset=None): width = 1 signed = False - _Accumulator.__init__(self, control, size, initval, + _Accumulator.__init__(self, control, size, initval, interval, enable, reset, width, signed) self.graph_label = 'Pulse' -def _ReduceValid(cls, right, size, initval=0, +def _ReduceValid(cls, right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - data = cls(right, size, initval, + data = cls(right, size, initval, interval, enable, reset, width, signed) valid = Pulse(size, right, enable, reset) return data, valid -def ReduceAddValid(right, size, initval=0, +def ReduceAddValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceAdd - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceSubValid(right, size, initval=0, +def ReduceSubValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceSub - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceMulValid(right, size, initval=0, +def ReduceMulValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceMul - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceDivValid(right, size, initval=0, +def ReduceDivValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceDiv - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceMaxValid(right, size, initval=0, +def ReduceMaxValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceMax - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceMinValid(right, size, initval=0, +def ReduceMinValid(right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): cls = ReduceMin - return _ReduceValid(cls, right, size, initval, + return _ReduceValid(cls, right, size, initval, interval, enable, reset, width, signed) -def ReduceCustomValid(ops, right, size, initval=0, +def ReduceCustomValid(ops, right, size, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - data = ReduceCustom(ops, right, size, initval, + data = ReduceCustom(ops, right, size, initval, interval, enable, reset, width, signed) valid = Pulse(size, right, enable, reset) return data, valid -def CounterValid(size, step=1, initval=0, +def CounterValid(size, step=1, initval=0, interval=None, control=None, enable=None, reset=None, width=32, signed=False): - data = Counter(size, step, initval, + data = Counter(size, step, initval, interval, control, enable, reset, width, signed) valid = Pulse(size, control, enable, reset) @@ -3460,10 +3491,10 @@ def enable(self): return _and_vars(vtypes.Not(self.args[2].sig_data), when_cond) -def ReduceArgMax(right, size=None, initval=0, +def ReduceArgMax(right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _max = ReduceMax(right, size, initval, + _max = ReduceMax(right, size, initval, interval, enable, reset, width, signed) counter = Counter(size, control=right, enable=enable, reset=reset) update = NotEq(_max, _max.prev(1)) @@ -3472,10 +3503,10 @@ def ReduceArgMax(right, size=None, initval=0, return index, _max -def ReduceArgMin(right, size=None, initval=0, +def ReduceArgMin(right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _min = ReduceMin(right, size, initval, + _min = ReduceMin(right, size, initval, interval, enable, reset, width, signed) counter = Counter(size, control=right, enable=enable, reset=reset) update = NotEq(_min, reduce_min.prev(1)) @@ -3484,10 +3515,10 @@ def ReduceArgMin(right, size=None, initval=0, return index, _min -def ReduceArgMaxValid(right, size=None, initval=0, +def ReduceArgMaxValid(right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _max, valid = ReduceMaxValid(right, size, initval, + _max, valid = ReduceMaxValid(right, size, initval, interval, enable, reset, width, signed) counter = Counter(size, control=right, enable=enable, reset=reset) update = NotEq(_max, _max.prev(1)) @@ -3496,10 +3527,10 @@ def ReduceArgMaxValid(right, size=None, initval=0, return index, _max, valid -def ReduceArgMinValid(right, size=None, initval=0, +def ReduceArgMinValid(right, size=None, initval=0, interval=None, enable=None, reset=None, width=32, signed=True): - _min, valid = ReduceMinValid(right, size, initval, + _min, valid = ReduceMinValid(right, size, initval, interval, enable, reset, width, signed) counter = Counter(size, control=right, enable=enable, reset=reset) update = NotEq(_min, _min.prev(1))