From 1105a510f9a424b207168ac668fa2d2835c7890b Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 5 Sep 2018 19:29:37 -0600 Subject: [PATCH 01/15] drivers/at86rf2xx: Add support for antenna diversity. --- drivers/at86rf2xx/at86rf2xx.c | 3 ++ drivers/at86rf2xx/at86rf2xx_getset.c | 15 +++++++++ .../at86rf2xx/include/at86rf2xx_registers.h | 32 +++++++++++++++++++ drivers/include/at86rf2xx.h | 9 ++++++ 4 files changed, 59 insertions(+) diff --git a/drivers/at86rf2xx/at86rf2xx.c b/drivers/at86rf2xx/at86rf2xx.c index a697a70d92c6..beae5f33d559 100644 --- a/drivers/at86rf2xx/at86rf2xx.c +++ b/drivers/at86rf2xx/at86rf2xx.c @@ -82,6 +82,9 @@ void at86rf2xx_reset(at86rf2xx_t *dev) at86rf2xx_set_option(dev, AT86RF2XX_OPT_AUTOACK, true); at86rf2xx_set_option(dev, AT86RF2XX_OPT_CSMA, true); + /* set antena diversity */ + at86rf2xx_set_option(dev, AT86RF2XX_OPT_ANT_DIV, AT86RF2XX_DEFAULT_ANT_DIV); + /* enable safe mode (protect RX FIFO until reading data starts) */ at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE); diff --git a/drivers/at86rf2xx/at86rf2xx_getset.c b/drivers/at86rf2xx/at86rf2xx_getset.c index 5d0df031dbee..65418a899233 100644 --- a/drivers/at86rf2xx/at86rf2xx_getset.c +++ b/drivers/at86rf2xx/at86rf2xx_getset.c @@ -393,6 +393,21 @@ void at86rf2xx_set_option(at86rf2xx_t *dev, uint16_t option, bool state) : (tmp & ~AT86RF2XX_CSMA_SEED_1__AACK_SET_PD); at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1, tmp); break; + case AT86RF2XX_OPT_ANT_DIV: + DEBUG("[at86rf2xx] opt: %s antenna diversity\n", + (state ? "enable" : "disable")); + tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RX_CTRL); + tmp &= ~AT86RF2XX_RX_CTRL_MASK__PDT_THRES; + tmp = (state) ? (tmp | AT86RF2XX_RX_CTRL_PDT_THRES__ANT_DIV_THRES) + : (tmp | AT86RF2XX_RX_CTRL_PDT_THRES__NO_ANT_DIV_THRES); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__RX_CTRL, tmp); + tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__ANT_DIV); + tmp &= ~AT86RF2XX_ANT_DIV_MASK__ANT_CTRL; + tmp = (state) ? (tmp | AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN + | AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN) + : (tmp & ~AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN + & ~AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__ANT_DIV, tmp); default: /* do nothing */ break; diff --git a/drivers/at86rf2xx/include/at86rf2xx_registers.h b/drivers/at86rf2xx/include/at86rf2xx_registers.h index 9c9fa3379ddf..206aaa8073a7 100644 --- a/drivers/at86rf2xx/include/at86rf2xx_registers.h +++ b/drivers/at86rf2xx/include/at86rf2xx_registers.h @@ -375,6 +375,38 @@ extern "C" { #endif /** @} */ +/** + * @name Bitfield definitions for the RX_CTRL register + * @{ + */ + +/* TODO: Check other radio device datasheets and check wether this register exists in those. */ + +#define AT86RF2XX_RX_CTRL_MASK__PEL_SHIFT_VALUES (0xC0) +#define AT86RF2XX_RX_CTRL_MASK__PDT_THRES (0x0F) + +#define AT86RF2XX_RX_CTRL_PDT_THRES__NO_ANT_DIV_THRES (0x07) +#define AT86RF2XX_RX_CTRL_PDT_THRES__ANT_DIV_THRES (0x03) + +/** @} */ + +/** + * @name Bitfield definitions for the ANT_DIV register + * @{ + */ + +/* TODO: Check other radio device datasheets and check wether this register exists in those. */ + +#define AT86RF2XX_ANT_DIV_MASK__ANT_SEL (0x80) +#define AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN (0x08) +#define AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN (0x04) +#define AT86RF2XX_ANT_DIV_MASK__ANT_CTRL (0x03) + +#define AT86RF2XX_ANT_DIV_ANT_CTRL__ANT_0 (0x01) +#define AT86RF2XX_ANT_DIV_ANT_CTRL__ANT_1 (0x02) + +/** @} */ + #ifdef __cplusplus } #endif diff --git a/drivers/include/at86rf2xx.h b/drivers/include/at86rf2xx.h index 76038f4fc5b6..d28ea9169c94 100644 --- a/drivers/include/at86rf2xx.h +++ b/drivers/include/at86rf2xx.h @@ -79,6 +79,13 @@ extern "C" { */ #define AT86RF2XX_DEFAULT_TXPOWER (IEEE802154_DEFAULT_TXPOWER) +/** + * @brief Default antenna diversity enable + */ +#ifndef AT86RF2XX_DEFAULT_ANT_DIV +#define AT86RF2XX_DEFAULT_ANT_DIV (0) +#endif + /** * @brief Base (minimal) RSSI value in dBm */ @@ -146,6 +153,8 @@ extern "C" { #define AT86RF2XX_OPT_AUTOACK (0x0080) /**< Auto ACK active */ #define AT86RF2XX_OPT_ACK_PENDING (0x0100) /**< ACK frames with data * pending */ +#define AT86RF2XX_OPT_ANT_DIV (0x0200) /**< Antenna diversity + * active */ /** @} */ From 3c50e4908b34c7892e3b62b3cbc83c3c53944764 Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 5 Sep 2018 20:35:13 -0600 Subject: [PATCH 02/15] boards/hssv-atsamr21-breakout: Added support for atsamr21-breakout from Hackerspace San Salvador --- boards/hssv-atsamr21-breakout/Makefile | 3 + boards/hssv-atsamr21-breakout/Makefile.dep | 3 + .../hssv-atsamr21-breakout/Makefile.features | 16 +++ .../hssv-atsamr21-breakout/Makefile.include | 19 +++ boards/hssv-atsamr21-breakout/board.c | 21 +++ boards/hssv-atsamr21-breakout/include/board.h | 39 +++++ .../include/periph_conf.h | 136 ++++++++++++++++++ 7 files changed, 237 insertions(+) create mode 100644 boards/hssv-atsamr21-breakout/Makefile create mode 100644 boards/hssv-atsamr21-breakout/Makefile.dep create mode 100644 boards/hssv-atsamr21-breakout/Makefile.features create mode 100644 boards/hssv-atsamr21-breakout/Makefile.include create mode 100644 boards/hssv-atsamr21-breakout/board.c create mode 100644 boards/hssv-atsamr21-breakout/include/board.h create mode 100644 boards/hssv-atsamr21-breakout/include/periph_conf.h diff --git a/boards/hssv-atsamr21-breakout/Makefile b/boards/hssv-atsamr21-breakout/Makefile new file mode 100644 index 000000000000..f8fcbb53a065 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/hssv-atsamr21-breakout/Makefile.dep b/boards/hssv-atsamr21-breakout/Makefile.dep new file mode 100644 index 000000000000..e556f7fff721 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.dep @@ -0,0 +1,3 @@ +ifneq (,$(filter gnrc_netdev_default netdev_default,$(USEMODULE))) + USEMODULE += at86rf233 +endif diff --git a/boards/hssv-atsamr21-breakout/Makefile.features b/boards/hssv-atsamr21-breakout/Makefile.features new file mode 100644 index 000000000000..b1754cd736b8 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.features @@ -0,0 +1,16 @@ +# Put defined MCU peripherals here (in alphabetical order) +# FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_gpio +FEATURES_PROVIDED += periph_gpio_irq +# FEATURES_PROVIDED += periph_i2c +# FEATURES_PROVIDED += periph_pwm +# FEATURES_PROVIDED += periph_rtc +# FEATURES_PROVIDED += periph_rtt +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +# The board MPU family (used for grouping by the CI system) +FEATURES_MCU_GROUP = cortex_m0_2 + +-include $(RIOTCPU)/samd21/Makefile.features diff --git a/boards/hssv-atsamr21-breakout/Makefile.include b/boards/hssv-atsamr21-breakout/Makefile.include new file mode 100644 index 000000000000..a5a12437609d --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.include @@ -0,0 +1,19 @@ +# define the cpu used by the atsamr21-breakout board +export CPU = samd21 +export CPU_MODEL = samr21g18a + +# export needed for flash rule +export PORT_LINUX ?= /dev/ttyACM0 + +# setup serial terminal +include $(RIOTMAKE)/tools/serial.inc.mk + +# we use BOSSA to flash this board and take into account the preinstalled +# Arduino bootloader. ROM_OFFSET skips the space taken by such bootloader. +ROM_OFFSET ?= 0x2000 +include $(RIOTMAKE)/tools/bossa.inc.mk + +# enable antenna diversity for this board. +CFLAGS += -DAT86RF2XX_DEFAULT_ANT_DIV=\(1\) + +include $(RIOTMAKE)/boards/sam0.inc.mk diff --git a/boards/hssv-atsamr21-breakout/board.c b/boards/hssv-atsamr21-breakout/board.c new file mode 100644 index 000000000000..d02fef96abd7 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/board.c @@ -0,0 +1,21 @@ +#include "board.h" +#include "periph/gpio.h" + +void board_init(void) +{ + /* configure the antenna diversity pins of the RF frontend to be controlled + * by the AT86RF233 */ + gpio_init_mux(GPIO_PIN(PA, 12), GPIO_MUX_F); //Set ANT_DIV_P to be used as FECTRL[2] + gpio_init_mux(GPIO_PIN(PA, 9), GPIO_MUX_F); //Set ANT_DIV_N to be used as FECTRL[1] + + /* enable the peripheral clock mask for the RFCTRL */ + PM->APBCMASK.bit.RFCTRL_ = 1; + + /* configure the RFCTRL peripheral to route the correct AT86RF233 signals to + * the radio frontend */ + RFCTRL->FECFG.bit.F2CFG = 0; //Set DIG1 to FECTRL[2] + RFCTRL->FECFG.bit.F1CFG = 1; //Set DIG2 to FECTRL[1] + + /* initialize the CPU */ + cpu_init(); +} diff --git a/boards/hssv-atsamr21-breakout/include/board.h b/boards/hssv-atsamr21-breakout/include/board.h new file mode 100644 index 000000000000..89adb8ec503b --- /dev/null +++ b/boards/hssv-atsamr21-breakout/include/board.h @@ -0,0 +1,39 @@ +#ifndef BOARD_H +#define BOARD_H + +#include "cpu.h" +#include "periph_conf.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name xtimer configuration + * @{ + */ +#define XTIMER_DEV TIMER_DEV(1) +#define XTIMER_CHAN (0) +/** @} */ + +/** + * @name AT86RF233 configuration + * + * {spi bus, spi speed, cs pin, int pin, reset pin, sleep pin} + */ +#define AT86RF2XX_PARAM_CS GPIO_PIN(PB, 31) +#define AT86RF2XX_PARAM_INT GPIO_PIN(PB, 0) +#define AT86RF2XX_PARAM_SLEEP GPIO_PIN(PA, 20) +#define AT86RF2XX_PARAM_RESET GPIO_PIN(PB, 15) + +/** + * @brief Initialize board specific hardware + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ diff --git a/boards/hssv-atsamr21-breakout/include/periph_conf.h b/boards/hssv-atsamr21-breakout/include/periph_conf.h new file mode 100644 index 000000000000..c5a516d98706 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/include/periph_conf.h @@ -0,0 +1,136 @@ +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include + +#include "cpu.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name External oscillator and clock configuration + * + * There are three choices for selection of CORECLOCK: + * + * - usage of the 48 MHz DFLL fed by external oscillator running at 32 kHz + * - usage of the PLL fed by the internal 8MHz oscillator divided by 8 + * - usage of the internal 8MHz oscillator directly, divided by N if needed + * + * + * The PLL option allows for the usage of a wider frequency range and a more + * stable clock with less jitter. This is why this option is default. + * + * The target frequency is computed from the PLL multiplier and the PLL divisor. + * Use the following formula to compute your values: + * + * CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV + * + * NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL + * frequency is 96MHz. So PLL_MULL must be between 31 and 95! + * + * + * The internal Oscillator used directly can lead to a slightly better power + * efficiency to the cost of a less stable clock. Use this option when you know + * what you are doing! The actual core frequency is adjusted as follows: + * + * CORECLOCK = 8MHz / DIV + * + * NOTE: A core clock frequency below 1MHz is not recommended + * + * @{ + */ +#define CLOCK_USE_PLL (1) + +#if CLOCK_USE_PLL +/* edit these values to adjust the PLL output frequency */ +#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ +#define CLOCK_PLL_DIV (1U) /* adjust to your needs */ +/* generate the actual used core clock frequency */ +#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) +#elif CLOCK_USE_XOSC32_DFLL + /* Settings for 32 kHz external oscillator and 48 MHz DFLL */ +#define CLOCK_CORECLOCK (48000000U) +#define CLOCK_XOSC32K (32768UL) +#define CLOCK_8MHZ (1) +#define GEN2_ULP32K (1) +#else +/* edit this value to your needs */ +#define CLOCK_DIV (1U) +/* generate the actual core clock frequency */ +#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV) +#endif +/** @} */ + +/** + * @name Timer peripheral configuration + * @{ + */ +#define TIMER_NUMOF (2U) +#define TIMER_0_EN 1 +#define TIMER_1_EN 1 + +/* Timer 0 configuration */ +#define TIMER_0_DEV TC3->COUNT16 +#define TIMER_0_CHANNELS 2 +#define TIMER_0_MAX_VALUE (0xffff) +#define TIMER_0_ISR isr_tc3 + +/* Timer 1 configuration */ +#define TIMER_1_DEV TC4->COUNT32 +#define TIMER_1_CHANNELS 2 +#define TIMER_1_MAX_VALUE (0xffffffff) +#define TIMER_1_ISR isr_tc4 +/** @} */ + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = &SERCOM2->USART, + .rx_pin = GPIO_PIN(PA,15), + .tx_pin = GPIO_PIN(PA,14), + .mux = GPIO_MUX_C, + .rx_pad = UART_PAD_RX_3, + .tx_pad = UART_PAD_TX_2, + .flags = UART_FLAG_NONE, + .gclk_src = GCLK_CLKCTRL_GEN_GCLK0 + }, +}; + +/* interrupt function name mapping */ +#define UART_0_ISR isr_sercom2 + +#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = &SERCOM4->SPI, + .miso_pin = GPIO_PIN(PC, 19), + .mosi_pin = GPIO_PIN(PB, 30), + .clk_pin = GPIO_PIN(PC, 18), + .miso_mux = GPIO_MUX_F, + .mosi_mux = GPIO_MUX_F, + .clk_mux = GPIO_MUX_F, + .miso_pad = SPI_PAD_MISO_0, + .mosi_pad = SPI_PAD_MOSI_2_SCK_3 + }, +}; + +#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ From 1b8589432428469110e11c3457b07260be5b76a7 Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 19 Sep 2018 16:12:57 -0600 Subject: [PATCH 03/15] Added a patch to enable support for ATSAMR21G18 in bossac. --- ...0002-Enabled-support-for-ATSAMR21G18.patch | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch diff --git a/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch b/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch new file mode 100644 index 000000000000..7e7712b2326e --- /dev/null +++ b/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch @@ -0,0 +1,33 @@ +From b301d4f8ce49d7a2daddadffb771f985d8375d3d Mon Sep 17 00:00:00 2001 +From: Joksan Alvarado +Date: Wed, 19 Sep 2018 15:52:41 -0600 +Subject: [PATCH] Enabled support for ATSAMR21G18. + +--- + src/Samba.cpp | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/src/Samba.cpp b/src/Samba.cpp +index 88aefcc..09145db 100644 +--- a/src/Samba.cpp ++++ b/src/Samba.cpp +@@ -187,7 +187,7 @@ Samba::init() + } + // Check for supported M0+ processor + // NOTE: 0x1001000a is a ATSAMD21E18A, 0x1001001c is ATSAMR21E18A +- else if (cid == 0x10010000 || cid == 0x10010100 || cid == 0x10010005 || cid == 0x1001000a || cid == 0x1001001c) ++ else if (cid == 0x10010000 || cid == 0x10010100 || cid == 0x10010005 || cid == 0x1001000a || cid == 0x1001001c || cid == 0x10010019) + { + return true; + } +@@ -685,6 +685,7 @@ Samba::reset(void) + case 0x10010005: + case 0x1001000a: + case 0x1001001c: ++ case 0x10010019: + // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0484c/index.html + writeWord(0xE000ED0C, 0x05FA0004); + break; +-- +2.18.0 + From 01abd1eef90b65c32d1c9ed1a311e81543ea750f Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 5 Sep 2018 19:29:37 -0600 Subject: [PATCH 04/15] drivers/at86rf2xx: Add support for antenna diversity. --- drivers/at86rf2xx/at86rf2xx.c | 3 ++ drivers/at86rf2xx/at86rf2xx_getset.c | 15 ++++++++ .../at86rf2xx/include/at86rf2xx_registers.h | 34 +++++++++++++++++++ drivers/include/at86rf2xx.h | 9 +++++ 4 files changed, 61 insertions(+) diff --git a/drivers/at86rf2xx/at86rf2xx.c b/drivers/at86rf2xx/at86rf2xx.c index c73151a16c96..12cacd5d2132 100644 --- a/drivers/at86rf2xx/at86rf2xx.c +++ b/drivers/at86rf2xx/at86rf2xx.c @@ -81,6 +81,9 @@ void at86rf2xx_reset(at86rf2xx_t *dev) at86rf2xx_set_option(dev, AT86RF2XX_OPT_AUTOACK, true); at86rf2xx_set_option(dev, AT86RF2XX_OPT_CSMA, true); + /* set antena diversity */ + at86rf2xx_set_option(dev, AT86RF2XX_OPT_ANT_DIV, AT86RF2XX_DEFAULT_ANT_DIV); + static const netopt_enable_t enable = NETOPT_ENABLE; netdev_ieee802154_set(&dev->netdev, NETOPT_ACK_REQ, &enable, sizeof(enable)); diff --git a/drivers/at86rf2xx/at86rf2xx_getset.c b/drivers/at86rf2xx/at86rf2xx_getset.c index f6cec5aaac51..8abe02d6d268 100644 --- a/drivers/at86rf2xx/at86rf2xx_getset.c +++ b/drivers/at86rf2xx/at86rf2xx_getset.c @@ -453,6 +453,21 @@ void at86rf2xx_set_option(at86rf2xx_t *dev, uint16_t option, bool state) : (tmp & ~AT86RF2XX_CSMA_SEED_1__AACK_SET_PD); at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1, tmp); break; + case AT86RF2XX_OPT_ANT_DIV: + DEBUG("[at86rf2xx] opt: %s antenna diversity\n", + (state ? "enable" : "disable")); + tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RX_CTRL); + tmp &= ~AT86RF2XX_RX_CTRL_MASK__PDT_THRES; + tmp = (state) ? (tmp | AT86RF2XX_RX_CTRL_PDT_THRES__ANT_DIV_THRES) + : (tmp | AT86RF2XX_RX_CTRL_PDT_THRES__NO_ANT_DIV_THRES); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__RX_CTRL, tmp); + tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__ANT_DIV); + tmp &= ~AT86RF2XX_ANT_DIV_MASK__ANT_CTRL; + tmp = (state) ? (tmp | AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN + | AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN) + : (tmp & ~AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN + & ~AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN); + at86rf2xx_reg_write(dev, AT86RF2XX_REG__ANT_DIV, tmp); default: /* do nothing */ break; diff --git a/drivers/at86rf2xx/include/at86rf2xx_registers.h b/drivers/at86rf2xx/include/at86rf2xx_registers.h index 2b770eeefbdf..d7a366592567 100644 --- a/drivers/at86rf2xx/include/at86rf2xx_registers.h +++ b/drivers/at86rf2xx/include/at86rf2xx_registers.h @@ -390,6 +390,40 @@ extern "C" { #define AT86RF2XX_TRX_RPC_MASK__IPAN_RPC_EN (0x02) #endif +/** @} */ + +/** + * @name Bitfield definitions for the RX_CTRL register + * @{ + */ + +/* TODO: Check other radio device datasheets and check wether this register exists in those. */ + +#define AT86RF2XX_RX_CTRL_MASK__PEL_SHIFT_VALUES (0xC0) +#define AT86RF2XX_RX_CTRL_MASK__PDT_THRES (0x0F) + +#define AT86RF2XX_RX_CTRL_PDT_THRES__NO_ANT_DIV_THRES (0x07) +#define AT86RF2XX_RX_CTRL_PDT_THRES__ANT_DIV_THRES (0x03) + +/** @} */ + +/** + * @name Bitfield definitions for the ANT_DIV register + * @{ + */ + +/* TODO: Check other radio device datasheets and check wether this register exists in those. */ + +#define AT86RF2XX_ANT_DIV_MASK__ANT_SEL (0x80) +#define AT86RF2XX_ANT_DIV_MASK__ANT_DIV_EN (0x08) +#define AT86RF2XX_ANT_DIV_MASK__ANT_EXT_SW_EN (0x04) +#define AT86RF2XX_ANT_DIV_MASK__ANT_CTRL (0x03) + +#define AT86RF2XX_ANT_DIV_ANT_CTRL__ANT_0 (0x01) +#define AT86RF2XX_ANT_DIV_ANT_CTRL__ANT_1 (0x02) + +/** @} */ + #ifdef __cplusplus } #endif diff --git a/drivers/include/at86rf2xx.h b/drivers/include/at86rf2xx.h index e4a709814316..de349fdfd0f5 100644 --- a/drivers/include/at86rf2xx.h +++ b/drivers/include/at86rf2xx.h @@ -72,6 +72,13 @@ extern "C" { */ #define AT86RF2XX_DEFAULT_TXPOWER (IEEE802154_DEFAULT_TXPOWER) +/** + * @brief Default antenna diversity enable + */ +#ifndef AT86RF2XX_DEFAULT_ANT_DIV +#define AT86RF2XX_DEFAULT_ANT_DIV (0) +#endif + /** * @brief Base (minimal) RSSI value in dBm */ @@ -177,6 +184,8 @@ extern "C" { #define AT86RF2XX_OPT_AUTOACK (0x0080) /**< Auto ACK active */ #define AT86RF2XX_OPT_ACK_PENDING (0x0100) /**< ACK frames with data * pending */ +#define AT86RF2XX_OPT_ANT_DIV (0x0200) /**< Antenna diversity + * active */ /** @} */ From bd49c72337518bfba37837f0f61eac0456f47801 Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 5 Sep 2018 20:35:13 -0600 Subject: [PATCH 05/15] boards/hssv-atsamr21-breakout: Added support for atsamr21-breakout from Hackerspace San Salvador --- boards/hssv-atsamr21-breakout/Makefile | 3 + boards/hssv-atsamr21-breakout/Makefile.dep | 3 + .../hssv-atsamr21-breakout/Makefile.features | 16 ++ .../hssv-atsamr21-breakout/Makefile.include | 19 +++ boards/hssv-atsamr21-breakout/board.c | 21 +++ boards/hssv-atsamr21-breakout/include/board.h | 39 +++++ .../include/periph_conf.h | 159 ++++++++++++++++++ 7 files changed, 260 insertions(+) create mode 100644 boards/hssv-atsamr21-breakout/Makefile create mode 100644 boards/hssv-atsamr21-breakout/Makefile.dep create mode 100644 boards/hssv-atsamr21-breakout/Makefile.features create mode 100644 boards/hssv-atsamr21-breakout/Makefile.include create mode 100644 boards/hssv-atsamr21-breakout/board.c create mode 100644 boards/hssv-atsamr21-breakout/include/board.h create mode 100644 boards/hssv-atsamr21-breakout/include/periph_conf.h diff --git a/boards/hssv-atsamr21-breakout/Makefile b/boards/hssv-atsamr21-breakout/Makefile new file mode 100644 index 000000000000..f8fcbb53a065 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/hssv-atsamr21-breakout/Makefile.dep b/boards/hssv-atsamr21-breakout/Makefile.dep new file mode 100644 index 000000000000..e556f7fff721 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.dep @@ -0,0 +1,3 @@ +ifneq (,$(filter gnrc_netdev_default netdev_default,$(USEMODULE))) + USEMODULE += at86rf233 +endif diff --git a/boards/hssv-atsamr21-breakout/Makefile.features b/boards/hssv-atsamr21-breakout/Makefile.features new file mode 100644 index 000000000000..b1754cd736b8 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.features @@ -0,0 +1,16 @@ +# Put defined MCU peripherals here (in alphabetical order) +# FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_gpio +FEATURES_PROVIDED += periph_gpio_irq +# FEATURES_PROVIDED += periph_i2c +# FEATURES_PROVIDED += periph_pwm +# FEATURES_PROVIDED += periph_rtc +# FEATURES_PROVIDED += periph_rtt +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +# The board MPU family (used for grouping by the CI system) +FEATURES_MCU_GROUP = cortex_m0_2 + +-include $(RIOTCPU)/samd21/Makefile.features diff --git a/boards/hssv-atsamr21-breakout/Makefile.include b/boards/hssv-atsamr21-breakout/Makefile.include new file mode 100644 index 000000000000..a5a12437609d --- /dev/null +++ b/boards/hssv-atsamr21-breakout/Makefile.include @@ -0,0 +1,19 @@ +# define the cpu used by the atsamr21-breakout board +export CPU = samd21 +export CPU_MODEL = samr21g18a + +# export needed for flash rule +export PORT_LINUX ?= /dev/ttyACM0 + +# setup serial terminal +include $(RIOTMAKE)/tools/serial.inc.mk + +# we use BOSSA to flash this board and take into account the preinstalled +# Arduino bootloader. ROM_OFFSET skips the space taken by such bootloader. +ROM_OFFSET ?= 0x2000 +include $(RIOTMAKE)/tools/bossa.inc.mk + +# enable antenna diversity for this board. +CFLAGS += -DAT86RF2XX_DEFAULT_ANT_DIV=\(1\) + +include $(RIOTMAKE)/boards/sam0.inc.mk diff --git a/boards/hssv-atsamr21-breakout/board.c b/boards/hssv-atsamr21-breakout/board.c new file mode 100644 index 000000000000..d02fef96abd7 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/board.c @@ -0,0 +1,21 @@ +#include "board.h" +#include "periph/gpio.h" + +void board_init(void) +{ + /* configure the antenna diversity pins of the RF frontend to be controlled + * by the AT86RF233 */ + gpio_init_mux(GPIO_PIN(PA, 12), GPIO_MUX_F); //Set ANT_DIV_P to be used as FECTRL[2] + gpio_init_mux(GPIO_PIN(PA, 9), GPIO_MUX_F); //Set ANT_DIV_N to be used as FECTRL[1] + + /* enable the peripheral clock mask for the RFCTRL */ + PM->APBCMASK.bit.RFCTRL_ = 1; + + /* configure the RFCTRL peripheral to route the correct AT86RF233 signals to + * the radio frontend */ + RFCTRL->FECFG.bit.F2CFG = 0; //Set DIG1 to FECTRL[2] + RFCTRL->FECFG.bit.F1CFG = 1; //Set DIG2 to FECTRL[1] + + /* initialize the CPU */ + cpu_init(); +} diff --git a/boards/hssv-atsamr21-breakout/include/board.h b/boards/hssv-atsamr21-breakout/include/board.h new file mode 100644 index 000000000000..89adb8ec503b --- /dev/null +++ b/boards/hssv-atsamr21-breakout/include/board.h @@ -0,0 +1,39 @@ +#ifndef BOARD_H +#define BOARD_H + +#include "cpu.h" +#include "periph_conf.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name xtimer configuration + * @{ + */ +#define XTIMER_DEV TIMER_DEV(1) +#define XTIMER_CHAN (0) +/** @} */ + +/** + * @name AT86RF233 configuration + * + * {spi bus, spi speed, cs pin, int pin, reset pin, sleep pin} + */ +#define AT86RF2XX_PARAM_CS GPIO_PIN(PB, 31) +#define AT86RF2XX_PARAM_INT GPIO_PIN(PB, 0) +#define AT86RF2XX_PARAM_SLEEP GPIO_PIN(PA, 20) +#define AT86RF2XX_PARAM_RESET GPIO_PIN(PB, 15) + +/** + * @brief Initialize board specific hardware + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ diff --git a/boards/hssv-atsamr21-breakout/include/periph_conf.h b/boards/hssv-atsamr21-breakout/include/periph_conf.h new file mode 100644 index 000000000000..c597b6c44b41 --- /dev/null +++ b/boards/hssv-atsamr21-breakout/include/periph_conf.h @@ -0,0 +1,159 @@ +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include + +#include "cpu.h" +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name External oscillator and clock configuration + * + * There are three choices for selection of CORECLOCK: + * + * - usage of the 48 MHz DFLL fed by external oscillator running at 32 kHz + * - usage of the PLL fed by the internal 8MHz oscillator divided by 8 + * - usage of the internal 8MHz oscillator directly, divided by N if needed + * + * + * The PLL option allows for the usage of a wider frequency range and a more + * stable clock with less jitter. This is why this option is default. + * + * The target frequency is computed from the PLL multiplier and the PLL divisor. + * Use the following formula to compute your values: + * + * CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV + * + * NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL + * frequency is 96MHz. So PLL_MULL must be between 31 and 95! + * + * + * The internal Oscillator used directly can lead to a slightly better power + * efficiency to the cost of a less stable clock. Use this option when you know + * what you are doing! The actual core frequency is adjusted as follows: + * + * CORECLOCK = 8MHz / DIV + * + * NOTE: A core clock frequency below 1MHz is not recommended + * + * @{ + */ +#define CLOCK_USE_PLL (1) + +#if CLOCK_USE_PLL +/* edit these values to adjust the PLL output frequency */ +#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ +#define CLOCK_PLL_DIV (1U) /* adjust to your needs */ +/* generate the actual used core clock frequency */ +#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) +#elif CLOCK_USE_XOSC32_DFLL + /* Settings for 32 kHz external oscillator and 48 MHz DFLL */ +#define CLOCK_CORECLOCK (48000000U) +#define CLOCK_XOSC32K (32768UL) +#define CLOCK_8MHZ (1) +#define GEN2_ULP32K (1) +#else +/* edit this value to your needs */ +#define CLOCK_DIV (1U) +/* generate the actual core clock frequency */ +#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV) +#endif +/** @} */ + +/** + * @name Timer peripheral configuration + * @{ + */ +static const tc32_conf_t timer_config[] = { + { /* Timer 0 - System Clock */ + .dev = TC3, + .irq = TC3_IRQn, + .pm_mask = PM_APBCMASK_TC3, + .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3, +#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL + .gclk_src = GCLK_CLKCTRL_GEN(1), + .prescaler = TC_CTRLA_PRESCALER_DIV1, +#else + .gclk_src = GCLK_CLKCTRL_GEN(0), + .prescaler = TC_CTRLA_PRESCALER_DIV8, +#endif + .flags = TC_CTRLA_MODE_COUNT16, + }, + { /* Timer 1 */ + .dev = TC4, + .irq = TC4_IRQn, + .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5, + .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5, +#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL + .gclk_src = GCLK_CLKCTRL_GEN(1), + .prescaler = TC_CTRLA_PRESCALER_DIV1, +#else + .gclk_src = GCLK_CLKCTRL_GEN(0), + .prescaler = TC_CTRLA_PRESCALER_DIV8, +#endif + .flags = TC_CTRLA_MODE_COUNT32, + } +}; + +#define TIMER_0_MAX_VALUE 0xffff + +/* interrupt function name mapping */ +#define TIMER_0_ISR isr_tc3 +#define TIMER_1_ISR isr_tc4 + +#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) +/** @} */ + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = &SERCOM2->USART, + .rx_pin = GPIO_PIN(PA,15), + .tx_pin = GPIO_PIN(PA,14), + .mux = GPIO_MUX_C, + .rx_pad = UART_PAD_RX_3, + .tx_pad = UART_PAD_TX_2, + .flags = UART_FLAG_NONE, + .gclk_src = GCLK_CLKCTRL_GEN_GCLK0 + }, +}; + +/* interrupt function name mapping */ +#define UART_0_ISR isr_sercom2 + +#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = &SERCOM4->SPI, + .miso_pin = GPIO_PIN(PC, 19), + .mosi_pin = GPIO_PIN(PB, 30), + .clk_pin = GPIO_PIN(PC, 18), + .miso_mux = GPIO_MUX_F, + .mosi_mux = GPIO_MUX_F, + .clk_mux = GPIO_MUX_F, + .miso_pad = SPI_PAD_MISO_0, + .mosi_pad = SPI_PAD_MOSI_2_SCK_3 + }, +}; + +#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ From 67db07b27492a993711e4ca4f6ecfc18a8b2a95b Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Wed, 19 Sep 2018 16:12:57 -0600 Subject: [PATCH 06/15] Added a patch to enable support for ATSAMR21G18 in bossac. --- ...0002-Enabled-support-for-ATSAMR21G18.patch | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch diff --git a/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch b/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch new file mode 100644 index 000000000000..7e7712b2326e --- /dev/null +++ b/dist/tools/bossa/patches/0002-Enabled-support-for-ATSAMR21G18.patch @@ -0,0 +1,33 @@ +From b301d4f8ce49d7a2daddadffb771f985d8375d3d Mon Sep 17 00:00:00 2001 +From: Joksan Alvarado +Date: Wed, 19 Sep 2018 15:52:41 -0600 +Subject: [PATCH] Enabled support for ATSAMR21G18. + +--- + src/Samba.cpp | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/src/Samba.cpp b/src/Samba.cpp +index 88aefcc..09145db 100644 +--- a/src/Samba.cpp ++++ b/src/Samba.cpp +@@ -187,7 +187,7 @@ Samba::init() + } + // Check for supported M0+ processor + // NOTE: 0x1001000a is a ATSAMD21E18A, 0x1001001c is ATSAMR21E18A +- else if (cid == 0x10010000 || cid == 0x10010100 || cid == 0x10010005 || cid == 0x1001000a || cid == 0x1001001c) ++ else if (cid == 0x10010000 || cid == 0x10010100 || cid == 0x10010005 || cid == 0x1001000a || cid == 0x1001001c || cid == 0x10010019) + { + return true; + } +@@ -685,6 +685,7 @@ Samba::reset(void) + case 0x10010005: + case 0x1001000a: + case 0x1001001c: ++ case 0x10010019: + // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0484c/index.html + writeWord(0xE000ED0C, 0x05FA0004); + break; +-- +2.18.0 + From 868b55cfc8b0b5345133e09f0d82c9467a429871 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?S=C3=B6ren=20Tempel?= Date: Mon, 1 Jul 2019 10:07:05 +0200 Subject: [PATCH 07/15] gnrc_tftp: Add minimum packet length check See #10927 See #11766 --- sys/net/gnrc/application_layer/tftp/gnrc_tftp.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sys/net/gnrc/application_layer/tftp/gnrc_tftp.c b/sys/net/gnrc/application_layer/tftp/gnrc_tftp.c index f89cd5884013..474cdff71068 100644 --- a/sys/net/gnrc/application_layer/tftp/gnrc_tftp.c +++ b/sys/net/gnrc/application_layer/tftp/gnrc_tftp.c @@ -57,6 +57,7 @@ static kernel_pid_t _tftp_kernel_pid; #define TFTP_TIMEOUT_MSG 0x4000 #define TFTP_STOP_SERVER_MSG 0x4001 +#define TFTP_MIN_PACKET_LEN 4 #define TFTP_DEFAULT_DATA_SIZE (GNRC_TFTP_MAX_TRANSFER_UNIT \ + sizeof(tftp_packet_data_t)) @@ -607,6 +608,11 @@ tftp_state _tftp_state_processes(tftp_context_t *ctxt, msg_t *m) } gnrc_pktsnip_t *pkt = m->content.ptr; + if (pkt->size < TFTP_MIN_PACKET_LEN) { + DEBUG("tftp: packet is too short\n"); + gnrc_pktbuf_release(outbuf); + return TS_FAILED; + } gnrc_pktsnip_t *tmp; tmp = gnrc_pktsnip_search_type(pkt, GNRC_NETTYPE_UDP); From 8be045f1085dccb292a18d406311fe4b8f1613d9 Mon Sep 17 00:00:00 2001 From: Francisco Molina Date: Tue, 16 Jul 2019 10:47:36 +0200 Subject: [PATCH 08/15] pkg/semtech_loramac: fix memcpy to uninitialized pointer (cherry picked from commit aff7ee3732a012c447af3bf8e5f37700b2bbf047) --- pkg/semtech-loramac/contrib/semtech_loramac_getset.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/pkg/semtech-loramac/contrib/semtech_loramac_getset.c b/pkg/semtech-loramac/contrib/semtech_loramac_getset.c index e8bacc3b82ea..ee5b662326a9 100644 --- a/pkg/semtech-loramac/contrib/semtech_loramac_getset.c +++ b/pkg/semtech-loramac/contrib/semtech_loramac_getset.c @@ -64,7 +64,7 @@ void semtech_loramac_set_appskey(semtech_loramac_t *mac, const uint8_t *skey) mutex_lock(&mac->lock); MibRequestConfirm_t mibReq; mibReq.Type = MIB_APP_SKEY; - memcpy(mibReq.Param.AppSKey, skey, LORAMAC_APPSKEY_LEN); + mibReq.Param.AppSKey = (uint8_t *) skey; LoRaMacMibSetRequestConfirm(&mibReq); mutex_unlock(&mac->lock); } @@ -84,7 +84,7 @@ void semtech_loramac_set_nwkskey(semtech_loramac_t *mac, const uint8_t *skey) mutex_lock(&mac->lock); MibRequestConfirm_t mibReq; mibReq.Type = MIB_NWK_SKEY; - memcpy(mibReq.Param.NwkSKey, skey, LORAMAC_NWKSKEY_LEN); + mibReq.Param.NwkSKey = (uint8_t *) skey; LoRaMacMibSetRequestConfirm(&mibReq); mutex_unlock(&mac->lock); } From 5e56edb99148368987d2381999d52638e95c4aae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ga=C3=ABtan=20Harter?= Date: Wed, 17 Jul 2019 14:36:44 +0200 Subject: [PATCH 09/15] tests/devfs: move tests-devfs out of unittests This moves unittests/tests-devfs to its own test. It prevents requiring `periph_hwrng` in the `unittests`. (cherry picked from commit 78ca09dd43206265d7276270967d4973836a3b52) --- tests/devfs/Makefile | 12 ++++++ .../tests-devfs.c => devfs/main.c} | 13 ++++--- tests/devfs/tests/01-run.py | 18 +++++++++ tests/unittests/tests-devfs/Makefile | 1 - tests/unittests/tests-devfs/Makefile.include | 4 -- tests/unittests/tests-devfs/tests-devfs.h | 37 ------------------- 6 files changed, 37 insertions(+), 48 deletions(-) create mode 100644 tests/devfs/Makefile rename tests/{unittests/tests-devfs/tests-devfs.c => devfs/main.c} (96%) create mode 100755 tests/devfs/tests/01-run.py delete mode 100644 tests/unittests/tests-devfs/Makefile delete mode 100644 tests/unittests/tests-devfs/Makefile.include delete mode 100644 tests/unittests/tests-devfs/tests-devfs.h diff --git a/tests/devfs/Makefile b/tests/devfs/Makefile new file mode 100644 index 000000000000..87968a1f9439 --- /dev/null +++ b/tests/devfs/Makefile @@ -0,0 +1,12 @@ +include ../Makefile.tests_common + +USEMODULE += embunit + +USEMODULE += vfs +USEMODULE += devfs +USEMODULE += devfs_random +USEMODULE += devfs_hwrng + +TEST_ON_CI_WHITELIST += all + +include $(RIOTBASE)/Makefile.include diff --git a/tests/unittests/tests-devfs/tests-devfs.c b/tests/devfs/main.c similarity index 96% rename from tests/unittests/tests-devfs/tests-devfs.c rename to tests/devfs/main.c index 48420ce20378..99e939baa385 100644 --- a/tests/unittests/tests-devfs/tests-devfs.c +++ b/tests/devfs/main.c @@ -23,9 +23,7 @@ #include "fs/devfs.h" #include "random.h" -#include "embUnit/embUnit.h" - -#include "tests-devfs.h" +#include "embUnit.h" static int _mock_open(vfs_file_t *filp, const char *name, int flags, mode_t mode, const char *abs_path); static ssize_t _mock_read(vfs_file_t *filp, void *dest, size_t nbytes); @@ -169,7 +167,7 @@ static void test_devfs_hwrng(void) TEST_ASSERT(memcmp(zeroes, buf, sizeof(buf))); } -Test *tests_devfs_tests(void) +Test *tests_devfs(void) { EMB_UNIT_TESTFIXTURES(fixtures) { new_TestFixture(test_devfs_register), @@ -183,13 +181,16 @@ Test *tests_devfs_tests(void) return (Test *)&devfs_tests; } -void tests_devfs(void) +int main(void) { extern void auto_init_devfs(void); auto_init_devfs(); random_init(1); - TESTS_RUN(tests_devfs_tests()); + TESTS_START(); + TESTS_RUN(tests_devfs()); + TESTS_END(); + return 0; } /** @} */ diff --git a/tests/devfs/tests/01-run.py b/tests/devfs/tests/01-run.py new file mode 100755 index 000000000000..1dcdd41c1413 --- /dev/null +++ b/tests/devfs/tests/01-run.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python3 + +# Copyright (C) 2019 Freie Universität Berlin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. + +import sys +from testrunner import run + + +def testfunc(child): + child.expect(r'OK \(\d+ tests\)') + + +if __name__ == "__main__": + sys.exit(run(testfunc)) diff --git a/tests/unittests/tests-devfs/Makefile b/tests/unittests/tests-devfs/Makefile deleted file mode 100644 index 48422e909a47..000000000000 --- a/tests/unittests/tests-devfs/Makefile +++ /dev/null @@ -1 +0,0 @@ -include $(RIOTBASE)/Makefile.base diff --git a/tests/unittests/tests-devfs/Makefile.include b/tests/unittests/tests-devfs/Makefile.include deleted file mode 100644 index e337f4691a43..000000000000 --- a/tests/unittests/tests-devfs/Makefile.include +++ /dev/null @@ -1,4 +0,0 @@ -USEMODULE += vfs -USEMODULE += devfs -USEMODULE += devfs_random -USEMODULE += devfs_hwrng diff --git a/tests/unittests/tests-devfs/tests-devfs.h b/tests/unittests/tests-devfs/tests-devfs.h deleted file mode 100644 index 1d9a45e66ae6..000000000000 --- a/tests/unittests/tests-devfs/tests-devfs.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2016 Eistec AB - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @addtogroup unittests - * @{ - * - * @file - * @brief Unittests for DevFS - * - * @author Joakim Nohlgård - */ -#ifndef TESTS_DEVFS_H -#define TESTS_DEVFS_H - -#include "embUnit.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief The entry point of this test suite. - */ -void tests_devfs(void); - -#ifdef __cplusplus -} -#endif - -#endif /* TESTS_DEVFS_H */ -/** @} */ From 57fb85ee6b05cbf311639be066348d1f0c4cc8e3 Mon Sep 17 00:00:00 2001 From: Francisco Molina Date: Fri, 19 Jul 2019 12:17:47 +0200 Subject: [PATCH 10/15] examples/lorawan: fix semtech_loramac_send TX ret code - with #11541 TX notification are only sent after mcps confirm event this will send a SEMTECH_LORAMAC_TX_DONE instead of SEMTECH_LORAMAC_TX_OK. (cherry picked from commit cdf687ceba85bd34d8ca4903b1a93efb4f11213d) --- examples/lorawan/main.c | 2 +- pkg/semtech-loramac/doc.txt | 2 +- pkg/semtech-loramac/include/semtech_loramac.h | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/lorawan/main.c b/examples/lorawan/main.c index f323e5212422..20cc066f30c2 100644 --- a/examples/lorawan/main.c +++ b/examples/lorawan/main.c @@ -70,7 +70,7 @@ static void _send_message(void) /* Try to send the message */ uint8_t ret = semtech_loramac_send(&loramac, (uint8_t *)message, strlen(message)); - if (ret != SEMTECH_LORAMAC_TX_OK) { + if (ret != SEMTECH_LORAMAC_TX_DONE) { printf("Cannot send message '%s', ret code: %d\n", message, ret); return; } diff --git a/pkg/semtech-loramac/doc.txt b/pkg/semtech-loramac/doc.txt index aaf6200960bd..fd6f80be0db4 100644 --- a/pkg/semtech-loramac/doc.txt +++ b/pkg/semtech-loramac/doc.txt @@ -88,7 +88,7 @@ * /* 4. send some data */ * char *message = "This is RIOT"; * if (semtech_loramac_send(&loramac, - * (uint8_t *)message, strlen(message)) != SEMTECH_LORAMAC_TX_OK) { + * (uint8_t *)message, strlen(message)) != SEMTECH_LORAMAC_TX_DONE) { printf("Cannot send message '%s'\n", message); * return 1; * } diff --git a/pkg/semtech-loramac/include/semtech_loramac.h b/pkg/semtech-loramac/include/semtech_loramac.h index d32d0dbcdf95..40d62f6c3424 100644 --- a/pkg/semtech-loramac/include/semtech_loramac.h +++ b/pkg/semtech-loramac/include/semtech_loramac.h @@ -159,7 +159,7 @@ uint8_t semtech_loramac_join(semtech_loramac_t *mac, uint8_t type); * This function returns after TX status is replied from the MAC. To receive * potential messages sent from the network an explicit call to * @ref semtech_loramac_recv must be done after this function if it returned - * @ref SEMTECH_LORAMAC_TX_OK and within the RX windows delays. + * @ref SEMTECH_LORAMAC_TX_DONE and within the RX windows delays. * * @see semtech_loramac_recv * @@ -167,7 +167,7 @@ uint8_t semtech_loramac_join(semtech_loramac_t *mac, uint8_t type); * @param[in] data The TX data * @param[in] len The length of the TX data * - * @return SEMTECH_LORAMAC_TX_OK when the message can be transmitted + * @return SEMTECH_LORAMAC_TX_DONE when the message was transmitted * @return SEMTECH_LORAMAC_NOT_JOINED when the network is not joined * @return SEMTECH_LORAMAC_BUSY when the mac is already active (join or tx in progress) * @return SEMTECH_LORAMAC_DUTYCYCLE_RESTRICTED when the send is rejected because of dutycycle restriction From a8764766343b88f6c10d3c5841b4774ef52ef64d Mon Sep 17 00:00:00 2001 From: MrKevinWeiss Date: Wed, 24 Jul 2019 13:22:44 +0200 Subject: [PATCH 11/15] release-notes.txt: add notes for 2019.07 release MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Co-authored-by: Martine Lenders Co-authored-by: Gaëtan Harter Co-authored-by: Lanzieri Rodriguez --- release-notes.txt | 510 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 510 insertions(+) diff --git a/release-notes.txt b/release-notes.txt index 52af314f9161..f5ac2bae4396 100644 --- a/release-notes.txt +++ b/release-notes.txt @@ -1,3 +1,513 @@ +RIOT-2019.07 - Release Notes +============================ +RIOT is a multi-threading operating system which enables soft real-time +capabilities and comes with support for a range of devices that are typically +found in the Internet of Things: 8-bit and 16-bit microcontrollers as well as +light-weight 32-bit processors. + +RIOT is based on the following design principles: energy-efficiency, soft +real-time capabilities, small memory footprint, modularity, and uniform API +access, independent of the underlying hardware (with partial POSIX compliance). + +RIOT is developed by an international open-source community which is +independent of specific vendors (e.g. similarly to the Linux community) and is +licensed with a non-viral copyleft license (LGPLv2.1), which allows indirect +business models around the free open-source software platform provided by RIOT. + + +About this release: +=================== + +The 2019.07 release includes a number of new features including many new +boards and cpu, riotboot added to many new and old boards, USB is now available, +BLE improvements, Ethernet on stm32 platforms, as well as many bug fixes and +documentation updates. Testing has also improved with both On-Target Testing +increasing and now Hardware Assisted Automated Tests being run. + +About 300 pull requests with about 659 commits have been merged since the last +release and about 50 issues have been solved. 26 people contributed with code +in 106 days. Approximately 1377 files have been touched with 181993 insertions +and 19668 deletions. + + +Notations used below: +===================== + + means new feature/item + * means modified feature/item + - means removed feature/item + +New features and changes +======================== + +System libraries +---------------- + + Add OCB encryption mode + + sys/shell: add loramac shell command + * Fletcher16: extend with multi-part functions + + USBUS: Initial work towards an USB stack + + usbus: Initial simple auto init structure + * sys: make uart_stdio RX optional + + sys/event: add event_wait_until() + + sys/bluetil: add bluetil_addr_from_str() + + usbus: Add CDC-ECM (Ethernet Control Model) function + * usbus: simplify adding entry to list + * sys/stdio_ethos: replace USE_ETHOS_FOR_STDIO by stdio_ethos pseudomodule + +Networking +---------- + * gnrc_ipv6_nib: add address from netif to address validation timer + + netdev_ieee802154: add txpower and page + + net/lorawan/hdr: add lorawan header helpers + + ble/nimble: add support for build-in IPSS service + * pkg/semtech-loramac: rework interaction with the MAC + * pkg/semtech-loramac: provide basic persistence for MAC state + * RPL: API update suggestions + + ipv6_ext: add fragmentation extension definitions + * net/sock_util: Accept NULL pointers in urlsplit + + sys/net: add netopt options for lorawan + * gnrc_tftp: Fix out-of-bounds memory access when comparing modes + - gnrc_pktbuf: remove gnrc_pktbuf_duplicate_upto + - gnrc_ipv6: remove obsolete and harmful reception code + * gnrc_tftp: set port on server init + + ble/softdevice: add ble_nordic_softdevice feature + * net/mqttsn: fix client ID length to comply to the standard + + gnrc_tftp: Add minimum packet length check + +Packages +-------- + * pkg/monocypher: bump version to 2.0.5 + * ble/nimble: bump version to 9d4bda2 + * openthread: update to release 20180926 + * minmea: bump version to current master + + nanocbor: Initial support for the nanocbor package + * pkg/lua: Make the module searchers conform to the API + +Boards +------ + + boards/stm32l0538-disco: add initial support + + boards/nucleo-l4r5zi: initial basic support + + boards/particle-{xenon,argon,boron}: add initial support + * boards/kw41z: add common configuration and use it with existing + kw41z boards + + added SPI support for Nucleo-F767ZI + + boards: Add support for the Arduino-Leonardo + * boards/nucleof7*: SPI and refactoring + + boards/stm32: introduce and use new common rtt configuration header + + boards/stm32l0/l4: add rtt feature + + boards: add support for i-nucleo-lrwan1 (Arduino-like shield) + + boards/nrf52840-mdk: added I2C config + + boards/lsn50: add support for Dragino LSN50 LoRa Sensor Node + * boards/stm32l0: introduce common clock configuration and apply it to + related boards + * boards/b-l072z-lrwan1: use STM32 common i2C configuration + + Add usbdev feature to Sodaq boards + + boards/pba-d-01-kw2x: add riotboot support + + sensebox: add usbdev feature + + boards/stm32f429i-disc1: add i2c configuration + + boards/nucleo-l476rg: add riotboot + + boards/same54-xpro: add riotboot support + + boards: Add FLASHFILE support + + boards/nucleo-l476rg: Add DMA support + + nrf52: Add suspend/resume detection to usbdev + + nrf5x: Add UART modecfg feature implementation + + boards/stm32f3: add support for riotboot feature + + boards/lobaro-lorabox: add sx1272 radio driver dependency + to netdev_default + + boards/stm32l4: add riotboot support + + boards/microbit: add QEMU emulation + + boards/frdm-kw41z-k64f: add riotboot + * boards/sltb001a: reset before flashing + +CPU +--- + * cpu/esp8266: added/changed helper functions + + cpu/cc2538: Add periph_uart_mode implementation + * saml1x: enable pm_layered by default + + cpu/cc26x0: implement uart_mode() + + cpu/sam0: add support for SAMD5x/SAME5x + + sam0_common: add uart modecfg support + + cpu/stm32f3: add support for flashpage and flashpage_raw + * cpu/stm32l{1,4}: refactor flashpage numof macros + * cpu/stm32: optimize stop mode for stm32f* + * cpu/nrf5x_common: map hwrng to SoC library if SoftDevice is present + +Device Drivers +-------------- + + devfs: add /dev/urandom and /dev/hwrng + * drivers/mrf24j40 : support of NETOPT_LAST_ED_LEVEL + + drivers/mrf24j40: add external PA/LNA control on MC/MD/ME devices + * drivers/at86rf2xx: enable NETOPT_RX_END_IRQ and fix RSSI values + * drivers/adt7310: Replace binary literal with hex literal + + drivers/ds75lx: add basic driver for temperature sensor + + drivers/include: add header definition for wdt + + drivers/at: Add 'at_recv_bytes_until_string' function + + sx127x: add several NETOPT for GNRC LoRaWAN + * drivers/sx127x: fix device reset + + drivers: stm32 eth peripheral driver + + drivers/periph/gpio_util: add gpio_util_shiftin() + +Build System / Tooling +---------------------- + * makefiles/docker: export BOARDS + + makefiles: add bootloaders to the list of applications + * Makefile.include: allow overwriting flash-recipe + * dist/tools/buildsystem_sanity_check: add an export variable check + * sys/Makefile.include: include riotboot headers when + FEATURES_REQUIRED=riotboot + + make: add print-versions helper target + + make: add LOG_LEVEL to overridable variables + * riotboot/Makefile.include: increase RIOTBOOT_HDR_LEN for ARMv7*-M + * dist/tools/build_system_sanity_check: BUG fix errors being ignored + * boards/common: use Makefile.features + + make: add termdeps target + * periph_common: add as dependency to periph drivers + + nrf52: Add USB peripheral driver + + makefiles/boards.inc.mk: list boards variables + + makefiles/app_dirs.inc.mk: target to list supported applications/boards + + Makefile.features: add a common file for the features parsing + + Makefile.features: add declarative FEATURES_ variables definition + + makefiles/utils/variables: add functions to help managing variables + * Migrate all boards to define FLASHFILE + * tools/openocd.sh: try to probe the board for real flash address + +Testing +------- + * tests/periph_flashpage: add RWWEE automatic test if hw supports it + * tests/pthread_tls: allow negative key values + * tests/gnrc_udp: include `gnrc_pktbuf_cmd` per default + + tests/periph_hwrng: add automated python test + * tests/periph_timer: include kw41z boards in low-power timer boards + * tests/pkg_c25519: increase timeout for arduino-mega2560 + + tests/xtimer_usleep: fail with negative offsets + + unittests: add tsrb tests + + tests/stdin: add non regression test for stdin module + + tests/xtimer_mutex_lock_timeout: add simple case test + + Add NimBLE heart rate sensor example (GATT notifications) + * tests/driver_rn2xx3: fix invalid element index for txmode + * tests/pkg_semtech-loramac: don't init the mac from main + * tests/devfs: move tests-devfs out of unittests + + examples/lorawan: fix semtech_loramac_send TX ret code + * tests/unittests: split remaining packages tests to different test + directory + +API Changes +======================== +- uart_stdio RX is now optional +- CPU_MODEL declared in boards/Makefile.features + + +```c +- void isrpipe_init(isrpipe_t *isrpipe, char *buf, size_t bufsize); ++ void isrpipe_init(isrpipe_t *isrpipe, uint8_t *buf, size_t bufsize); + +- int isrpipe_write_one(isrpipe_t *isrpipe, char c); ++ int isrpipe_write_one(isrpipe_t *isrpipe, uint8_t c); + +- int isrpipe_read(isrpipe_t *isrpipe, char *buf, size_t count); ++ int isrpipe_read(isrpipe_t *isrpipe, uint8_t *buf, size_t count); + +- int isrpipe_read_timeout(isrpipe_t *isrpipe, char *buf, size_t count,\ + int32_t timeout); ++ int isrpipe_read_timeout(isrpipe_t *isrpipe, uint8_t *buf, size_t count,\ + uint32_t timeout); + +- int isrpipe_read_all_timeout(isrpipe_t *isrpipe, char *buf, size_t count,\ + uint32_t timeout); ++ int isrpipe_read_all_timeout(isrpipe_t *isrpipe, uint8_t *buf, size_t count,\ + uint32_t timeout); + +typedef struct tsrb { +... +- char *buf; /**< Buffer to operate on. */ ++ uint8_t *buf; /**< Buffer to operate on. */ +... +} tsrb_t + +- int tsrb_get(tsrb_t *rb, char *dst, size_t n); ++ int tsrb_get(tsrb_t *rb, uint8_t *dst, size_t n); + +- int tsrb_add_one(tsrb_t *rb, char c); ++ int tsrb_add_one(tsrb_t *rb, uint8_t c); + +- int tsrb_add(tsrb_t *rb, const char *src, size_t n); ++ int tsrb_add(tsrb_t *rb, const uint8_t *src, size_t n); + +typedef struct { +... +- uint16_t (*calc_rank)(gnrc_rpl_parent_t *parent, uint16_t base_rank); +- gnrc_rpl_parent_t *(*which_parent)(gnrc_rpl_parent_t *, gnrc_rpl_parent_t *); ++ uint16_t (*calc_rank)(gnrc_rpl_dodag_t *dodag, uint16_t base_rank); + +- void (*reset)(gnrc_rpl_dodag_t *); /**< resets the OF */ ++ void (*reset)(gnrc_rpl_dodag_t *dodag); +... +- void (*init)(void); /**< OF specific init function */ ++ void (*init)(gnrc_rpl_dodag_t *dodag); +} gnrc_rpl_of_t; + +- thread_state_t ++ thread_status_t + +- void sched_set_status(thread_t *process, thread_state_t status); ++ void sched_set_status(thread_t *process, thread_status_t status); + +struct _thread { +... +- thread_state_t status; ++ thread_status_t status; +... +} + +- bool mrf24j40_cca(mrf24j40_t *dev); ++ bool mrf24j40_cca(mrf24j40_t *dev, int8_t *rssi); +``` + +Deprecations +======================== + +Warnings +-------- +`gnrc_tftp` module +`ubjson` module + +Removals +-------- +`gcoap_req_send()` replaced with `gcoap_req_send2()->gcoap_req_send2()` + +Known issues +============ + +Networking related issues +------------------------- +#11860: send data with UDP at 10HZ, the program die +#11859: examples: dtls-echo fails silently when DTLS_ECC flag enabled +#11519: shell/ping6: Incorrect handling of unexpected pongs +#11405: nrfmin: communication not possible after multicast ping with no interval +#11390: gnrc networking crashs on nRF51dk +#11212: POSIX sockets + lwIP: bad file descriptor +#11033: 6lo: RIOT does not receive packets from Linux when short_addr is set +#10969: net: netdev_driver_t::send() doc unclear +#10861: cpu/esp8266: Tracking open problems of esp_wifi netdev driver +#10809: openthread: does not build on current Arch +#10410: Missing drop implementations in netdev_driver_t::recv +#10389: gnrc_sock_udp: Possible Race condition on copy in application buffer +#10380: netdev_ieee802154: Mismatch between radio ll address and in memory + address +#10370: gomach: Resetting netif with cli doesn't return +#10338: xbee: setting PAN ID sometimes fails +#9709: examples: failed assertion in dtls-echo example +#9656: gnrc/netif: various problems after resetting interface a second time +#8779: CC2538 RF overlapping PIN usage +#8752: mrf24j40: does not link for examples/default +#8631: at86rf2xx/kw2xrf: scalar NETOPT options checked as arrays +#8271: app/netdev: application stops working after receiving frames with + assertion or completely without error +#8242: at86rf2xx: Dead lock when sending while receiving +#8199: gcoap example request on tap I/F fails with NIB issue +#8172: gnrc_netif, gnrc_uhcpc: Replacing prefix on border router results in no + configured prefix +#8130: gcoap: can't build with network stacks other than GNRC +#8086: gnrc_rpl_p2p: port to nib and fix compile errors +#7737: pkg: libcoap is partially broken and outdated +#7474: 6lo gnrc fragmentation expects driver to block on TX +#6018: nRF52 gnrc 6lowpan ble memory leak +#5863: OSX + SAMR21-xpro: shell cannot handle command inputs larger than 64 + chars +#5748: gnrc: nodes crashing with too small packet buffer +#5486: at86rf2xx: lost interrupts +#5230: gnrc ipv6: multicast packets are not dispatched to the upper layers +#5051: Forwarding a packet back to its link layer source should not be allowed +#5016: gnrc_rpl: Rejoining RPL instance as root after reboot messes up routing +#4527: gnrc_ipv6: Multicast is not forwarded if routing node listens to the + address + +Timer related issues +-------------------- +#10545: periph_timer: systematic proportional error in timer_set +#10523: saml21 system time vs rtc +#10351: samd21/periph/rtt: Interrupt flags are not correctly cleared +#10073: xtimer_usleep wrong delay time +#9187: sys/newlib: gettimeofday() returns time since boot, not current wall + time. +#9052: misc issues with tests/trickle +#9049: xtimer mis-scaling with long sleep times +#8746: stm32_common/periph/rtc: current implementation broken/poor accuracy +#8388: xtimer_periodic_wakeup is not interrupt safe +#8251: telosb: xtimer config wrong when running on a tmote sky +#7347: xtimer_usleep stuck for small values +#7114: xtimer: add's items to the wrong list if the timer overflows between + _xtimer_now() and irq_disable() +#6442: cpu/native: timer interrupt issue +#6052: tests: xtimer_drift gets stuck +#5338: xtimer: xtimer_now() not ISR safe +#5103: xtimer: weird behavior of tests/xtimer_drift, bug? + +Drivers related issues +---------------------- +#11763: spi_transfer_reg behavior doesn't follow doc +#11104: STM32: SPI clock not returning to idle state and generating additional + clock cycles +#10620: rn2xx3: rn2xx3_write_cmd_no_wait can't be correct +#9546: dht: driver for dht11 sensor sometimes stuck in dht_read() on Atmel SAM + R21 +#9419: cpu/msp430: GPIO driver doesn't work properly +#8213: at86rf2xx: Basic mode and NETOPT_AUTOACK +#8045: stm32/periph/uart: extra byte transmitted on first transmission +#8028: diskio: failed assertion in send_cmd() on lpc2387 +#4876: at86rf2xx: Simultaneous use of different transceiver types is not + supported +#3366: periph/i2c: handle NACK + +Native related issues +--------------------- +#11603: NATIVEINCLUDES Does not include USEMODULE_INCLUDES from + log_printfnoformat +#7206: native: race-condition in IPC +#5796: native: tlsf: early malloc will lead to a crash +#495: native not float safe + +Other platforms related issues +------------------------------ +#10842: Preemption of malloc on AVR +#10258: Incorrect default $PORT building for esp32-wroom-32 on macOS +#10122: Indeterministic hard fault in _mutex_lock(), with nRF52 SoftDevice +#10076: cpu/cortexm_common: irq_enable returns the current state of interrupts + (not previous) +#8408: pkg/fatfs: linker error when build tests/pkg_fatfs_vfs for msb430 based + boards +#8052: mips: several issues +#7753: pic32-wifire: race-condition when linking in concurrent build +#7020: isr_rfcoreerrors while pinging between CC2538DKs +#6567: periph/spi: Switching between CPOL=0,1 problems on Kinetis with software + CS +#5774: cpu: cortexm_common: context switching code breaks when compiling with + LTO +#4954: chronos: compiling with -O0 breaks +#1891: newlib-nano: Printf formatting does not work properly for some numeric + types + +Build system related issues +--------------------------- +#10857: frdm-kw41z: requires newer flasher than openocd `0.10` from `ubuntu- + bionic`. +#10850: Tracking: remove harmful use of `export` in make and immediate + evaluation +#10459: make: `make clean all` does not make sense and should be removed +#10047: Make warns to expect errors when disabling optional modules +#9913: Build dependencies - processing order issues +#9742: `buildtest` uses wrong build directory +#9645: Different build behavior between `murdock` and `riot/riotbuild:latest` + image +#9589: application/Makefile: environment settings after inclusion of + Makefile.include +#8913: make: use of immediate value of variables before they have their final + value +#8122: doxygen: riot.css modified by 'make doc' +#7918: Usage of GCC extension for binary constants +#6120: Windows AVR Mega development makefile Error +#5848: arduino: Race condition in sys/arduino/Makefile.include +#5776: make: Predefining CFLAGS are parsed weirdly +#4053: macros: RIOT_FILE_RELATIVE printing wrong file name for headers +* buildtest with BUILD_IN_DOCKER hides host toolchain errors + +Other issues +------------ +#11861: msba2: floating point tests fail +#11842: buildtest with BUILD_IN_DOCKER hides host toolchain errors +#11820: stm32l152re: hard-fault unless power-cycled after flash, or depending on + optimization +#11691: murdock and tests using `utf-8` characters +#11631: examples / tests: return value of `gnrc_netif_hdr_build()` not checked + in udp.c +#11447: frdm-k64f: hwrng support broken, applications using RNG crash +#11423: cpu/kinetis: features provided not properly defined according to series +#11243: sys/riotboot: documentation issues +#10751: Possible memset optimized out in crypto code +#10731: nanocoap: incomplete response to /.well-known/core request +#10639: sys/stdio_uart: dropped data when received at once +#10510: xtimer_set_msg: crash when using same message for 2 timers +#10175: No error returned from aes_init when a key with a bad size is used +#10121: RIOT cannot compile with the latest version of macOS (10.14) and Xcode + 10 +#9882: sys/tsrb is not thread safe on AVR +#9518: periph/i2c: tracking bugs and untested acks +#9371: assert: c99 static_assert macro doesn't function for multiple + static_asserts in the same scope +#8975: dist/tools/openocd: cannot debug some stlink based boards +#8589: Why using -F in avrdude? +#8436: Kinetis PhyNode: failed to flash binary > 256K +#8107: crypto/ccm: bugs in the implementation of CCM mode +#7220: sys/fmt: Missing tests for fmt_float, fmt_lpad +#6533: tests/lwip target board for python test is hardcoded to native +#5218: some use of asm keyword might be missing volatile +#5009: RIOT is saw-toothing in energy consumption (even when idling) +#4866: periph: GPIO drivers are not thread safe +#4512: pkg: tests: RELIC unittests fail on iotlab-m3 +#4488: Making the newlib thread-safe +#3256: make: Setting constants on compile time doesn't really set them + everywhere +#2346: Tracker: Reduce scope on unintended COMMON variables +#1263: sys: the TLSF implementation contains (a) read-before-write error(s) + +Fixed Issues from the last release (2019.04) +============================================ + +#11626: tests/pkg_semtech-loramac: hardfault on lobaro-lorabox +#11605: ruuvitag: Shell test fails without auto_init +#11530: pkg/semtech_loramac: deadlock with UNCONFIRMED messages +#11525: API change, uart input not working anymore on previously working setups +#11508: core: thread_state_t makes RIOT not compilable on MAC OSX +#11498: Cannot compile OpenThread example without the CLI-APP. +#11494: emcute_mqttsn example setup contains invalid steps +#11344: RTT: `make test` not working +#11274: riotboot_flashwrite: Failure on the nrf52 +#11091: gnrc_minimal on nRF52DK do not work anymore +#11059: board/sltb001a: cannot flash with JLink when 'hello-world' is running + and no error +#11043: boards/z1: tests/rng resets board +#10878: nrfmin can get stuck and never reach RX (while TX works) +#10800: iotlab-m3: thread tests failing +#10559: I2C API write_regs does not fit implementation +#10468: Tinycryt upstream rewrote history in master branch +#8653: msba2: default example fails on assert + +Acknowledgements +================ +We would like to thank all companies that provided us with hardware for porting +and testing RIOT-OS. Further thanks go to companies and institutions that +directly sponsored development time. And finally, big thanks to all of you +contributing in so many different ways to make RIOT worthwhile! +A special thanks to @fjmolinas, @leandrolanzieri, @cladmi, @jia200x, @miri64 +for helping run the release tests + +More information +================ +http://www.riot-os.org + +Mailing lists +------------- +* RIOT OS kernel developers list + devel@riot-os.org (http://lists.riot-os.org/mailman/listinfo/devel) +* RIOT OS users list + users@riot-os.org (http://lists.riot-os.org/mailman/listinfo/users) +* RIOT commits + commits@riot-os.org (http://lists.riot-os.org/mailman/listinfo/commits) +* Github notifications + notifications@riot-os.org (http://lists.riot-os.org/mailman/listinfo/notifications) + +IRC +--- +* Join the RIOT IRC channel at: irc.freenode.net, #riot-os + +License +======= +* The code developed by the RIOT community is licensed under the GNU Lesser + General Public License (LGPL) version 2.1 as published by the Free Software + Foundation. +* Some external sources and packages are published under a separate license. + +All code files contain licensing information. + RIOT-2019.04 - Release Notes ============================ RIOT is a multi-threading operating system which enables soft real-time From 0015d9ce0819749b3cb9deba92594c9eb4605d4b Mon Sep 17 00:00:00 2001 From: MrKevinWeiss Date: Wed, 24 Jul 2019 13:43:38 +0200 Subject: [PATCH 12/15] VERSION: add 2019.07 version file --- VERSION | 1 + 1 file changed, 1 insertion(+) create mode 100644 VERSION diff --git a/VERSION b/VERSION new file mode 100644 index 000000000000..3d845ffb5801 --- /dev/null +++ b/VERSION @@ -0,0 +1 @@ +RIOT_VERSION = 2019.07 From 223921624dccf7a4f180e3c54b7836e2a4d41d3d Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Sat, 7 Sep 2019 19:30:38 -0600 Subject: [PATCH 13/15] Enabled USB CDC-ECM support for hssv-atsamr21-breakout board. --- boards/hssv-atsamr21-breakout/Makefile.dep | 4 ++++ boards/hssv-atsamr21-breakout/Makefile.features | 1 + boards/hssv-atsamr21-breakout/Makefile.include | 3 +++ .../hssv-atsamr21-breakout/include/periph_conf.h | 14 ++++++++++++++ 4 files changed, 22 insertions(+) diff --git a/boards/hssv-atsamr21-breakout/Makefile.dep b/boards/hssv-atsamr21-breakout/Makefile.dep index e556f7fff721..5400ab7b82cf 100644 --- a/boards/hssv-atsamr21-breakout/Makefile.dep +++ b/boards/hssv-atsamr21-breakout/Makefile.dep @@ -1,3 +1,7 @@ ifneq (,$(filter gnrc_netdev_default netdev_default,$(USEMODULE))) USEMODULE += at86rf233 endif + +ifneq (,$(filter usbus_cdc_ecm, $(USEMODULE))) + USEMODULE += auto_init_usbus +endif diff --git a/boards/hssv-atsamr21-breakout/Makefile.features b/boards/hssv-atsamr21-breakout/Makefile.features index b1754cd736b8..8db0cbdb3f00 100644 --- a/boards/hssv-atsamr21-breakout/Makefile.features +++ b/boards/hssv-atsamr21-breakout/Makefile.features @@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_gpio_irq FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_usbdev # The board MPU family (used for grouping by the CI system) FEATURES_MCU_GROUP = cortex_m0_2 diff --git a/boards/hssv-atsamr21-breakout/Makefile.include b/boards/hssv-atsamr21-breakout/Makefile.include index a5a12437609d..9344698fc53a 100644 --- a/boards/hssv-atsamr21-breakout/Makefile.include +++ b/boards/hssv-atsamr21-breakout/Makefile.include @@ -16,4 +16,7 @@ include $(RIOTMAKE)/tools/bossa.inc.mk # enable antenna diversity for this board. CFLAGS += -DAT86RF2XX_DEFAULT_ANT_DIV=\(1\) +# Set the USB VID/PID for this board. +CFLAGS += -DUSB_CONFIG_VID=0x1209 -DUSB_CONFIG_PID=0x053A + include $(RIOTMAKE)/boards/sam0.inc.mk diff --git a/boards/hssv-atsamr21-breakout/include/periph_conf.h b/boards/hssv-atsamr21-breakout/include/periph_conf.h index c597b6c44b41..dd183fa9c794 100644 --- a/boards/hssv-atsamr21-breakout/include/periph_conf.h +++ b/boards/hssv-atsamr21-breakout/include/periph_conf.h @@ -152,6 +152,20 @@ static const spi_conf_t spi_config[] = { #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) /** @} */ +/** + * @name USB peripheral configuration + * @{ + */ +static const sam0_common_usb_config_t sam_usbdev_config[] = { + { + .dm = GPIO_PIN(PA, 24), + .dp = GPIO_PIN(PA, 25), + .d_mux = GPIO_MUX_G, + .device = &USB->DEVICE, + } +}; +/** @} */ + #ifdef __cplusplus } #endif From b20e22ed6a9e3d683b2896b0e76382c465b37c67 Mon Sep 17 00:00:00 2001 From: Joksan Alvarado Date: Sun, 8 Sep 2019 16:54:10 -0600 Subject: [PATCH 14/15] Added the example for the border router based on hssv-atsamr21-breakout with CDC-ECM. --- .../Makefile | 58 +++++++++++++++++++ .../main.c | 43 ++++++++++++++ .../start_network.sh | 48 +++++++++++++++ 3 files changed, 149 insertions(+) create mode 100644 examples/hssv-atsamr21-breakout-border-router/Makefile create mode 100644 examples/hssv-atsamr21-breakout-border-router/main.c create mode 100755 examples/hssv-atsamr21-breakout-border-router/start_network.sh diff --git a/examples/hssv-atsamr21-breakout-border-router/Makefile b/examples/hssv-atsamr21-breakout-border-router/Makefile new file mode 100644 index 000000000000..dd23e07dd2ae --- /dev/null +++ b/examples/hssv-atsamr21-breakout-border-router/Makefile @@ -0,0 +1,58 @@ +#+-------------------------------------------------------------------------------------------------+ +#| GNU Make script for the border router based on hssv-atsamr21-breakout with CDC-ECM. | +#| | +#| This is based on the Makefile from the gnrc_boder_router example. | +#| Modified by: Joksan Alvarado. | +#+-------------------------------------------------------------------------------------------------+ + +# name of your application +APPLICATION = hssv_atsamr21_breakout_border_router + +# If no BOARD is found in the environment, use this default: +BOARD := hssv-atsamr21-breakout + +# This has to be the absolute path to the RIOT base directory: +RIOTBASE ?= $(CURDIR)/../.. + +# Include the USB CDC-ECM network interface. Adjust the amount of network interfaces accordingly. +USEMODULE += usbus_cdc_ecm +GNRC_NETIF_NUMOF := 2 + +# Include packages that pull up and auto-init the link layer. +# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present +USEMODULE += gnrc_netdev_default +USEMODULE += auto_init_gnrc_netif +# Specify the mandatory networking modules for 6LoWPAN border router +USEMODULE += gnrc_sixlowpan_border_router_default +# Add forwarding table +USEMODULE += fib +# Additional networking modules that can be dropped if not needed +USEMODULE += gnrc_icmpv6_echo +# Add also the shell, some shell commands +USEMODULE += shell +USEMODULE += shell_commands +USEMODULE += ps + +# include UHCP client +USEMODULE += gnrc_uhcpc + +# Optionally include RPL as a routing protocol. When includede gnrc_uhcpc will +# configure the node as a RPL DODAG root when receiving a prefix. +#USEMODULE += gnrc_rpl + +# Comment this out to disable code in RIOT that does safety checking +# which is not needed in a production environment but helps in the +# development process: +DEVELHELP ?= 1 + +# radio is IEEE 802.15.4 2.4 GHz +DEFAULT_CHANNEL ?= 26 +CFLAGS += -DIEEE802154_DEFAULT_CHANNEL=$(DEFAULT_CHANNEL) +# CFLAGS += -DIEEE802154_DEFAULT_PANID=0xYOUR_NETWORK_ID + +include $(RIOTBASE)/Makefile.include + +.PHONY: host-tools + +host-tools: + $(Q)env -u CC -u CFLAGS make -C $(RIOTTOOLS) diff --git a/examples/hssv-atsamr21-breakout-border-router/main.c b/examples/hssv-atsamr21-breakout-border-router/main.c new file mode 100644 index 000000000000..654b411a503d --- /dev/null +++ b/examples/hssv-atsamr21-breakout-border-router/main.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup examples + * @{ + * + * @file + * @brief Example application for demonstrating the RIOT network stack + * + * @author Hauke Petersen + * + * @} + */ + +#include + +#include "shell.h" +#include "msg.h" + +#define MAIN_QUEUE_SIZE (8) +static msg_t _main_msg_queue[MAIN_QUEUE_SIZE]; + +int main(void) +{ + /* we need a message queue for the thread running the shell in order to + * receive potentially fast incoming networking packets */ + msg_init_queue(_main_msg_queue, MAIN_QUEUE_SIZE); + puts("RIOT border router example application"); + + /* start shell */ + puts("All up, running the shell now"); + char line_buf[SHELL_DEFAULT_BUFSIZE]; + shell_run(NULL, line_buf, SHELL_DEFAULT_BUFSIZE); + + /* should be never reached */ + return 0; +} diff --git a/examples/hssv-atsamr21-breakout-border-router/start_network.sh b/examples/hssv-atsamr21-breakout-border-router/start_network.sh new file mode 100755 index 000000000000..13fcc459327f --- /dev/null +++ b/examples/hssv-atsamr21-breakout-border-router/start_network.sh @@ -0,0 +1,48 @@ +#+-------------------------------------------------------------------------------------------------+ +#| Host configuration script for the border router based on hssv-atsamr21-breakout with CDC-ECM. | +#| | +#| This is based on the start_network.sh script from ethos. | +#| Modified by: Joksan Alvarado. | +#+-------------------------------------------------------------------------------------------------+ + +#!/bin/sh + +configure_border_interface() { + sysctl -w net.ipv6.conf.${BORDER_IF}.forwarding=1 + sysctl -w net.ipv6.conf.${BORDER_IF}.accept_ra=0 + ip a a fe80::1/64 dev ${BORDER_IF} + ip a a fd00:dead:beef::1/128 dev lo + ip route add ${PREFIX} via fe80::2 dev ${BORDER_IF} +} + +restore_border_interface() { + sysctl -w net.ipv6.conf.${BORDER_IF}.forwarding=0 + sysctl -w net.ipv6.conf.${BORDER_IF}.accept_ra=1 + ip a d fe80::1/64 dev ${BORDER_IF} + ip route del ${PREFIX} via fe80::2 dev ${BORDER_IF} +} + +cleanup() { + echo "Cleaning up..." + restore_border_interface + ip a d fd00:dead:beef::1/128 dev lo + trap "" INT QUIT TERM EXIT +} + +start_uhcpd() { + ${UHCPD} ${BORDER_IF} ${PREFIX} +} + +BORDER_IF=$1 +PREFIX=$2 +UHCPD="$(readlink -f "../../dist/tools/uhcpd/bin")/uhcpd" + +[ -z "${BORDER_IF}" -o -z "${PREFIX}" ] && { + echo "usage: $0 " + exit 1 +} + +trap "cleanup" INT QUIT TERM EXIT + + +configure_border_interface && start_uhcpd From f87ad1ea58f2a18cd1e3ee6ab87f3105dfe9078c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mario=20G=C3=B3mez?= Date: Wed, 11 Sep 2019 17:27:59 -0600 Subject: [PATCH 15/15] Added more device configurations and macros for pin layout --- boards/hssv-atsamr21-breakout/include/board.h | 24 ++++++ .../include/periph_conf.h | 79 +++++++++++++++++++ 2 files changed, 103 insertions(+) diff --git a/boards/hssv-atsamr21-breakout/include/board.h b/boards/hssv-atsamr21-breakout/include/board.h index 89adb8ec503b..b5ded2c2d3a0 100644 --- a/boards/hssv-atsamr21-breakout/include/board.h +++ b/boards/hssv-atsamr21-breakout/include/board.h @@ -32,6 +32,30 @@ extern "C" { */ void board_init(void); +/** + * @brief Define exposed pin aliases + */ +#define HSSV_ATSAMR21_SPI_CS GPIO_PIN(PA, 17) +#define HSSV_ATSAMR21_SPI_MOSI GPIO_PIN(PA, 18) +#define HSSV_ATSAMR21_SPI_MISO GPIO_PIN(PA, 16) +#define HSSV_ATSAMR21_SPI_SCLK GPIO_PIN(PA, 19) +#define HSSV_ATSAMR21_GPIO GPIO_PIN(PA, 28) +#define HSSV_ATSAMR21_RX1 GPIO_PIN(PA, 7) +#define HSSV_ATSAMR21_TX1 GPIO_PIN(PA, 8) +#define HSSV_ATSAMR21_FEM_RX_TX GPIO_PIN(PA, 13) +#define HSSV_ATSAMR21_ANT_DIV_P GPIO_PIN(PA, 12) +//#define HSSV_ATSAMR21_USB_DM GPIO_PIN(PA, 24) +//#define HSSV_ATSAMR21_USB_DP GPIO_PIN(PA, 25) +#define HSSV_ATSAMR21_RX GPIO_PIN(PA, 15) +#define HSSV_ATSAMR21_TX GPIO_PIN(PA, 14) +#define HSSV_ATSAMR21_AREF GPIO_PIN(PA, 4) +#define HSSV_ATSAMR21_ADC2 GPIO_PIN(PA, 5) +#define HSSV_ATSAMR21_ADC1 GPIO_PIN(PA, 6) +//#define HSSV_ATSAMR21_SWCLK GPIO_PIN(PA, 30) +//#define HSSV_ATSAMR21_SWDIO GPIO_PIN(PA, 31) +#define HSSV_ATSAMR21_SCL GPIO_PIN(PA, 23) +#define HSSV_ATSAMR21_SDA GPIO_PIN(PA, 22) + #ifdef __cplusplus } #endif diff --git a/boards/hssv-atsamr21-breakout/include/periph_conf.h b/boards/hssv-atsamr21-breakout/include/periph_conf.h index dd183fa9c794..6f74f3cd6971 100644 --- a/boards/hssv-atsamr21-breakout/include/periph_conf.h +++ b/boards/hssv-atsamr21-breakout/include/periph_conf.h @@ -147,11 +147,90 @@ static const spi_conf_t spi_config[] = { .miso_pad = SPI_PAD_MISO_0, .mosi_pad = SPI_PAD_MOSI_2_SCK_3 }, + { + .dev = &SERCOM1->SPI, + .miso_pin = GPIO_PIN(PA, 18), + .mosi_pin = GPIO_PIN(PA, 16), + .clk_pin = GPIO_PIN(PA, 19), + .miso_mux = GPIO_MUX_C, + .mosi_mux = GPIO_MUX_C, + .clk_mux = GPIO_MUX_C, + .miso_pad = SPI_PAD_MISO_0, + .mosi_pad = SPI_PAD_MOSI_2_SCK_3 + } }; #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) /** @} */ +/** + * @name I2C configuration + * @{ + */ +static const i2c_conf_t i2c_config[] = { + { + .dev = &(SERCOM3->I2CM), + .speed = I2C_SPEED_NORMAL, + .scl_pin = GPIO_PIN(PA, 32), + .sda_pin = GPIO_PIN(PA, 31), + .mux = GPIO_MUX_C, + .gclk_src = GCLK_CLKCTRL_GEN_GCLK0, + .flags = I2C_FLAG_NONE + } +}; +#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0])) +/** @} */ + +/** + * @name RTC configuration + * @{ + */ +#define RTC_NUMOF (1U) +#define RTC_DEV RTC->MODE2 +/** @} */ + +/** + * @name RTT configuration + * @{ + */ +#define RTT_NUMOF (1U) +#define RTT_DEV RTC->MODE0 +#define RTT_IRQ RTC_IRQn +#define RTT_IRQ_PRIO 10 +#define RTT_ISR isr_rtc +#define RTT_MAX_VALUE (0xffffffff) +#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ +#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */ +/** @} */ + +/** + * @name ADC Configuration + * @{ + */ +#define ADC_0_EN 1 +#define ADC_MAX_CHANNELS 14 +/* ADC 0 device configuration */ +#define ADC_0_DEV ADC +#define ADC_0_IRQ ADC_IRQn + +/* ADC 0 Default values */ +#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ +#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV512 + +#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND +#define ADC_0_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X +#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V + +static const adc_conf_chan_t adc_channels[] = { + /* port, pin, muxpos */ + {GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS_PIN5}, + {GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6}, +}; + +#define ADC_0_CHANNELS (2U) +#define ADC_NUMOF ADC_0_CHANNELS +/** @} */ + /** * @name USB peripheral configuration * @{