From 78cbf4fb571bb2831ce97dc612843322b5a067b8 Mon Sep 17 00:00:00 2001 From: emmanuelsearch Date: Sat, 23 Mar 2019 19:57:23 +0100 Subject: [PATCH 1/2] saml1x: Add riotboot support --- boards/common/saml1x/Makefile.features | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/boards/common/saml1x/Makefile.features b/boards/common/saml1x/Makefile.features index fcac28be9e80..02c435fbf3e9 100644 --- a/boards/common/saml1x/Makefile.features +++ b/boards/common/saml1x/Makefile.features @@ -7,6 +7,10 @@ FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_timer FEATURES_PROVIDED += periph_uart +# Put other features on these boards (in alphabetical order) +FEATURES_PROVIDED += riotboot + + # The board MPU family (used for grouping by the CI system) FEATURES_MCU_GROUP = cortex_m23 From 61c793aa4cad72f2edc340f0be144257e5f03286 Mon Sep 17 00:00:00 2001 From: emmanuelsearch Date: Sat, 23 Mar 2019 20:03:01 +0100 Subject: [PATCH 2/2] cpu/cortexm_common: Add image_baseaddr support for Cortex-M23 --- boards/common/saml1x/Makefile.features | 1 - cpu/cortexm_common/include/cpu.h | 5 +++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/boards/common/saml1x/Makefile.features b/boards/common/saml1x/Makefile.features index 02c435fbf3e9..b2cc882d4c08 100644 --- a/boards/common/saml1x/Makefile.features +++ b/boards/common/saml1x/Makefile.features @@ -10,7 +10,6 @@ FEATURES_PROVIDED += periph_uart # Put other features on these boards (in alphabetical order) FEATURES_PROVIDED += riotboot - # The board MPU family (used for grouping by the CI system) FEATURES_MCU_GROUP = cortex_m23 diff --git a/cpu/cortexm_common/include/cpu.h b/cpu/cortexm_common/include/cpu.h index aa1364c49220..676b086ebcca 100644 --- a/cpu/cortexm_common/include/cpu.h +++ b/cpu/cortexm_common/include/cpu.h @@ -217,10 +217,11 @@ static inline void cpu_jump_to_image(uint32_t image_address) __asm("BX %0" :: "r" (destination_address)); } -/* The following register is only present for Cortex-M0+, -M3, -M4 and -M7 CPUs */ +/* The following register is only present for + Cortex-M0+, -M3, -M4, -M7 and -M23 CPUs */ #if defined(CPU_ARCH_CORTEX_M0PLUS) || defined(CPU_ARCH_CORTEX_M3) || \ defined(CPU_ARCH_CORTEX_M4) || defined(CPU_ARCH_CORTEX_M4F) || \ - defined(CPU_ARCH_CORTEX_M7) + defined(CPU_ARCH_CORTEX_M7) || defined(CPU_ARCH_CORTEX_M23) static inline uint32_t cpu_get_image_baseaddr(void) { return SCB->VTOR;