From afc83688cfadfb07c1cd9edc4f3c855d7cf4a261 Mon Sep 17 00:00:00 2001 From: Raul Tambre Date: Sat, 8 Nov 2025 22:20:13 +0200 Subject: [PATCH 01/18] [libc++abi][libunwind] Enable AT&T syntax explicitly (#166818) Implementation files using the Intel syntax typically explicitly specify it. Do the same for the few files where applicable for AT&T. This enables building LLVM with `-mllvm -x86-asm-syntax=intel` in one's Clang config files (i.e. a global preference for Intel syntax). --- libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s | 1 + libunwind/test/remember_state_leak.pass.sh.s | 1 + 2 files changed, 2 insertions(+) diff --git a/libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s b/libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s index e18134cf88639..7f1da22971223 100644 --- a/libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s +++ b/libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s @@ -23,6 +23,7 @@ ## The exception table is modified to use udata4 encoding for LPStart and ## sdata4 encoding for call sites. + .att_syntax .text .globl main # -- Begin function main .p2align 4, 0x90 diff --git a/libunwind/test/remember_state_leak.pass.sh.s b/libunwind/test/remember_state_leak.pass.sh.s index 63beb7e4701ec..d3335cf82290b 100644 --- a/libunwind/test/remember_state_leak.pass.sh.s +++ b/libunwind/test/remember_state_leak.pass.sh.s @@ -38,6 +38,7 @@ SIZEOF_UNWIND_EXCEPTION = 32 + .att_syntax .text callback: xorl %eax, %eax From 3673cc7a4222c6b60d8bb287ca048efa37f61e3b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Storsj=C3=B6?= Date: Sat, 8 Nov 2025 22:24:29 +0200 Subject: [PATCH 02/18] [llvm-rc] Don't interpret integer literals as octal numbers in rc.exe mode (#166915) It turns out that rc.exe doesn't interpret integer literals as octal numbers - but GNU windres does. Previously, llvm-rc did interpret them as octal. Fix the issue by stripping away the leading zeros during tokenization. The alternative (which would be somewhat cleaner, as visible in tokenizer.test) would be to retain them in the RCToken object, but strip them out before calling StringRef::getAsInteger. Alternatively to handle the radix detection locally in llvm-rc code and not rely on getAsInteger to autodetect it. Both of those solutions require propagating the IsWindres flag so that it is available within RCToken, or at least when calling RCToken::intValue(). Fixes: https://github.com/llvm/llvm-project/issues/144723 --- .../tools/llvm-rc/Inputs/octal-in-range.rc | 4 ++ .../llvm-rc/Inputs/octal-out-of-range.rc | 4 ++ llvm/test/tools/llvm-rc/Inputs/tokens.rc | 2 +- llvm/test/tools/llvm-rc/octal.test | 38 ++++++++++++++++ llvm/test/tools/llvm-rc/tokenizer.test | 5 ++- llvm/tools/llvm-rc/ResourceScriptToken.cpp | 44 +++++++++++++++---- llvm/tools/llvm-rc/ResourceScriptToken.h | 2 +- .../tools/llvm-rc/ResourceScriptTokenList.def | 2 +- llvm/tools/llvm-rc/llvm-rc.cpp | 3 +- 9 files changed, 90 insertions(+), 14 deletions(-) create mode 100644 llvm/test/tools/llvm-rc/Inputs/octal-in-range.rc create mode 100644 llvm/test/tools/llvm-rc/Inputs/octal-out-of-range.rc create mode 100644 llvm/test/tools/llvm-rc/octal.test diff --git a/llvm/test/tools/llvm-rc/Inputs/octal-in-range.rc b/llvm/test/tools/llvm-rc/Inputs/octal-in-range.rc new file mode 100644 index 0000000000000..8327ef9be9f5c --- /dev/null +++ b/llvm/test/tools/llvm-rc/Inputs/octal-in-range.rc @@ -0,0 +1,4 @@ +1 VERSIONINFO +FILEVERSION 0010,0010,0010,0010 +BEGIN +END diff --git a/llvm/test/tools/llvm-rc/Inputs/octal-out-of-range.rc b/llvm/test/tools/llvm-rc/Inputs/octal-out-of-range.rc new file mode 100644 index 0000000000000..ce520f245a48d --- /dev/null +++ b/llvm/test/tools/llvm-rc/Inputs/octal-out-of-range.rc @@ -0,0 +1,4 @@ +1 VERSIONINFO +FILEVERSION 9,08,09,1 +BEGIN +END diff --git a/llvm/test/tools/llvm-rc/Inputs/tokens.rc b/llvm/test/tools/llvm-rc/Inputs/tokens.rc index 20f77912477d9..caf01aeff45fe 100644 --- a/llvm/test/tools/llvm-rc/Inputs/tokens.rc +++ b/llvm/test/tools/llvm-rc/Inputs/tokens.rc @@ -1,4 +1,4 @@ -1 + 2 - 3214L & 0x120894 032173 2|&~+(-7){0xabcdef 0xABCDEFl} Begin End +1 + 2 - 3214L & 0x120894 032173 -0042 009 2|&~+(-7){0xabcdef 0xABCDEFl} Begin End 1*3/4 He11o LLVM identifier-with-dashes diff --git a/llvm/test/tools/llvm-rc/octal.test b/llvm/test/tools/llvm-rc/octal.test new file mode 100644 index 0000000000000..686c1fcf1608e --- /dev/null +++ b/llvm/test/tools/llvm-rc/octal.test @@ -0,0 +1,38 @@ +; RUN: llvm-rc -no-preprocess /FO %t.in-range-rc.res -- %p/Inputs/octal-in-range.rc +; RUN: llvm-readobj %t.in-range-rc.res | FileCheck %s --check-prefix=IN-RANGE-RC +; RUN: llvm-windres --no-preprocess %p/Inputs/octal-in-range.rc %t.in-range-windres.res +; RUN: llvm-readobj %t.in-range-windres.res | FileCheck %s --check-prefix=IN-RANGE-WINDRES + +; IN-RANGE-RC: Data: ( +; IN-RANGE-RC-NEXT: 0000: 5C003400 00005600 53005F00 56004500 |\.4...V.S._.V.E.| +; IN-RANGE-RC-NEXT: 0010: 52005300 49004F00 4E005F00 49004E00 |R.S.I.O.N._.I.N.| +; IN-RANGE-RC-NEXT: 0020: 46004F00 00000000 BD04EFFE 00000100 |F.O.............| +; IN-RANGE-RC-NEXT: 0030: 0A000A00 0A000A00 00000000 00000000 |................| +; IN-RANGE-RC-NEXT: 0040: 00000000 00000000 00000000 00000000 |................| +; IN-RANGE-RC-NEXT: 0050: 00000000 00000000 00000000 |............| +; IN-RANGE-RC-NEXT: ) + +; IN-RANGE-WINDRES: Data: ( +; IN-RANGE-WINDRES-NEXT: 0000: 5C003400 00005600 53005F00 56004500 |\.4...V.S._.V.E.| +; IN-RANGE-WINDRES-NEXT: 0010: 52005300 49004F00 4E005F00 49004E00 |R.S.I.O.N._.I.N.| +; IN-RANGE-WINDRES-NEXT: 0020: 46004F00 00000000 BD04EFFE 00000100 |F.O.............| +; IN-RANGE-WINDRES-NEXT: 0030: 08000800 08000800 00000000 00000000 |................| +; IN-RANGE-WINDRES-NEXT: 0040: 00000000 00000000 00000000 00000000 |................| +; IN-RANGE-WINDRES-NEXT: 0050: 00000000 00000000 00000000 |............| +; IN-RANGE-WINDRES-NEXT: ) + +; RUN: llvm-rc -no-preprocess /FO %t.out-of-range-rc.res -- %p/Inputs/octal-out-of-range.rc +; RUN: llvm-readobj %t.out-of-range-rc.res | FileCheck %s --check-prefix=OUT-OF-RANGE-RC +; RUN: not llvm-windres --no-preprocess %p/Inputs/octal-out-of-range.rc %t.out-of-range-windres.res 2>&1 | FileCheck %s --check-prefix OUT-OF-RANGE-WINDRES + +; OUT-OF-RANGE-RC: Data: ( +; OUT-OF-RANGE-RC-NEXT: 0000: 5C003400 00005600 53005F00 56004500 |\.4...V.S._.V.E.| +; OUT-OF-RANGE-RC-NEXT: 0010: 52005300 49004F00 4E005F00 49004E00 |R.S.I.O.N._.I.N.| +; OUT-OF-RANGE-RC-NEXT: 0020: 46004F00 00000000 BD04EFFE 00000100 |F.O.............| +; OUT-OF-RANGE-RC-NEXT: 0030: 08000900 01000900 00000000 00000000 |................| +; OUT-OF-RANGE-RC-NEXT: 0040: 00000000 00000000 00000000 00000000 |................| +; OUT-OF-RANGE-RC-NEXT: 0050: 00000000 00000000 00000000 |............| +; OUT-OF-RANGE-RC-NEXT: ) + + +; OUT-OF-RANGE-WINDRES: llvm-rc: Error parsing file: Integer invalid or too large: 08 diff --git a/llvm/test/tools/llvm-rc/tokenizer.test b/llvm/test/tools/llvm-rc/tokenizer.test index 3062e2bf64629..953b0ca8c1b57 100644 --- a/llvm/test/tools/llvm-rc/tokenizer.test +++ b/llvm/test/tools/llvm-rc/tokenizer.test @@ -9,7 +9,10 @@ ; CHECK-NEXT: Int: 3214L; int value = 3214 ; CHECK-NEXT: Amp: & ; CHECK-NEXT: Int: 0x120894; int value = 1181844 -; CHECK-NEXT: Int: 032173; int value = 13435 +; CHECK-NEXT: Int: 32173; int value = 32173 +; CHECK-NEXT: Minus: - +; CHECK-NEXT: Int: 42; int value = 42 +; CHECK-NEXT: Int: 9; int value = 9 ; CHECK-NEXT: Int: 2; int value = 2 ; CHECK-NEXT: Pipe: | ; CHECK-NEXT: Amp: & diff --git a/llvm/tools/llvm-rc/ResourceScriptToken.cpp b/llvm/tools/llvm-rc/ResourceScriptToken.cpp index 0070037e63e6a..046a1bf78daef 100644 --- a/llvm/tools/llvm-rc/ResourceScriptToken.cpp +++ b/llvm/tools/llvm-rc/ResourceScriptToken.cpp @@ -26,11 +26,11 @@ using namespace llvm; using Kind = RCToken::Kind; // Checks if Representation is a correct description of an RC integer. -// It should be a 32-bit unsigned integer, either decimal, octal (0[0-7]+), -// or hexadecimal (0x[0-9a-f]+). It might be followed by a single 'L' -// character (that is the difference between our representation and -// StringRef's one). If Representation is correct, 'true' is returned and -// the return value is put back in Num. +// It should be a 32-bit unsigned integer, either decimal or hexadecimal +// (0x[0-9a-f]+). For Windres mode, it can also be octal (0[0-7]+). +// It might be followed by a single 'L' character (that is the difference +// between our representation and StringRef's one). If Representation is +// correct, 'true' is returned and the return value is put back in Num. static bool rcGetAsInteger(StringRef Representation, uint32_t &Num) { size_t Length = Representation.size(); if (Length == 0) @@ -95,7 +95,8 @@ namespace { class Tokenizer { public: - Tokenizer(StringRef Input) : Data(Input), DataLength(Input.size()), Pos(0) {} + Tokenizer(StringRef Input, bool IsWindres) + : Data(Input), DataLength(Input.size()), Pos(0), IsWindres(IsWindres) {} Expected> run(); @@ -128,6 +129,7 @@ class Tokenizer { // character. bool canStartInt() const; bool canContinueInt() const; + void trimIntString(StringRef &Str) const; bool canStartString() const; @@ -153,6 +155,7 @@ class Tokenizer { StringRef Data; size_t DataLength, Pos; + bool IsWindres; }; void Tokenizer::skipCurrentLine() { @@ -187,7 +190,12 @@ Expected> Tokenizer::run() { if (TokenKind == Kind::LineComment || TokenKind == Kind::StartComment) continue; - RCToken Token(TokenKind, Data.take_front(Pos).drop_front(TokenStart)); + StringRef Contents = Data.take_front(Pos).drop_front(TokenStart); + + if (TokenKind == Kind::Int) + trimIntString(Contents); + + RCToken Token(TokenKind, Contents); if (TokenKind == Kind::Identifier) { processIdentifier(Token); } else if (TokenKind == Kind::Int) { @@ -366,12 +374,30 @@ void Tokenizer::processIdentifier(RCToken &Token) const { Token = RCToken(Kind::BlockEnd, Name); } +void Tokenizer::trimIntString(StringRef &Str) const { + if (!IsWindres) { + // For compatibility with rc.exe, strip leading zeros that make the + // integer literal interpreted as octal. + // + // We do rely on Stringref::getAsInteger for autodetecting between + // decimal and hexadecimal literals, but we want to avoid interpreting + // literals as octal. + // + // This omits the leading zeros from the RCToken's value string entirely, + // which also has a visible effect when dumping the tokenizer output. + // Alternatively, we could store the IsWindres flag in RCToken and defer + // the trimming to RCToken::intValue. + while (Str.size() >= 2 && Str[0] == '0' && std::isdigit(Str[1])) + Str = Str.drop_front(1); + } +} + } // anonymous namespace namespace llvm { -Expected> tokenizeRC(StringRef Input) { - return Tokenizer(Input).run(); +Expected> tokenizeRC(StringRef Input, bool IsWindres) { + return Tokenizer(Input, IsWindres).run(); } } // namespace llvm diff --git a/llvm/tools/llvm-rc/ResourceScriptToken.h b/llvm/tools/llvm-rc/ResourceScriptToken.h index 3dcdfafd2d576..50ef8e4b00f53 100644 --- a/llvm/tools/llvm-rc/ResourceScriptToken.h +++ b/llvm/tools/llvm-rc/ResourceScriptToken.h @@ -76,7 +76,7 @@ class RCToken { // Tokens returned by this function hold only references to the parts // of the Input. Memory buffer containing Input cannot be freed, // modified or reallocated. -Expected> tokenizeRC(StringRef Input); +Expected> tokenizeRC(StringRef Input, bool IsWindres); } // namespace llvm diff --git a/llvm/tools/llvm-rc/ResourceScriptTokenList.def b/llvm/tools/llvm-rc/ResourceScriptTokenList.def index 6ee13b2815d35..98af23c649577 100644 --- a/llvm/tools/llvm-rc/ResourceScriptTokenList.def +++ b/llvm/tools/llvm-rc/ResourceScriptTokenList.def @@ -14,7 +14,7 @@ // Long tokens. They might consist of more than one character. TOKEN(Invalid) // Invalid token. Should not occur in a valid script. -TOKEN(Int) // Integer (decimal, octal or hexadecimal). +TOKEN(Int) // Integer (decimal or hexadecimal, and possibly octal for windres). TOKEN(String) // String value. TOKEN(Identifier) // Script identifier (resource name or type). TOKEN(LineComment) // Beginning of single-line comment. diff --git a/llvm/tools/llvm-rc/llvm-rc.cpp b/llvm/tools/llvm-rc/llvm-rc.cpp index f623342366515..38bf03f51227b 100644 --- a/llvm/tools/llvm-rc/llvm-rc.cpp +++ b/llvm/tools/llvm-rc/llvm-rc.cpp @@ -619,7 +619,8 @@ void doRc(std::string Src, std::string Dest, RcOptions &Opts, StringRef Contents = FileContents->getBuffer(); std::string FilteredContents = filterCppOutput(Contents); - std::vector Tokens = ExitOnErr(tokenizeRC(FilteredContents)); + std::vector Tokens = + ExitOnErr(tokenizeRC(FilteredContents, Opts.IsWindres)); if (Opts.BeVerbose) { const Twine TokenNames[] = { From 26bb121dfe0b3f52bf8b56353f77752e24321fa6 Mon Sep 17 00:00:00 2001 From: serge-sans-paille Date: Sat, 8 Nov 2025 20:42:00 +0000 Subject: [PATCH 03/18] Remove unused inclusion (#166997) --- llvm/benchmarks/FormatVariadicBM.cpp | 27 +++++++++---------- llvm/include/llvm/AsmParser/SlotMapping.h | 1 - llvm/include/llvm/CGData/OutlinedHashTree.h | 1 - .../Orc/EHFrameRegistrationPlugin.h | 1 - .../llvm/ExecutionEngine/Orc/SectCreate.h | 1 - llvm/include/llvm/MC/MCAssembler.h | 1 - llvm/include/llvm/ObjectYAML/GOFFYAML.h | 1 - llvm/include/llvm/PassInfo.h | 1 - llvm/include/llvm/Support/Mustache.h | 1 - .../llvm/TargetParser/XtensaTargetParser.h | 1 - llvm/lib/CodeGen/DFAPacketizer.cpp | 1 - .../DebugInfo/CodeView/TypeRecordMapping.cpp | 1 - .../ObjCopy/DXContainer/DXContainerObject.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h | 1 - llvm/lib/Target/ARC/ARCMachineFunctionInfo.h | 1 - .../Target/Hexagon/HexagonQFPOptimizer.cpp | 1 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 1 - llvm/lib/Target/NVPTX/NVPTXUtilities.h | 1 - llvm/tools/llc/NewPMDriver.h | 1 - .../llvm-exegesis/lib/X86/X86Counter.cpp | 1 - llvm/tools/llvm-ifs/ErrorCollector.cpp | 1 - llvm/tools/llvm-reduce/TestRunner.h | 1 - .../unittests/ADT/ConcurrentHashtableTest.cpp | 1 - .../DebugInfo/LogicalView/StringPoolTest.cpp | 1 - .../DebugInfo/PDB/NativeSessionTest.cpp | 2 -- .../Orc/MapperJITLinkMemoryManagerTest.cpp | 2 -- .../Orc/SimpleExecutorMemoryManagerTest.cpp | 1 - .../Support/DynamicLibrary/PipSqueak.cpp | 2 ++ .../Support/DynamicLibrary/PipSqueak.h | 2 -- llvm/unittests/TextAPI/TextStubV1Tests.cpp | 1 - llvm/unittests/TextAPI/TextStubV2Tests.cpp | 1 - llvm/unittests/TextAPI/TextStubV4Tests.cpp | 1 - 32 files changed, 15 insertions(+), 47 deletions(-) diff --git a/llvm/benchmarks/FormatVariadicBM.cpp b/llvm/benchmarks/FormatVariadicBM.cpp index c03ead400d0d5..3e851f0975e8b 100644 --- a/llvm/benchmarks/FormatVariadicBM.cpp +++ b/llvm/benchmarks/FormatVariadicBM.cpp @@ -1,17 +1,16 @@ -//===- FormatVariadicBM.cpp - formatv() benchmark ---------- --------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#include "benchmark/benchmark.h" -#include "llvm/Support/FormatVariadic.h" -#include -#include -#include - +//===- FormatVariadicBM.cpp - formatv() benchmark ---------- --------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "benchmark/benchmark.h" +#include "llvm/Support/FormatVariadic.h" +#include +#include + using namespace llvm; using namespace std; diff --git a/llvm/include/llvm/AsmParser/SlotMapping.h b/llvm/include/llvm/AsmParser/SlotMapping.h index 2d2b8d8400bd7..aae2a863babd9 100644 --- a/llvm/include/llvm/AsmParser/SlotMapping.h +++ b/llvm/include/llvm/AsmParser/SlotMapping.h @@ -17,7 +17,6 @@ #include "llvm/AsmParser/NumberedValues.h" #include "llvm/IR/TrackingMDRef.h" #include -#include namespace llvm { diff --git a/llvm/include/llvm/CGData/OutlinedHashTree.h b/llvm/include/llvm/CGData/OutlinedHashTree.h index d994b68f33ee4..8cbc50bc1b9ee 100644 --- a/llvm/include/llvm/CGData/OutlinedHashTree.h +++ b/llvm/include/llvm/CGData/OutlinedHashTree.h @@ -22,7 +22,6 @@ #include "llvm/Support/raw_ostream.h" #include -#include namespace llvm { diff --git a/llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h b/llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h index 7b5d0f0eaba26..9dda1f94c75c7 100644 --- a/llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h +++ b/llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h @@ -18,7 +18,6 @@ #include #include -#include namespace llvm::orc { diff --git a/llvm/include/llvm/ExecutionEngine/Orc/SectCreate.h b/llvm/include/llvm/ExecutionEngine/Orc/SectCreate.h index e6384eb4b6d26..a30890aa17c60 100644 --- a/llvm/include/llvm/ExecutionEngine/Orc/SectCreate.h +++ b/llvm/include/llvm/ExecutionEngine/Orc/SectCreate.h @@ -18,7 +18,6 @@ #include "llvm/Support/Compiler.h" #include -#include namespace llvm::orc { diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h index bbb8bee515258..144f2118e715c 100644 --- a/llvm/include/llvm/MC/MCAssembler.h +++ b/llvm/include/llvm/MC/MCAssembler.h @@ -27,7 +27,6 @@ #include #include #include -#include namespace llvm { diff --git a/llvm/include/llvm/ObjectYAML/GOFFYAML.h b/llvm/include/llvm/ObjectYAML/GOFFYAML.h index f9bf45e95bd3a..74aeade54b8f9 100644 --- a/llvm/include/llvm/ObjectYAML/GOFFYAML.h +++ b/llvm/include/llvm/ObjectYAML/GOFFYAML.h @@ -17,7 +17,6 @@ #include "llvm/BinaryFormat/GOFF.h" #include "llvm/ObjectYAML/YAML.h" #include -#include namespace llvm { diff --git a/llvm/include/llvm/PassInfo.h b/llvm/include/llvm/PassInfo.h index 380d6698d0c80..5734eb8bfb47e 100644 --- a/llvm/include/llvm/PassInfo.h +++ b/llvm/include/llvm/PassInfo.h @@ -15,7 +15,6 @@ #include "llvm/ADT/StringRef.h" #include -#include namespace llvm { diff --git a/llvm/include/llvm/Support/Mustache.h b/llvm/include/llvm/Support/Mustache.h index 83047f2aafff6..76a83f26deab6 100644 --- a/llvm/include/llvm/Support/Mustache.h +++ b/llvm/include/llvm/Support/Mustache.h @@ -78,7 +78,6 @@ #include "llvm/Support/JSON.h" #include "llvm/Support/StringSaver.h" #include -#include namespace llvm::mustache { diff --git a/llvm/include/llvm/TargetParser/XtensaTargetParser.h b/llvm/include/llvm/TargetParser/XtensaTargetParser.h index 828b4079ef328..41369b1d64499 100644 --- a/llvm/include/llvm/TargetParser/XtensaTargetParser.h +++ b/llvm/include/llvm/TargetParser/XtensaTargetParser.h @@ -15,7 +15,6 @@ #define LLVM_TARGETPARSER_XTENSATARGETPARSER_H #include "llvm/TargetParser/Triple.h" -#include namespace llvm { class StringRef; diff --git a/llvm/lib/CodeGen/DFAPacketizer.cpp b/llvm/lib/CodeGen/DFAPacketizer.cpp index c16166a1d5e1c..edbd380eb827b 100644 --- a/llvm/lib/CodeGen/DFAPacketizer.cpp +++ b/llvm/lib/CodeGen/DFAPacketizer.cpp @@ -39,7 +39,6 @@ #include #include #include -#include using namespace llvm; diff --git a/llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp b/llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp index 0bc65f8d0359a..49b7df98957af 100644 --- a/llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp +++ b/llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp @@ -28,7 +28,6 @@ #include #include #include -#include using namespace llvm; using namespace llvm::codeview; diff --git a/llvm/lib/ObjCopy/DXContainer/DXContainerObject.h b/llvm/lib/ObjCopy/DXContainer/DXContainerObject.h index cbb09f5ec8e0d..710ae95e57495 100644 --- a/llvm/lib/ObjCopy/DXContainer/DXContainerObject.h +++ b/llvm/lib/ObjCopy/DXContainer/DXContainerObject.h @@ -12,7 +12,6 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/StringRef.h" #include "llvm/Object/DXContainer.h" -#include namespace llvm { namespace objcopy { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h index aff7096f26d67..0688f07873493 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h @@ -11,7 +11,6 @@ #include "llvm/CodeGen/ScheduleDAGMutation.h" #include -#include namespace llvm { diff --git a/llvm/lib/Target/ARC/ARCMachineFunctionInfo.h b/llvm/lib/Target/ARC/ARCMachineFunctionInfo.h index cace92a2b8fb6..9c21121b382b4 100644 --- a/llvm/lib/Target/ARC/ARCMachineFunctionInfo.h +++ b/llvm/lib/Target/ARC/ARCMachineFunctionInfo.h @@ -14,7 +14,6 @@ #define LLVM_LIB_TARGET_ARC_ARCMACHINEFUNCTIONINFO_H #include "llvm/CodeGen/MachineFunction.h" -#include namespace llvm { diff --git a/llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp b/llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp index 8801f698effe5..6d66237730ded 100644 --- a/llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp @@ -77,7 +77,6 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include -#include #define DEBUG_TYPE "hexagon-qfp-optimizer" diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index 14ca867023e2a..e1b37fd88f44d 100644 --- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -90,7 +90,6 @@ #include #include #include -#include using namespace llvm; diff --git a/llvm/lib/Target/NVPTX/NVPTXUtilities.h b/llvm/lib/Target/NVPTX/NVPTXUtilities.h index 4b5cb30fd3036..d92ae8d7199b0 100644 --- a/llvm/lib/Target/NVPTX/NVPTXUtilities.h +++ b/llvm/lib/Target/NVPTX/NVPTXUtilities.h @@ -27,7 +27,6 @@ #include #include #include -#include namespace llvm { diff --git a/llvm/tools/llc/NewPMDriver.h b/llvm/tools/llc/NewPMDriver.h index c8a60223cb296..0dbd46797dabc 100644 --- a/llvm/tools/llc/NewPMDriver.h +++ b/llvm/tools/llc/NewPMDriver.h @@ -22,7 +22,6 @@ #include "llvm/IR/DiagnosticHandler.h" #include "llvm/Support/CodeGen.h" #include -#include namespace llvm { class Module; diff --git a/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp b/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp index 05b6562a57dc6..9dc6c764599cd 100644 --- a/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp +++ b/llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp @@ -27,7 +27,6 @@ #include #include #include -#include #include #include diff --git a/llvm/tools/llvm-ifs/ErrorCollector.cpp b/llvm/tools/llvm-ifs/ErrorCollector.cpp index 04daa848548e2..7417060a664cc 100644 --- a/llvm/tools/llvm-ifs/ErrorCollector.cpp +++ b/llvm/tools/llvm-ifs/ErrorCollector.cpp @@ -11,7 +11,6 @@ #include "llvm/Support/Error.h" #include "llvm/Support/WithColor.h" #include "llvm/Support/raw_ostream.h" -#include using namespace llvm; using namespace llvm::ifs; diff --git a/llvm/tools/llvm-reduce/TestRunner.h b/llvm/tools/llvm-reduce/TestRunner.h index 930c3248ff105..0218dad263b05 100644 --- a/llvm/tools/llvm-reduce/TestRunner.h +++ b/llvm/tools/llvm-reduce/TestRunner.h @@ -16,7 +16,6 @@ #include "llvm/Support/Path.h" #include "llvm/Support/Program.h" #include "llvm/Target/TargetMachine.h" -#include namespace llvm { diff --git a/llvm/unittests/ADT/ConcurrentHashtableTest.cpp b/llvm/unittests/ADT/ConcurrentHashtableTest.cpp index 1b82df1fbffd0..05c480959142b 100644 --- a/llvm/unittests/ADT/ConcurrentHashtableTest.cpp +++ b/llvm/unittests/ADT/ConcurrentHashtableTest.cpp @@ -14,7 +14,6 @@ #include "gtest/gtest.h" #include #include -#include using namespace llvm; using namespace parallel; diff --git a/llvm/unittests/DebugInfo/LogicalView/StringPoolTest.cpp b/llvm/unittests/DebugInfo/LogicalView/StringPoolTest.cpp index 27ff449c98e64..e4dc77bb72c1c 100644 --- a/llvm/unittests/DebugInfo/LogicalView/StringPoolTest.cpp +++ b/llvm/unittests/DebugInfo/LogicalView/StringPoolTest.cpp @@ -7,7 +7,6 @@ //===----------------------------------------------------------------------===// #include "llvm/DebugInfo/LogicalView/Core/LVStringPool.h" -#include #include "gtest/gtest.h" diff --git a/llvm/unittests/DebugInfo/PDB/NativeSessionTest.cpp b/llvm/unittests/DebugInfo/PDB/NativeSessionTest.cpp index b010b5fce8675..cffaf7c9543fb 100644 --- a/llvm/unittests/DebugInfo/PDB/NativeSessionTest.cpp +++ b/llvm/unittests/DebugInfo/PDB/NativeSessionTest.cpp @@ -19,8 +19,6 @@ #include "gtest/gtest.h" -#include - using namespace llvm; using namespace llvm::pdb; diff --git a/llvm/unittests/ExecutionEngine/Orc/MapperJITLinkMemoryManagerTest.cpp b/llvm/unittests/ExecutionEngine/Orc/MapperJITLinkMemoryManagerTest.cpp index a5269f79fc1e9..566fdb8194852 100644 --- a/llvm/unittests/ExecutionEngine/Orc/MapperJITLinkMemoryManagerTest.cpp +++ b/llvm/unittests/ExecutionEngine/Orc/MapperJITLinkMemoryManagerTest.cpp @@ -13,8 +13,6 @@ #include "llvm/ExecutionEngine/Orc/MemoryMapper.h" #include "llvm/Testing/Support/Error.h" -#include - using namespace llvm; using namespace llvm::jitlink; using namespace llvm::orc; diff --git a/llvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp b/llvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp index 9c6f19c82c998..005c67bcaa0ca 100644 --- a/llvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp +++ b/llvm/unittests/ExecutionEngine/Orc/SimpleExecutorMemoryManagerTest.cpp @@ -11,7 +11,6 @@ #include "gtest/gtest.h" #include -#include using namespace llvm; using namespace llvm::orc; diff --git a/llvm/unittests/Support/DynamicLibrary/PipSqueak.cpp b/llvm/unittests/Support/DynamicLibrary/PipSqueak.cpp index 8ff2c30f4925a..8f115ae9095b8 100644 --- a/llvm/unittests/Support/DynamicLibrary/PipSqueak.cpp +++ b/llvm/unittests/Support/DynamicLibrary/PipSqueak.cpp @@ -8,6 +8,8 @@ #include "PipSqueak.h" +#include + struct Global { std::string *Str; std::vector *Vec; diff --git a/llvm/unittests/Support/DynamicLibrary/PipSqueak.h b/llvm/unittests/Support/DynamicLibrary/PipSqueak.h index dc069ca3d876b..f69c7bfab5531 100644 --- a/llvm/unittests/Support/DynamicLibrary/PipSqueak.h +++ b/llvm/unittests/Support/DynamicLibrary/PipSqueak.h @@ -15,11 +15,9 @@ #pragma warning(disable: 4530) #pragma warning(disable: 4577) #include -#include #pragma warning(pop) #else #include -#include #endif #if defined(_WIN32) || defined(__CYGWIN__) diff --git a/llvm/unittests/TextAPI/TextStubV1Tests.cpp b/llvm/unittests/TextAPI/TextStubV1Tests.cpp index 3778f75294bb1..950e79da77c9e 100644 --- a/llvm/unittests/TextAPI/TextStubV1Tests.cpp +++ b/llvm/unittests/TextAPI/TextStubV1Tests.cpp @@ -12,7 +12,6 @@ #include "llvm/TextAPI/TextAPIWriter.h" #include "gtest/gtest.h" #include -#include using namespace llvm; using namespace llvm::MachO; diff --git a/llvm/unittests/TextAPI/TextStubV2Tests.cpp b/llvm/unittests/TextAPI/TextStubV2Tests.cpp index 11dc0b41b9d22..548f74852dafc 100644 --- a/llvm/unittests/TextAPI/TextStubV2Tests.cpp +++ b/llvm/unittests/TextAPI/TextStubV2Tests.cpp @@ -11,7 +11,6 @@ #include "llvm/TextAPI/TextAPIWriter.h" #include "gtest/gtest.h" #include -#include using namespace llvm; using namespace llvm::MachO; diff --git a/llvm/unittests/TextAPI/TextStubV4Tests.cpp b/llvm/unittests/TextAPI/TextStubV4Tests.cpp index 350ef413964a1..1a10c9119a43c 100644 --- a/llvm/unittests/TextAPI/TextStubV4Tests.cpp +++ b/llvm/unittests/TextAPI/TextStubV4Tests.cpp @@ -12,7 +12,6 @@ #include "llvm/TextAPI/TextAPIWriter.h" #include "gtest/gtest.h" #include -#include using namespace llvm; using namespace llvm::MachO; From 02976f5ffa20bc353e75146f9154df3162179e8b Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 13:09:03 -0800 Subject: [PATCH 04/18] [TableGen] Use "using" instead of "typedef" (NFC) (#167168) Identified with modernize-use-using. --- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 10 +++---- llvm/utils/TableGen/AsmWriterEmitter.cpp | 6 ++--- .../TableGen/Basic/SequenceToOffsetTable.h | 4 +-- llvm/utils/TableGen/CodeGenMapTable.cpp | 6 ++--- .../TableGen/Common/CodeGenDAGPatterns.cpp | 6 ++--- .../TableGen/Common/CodeGenDAGPatterns.h | 6 ++--- llvm/utils/TableGen/Common/CodeGenHwModes.h | 2 +- .../TableGen/Common/CodeGenInstruction.h | 4 +-- .../TableGen/Common/CodeGenRegisters.cpp | 7 +++-- llvm/utils/TableGen/Common/CodeGenRegisters.h | 27 +++++++++---------- .../Common/GlobalISel/GlobalISelMatchTable.h | 10 +++---- llvm/utils/TableGen/Common/InfoByHwMode.cpp | 2 +- llvm/utils/TableGen/Common/InfoByHwMode.h | 8 +++--- llvm/utils/TableGen/FastISelEmitter.cpp | 14 +++++----- llvm/utils/TableGen/InstrInfoEmitter.cpp | 6 ++--- llvm/utils/TableGen/OptionParserEmitter.cpp | 8 +++--- llvm/utils/TableGen/RegisterBankEmitter.cpp | 2 +- llvm/utils/TableGen/RegisterInfoEmitter.cpp | 10 +++---- .../utils/TableGen/SearchableTableEmitter.cpp | 2 +- llvm/utils/TableGen/X86DisassemblerTables.cpp | 4 +-- llvm/utils/TableGen/X86DisassemblerTables.h | 2 +- llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 5 ++-- .../utils/TableGen/X86InstrMappingEmitter.cpp | 8 +++--- 23 files changed, 78 insertions(+), 81 deletions(-) diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp index 9f18a11c236c0..63c9c3bfff169 100644 --- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp +++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp @@ -141,7 +141,7 @@ class AsmMatcherInfo; // RegisterSets can be seen in the outputted AsmMatcher tables occasionally, and // can even affect compiler output (at least seen in diagnostics produced when // all matches fail). So we use a type that sorts them consistently. -typedef std::set RegisterSet; +using RegisterSet = std::set; class AsmMatcherEmitter { const RecordKeeper &Records; @@ -779,8 +779,8 @@ class AsmMatcherInfo { std::vector OperandMatchInfo; /// Map of Register records to their class information. - typedef std::map - RegisterClassesTy; + using RegisterClassesTy = + std::map; RegisterClassesTy RegisterClasses; /// Map of Predicate records to their subtarget information. @@ -1275,7 +1275,7 @@ void AsmMatcherInfo::buildRegisterClasses( const auto &Registers = Target.getRegBank().getRegisters(); auto &RegClassList = Target.getRegBank().getRegClasses(); - typedef std::set RegisterSetSet; + using RegisterSetSet = std::set; // The register sets used for matching. RegisterSetSet RegisterSets; @@ -1515,7 +1515,7 @@ AsmMatcherInfo::AsmMatcherInfo(const Record *asmParser, void AsmMatcherInfo::buildOperandMatchInfo() { /// Map containing a mask with all operands indices that can be found for /// that class inside a instruction. - typedef std::map>> OpClassMaskTy; + using OpClassMaskTy = std::map>>; OpClassMaskTy OpClassMask; bool CallCustomParserForAllOperands = diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp index c8c6c23bea014..8901ecb7210a7 100644 --- a/llvm/utils/TableGen/AsmWriterEmitter.cpp +++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp @@ -814,7 +814,7 @@ static unsigned CountNumOperands(StringRef AsmString, unsigned Variant) { namespace { struct AliasPriorityComparator { - typedef std::pair ValueType; + using ValueType = std::pair; bool operator()(const ValueType &LHS, const ValueType &RHS) const { if (LHS.second == RHS.second) { // We don't actually care about the order, but for consistency it @@ -845,8 +845,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { bool PassSubtarget = AsmWriter->getValueAsInt("PassSubtarget"); // Create a map from the qualified name to a list of potential matches. - typedef std::set, AliasPriorityComparator> - AliasWithPriority; + using AliasWithPriority = + std::set, AliasPriorityComparator>; std::map AliasMap; for (const Record *R : Records.getAllDerivedDefinitions("InstAlias")) { int Priority = R->getValueAsInt("EmitPriority"); diff --git a/llvm/utils/TableGen/Basic/SequenceToOffsetTable.h b/llvm/utils/TableGen/Basic/SequenceToOffsetTable.h index 8da6fbef0672e..761ef1fcf12fe 100644 --- a/llvm/utils/TableGen/Basic/SequenceToOffsetTable.h +++ b/llvm/utils/TableGen/Basic/SequenceToOffsetTable.h @@ -44,7 +44,7 @@ inline void printChar(raw_ostream &OS, char C) { /// @tparam Less A stable comparator for SeqT elements. template > class SequenceToOffsetTable { - typedef typename SeqT::value_type ElemT; + using ElemT = typename SeqT::value_type; // Define a comparator for SeqT that sorts a suffix immediately before a // sequence with that suffix. @@ -58,7 +58,7 @@ class SequenceToOffsetTable { // Keep sequences ordered according to SeqLess so suffixes are easy to find. // Map each sequence to its offset in the table. - typedef std::map SeqMap; + using SeqMap = std::map; // Sequences added so far, with suffixes removed. SeqMap Seqs; diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp index 90f0a2ac8c268..e5025784d304d 100644 --- a/llvm/utils/TableGen/CodeGenMapTable.cpp +++ b/llvm/utils/TableGen/CodeGenMapTable.cpp @@ -84,9 +84,9 @@ #include "llvm/TableGen/Record.h" using namespace llvm; -typedef std::map> InstrRelMapTy; -typedef std::map, std::vector> - RowInstrMapTy; +using InstrRelMapTy = std::map>; +using RowInstrMapTy = + std::map, std::vector>; namespace { diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp index 8076ce2486f56..34355d5d6b743 100644 --- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp @@ -776,7 +776,7 @@ bool TypeInfer::EnforceSameSize(TypeSetByHwMode &A, TypeSetByHwMode &B) { if (B.empty()) Changed |= EnforceAny(B); - typedef SmallSet TypeSizeSet; + using TypeSizeSet = SmallSet; auto NoSize = [](const TypeSizeSet &Sizes, MVT T) -> bool { return !Sizes.contains(T.getSizeInBits()); @@ -4129,7 +4129,7 @@ void CodeGenDAGPatterns::ParseInstructions() { } } -typedef std::pair NameRecord; +using NameRecord = std::pair; static void FindNames(TreePatternNode &P, std::map &Names, @@ -4590,7 +4590,7 @@ void CodeGenDAGPatterns::ExpandHwModeBasedTypes() { } /// Dependent variable map for CodeGenDAGPattern variant generation -typedef StringMap DepVarMap; +using DepVarMap = StringMap; static void FindDepVarsOf(TreePatternNode &N, DepVarMap &DepMap) { if (N.isLeaf()) { diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h index 2ed8d1376b045..aa9a0a442424d 100644 --- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h +++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.h @@ -349,7 +349,7 @@ struct TypeInfer { }; /// Set type used to track multiply used variables in patterns -typedef StringSet<> MultipleUseVarSet; +using MultipleUseVarSet = StringSet<>; /// SDTypeConstraint - This is a discriminated union of constraints, /// corresponding to the SDTypeConstraint tablegen class in Target.td. @@ -1217,13 +1217,13 @@ class CodeGenDAGPatterns { iterator_range ptfs() const { return PatternFragments; } // Patterns to match information. - typedef std::vector::const_iterator ptm_iterator; + using ptm_iterator = std::vector::const_iterator; ptm_iterator ptm_begin() const { return PatternsToMatch.begin(); } ptm_iterator ptm_end() const { return PatternsToMatch.end(); } iterator_range ptms() const { return PatternsToMatch; } /// Parse the Pattern for an instruction, and insert the result in DAGInsts. - typedef std::map DAGInstMap; + using DAGInstMap = std::map; void parseInstructionPattern(CodeGenInstruction &CGI, const ListInit *Pattern, DAGInstMap &DAGInsts); diff --git a/llvm/utils/TableGen/Common/CodeGenHwModes.h b/llvm/utils/TableGen/Common/CodeGenHwModes.h index 5e1b31ae39e43..55062b6ebeb35 100644 --- a/llvm/utils/TableGen/Common/CodeGenHwModes.h +++ b/llvm/utils/TableGen/Common/CodeGenHwModes.h @@ -36,7 +36,7 @@ struct HwMode { struct HwModeSelect { HwModeSelect(const Record *R, CodeGenHwModes &CGH); - typedef std::pair PairType; + using PairType = std::pair; std::vector Items; void dump() const; }; diff --git a/llvm/utils/TableGen/Common/CodeGenInstruction.h b/llvm/utils/TableGen/Common/CodeGenInstruction.h index ed0bfa7098eb7..72958375ab298 100644 --- a/llvm/utils/TableGen/Common/CodeGenInstruction.h +++ b/llvm/utils/TableGen/Common/CodeGenInstruction.h @@ -158,8 +158,8 @@ class CGIOperandList { OperandInfo &back() { return OperandList.back(); } const OperandInfo &back() const { return OperandList.back(); } - typedef std::vector::iterator iterator; - typedef std::vector::const_iterator const_iterator; + using iterator = std::vector::iterator; + using const_iterator = std::vector::const_iterator; iterator begin() { return OperandList.begin(); } const_iterator begin() const { return OperandList.begin(); } iterator end() { return OperandList.end(); } diff --git a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp index 2eb94b7e92674..2f0ff3f59c47c 100644 --- a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp @@ -2163,7 +2163,7 @@ void CodeGenRegBank::computeRegUnitLaneMasks() { CodeGenRegister::RegUnitLaneMaskList RegUnitLaneMasks( RegUnits.count(), LaneBitmask::getAll()); // Iterate through SubRegisters. - typedef CodeGenRegister::SubRegMap SubRegMap; + using SubRegMap = CodeGenRegister::SubRegMap; const SubRegMap &SubRegs = Register.getSubRegs(); for (auto [SubRegIndex, SubReg] : SubRegs) { // Ignore non-leaf subregisters, their lane masks are fully covered by @@ -2282,9 +2282,8 @@ void CodeGenRegBank::inferCommonSubClass(CodeGenRegisterClass *RC) { // void CodeGenRegBank::inferSubClassWithSubReg(CodeGenRegisterClass *RC) { // Map SubRegIndex to set of registers in RC supporting that SubRegIndex. - typedef std::map>> - SubReg2SetMap; + using SubReg2SetMap = std::map>>; // Compute the set of registers supporting each SubRegIndex. SubReg2SetMap SRSets; diff --git a/llvm/utils/TableGen/Common/CodeGenRegisters.h b/llvm/utils/TableGen/Common/CodeGenRegisters.h index 89dac125e3d15..c02d04b648534 100644 --- a/llvm/utils/TableGen/Common/CodeGenRegisters.h +++ b/llvm/utils/TableGen/Common/CodeGenRegisters.h @@ -93,9 +93,8 @@ class CodeGenSubRegIndex { std::string getQualifiedName() const; // Map of composite subreg indices. - typedef std::map>> - CompMap; + using CompMap = + std::map>>; // Returns the subreg index that results from composing this with Idx. // Returns NULL if this and Idx don't compose. @@ -180,8 +179,8 @@ class CodeGenRegister { bool Constant = false; // Map SubRegIndex -> Register. - typedef std::map>> - SubRegMap; + using SubRegMap = + std::map>>; CodeGenRegister(const Record *R, unsigned Enum); @@ -220,7 +219,7 @@ class CodeGenRegister { return SubReg2Idx.lookup(Reg); } - typedef std::vector SuperRegList; + using SuperRegList = std::vector; // Get the list of super-registers in topological order, small to large. // This is valid after computeSubRegs visits all registers during RegBank @@ -248,8 +247,8 @@ class CodeGenRegister { } // List of register units in ascending order. - typedef SparseBitVector<> RegUnitList; - typedef SmallVector RegUnitLaneMaskList; + using RegUnitList = SparseBitVector<>; + using RegUnitLaneMaskList = SmallVector; // How many entries in RegUnitList are native? RegUnitList NativeRegUnits; @@ -281,7 +280,7 @@ class CodeGenRegister { unsigned getWeight(const CodeGenRegBank &RegBank) const; // Canonically ordered set. - typedef std::vector Vec; + using Vec = std::vector; private: bool SubRegsComplete; @@ -590,7 +589,7 @@ struct RegUnit { // Each RegUnitSet is a sorted vector with a name. struct RegUnitSet { - typedef std::vector::const_iterator iterator; + using iterator = std::vector::const_iterator; std::string Name; std::vector Units; @@ -602,7 +601,7 @@ struct RegUnitSet { // Base vector for identifying TopoSigs. The contents uniquely identify a // TopoSig, only computeSuperRegs needs to know how. -typedef SmallVector TopoSigId; +using TopoSigId = SmallVector; // CodeGenRegBank - Represent a target's registers and the relations between // them. @@ -621,8 +620,8 @@ class CodeGenRegBank { CodeGenSubRegIndex *createSubRegIndex(StringRef Name, StringRef NameSpace); - typedef std::map, CodeGenSubRegIndex *> - ConcatIdxMap; + using ConcatIdxMap = + std::map, CodeGenSubRegIndex *>; ConcatIdxMap ConcatIdx; // Registers. @@ -639,7 +638,7 @@ class CodeGenRegBank { // Register classes. std::list RegClasses; DenseMap Def2RC; - typedef std::map RCKeyMap; + using RCKeyMap = std::map; RCKeyMap Key2RC; // Register categories. diff --git a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h index 84dfca46dfbfa..d71fdb450e1a9 100644 --- a/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h +++ b/llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h @@ -528,10 +528,10 @@ class RuleMatcher : public Matcher { ArrayRef SrcLoc; - typedef std::tuple - DefinedComplexPatternSubOperand; - typedef StringMap - DefinedComplexPatternSubOperandMap; + using DefinedComplexPatternSubOperand = + std::tuple; + using DefinedComplexPatternSubOperandMap = + StringMap; /// A map of Symbolic Names to ComplexPattern sub-operands. DefinedComplexPatternSubOperandMap ComplexSubOperands; /// A map used to for multiple referenced error check of ComplexSubOperand. @@ -1775,7 +1775,7 @@ class OneUsePredicateMatcher : public InstructionPredicateMatcher { /// * Has an nsw/nuw flag or doesn't. class InstructionMatcher final : public PredicateListMatcher { protected: - typedef std::vector> OperandVec; + using OperandVec = std::vector>; RuleMatcher &Rule; diff --git a/llvm/utils/TableGen/Common/InfoByHwMode.cpp b/llvm/utils/TableGen/Common/InfoByHwMode.cpp index 2b3155cace9f3..a16fdbb58e788 100644 --- a/llvm/utils/TableGen/Common/InfoByHwMode.cpp +++ b/llvm/utils/TableGen/Common/InfoByHwMode.cpp @@ -174,7 +174,7 @@ bool RegSizeInfoByHwMode::hasStricterSpillThan( } void RegSizeInfoByHwMode::writeToStream(raw_ostream &OS) const { - typedef decltype(Map)::value_type PairType; + using PairType = decltype(Map)::value_type; std::vector Pairs; for (const auto &P : Map) Pairs.push_back(&P); diff --git a/llvm/utils/TableGen/Common/InfoByHwMode.h b/llvm/utils/TableGen/Common/InfoByHwMode.h index c730b7397c173..ef688a6f6b3d1 100644 --- a/llvm/utils/TableGen/Common/InfoByHwMode.h +++ b/llvm/utils/TableGen/Common/InfoByHwMode.h @@ -87,10 +87,10 @@ void union_modes(const InfoByHwMode &A, const InfoByHwMode &B, } template struct InfoByHwMode { - typedef std::map MapType; - typedef typename MapType::value_type PairType; - typedef typename MapType::iterator iterator; - typedef typename MapType::const_iterator const_iterator; + using MapType = std::map; + using PairType = typename MapType::value_type; + using iterator = typename MapType::iterator; + using const_iterator = typename MapType::const_iterator; InfoByHwMode() = default; InfoByHwMode(const MapType &M) : Map(M) {} diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index c4dbb148c72c1..ed05af05572c2 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -71,7 +71,7 @@ class ImmPredicateSet { const TreePredicateFn &getPredicate(unsigned Idx) { return PredsByName[Idx]; } - typedef std::vector::const_iterator iterator; + using iterator = std::vector::const_iterator; iterator begin() const { return PredsByName.begin(); } iterator end() const { return PredsByName.end(); } }; @@ -366,12 +366,12 @@ struct OperandsSignature { class FastISelMap { // A multimap is needed instead of a "plain" map because the key is // the instruction's complexity (an int) and they are not unique. - typedef std::multimap PredMap; - typedef std::map RetPredMap; - typedef std::map TypeRetPredMap; - typedef std::map OpcodeTypeRetPredMap; - typedef std::map - OperandsOpcodeTypeRetPredMap; + using PredMap = std::multimap; + using RetPredMap = std::map; + using TypeRetPredMap = std::map; + using OpcodeTypeRetPredMap = std::map; + using OperandsOpcodeTypeRetPredMap = + std::map; OperandsOpcodeTypeRetPredMap SimplePatterns; diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp index e725de1d9f15f..ee3cd8c20f8e7 100644 --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -68,9 +68,9 @@ class InstrInfoEmitter { void emitEnums(raw_ostream &OS, ArrayRef NumberedInstructions); - typedef std::vector OperandInfoTy; - typedef std::vector OperandInfoListTy; - typedef std::map OperandInfoMapTy; + using OperandInfoTy = std::vector; + using OperandInfoListTy = std::vector; + using OperandInfoMapTy = std::map; /// Generate member functions in the target-specific GenInstrInfo class. /// diff --git a/llvm/utils/TableGen/OptionParserEmitter.cpp b/llvm/utils/TableGen/OptionParserEmitter.cpp index 48ae1a0a92b1c..e2440c110f9f4 100644 --- a/llvm/utils/TableGen/OptionParserEmitter.cpp +++ b/llvm/utils/TableGen/OptionParserEmitter.cpp @@ -266,8 +266,8 @@ static void emitOptionParser(const RecordKeeper &Records, raw_ostream &OS) { emitSourceFileHeader("Option Parsing Definitions", OS); // Generate prefix groups. - typedef SmallVector, 2> PrefixKeyT; - typedef std::map PrefixesT; + using PrefixKeyT = SmallVector, 2>; + using PrefixesT = std::map; PrefixesT Prefixes; Prefixes.try_emplace(PrefixKeyT(), 0); for (const Record &R : llvm::make_pointee_range(Opts)) { @@ -277,8 +277,8 @@ static void emitOptionParser(const RecordKeeper &Records, raw_ostream &OS) { } // Generate sub command groups. - typedef SmallVector SubCommandKeyT; - typedef std::map SubCommandIDsT; + using SubCommandKeyT = SmallVector; + using SubCommandIDsT = std::map; SubCommandIDsT SubCommandIDs; auto PrintSubCommandIdsOffset = [&SubCommandIDs, &OS](const Record &R) { diff --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp index 60aa2d80aee3e..271888ba26820 100644 --- a/llvm/utils/TableGen/RegisterBankEmitter.cpp +++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp @@ -30,7 +30,7 @@ namespace { class RegisterBank { /// A vector of register classes that are included in the register bank. - typedef std::vector RegisterClassesTy; + using RegisterClassesTy = std::vector; private: const Record &TheDef; diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index a67a5a944b1e1..3e6e23ffec115 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -623,8 +623,8 @@ static void printSubRegIndex(raw_ostream &OS, const CodeGenSubRegIndex *Idx) { // The initial value depends on the specific list. The list is terminated by a // 0 differential which means we can't encode repeated elements. -typedef SmallVector DiffVec; -typedef SmallVector MaskVec; +using DiffVec = SmallVector; +using MaskVec = SmallVector; // Fills V with differentials between every two consecutive elements of List. static DiffVec &diffEncode(DiffVec &V, SparseBitVector<> List) { @@ -912,7 +912,7 @@ void RegisterInfoEmitter::runMCDesc(raw_ostream &OS) { auto &SubRegIndices = RegBank.getSubRegIndices(); // The lists of sub-registers and super-registers go in the same array. That // allows us to share suffixes. - typedef std::vector RegVec; + using RegVec = std::vector; // Differentially encoded lists. SequenceToOffsetTable DiffSeqs; @@ -926,7 +926,7 @@ void RegisterInfoEmitter::runMCDesc(raw_ostream &OS) { // Keep track of sub-register names as well. These are not differentially // encoded. - typedef SmallVector SubRegIdxVec; + using SubRegIdxVec = SmallVector; SequenceToOffsetTable>> SubRegIdxSeqs( /*Terminator=*/std::nullopt); SmallVector SubRegIdxLists(Regs.size()); @@ -1348,7 +1348,7 @@ void RegisterInfoEmitter::runTargetDesc(raw_ostream &OS) { // Every bit mask present in the list has at least one bit set. // Compress the sub-reg index lists. - typedef std::vector IdxList; + using IdxList = std::vector; SmallVector SuperRegIdxLists(RegisterClasses.size()); SequenceToOffsetTable>> SuperRegIdxSeqs; BitVector MaskBV(RegisterClasses.size()); diff --git a/llvm/utils/TableGen/SearchableTableEmitter.cpp b/llvm/utils/TableGen/SearchableTableEmitter.cpp index d17d90b452bd7..0dc8c92a5a37a 100644 --- a/llvm/utils/TableGen/SearchableTableEmitter.cpp +++ b/llvm/utils/TableGen/SearchableTableEmitter.cpp @@ -116,7 +116,7 @@ class SearchableTableEmitter { void run(raw_ostream &OS); private: - typedef std::pair SearchTableEntry; + using SearchTableEntry = std::pair; enum TypeContext { TypeInStaticStruct, diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index b8c3c02a9eb3f..483fc58fcfba4 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -864,8 +864,8 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, o << "static const struct OperandSpecifier x86OperandSets[][" << X86_MAX_OPERANDS << "] = {\n"; - typedef SmallVector, X86_MAX_OPERANDS> - OperandListTy; + using OperandListTy = + SmallVector, X86_MAX_OPERANDS>; std::map OperandSets; unsigned OperandSetNum = 0; diff --git a/llvm/utils/TableGen/X86DisassemblerTables.h b/llvm/utils/TableGen/X86DisassemblerTables.h index 0f382741530ce..325bb572b0587 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.h +++ b/llvm/utils/TableGen/X86DisassemblerTables.h @@ -51,7 +51,7 @@ class DisassemblerTables { std::unique_ptr Tables[12]; // Table of ModRM encodings. - typedef std::map, unsigned> ModRMMapTy; + using ModRMMapTy = std::map, unsigned>; mutable ModRMMapTy ModRMTable; /// The instruction information table diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp index 6f523b5a197d3..cbb7f89bee679 100644 --- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp @@ -175,9 +175,8 @@ class X86FoldTablesEmitter { } }; - typedef std::map - FoldTable; + using FoldTable = std::map; // Table2Addr - Holds instructions which their memory form performs // load+store. // diff --git a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp index 2745ba72ba624..9abb1943380f2 100644 --- a/llvm/utils/TableGen/X86InstrMappingEmitter.cpp +++ b/llvm/utils/TableGen/X86InstrMappingEmitter.cpp @@ -35,10 +35,10 @@ class X86InstrMappingEmitter { // to make the search more efficient std::map> CompressedInsts; - typedef std::pair - Entry; - typedef std::map> - PredicateInstMap; + using Entry = + std::pair; + using PredicateInstMap = + std::map>; // Hold all compressed instructions that need to check predicate PredicateInstMap PredicateInsts; From 15e3b49cb8222b62c281373a75990b5004753cad Mon Sep 17 00:00:00 2001 From: nora <48135649+Noratrieb@users.noreply.github.com> Date: Sat, 8 Nov 2025 22:22:27 +0100 Subject: [PATCH 05/18] [llvm] Allow Rust personality name to contain arbitrary prefix (#166095) LLVM needs to figure out the type of EH personality for various reasons. To do this, it currently matches against a hardcoded list of names. In Rust, we would like to mangle our personality function to better support linking multiple Rust standard libraries via staticlib. We have currently mangled all symbols except the personality, which remains unmangled because of this LLVM hardcoding. Instead, this now does a suffix match of the personality name, which will work with the mangling scheme used for these internal symbols (e.g. `_RNvCseCSg29WUqSe_7___rustc12___rust_alloc`). Companion Rust PR: https://github.com/rust-lang/rust/pull/148413 --- llvm/lib/IR/EHPersonalities.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/lib/IR/EHPersonalities.cpp b/llvm/lib/IR/EHPersonalities.cpp index 9297a82e7d2b0..12ae4748e1f4a 100644 --- a/llvm/lib/IR/EHPersonalities.cpp +++ b/llvm/lib/IR/EHPersonalities.cpp @@ -47,7 +47,8 @@ EHPersonality llvm::classifyEHPersonality(const Value *Pers) { .Case("__C_specific_handler", EHPersonality::MSVC_TableSEH) .Case("__CxxFrameHandler3", EHPersonality::MSVC_CXX) .Case("ProcessCLRException", EHPersonality::CoreCLR) - .Case("rust_eh_personality", EHPersonality::Rust) + // Rust mangles its personality function, so we can't test exact equality. + .EndsWith("rust_eh_personality", EHPersonality::Rust) .Case("__gxx_wasm_personality_v0", EHPersonality::Wasm_CXX) .Case("__xlcxx_personality_v1", EHPersonality::XL_CXX) .Case("__zos_cxx_personality_v2", EHPersonality::ZOS_CXX) @@ -77,7 +78,8 @@ StringRef llvm::getEHPersonalityName(EHPersonality Pers) { case EHPersonality::CoreCLR: return "ProcessCLRException"; case EHPersonality::Rust: - return "rust_eh_personality"; + llvm_unreachable( + "Cannot get personality name of Rust personality, since it is mangled"); case EHPersonality::Wasm_CXX: return "__gxx_wasm_personality_v0"; case EHPersonality::XL_CXX: From 0902a6b8ded446e667e1c535d79b29f47abb7d87 Mon Sep 17 00:00:00 2001 From: Walter Lee <49250218+googlewalt@users.noreply.github.com> Date: Sat, 8 Nov 2025 16:37:31 -0500 Subject: [PATCH 06/18] Add missing #include (fix for #166997) --- llvm/lib/TargetParser/XtensaTargetParser.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/llvm/lib/TargetParser/XtensaTargetParser.cpp b/llvm/lib/TargetParser/XtensaTargetParser.cpp index 25725f2688cf3..208722ae06037 100644 --- a/llvm/lib/TargetParser/XtensaTargetParser.cpp +++ b/llvm/lib/TargetParser/XtensaTargetParser.cpp @@ -13,6 +13,7 @@ #include "llvm/TargetParser/XtensaTargetParser.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringSwitch.h" +#include namespace llvm { From 3b219cf42ac4970fc01a4e9d4b428d9689e13f78 Mon Sep 17 00:00:00 2001 From: Florian Hahn Date: Sat, 8 Nov 2025 21:59:38 +0000 Subject: [PATCH 07/18] [LV] Add register pressure test for #164124. Add extra test for https://github.com/llvm/llvm-project/pull/164124 --- .../LoopVectorize/AArch64/reg-usage.ll | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll b/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll index 70685c1c3fe12..d4fb3d70c538d 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll @@ -248,3 +248,30 @@ exit: ; preds = %for.body %result = add nsw i32 %result0, %result1 ret i32 %result } + +define i64 @loop_reduction_and_store_last_element(ptr %src, ptr writeonly %dst) { +; CHECK-LABEL: LV: Checking a loop in 'loop_reduction_and_store_last_element' +; CHECK: LV(REG): VF = 16 +; CHECK-NEXT: LV(REG): Found max usage: 2 item +; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers +; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 16 registers +; CHECK-NEXT: LV(REG): Found invariant usage: 1 item +entry: + br label %loop + +loop: + %iv = phi i32 [ 1, %entry ], [ %iv.next, %loop ] + %red = phi i64 [ 0, %entry ], [ %red.next, %loop ] + %ptr = phi ptr [ %src, %entry ], [ %ptr.next, %loop ] + %iv.next = add nuw i32 %iv, 1 + %ptr.next = getelementptr i8, ptr %ptr, i64 1 + store ptr %ptr, ptr %dst, align 8 + %val = load i8, ptr %ptr, align 1 + %val.ext = zext i8 %val to i64 + %red.next = or i64 %red, %val.ext + %ec = icmp eq i32 %iv.next, 1000 + br i1 %ec, label %exit, label %loop + +exit: + ret i64 %red.next +} From e61a51d0d620bf013173930749d760ad6cb788ed Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 14:44:25 -0800 Subject: [PATCH 08/18] [llvm] Use llvm::find_if and llvm::is_contained (NFC) (#167166) Identified with llvm-use-ranges. --- llvm/include/llvm/Option/OptTable.h | 8 +++----- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 9 ++++----- llvm/lib/Option/OptTable.cpp | 5 ++--- llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp | 5 ++--- llvm/utils/TableGen/OptionParserEmitter.cpp | 6 +++--- 5 files changed, 14 insertions(+), 19 deletions(-) diff --git a/llvm/include/llvm/Option/OptTable.h b/llvm/include/llvm/Option/OptTable.h index f641ca4ac08d3..45083b31c11f4 100644 --- a/llvm/include/llvm/Option/OptTable.h +++ b/llvm/include/llvm/Option/OptTable.h @@ -148,15 +148,13 @@ class LLVM_ABI OptTable { StringRef SubCommand) const { assert(!SubCommand.empty() && "This helper is only for valid registered subcommands."); - auto SCIT = - std::find_if(SubCommands.begin(), SubCommands.end(), - [&](const auto &C) { return SubCommand == C.Name; }); + auto SCIT = llvm::find_if( + SubCommands, [&](const auto &C) { return SubCommand == C.Name; }); assert(SCIT != SubCommands.end() && "This helper is only for valid registered subcommands."); auto SubCommandIDs = CandidateInfo->getSubCommandIDs(SubCommandIDsTable); unsigned CurrentSubCommandID = SCIT - &SubCommands[0]; - return std::find(SubCommandIDs.begin(), SubCommandIDs.end(), - CurrentSubCommandID) != SubCommandIDs.end(); + return llvm::is_contained(SubCommandIDs, CurrentSubCommandID); } private: diff --git a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp index 5ab80e339a1ad..693454e249945 100644 --- a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp +++ b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp @@ -917,11 +917,10 @@ unsigned DWARFVerifier::verifyDebugInfoAttribute(const DWARFDie &Die, } // Check if the offset matches any of the sequence offset. - auto It = - std::find_if(LineTable->Sequences.begin(), LineTable->Sequences.end(), - [SectionOffset](const auto &Sequence) { - return Sequence.StmtSeqOffset == *SectionOffset; - }); + auto It = llvm::find_if(LineTable->Sequences, + [SectionOffset](const auto &Sequence) { + return Sequence.StmtSeqOffset == *SectionOffset; + }); if (It == LineTable->Sequences.end()) ReportError( diff --git a/llvm/lib/Option/OptTable.cpp b/llvm/lib/Option/OptTable.cpp index 14e3b0d60886d..0450b2fd172ef 100644 --- a/llvm/lib/Option/OptTable.cpp +++ b/llvm/lib/Option/OptTable.cpp @@ -756,9 +756,8 @@ void OptTable::internalPrintHelp( // pairs. std::map> GroupedOptionHelp; - auto ActiveSubCommand = - std::find_if(SubCommands.begin(), SubCommands.end(), - [&](const auto &C) { return SubCommand == C.Name; }); + auto ActiveSubCommand = llvm::find_if( + SubCommands, [&](const auto &C) { return SubCommand == C.Name; }); if (!SubCommand.empty()) { assert(ActiveSubCommand != SubCommands.end() && "Not a valid registered subcommand."); diff --git a/llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp b/llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp index 716f5f21302a8..13cfaf3a0345e 100644 --- a/llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp +++ b/llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp @@ -393,9 +393,8 @@ static void RunEliminateNewDuplicatePHINode( } Function *F = M->getFunction("main"); - auto BBIt = std::find_if(F->begin(), F->end(), [](const BasicBlock &Block) { - return Block.getName() == "testbb"; - }); + auto BBIt = llvm::find_if( + *F, [](const BasicBlock &Block) { return Block.getName() == "testbb"; }); ASSERT_NE(BBIt, F->end()); Check(*BBIt, EliminateNewDuplicatePHINodes); } diff --git a/llvm/utils/TableGen/OptionParserEmitter.cpp b/llvm/utils/TableGen/OptionParserEmitter.cpp index e2440c110f9f4..45edde3546f6f 100644 --- a/llvm/utils/TableGen/OptionParserEmitter.cpp +++ b/llvm/utils/TableGen/OptionParserEmitter.cpp @@ -378,9 +378,9 @@ static void emitOptionParser(const RecordKeeper &Records, raw_ostream &OS) { assert((CurIndex == 0 || !SubCommand.empty()) && "Only first subcommand set should be empty!"); for (const auto &SubCommandKey : SubCommand) { - auto It = std::find_if( - SubCommands.begin(), SubCommands.end(), - [&](const Record *R) { return R->getName() == SubCommandKey; }); + auto It = llvm::find_if(SubCommands, [&](const Record *R) { + return R->getName() == SubCommandKey; + }); assert(It != SubCommands.end() && "SubCommand not found"); OS << ", " << std::distance(SubCommands.begin(), It) << " /* '" << SubCommandKey << "' */"; From 0fad7d7494df748e237a46e04962bb74f98ae663 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 14:44:32 -0800 Subject: [PATCH 09/18] [llvm] Use static_assert on getEmptyKey and getTombstoneKey (NFC) (#167167) Note that DenseMapInfo::getEmptyKey() and getTombstoneKey() are constexpr. This patch removes assertion messages as they don't state any more than what's expressed in the assertion condition. Identified with misc-static-assert. --- llvm/include/llvm/Analysis/IRSimilarityIdentifier.h | 9 ++++----- llvm/include/llvm/Transforms/IPO/IROutliner.h | 8 ++++---- llvm/lib/CodeGen/MachineOutliner.cpp | 8 ++++---- 3 files changed, 12 insertions(+), 13 deletions(-) diff --git a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h index 09a8875e1e28c..693777483ade2 100644 --- a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h +++ b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h @@ -509,11 +509,10 @@ struct IRInstructionMapper { : InstDataAllocator(IDA), IDLAllocator(IDLA) { // Make sure that the implementation of DenseMapInfo hasn't // changed. - assert(DenseMapInfo::getEmptyKey() == static_cast(-1) && - "DenseMapInfo's empty key isn't -1!"); - assert(DenseMapInfo::getTombstoneKey() == - static_cast(-2) && - "DenseMapInfo's tombstone key isn't -2!"); + static_assert(DenseMapInfo::getEmptyKey() == + static_cast(-1)); + static_assert(DenseMapInfo::getTombstoneKey() == + static_cast(-2)); IDL = new (IDLAllocator->Allocate()) IRInstructionDataList(); diff --git a/llvm/include/llvm/Transforms/IPO/IROutliner.h b/llvm/include/llvm/Transforms/IPO/IROutliner.h index 28970f7dcdf10..e8275b2d20ade 100644 --- a/llvm/include/llvm/Transforms/IPO/IROutliner.h +++ b/llvm/include/llvm/Transforms/IPO/IROutliner.h @@ -204,10 +204,10 @@ class IROutliner { : getTTI(GTTI), getIRSI(GIRSI), getORE(GORE) { // Check that the DenseMap implementation has not changed. - assert(DenseMapInfo::getEmptyKey() == (unsigned)-1 && - "DenseMapInfo's empty key isn't -1!"); - assert(DenseMapInfo::getTombstoneKey() == (unsigned)-2 && - "DenseMapInfo's tombstone key isn't -2!"); + static_assert(DenseMapInfo::getEmptyKey() == + static_cast(-1)); + static_assert(DenseMapInfo::getTombstoneKey() == + static_cast(-2)); } bool run(Module &M); diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp index 9feb9740de126..9f95c5ee9cbc6 100644 --- a/llvm/lib/CodeGen/MachineOutliner.cpp +++ b/llvm/lib/CodeGen/MachineOutliner.cpp @@ -420,10 +420,10 @@ struct InstructionMapper { InstructionMapper(const MachineModuleInfo &MMI_) : MMI(MMI_) { // Make sure that the implementation of DenseMapInfo hasn't // changed. - assert(DenseMapInfo::getEmptyKey() == (unsigned)-1 && - "DenseMapInfo's empty key isn't -1!"); - assert(DenseMapInfo::getTombstoneKey() == (unsigned)-2 && - "DenseMapInfo's tombstone key isn't -2!"); + static_assert(DenseMapInfo::getEmptyKey() == + static_cast(-1)); + static_assert(DenseMapInfo::getTombstoneKey() == + static_cast(-2)); } }; From 7b1a74cd7910d9ffd387e643a3e6de94ec1d9547 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 14:44:40 -0800 Subject: [PATCH 10/18] [BOLT] Use DenseMap::contains (NFC) (#167169) Identified with readability-container-contains. --- bolt/lib/Core/DebugNames.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bolt/lib/Core/DebugNames.cpp b/bolt/lib/Core/DebugNames.cpp index 6be2c5aa4e6c1..5272d402be7f3 100644 --- a/bolt/lib/Core/DebugNames.cpp +++ b/bolt/lib/Core/DebugNames.cpp @@ -555,7 +555,7 @@ void DWARF5AcceleratorTable::populateAbbrevsMap() { void DWARF5AcceleratorTable::writeEntry(BOLTDWARF5AccelTableData &Entry) { const uint64_t EntryID = getEntryID(Entry); - if (EntryRelativeOffsets.find(EntryID) != EntryRelativeOffsets.end()) + if (EntryRelativeOffsets.contains(EntryID)) EntryRelativeOffsets[EntryID] = EntriesBuffer->size(); const std::optional EntryRet = From 0246f331d4438375389dfbbd8132fb70638ee64f Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 14:44:47 -0800 Subject: [PATCH 11/18] [BinaryFromat] Simplify subscript operators (NFC) (#167170) Identified with readability-simplify-subscript-expr. --- llvm/unittests/BinaryFormat/MsgPackWriterTest.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/unittests/BinaryFormat/MsgPackWriterTest.cpp b/llvm/unittests/BinaryFormat/MsgPackWriterTest.cpp index 3a5ba9af08f6c..dd8826ca6ccd5 100644 --- a/llvm/unittests/BinaryFormat/MsgPackWriterTest.cpp +++ b/llvm/unittests/BinaryFormat/MsgPackWriterTest.cpp @@ -40,7 +40,7 @@ TEST_F(MsgPackWriter, TestWriteFixPositiveInt) { MPWriter.write(u); std::string Output = OStream.str(); EXPECT_EQ(Output.size(), 1u); - EXPECT_EQ(Output.data()[0], static_cast(u)); + EXPECT_EQ(Output[0], static_cast(u)); } } @@ -128,7 +128,7 @@ TEST_F(MsgPackWriter, TestWriteFixNegativeInt) { MPWriter.write(i); std::string Output = OStream.str(); EXPECT_EQ(Output.size(), 1u); - EXPECT_EQ(static_cast(Output.data()[0]), static_cast(i)); + EXPECT_EQ(static_cast(Output[0]), static_cast(i)); } } From 91821ba86607e423cfc0049eccd694153c544d59 Mon Sep 17 00:00:00 2001 From: Men-cotton Date: Sun, 9 Nov 2025 09:39:08 +0900 Subject: [PATCH 12/18] [MLIR] Fix FileCheck annotations and add 32-bit coverage (#167149) Addresses #93154 by ensuring the test RUN/FILECHECK prefixes across `mlir/test/Conversion/FuncToLLVM/` and related files match their expected outputs, and adds an `index-bitwidth=32` variant of `expand-then-convert-to-llvm.mlir` that exercises `@collapse_shape_dynamic_with_non_identity_layout` through the same MemRef-to-LLVM pipeline so the 32-bit layout descriptors are verified. --- .../FuncToLLVM/convert-data-layout.mlir | 6 ++-- .../Conversion/FuncToLLVM/func-memref.mlir | 1 + .../expand-then-convert-to-llvm.mlir | 30 ++++++++++++++++--- .../Func/duplicate-function-elimination.mlir | 2 +- mlir/test/Dialect/OpenACC/ops.mlir | 6 ++-- mlir/test/mlir-tblgen/op-decl-and-defs.td | 7 ++--- 6 files changed, 37 insertions(+), 15 deletions(-) diff --git a/mlir/test/Conversion/FuncToLLVM/convert-data-layout.mlir b/mlir/test/Conversion/FuncToLLVM/convert-data-layout.mlir index cb6bc35d452e1..c16702f0442ba 100644 --- a/mlir/test/Conversion/FuncToLLVM/convert-data-layout.mlir +++ b/mlir/test/Conversion/FuncToLLVM/convert-data-layout.mlir @@ -1,8 +1,8 @@ // RUN: mlir-opt -set-llvm-module-datalayout -convert-func-to-llvm %s | FileCheck %s -// RUN-32: mlir-opt -set-llvm-module-datalayout='data-layout=p:32:32:32' -convert-func-to-llvm %s \ -// RUN-32: | FileCheck %s +// RUN: mlir-opt -set-llvm-module-datalayout='data-layout=p:32:32:32' -convert-func-to-llvm %s \ +// RUN: | FileCheck %s --check-prefix=CHECK-32 // CHECK: module attributes {llvm.data_layout = ""} -// CHECK-32: module attributes {llvm.data_layout ="p:32:32:32"} +// CHECK-32: module attributes {llvm.data_layout = "p:32:32:32"} module {} diff --git a/mlir/test/Conversion/FuncToLLVM/func-memref.mlir b/mlir/test/Conversion/FuncToLLVM/func-memref.mlir index 15a96543eb6b7..16ed4847c0d58 100644 --- a/mlir/test/Conversion/FuncToLLVM/func-memref.mlir +++ b/mlir/test/Conversion/FuncToLLVM/func-memref.mlir @@ -1,5 +1,6 @@ // RUN: mlir-opt -pass-pipeline="builtin.module(func.func(convert-arith-to-llvm),convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" -split-input-file %s | FileCheck %s // RUN: mlir-opt -pass-pipeline="builtin.module(func.func(convert-arith-to-llvm),convert-func-to-llvm{use-bare-ptr-memref-call-conv=1},convert-cf-to-llvm,reconcile-unrealized-casts)" -split-input-file %s | FileCheck %s --check-prefix=BAREPTR +// RUN: mlir-opt -pass-pipeline="builtin.module(func.func(convert-arith-to-llvm{index-bitwidth=32}),convert-func-to-llvm{index-bitwidth=32},convert-cf-to-llvm{index-bitwidth=32},reconcile-unrealized-casts)" -split-input-file %s | FileCheck %s --check-prefix=CHECK32 // BAREPTR-LABEL: func @check_noalias // BAREPTR-SAME: %{{.*}}: !llvm.ptr {llvm.noalias}, %{{.*}}: !llvm.ptr {llvm.noalias} diff --git a/mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir b/mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir index 68c3e9f5e26ec..e0e4a61e821ce 100644 --- a/mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir +++ b/mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir @@ -1,4 +1,5 @@ // RUN: mlir-opt -expand-strided-metadata -finalize-memref-to-llvm -lower-affine -convert-arith-to-llvm -cse %s -split-input-file | FileCheck %s +// RUN: mlir-opt -expand-strided-metadata -finalize-memref-to-llvm='index-bitwidth=32' -lower-affine -convert-arith-to-llvm='index-bitwidth=32' -cse %s -split-input-file | FileCheck %s --check-prefix=CHECK32 // // This test demonstrates a full "memref to llvm" pipeline where // we first expand some of the memref operations (using affine, @@ -441,10 +442,31 @@ func.func @collapse_shape_dynamic_with_non_identity_layout( // CHECK: %[[RES:.*]] = builtin.unrealized_conversion_cast %[[DESC6]] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)> to memref<4x?xf32, strided<[?, ?], offset: ?>> // CHECK: return %[[RES]] : memref<4x?xf32, strided<[?, ?], offset: ?>> // CHECK: } -// CHECK32-LABEL: func @collapse_shape_dynamic_with_non_identity_layout( -// CHECK32: llvm.mlir.constant(1 : index) : i32 -// CHECK32: llvm.mlir.constant(4 : index) : i32 -// CHECK32: llvm.mlir.constant(1 : index) : i32 +// CHECK32-LABEL: func.func @collapse_shape_dynamic_with_non_identity_layout( +// CHECK32-SAME: %[[ARG:.*]]: memref<4x?x?xf32, strided<[?, 4, 1], offset: ?>>) -> memref<4x?xf32, strided<[?, ?], offset: ?>> { +// CHECK32: %[[MEM:.*]] = builtin.unrealized_conversion_cast %[[ARG]] : memref<4x?x?xf32, strided<[?, 4, 1], offset: ?>> to !llvm.struct<(ptr, ptr, i32, array<3 x i32>, array<3 x i32>)> +// CHECK32: %[[BASE_BUFFER:.*]] = llvm.extractvalue %[[MEM]][0] : !llvm.struct<(ptr, ptr, i32, +// CHECK32: %[[ALIGNED_BUFFER:.*]] = llvm.extractvalue %[[MEM]][1] : !llvm.struct<(ptr, ptr, i32, +// CHECK32: %[[OFFSET:.*]] = llvm.extractvalue %[[MEM]][2] : !llvm.struct<(ptr, ptr, i32, array<3 x i32>, array<3 x i32>)> +// CHECK32: %[[SIZE1:.*]] = llvm.extractvalue %[[MEM]][3, 1] : !llvm.struct<(ptr, ptr, i32, array<3 x i32>, array<3 x i32>)> +// CHECK32: %[[SIZE2:.*]] = llvm.extractvalue %[[MEM]][3, 2] : !llvm.struct<(ptr, ptr, i32, array<3 x i32>, array<3 x i32>)> +// CHECK32: %[[STRIDE0:.*]] = llvm.extractvalue %[[MEM]][4, 0] : !llvm.struct<(ptr, ptr, i32, array<3 x i32>, array<3 x i32>)> +// CHECK32: %[[FINAL_SIZE1_I32:.*]] = llvm.mul %[[SIZE1]], %[[SIZE2]] overflow : i32 +// CHECK32: %[[SIZE1_TO_IDX:.*]] = builtin.unrealized_conversion_cast %[[FINAL_SIZE1_I32]] : i32 to index +// CHECK32: %[[FINAL_SIZE1_CAST:.*]] = builtin.unrealized_conversion_cast %[[SIZE1_TO_IDX]] : index to i32 +// CHECK32: %[[DESC:.*]] = llvm.mlir.poison : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[DESC0:.*]] = llvm.insertvalue %[[BASE_BUFFER]], %[[DESC]][0] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[DESC1:.*]] = llvm.insertvalue %[[ALIGNED_BUFFER]], %[[DESC0]][1] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[DESC2:.*]] = llvm.insertvalue %[[OFFSET]], %[[DESC1]][2] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[C4_I32:.*]] = llvm.mlir.constant(4 : index) : i32 +// CHECK32: %[[DESC3:.*]] = llvm.insertvalue %[[C4_I32]], %[[DESC2]][3, 0] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[DESC4:.*]] = llvm.insertvalue %[[STRIDE0]], %[[DESC3]][4, 0] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[DESC5:.*]] = llvm.insertvalue %[[FINAL_SIZE1_CAST]], %[[DESC4]][3, 1] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[C1_I32:.*]] = llvm.mlir.constant(1 : index) : i32 +// CHECK32: %[[DESC6:.*]] = llvm.insertvalue %[[C1_I32]], %[[DESC5]][4, 1] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> +// CHECK32: %[[RES:.*]] = builtin.unrealized_conversion_cast %[[DESC6]] : !llvm.struct<(ptr, ptr, i32, array<2 x i32>, array<2 x i32>)> to memref<4x?xf32, strided<[?, ?], offset: ?>> +// CHECK32: return %[[RES]] : memref<4x?xf32, strided<[?, ?], offset: ?>> +// CHECK32: } // ----- diff --git a/mlir/test/Dialect/Func/duplicate-function-elimination.mlir b/mlir/test/Dialect/Func/duplicate-function-elimination.mlir index 1f8da78b6d63d..bc04e8fa9cd23 100644 --- a/mlir/test/Dialect/Func/duplicate-function-elimination.mlir +++ b/mlir/test/Dialect/Func/duplicate-function-elimination.mlir @@ -1,5 +1,5 @@ // RUN: mlir-opt %s --split-input-file --duplicate-function-elimination | \ -// RUN: FileCheck %s +// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-2,CHECK-3 func.func @identity(%arg0: tensor) -> tensor { return %arg0 : tensor diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir index df8ab9b7dd239..fc11bae60d9e0 100644 --- a/mlir/test/Dialect/OpenACC/ops.mlir +++ b/mlir/test/Dialect/OpenACC/ops.mlir @@ -1,8 +1,8 @@ -// RUN: mlir-opt -split-input-file %s | FileCheck %s +// RUN: mlir-opt -split-input-file %s | FileCheck %s --check-prefixes=CHECK,CHECK-3 // Verify the printed output can be parsed. -// RUN: mlir-opt -split-input-file %s | mlir-opt -split-input-file | FileCheck %s +// RUN: mlir-opt -split-input-file %s | mlir-opt -split-input-file | FileCheck %s --check-prefixes=CHECK,CHECK-3 // Verify the generic form can be parsed. -// RUN: mlir-opt -split-input-file -mlir-print-op-generic %s | mlir-opt -split-input-file | FileCheck %s +// RUN: mlir-opt -split-input-file -mlir-print-op-generic %s | mlir-opt -split-input-file | FileCheck %s --check-prefixes=CHECK,CHECK-3 func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x10xf32>) -> memref<10x10xf32> { %c0 = arith.constant 0 : index diff --git a/mlir/test/mlir-tblgen/op-decl-and-defs.td b/mlir/test/mlir-tblgen/op-decl-and-defs.td index 87b41f9dea995..0e87373b2f6c2 100644 --- a/mlir/test/mlir-tblgen/op-decl-and-defs.td +++ b/mlir/test/mlir-tblgen/op-decl-and-defs.td @@ -65,6 +65,9 @@ def NS_AOp : NS_Op<"a_op", [IsolatedFromAbove, IsolatedFromAbove]> { // CHECK: ::std::optional< ::llvm::APFloat > getSomeAttr2(); // CHECK: ::mlir::Region &getSomeRegion() { // CHECK: ::mlir::RegionRange getSomeRegions() { +// CHECK-NEXT: return odsRegions.drop_front(1); +// CHECK: ::mlir::RegionRange getRegions() { +// CHECK-NEXT: return odsRegions; // CHECK: }; // CHECK: } @@ -152,10 +155,6 @@ def NS_AOp : NS_Op<"a_op", [IsolatedFromAbove, IsolatedFromAbove]> { // Check that `getAttrDictionary()` is used when not using properties. -// DECLS: ::mlir::RegionRange AOpGenericAdaptorBase::getSomeRegions() -// DECLS-NEXT: return odsRegions.drop_front(1); -// DECLS: ::mlir::RegionRange AOpGenericAdaptorBase::getRegions() - // Check AttrSizedOperandSegments // --- From 3bb903e3c0afcc2fb17ebf2b7da127d1595dba56 Mon Sep 17 00:00:00 2001 From: "A. Jiang" Date: Sun, 9 Nov 2025 08:40:39 +0800 Subject: [PATCH 13/18] [libc++] Treat P0513R0 as a defect report against C++11 (#166690) P0513R0 is essentially a collective resolution paper of LWG2543, LWG2791, LWG2809, and LWG2817. Among these LWG issues, LWG2543 (conditionally enabled `hash`) and LWG2817 (`hash`) affect pre-C++17 utilities. We generally backport changes from LWG issues, so this patch backports the relevant parts of P0513R0. Although we provide `hash` as an extension in C++03 mode, as C++03 mode isn't encouraged now, this patch leaves `hash` unchanged in C++03 mode. --- libcxx/docs/Status/Cxx17Papers.csv | 2 +- libcxx/include/__functional/hash.h | 9 --------- .../unord.hash/pointer.pass.cpp | 18 ++++++++---------- .../hash_unique_ptr.pass.cpp | 2 -- libcxx/test/support/poisoned_hash_helper.h | 10 +++------- 5 files changed, 12 insertions(+), 29 deletions(-) diff --git a/libcxx/docs/Status/Cxx17Papers.csv b/libcxx/docs/Status/Cxx17Papers.csv index 1a9d3b08f3ec3..6bb29823d1b9b 100644 --- a/libcxx/docs/Status/Cxx17Papers.csv +++ b/libcxx/docs/Status/Cxx17Papers.csv @@ -84,7 +84,7 @@ "`P0508R0 `__","Wording for GB 58 - structured bindings for node_handles","2016-11 (Issaquah)","|Complete|","7","`#99944 `__","" "`P0509R1 `__","Updating ""Restrictions on exception handling""","2016-11 (Issaquah)","|Nothing To Do|","n/a","`#103676 `__","" "`P0510R0 `__","Disallowing references, incomplete types, arrays, and empty variants","2016-11 (Issaquah)","|Complete|","4","`#103677 `__","" -"`P0513R0 `__","Poisoning the Hash","2016-11 (Issaquah)","|Complete|","5","`#103678 `__","" +"`P0513R0 `__","Poisoning the Hash","2016-11 (Issaquah)","|Complete|","5","`#103678 `__","Implemented as a DR against C++11 since LLVM 22. MSVC STL does the same." "`P0516R0 `__","Clarify That shared_future's Copy Operations have Wide Contracts","2016-11 (Issaquah)","|Complete|","4","`#103679 `__","" "`P0517R0 `__","Make future_error Constructible","2016-11 (Issaquah)","|Complete|","4","`#103680 `__","" "`P0521R0 `__","Proposed Resolution for CA 14 (shared_ptr use_count/unique)","2016-11 (Issaquah)","|Complete|","18","`#103681 `__","" diff --git a/libcxx/include/__functional/hash.h b/libcxx/include/__functional/hash.h index 83bbf1b5e26c3..f74f25fa6e84b 100644 --- a/libcxx/include/__functional/hash.h +++ b/libcxx/include/__functional/hash.h @@ -433,13 +433,10 @@ struct __hash_impl : __scalar_hash { template struct hash : public __hash_impl<_Tp> {}; -#if _LIBCPP_STD_VER >= 17 - template <> struct hash : public __unary_function { _LIBCPP_HIDE_FROM_ABI size_t operator()(nullptr_t) const _NOEXCEPT { return 662607004ull; } }; -#endif #ifndef _LIBCPP_CXX03_LANG template @@ -452,18 +449,12 @@ template > using __has_enabled_hash _LIBCPP_NODEBUG = integral_constant::value && is_default_constructible<_Hash>::value >; -# if _LIBCPP_STD_VER >= 17 template using __enable_hash_helper_imp _LIBCPP_NODEBUG = _Type; template using __enable_hash_helper _LIBCPP_NODEBUG = __enable_hash_helper_imp<_Type, __enable_if_t<__all<__has_enabled_hash<_Keys>::value...>::value> >; -# else -template -using __enable_hash_helper _LIBCPP_NODEBUG = _Type; -# endif - #endif // !_LIBCPP_CXX03_LANG _LIBCPP_END_NAMESPACE_STD diff --git a/libcxx/test/std/utilities/function.objects/unord.hash/pointer.pass.cpp b/libcxx/test/std/utilities/function.objects/unord.hash/pointer.pass.cpp index 448c5ba143c10..ce331e59ffdb5 100644 --- a/libcxx/test/std/utilities/function.objects/unord.hash/pointer.pass.cpp +++ b/libcxx/test/std/utilities/function.objects/unord.hash/pointer.pass.cpp @@ -17,6 +17,8 @@ // size_t operator()(T val) const; // }; +// XFAIL: FROZEN-CXX03-HEADERS-FIXME + // Not very portable #include @@ -44,18 +46,14 @@ test() assert(h(&i) != h(&j)); } -// can't hash nullptr_t until C++17 -void test_nullptr() -{ -#if TEST_STD_VER > 14 - typedef std::nullptr_t T; - typedef std::hash H; +void test_nullptr() { + typedef std::nullptr_t T; + typedef std::hash H; #if TEST_STD_VER <= 17 - static_assert((std::is_same::value), "" ); - static_assert((std::is_same::value), "" ); -#endif - ASSERT_NOEXCEPT(H()(T())); + static_assert((std::is_same::value), ""); + static_assert((std::is_same::value), ""); #endif + ASSERT_NOEXCEPT(H()(T())); } int main(int, char**) diff --git a/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp b/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp index 32fc949354c69..e7540498b8de7 100644 --- a/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp +++ b/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp @@ -90,12 +90,10 @@ int main(int, char**) test_enabled_with_deleter>(); test_enabled_with_deleter>(); -#if TEST_STD_VER > 14 test_disabled_with_deleter>(); test_disabled_with_deleter>(); test_disabled_with_deleter>(); test_disabled_with_deleter>(); -#endif } #endif diff --git a/libcxx/test/support/poisoned_hash_helper.h b/libcxx/test/support/poisoned_hash_helper.h index 93b579d2dfde3..cd71cd70d6a84 100644 --- a/libcxx/test/support/poisoned_hash_helper.h +++ b/libcxx/test/support/poisoned_hash_helper.h @@ -123,13 +123,9 @@ struct Class {}; // Each header that declares the std::hash template provides enabled // specializations of std::hash for std::nullptr_t and all cv-unqualified // arithmetic, enumeration, and pointer types. -#if TEST_STD_VER >= 17 -using MaybeNullptr = types::type_list; -#else -using MaybeNullptr = types::type_list<>; -#endif -using LibraryHashTypes = types:: - concatenate_t, MaybeNullptr>; +using LibraryHashTypes = + types::concatenate_t>; struct TestHashEnabled { template From 188f109490bd18f89bceb3dfb749f2bbb98f32d2 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 17:01:32 -0800 Subject: [PATCH 14/18] [mlir] Remove duplicate includes (NFC) (#167187) Identified with readability-duplicate-include. --- .../Transforms/SparsificationAndBufferizationPass.cpp | 1 - mlir/test/lib/Dialect/Test/TestDialect.cpp | 1 - 2 files changed, 2 deletions(-) diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp index 869d27a443f5d..7e8d3600293f8 100644 --- a/mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp +++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp @@ -22,7 +22,6 @@ #include "mlir/Dialect/Linalg/IR/Linalg.h" #include "mlir/Dialect/SCF/IR/SCF.h" #include "mlir/Dialect/SparseTensor/IR/SparseTensor.h" -#include "mlir/Dialect/SparseTensor/Transforms/Passes.h" #include "mlir/Dialect/Vector/IR/VectorOps.h" #include "mlir/Pass/PassManager.h" #include "mlir/Transforms/Passes.h" diff --git a/mlir/test/lib/Dialect/Test/TestDialect.cpp b/mlir/test/lib/Dialect/Test/TestDialect.cpp index 21d75f58b0a3a..43392d78b37d2 100644 --- a/mlir/test/lib/Dialect/Test/TestDialect.cpp +++ b/mlir/test/lib/Dialect/Test/TestDialect.cpp @@ -37,7 +37,6 @@ #include "llvm/Support/Base64.h" #include "llvm/Support/Casting.h" -#include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Dialect/DLTI/DLTI.h" #include "mlir/Interfaces/FoldInterfaces.h" #include "mlir/Reducer/ReductionPatternInterface.h" From 8628ff3ec0bfa50973fe68a73144c9ad3ed34fbb Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 8 Nov 2025 17:01:40 -0800 Subject: [PATCH 15/18] [ObjectYAML] Remove extraneous .c_str() (NFC) (#167189) maskedBitSetCase takes StringRef, so we can "implicitly cast" std::string to StringRef. Identified with readability-redundant-string-cstr. --- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp index 29f291614ffc6..d07c37edad241 100644 --- a/llvm/lib/ObjectYAML/ELFYAML.cpp +++ b/llvm/lib/ObjectYAML/ELFYAML.cpp @@ -670,7 +670,7 @@ void ScalarBitSetTraits::bitset(IO &IO, for (unsigned K = ELF::EF_AMDGPU_GENERIC_VERSION_MIN; K <= ELF::EF_AMDGPU_GENERIC_VERSION_MAX; ++K) { std::string Key = "EF_AMDGPU_GENERIC_VERSION_V" + std::to_string(K); - IO.maskedBitSetCase(Value, Key.c_str(), + IO.maskedBitSetCase(Value, Key, K << ELF::EF_AMDGPU_GENERIC_VERSION_OFFSET, ELF::EF_AMDGPU_GENERIC_VERSION); } From 32405811bb1a414ef40176b243516631ccd838dc Mon Sep 17 00:00:00 2001 From: Nico Weber Date: Sat, 8 Nov 2025 22:04:04 -0500 Subject: [PATCH 16/18] [gn] port ebb61a5bea (llvm-cas) --- llvm/utils/gn/secondary/llvm/test/BUILD.gn | 7 +++++++ .../gn/secondary/llvm/tools/llvm-cas/BUILD.gn | 16 ++++++++++++++++ 2 files changed, 23 insertions(+) create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-cas/BUILD.gn diff --git a/llvm/utils/gn/secondary/llvm/test/BUILD.gn b/llvm/utils/gn/secondary/llvm/test/BUILD.gn index b297dbd520def..1c91cb8c7eae8 100644 --- a/llvm/utils/gn/secondary/llvm/test/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/test/BUILD.gn @@ -195,6 +195,12 @@ write_lit_config("lit_site_cfg") { extra_values += [ "LLVM_ENABLE_LIBXML2=0" ] # Must be 0. } + if (llvm_enable_ondisk_cas) { + extra_values += [ "LLVM_ENABLE_ONDISK_CAS=1" ] + } else { + extra_values += [ "LLVM_ENABLE_ONDISK_CAS=0" ] # Must be 0. + } + if (llvm_enable_expensive_checks) { extra_values += [ "LLVM_ENABLE_EXPENSIVE_CHECKS=1" ] } else { @@ -265,6 +271,7 @@ group("test") { "//llvm/tools/llvm-as", "//llvm/tools/llvm-bcanalyzer", "//llvm/tools/llvm-c-test", + "//llvm/tools/llvm-cas", "//llvm/tools/llvm-cat", "//llvm/tools/llvm-cfi-verify", "//llvm/tools/llvm-cgdata", diff --git a/llvm/utils/gn/secondary/llvm/tools/llvm-cas/BUILD.gn b/llvm/utils/gn/secondary/llvm/tools/llvm-cas/BUILD.gn new file mode 100644 index 0000000000000..d4cd26a79c3b3 --- /dev/null +++ b/llvm/utils/gn/secondary/llvm/tools/llvm-cas/BUILD.gn @@ -0,0 +1,16 @@ +import("//llvm/utils/TableGen/tablegen.gni") + +tablegen("Options") { + visibility = [ ":llvm-cas" ] + args = [ "-gen-opt-parser-defs" ] +} + +executable("llvm-cas") { + deps = [ + ":Options", + "//llvm/lib/CAS", + "//llvm/lib/Option", + "//llvm/lib/Support", + ] + sources = [ "llvm-cas.cpp" ] +} From 3a8894d7aff1fa4bd2502827c31dad87b5765f4d Mon Sep 17 00:00:00 2001 From: Hristo Hristov Date: Sun, 9 Nov 2025 05:39:36 +0200 Subject: [PATCH 17/18] [libc++][numeric] Marked saturation artithmetic functions as `[[nodiscard]]` (#166898) ...according to Coding Guidelines: *`[[nodiscard]]` should be applied to functions where discarding the return value is most likely a correctness issue.* # References - https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant - https://github.com/llvm/llvm-project/pull/166524#issuecomment-3495567876 Co-authored-by: Hristo Hristov --- .../include/__numeric/saturation_arithmetic.h | 10 +++--- .../test/libcxx/numerics/nodiscard.verify.cpp | 35 +++++++++++++++++++ .../bit/bitops.rot/nodiscard.verify.cpp | 18 ---------- 3 files changed, 40 insertions(+), 23 deletions(-) create mode 100644 libcxx/test/libcxx/numerics/nodiscard.verify.cpp delete mode 100644 libcxx/test/std/numerics/bit/bitops.rot/nodiscard.verify.cpp diff --git a/libcxx/include/__numeric/saturation_arithmetic.h b/libcxx/include/__numeric/saturation_arithmetic.h index 7a7410b5dea08..4491bab2b1479 100644 --- a/libcxx/include/__numeric/saturation_arithmetic.h +++ b/libcxx/include/__numeric/saturation_arithmetic.h @@ -121,27 +121,27 @@ _LIBCPP_HIDE_FROM_ABI constexpr _Rp __saturate_cast(_Tp __x) noexcept { #if _LIBCPP_STD_VER >= 26 template <__signed_or_unsigned_integer _Tp> -_LIBCPP_HIDE_FROM_ABI constexpr _Tp add_sat(_Tp __x, _Tp __y) noexcept { +[[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Tp add_sat(_Tp __x, _Tp __y) noexcept { return std::__add_sat(__x, __y); } template <__signed_or_unsigned_integer _Tp> -_LIBCPP_HIDE_FROM_ABI constexpr _Tp sub_sat(_Tp __x, _Tp __y) noexcept { +[[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Tp sub_sat(_Tp __x, _Tp __y) noexcept { return std::__sub_sat(__x, __y); } template <__signed_or_unsigned_integer _Tp> -_LIBCPP_HIDE_FROM_ABI constexpr _Tp mul_sat(_Tp __x, _Tp __y) noexcept { +[[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Tp mul_sat(_Tp __x, _Tp __y) noexcept { return std::__mul_sat(__x, __y); } template <__signed_or_unsigned_integer _Tp> -_LIBCPP_HIDE_FROM_ABI constexpr _Tp div_sat(_Tp __x, _Tp __y) noexcept { +[[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Tp div_sat(_Tp __x, _Tp __y) noexcept { return std::__div_sat(__x, __y); } template <__signed_or_unsigned_integer _Rp, __signed_or_unsigned_integer _Tp> -_LIBCPP_HIDE_FROM_ABI constexpr _Rp saturate_cast(_Tp __x) noexcept { +[[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Rp saturate_cast(_Tp __x) noexcept { return std::__saturate_cast<_Rp>(__x); } diff --git a/libcxx/test/libcxx/numerics/nodiscard.verify.cpp b/libcxx/test/libcxx/numerics/nodiscard.verify.cpp new file mode 100644 index 0000000000000..10da62feca7c0 --- /dev/null +++ b/libcxx/test/libcxx/numerics/nodiscard.verify.cpp @@ -0,0 +1,35 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +// REQUIRES: std-at-least-c++20 + +// + +// Check that functions are marked [[nodiscard]] + +#include +#include + +#include "test_macros.h" + +void test() { + // [bit.rotate] + std::rotl(0u, 0); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + std::rotr(0u, 0); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + + // clang-format off +#if TEST_STD_VER >= 26 + // [numeric.sat] + std::add_sat(94, 82); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + std::sub_sat(94, 82); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + std::mul_sat(94, 82); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + std::div_sat(94, 82); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} + std::saturate_cast(49); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} +#endif // TEST_STD_VER >= 26 + // clang-format on +} diff --git a/libcxx/test/std/numerics/bit/bitops.rot/nodiscard.verify.cpp b/libcxx/test/std/numerics/bit/bitops.rot/nodiscard.verify.cpp deleted file mode 100644 index 885534a85c3cb..0000000000000 --- a/libcxx/test/std/numerics/bit/bitops.rot/nodiscard.verify.cpp +++ /dev/null @@ -1,18 +0,0 @@ -//===----------------------------------------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -// UNSUPPORTED: c++03, c++11, c++14, c++17 - -// Check that std::rotl and std::rotr are marked [[nodiscard]] - -#include - -void func() { - std::rotl(0u, 0); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} - std::rotr(0u, 0); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}} -} From 4b6a597230020282fe94ee6f476a3aad45fbe9aa Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Sun, 9 Nov 2025 04:00:30 +0000 Subject: [PATCH 18/18] Reapply "[compiler-rt] Default to Lit's Internal Shell" This reverts commit 206a1d2b5b0f7a6a7b8fdf06d067f37677bd13b1. The issues that came up with the last landing have been fixed, so trying this again to see if it sticks this time. --- compiler-rt/test/lit.common.cfg.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/compiler-rt/test/lit.common.cfg.py b/compiler-rt/test/lit.common.cfg.py index 9d2f02189b8bd..1581e4ad15a64 100644 --- a/compiler-rt/test/lit.common.cfg.py +++ b/compiler-rt/test/lit.common.cfg.py @@ -113,6 +113,9 @@ def push_dynamic_library_lookup_path(config, new_path): config.environment[dynamic_library_lookup_var] = new_ld_library_path_64 +# TODO: Consolidate the logic for turning on the internal shell by default for all LLVM test suites. +# See https://github.com/llvm/llvm-project/issues/106636 for more details. +# # Choose between lit's internal shell pipeline runner and a real shell. If # LIT_USE_INTERNAL_SHELL is in the environment, we use that as an override. use_lit_shell = os.environ.get("LIT_USE_INTERNAL_SHELL") @@ -120,9 +123,8 @@ def push_dynamic_library_lookup_path(config, new_path): # 0 is external, "" is default, and everything else is internal. execute_external = use_lit_shell == "0" else: - # Otherwise we default to internal on Windows and external elsewhere, as - # bash on Windows is usually very slow. - execute_external = not sys.platform in ["win32"] + # Otherwise we default to internal everywhere. + execute_external = False # Allow expanding substitutions that are based on other substitutions config.recursiveExpansionLimit = 10