diff --git a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
index ea69470b8fb..c1764b8a777 100644
--- a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
+++ b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
@@ -5987,29 +5987,24 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 		// This is odd since SPU code could just use the FM instruction, but it seems common enough
 		if (auto [ok, data] = get_const_vector(c.value, m_pos); ok)
 		{
-			if (is_spu_float_zero(data, -1))
+			if (is_spu_float_zero(data, 0))
 			{
 				return eval(a * b);
 			}
-
-			if (!m_use_fma && is_spu_float_zero(data, +1))
-			{
-				return eval(a * b + fsplat<f32[4]>(0.f));
-			}
 		}
 
 		if ([&]()
 		{
 			if (auto [ok, data] = get_const_vector(a.value, m_pos); ok)
 			{
-				if (!is_spu_float_zero(data, +1))
+				if (!is_spu_float_zero(data, 0))
 				{
 					return false;
 				}
 
 				if (auto [ok0, data0] = get_const_vector(b.value, m_pos); ok0)
 				{
-					if (is_spu_float_zero(data0, +1))
+					if (is_spu_float_zero(data0, 0))
 					{
 						return true;
 					}
@@ -6018,14 +6013,14 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 
 			if (auto [ok, data] = get_const_vector(a.value, m_pos); ok)
 			{
-				if (!is_spu_float_zero(data, -1))
+				if (!is_spu_float_zero(data, 0))
 				{
 					return false;
 				}
 
 				if (auto [ok0, data0] = get_const_vector(b.value, m_pos); ok0)
 				{
-					if (is_spu_float_zero(data0, -1))
+					if (is_spu_float_zero(data0, 0))
 					{
 						return true;
 					}