From 91d06a97296e5e418fb601284577475d8c7dfbaf Mon Sep 17 00:00:00 2001 From: Eladash Date: Thu, 14 May 2020 15:34:14 +0300 Subject: [PATCH] SPU LLVM: fixup after #8175 (#8214) Mask out RESULT cmd bit, do not create unbound branch blocks. (non-TSX) --- rpcs3/Emu/Cell/PPUThread.cpp | 2 ++ rpcs3/Emu/Cell/SPURecompiler.cpp | 28 ++++++++++++++-------------- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/rpcs3/Emu/Cell/PPUThread.cpp b/rpcs3/Emu/Cell/PPUThread.cpp index 68c6e4423479..73c370b79e77 100644 --- a/rpcs3/Emu/Cell/PPUThread.cpp +++ b/rpcs3/Emu/Cell/PPUThread.cpp @@ -1087,7 +1087,9 @@ static T ppu_load_acquire_reservation(ppu_thread& ppu, u32 addr) } else { + ppu.state += cpu_flag::wait; std::this_thread::yield(); + ppu.check_state(); } } diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp index e2e3ad21d473..af9042e2fa54 100644 --- a/rpcs3/Emu/Cell/SPURecompiler.cpp +++ b/rpcs3/Emu/Cell/SPURecompiler.cpp @@ -5774,20 +5774,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator if (auto ci = llvm::dyn_cast(trunc(val).eval(m_ir))) { - const auto eal = get_reg_fixed(s_reg_mfc_eal); - const auto lsa = get_reg_fixed(s_reg_mfc_lsa); - const auto tag = get_reg_fixed(s_reg_mfc_tag); - - const auto size = get_reg_fixed(s_reg_mfc_size); - const auto mask = m_ir->CreateShl(m_ir->getInt32(1), zext(tag).eval(m_ir)); - const auto exec = llvm::BasicBlock::Create(m_context, "", m_function); - const auto fail = llvm::BasicBlock::Create(m_context, "", m_function); - const auto next = llvm::BasicBlock::Create(m_context, "", m_function); - - const auto pf = spu_ptr(&spu_thread::mfc_fence); - const auto pb = spu_ptr(&spu_thread::mfc_barrier); - - if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK); !g_use_rtm) + if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_RESULT_MASK); !g_use_rtm) { // TODO: don't require TSX (current implementation is TSX-only) if (cmdh == MFC_GET_CMD && g_cfg.core.spu_accurate_putlluc) @@ -5801,6 +5788,19 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator } } + const auto eal = get_reg_fixed(s_reg_mfc_eal); + const auto lsa = get_reg_fixed(s_reg_mfc_lsa); + const auto tag = get_reg_fixed(s_reg_mfc_tag); + + const auto size = get_reg_fixed(s_reg_mfc_size); + const auto mask = m_ir->CreateShl(m_ir->getInt32(1), zext(tag).eval(m_ir)); + const auto exec = llvm::BasicBlock::Create(m_context, "", m_function); + const auto fail = llvm::BasicBlock::Create(m_context, "", m_function); + const auto next = llvm::BasicBlock::Create(m_context, "", m_function); + + const auto pf = spu_ptr(&spu_thread::mfc_fence); + const auto pb = spu_ptr(&spu_thread::mfc_barrier); + switch (u64 cmd = ci->getZExtValue()) { case MFC_GETLLAR_CMD: