From d567b929aadb717df0ee919c8507bcbdb476c788 Mon Sep 17 00:00:00 2001 From: Eladash Date: Sat, 16 Oct 2021 14:44:56 +0300 Subject: [PATCH] PPUDisAsm: Fix MFSPR/MTSPR disassembly --- rpcs3/Emu/Cell/PPUDisAsm.cpp | 4 ++-- rpcs3/Emu/Cell/PPUDisAsm.h | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/rpcs3/Emu/Cell/PPUDisAsm.cpp b/rpcs3/Emu/Cell/PPUDisAsm.cpp index 5c690b7f2da8..1ae59885e535 100644 --- a/rpcs3/Emu/Cell/PPUDisAsm.cpp +++ b/rpcs3/Emu/Cell/PPUDisAsm.cpp @@ -2067,7 +2067,7 @@ void PPUDisAsm::MFSPR(ppu_opcode_t op) case 0x001: DisAsm_R1("mfxer", op.rd); break; case 0x008: DisAsm_R1("mflr", op.rd); break; case 0x009: DisAsm_R1("mfctr", op.rd); break; - default: DisAsm_R1_IMM("mfspr", op.rd, op.spr); break; + default: DisAsm_R1_IMM("mfspr", op.rd, n); break; } } @@ -2175,7 +2175,7 @@ void PPUDisAsm::MTSPR(ppu_opcode_t op) case 0x001: DisAsm_R1("mtxer", op.rs); break; case 0x008: DisAsm_R1("mtlr", op.rs); break; case 0x009: DisAsm_R1("mtctr", op.rs); break; - default: DisAsm_IMM_R1("mtspr", op.spr, op.rs); break; + default: DisAsm_R1_IMM("mtspr", n, op.rs); break; } } diff --git a/rpcs3/Emu/Cell/PPUDisAsm.h b/rpcs3/Emu/Cell/PPUDisAsm.h index 5da64c00bcad..eff5192c1ea5 100644 --- a/rpcs3/Emu/Cell/PPUDisAsm.h +++ b/rpcs3/Emu/Cell/PPUDisAsm.h @@ -72,15 +72,15 @@ class PPUDisAsm final : public PPCDisAsm } void DisAsm_INT1_R2(std::string_view op, u32 i0, u32 r0, u32 r1) { - fmt::append(last_opcode, "%-*s%d,r%d,r%d", PadOp(), op, i0, r0, r1); + fmt::append(last_opcode, "%-*s %d,r%d,r%d", PadOp(), op, i0, r0, r1); } void DisAsm_INT1_R1_IMM(std::string_view op, u32 i0, u32 r0, s32 imm0) { - fmt::append(last_opcode, "%-*s%d,r%d,%s", PadOp(), op, i0, r0, SignedHex(imm0)); + fmt::append(last_opcode, "%-*s %d,r%d,%s", PadOp(), op, i0, r0, SignedHex(imm0)); } void DisAsm_INT1_R1_RC(std::string_view op, u32 i0, u32 r0, u32 rc) { - fmt::append(last_opcode, "%-*s%d,r%d", PadOp(op, rc ? 1 : 0), op, i0, r0); + fmt::append(last_opcode, "%-*s %d,r%d", PadOp(op, rc ? 1 : 0), op, i0, r0); insert_char_if(op, !!rc); } void DisAsm_INT1_R1(std::string_view op, u32 i0, u32 r0) @@ -224,7 +224,7 @@ class PPUDisAsm final : public PPCDisAsm } void DisAsm_IMM_R1(std::string_view op, s32 imm0, u32 r0) { - fmt::append(last_opcode, "%-*s%d,r%d #%x", PadOp(), op, imm0, r0, imm0); + fmt::append(last_opcode, "%-*s %d,r%d #%x", PadOp(), op, imm0, r0, imm0); } void DisAsm_CR1_R1_IMM(std::string_view op, u32 cr0, u32 r0, s32 imm0) { @@ -266,11 +266,11 @@ class PPUDisAsm final : public PPCDisAsm } void DisAsm_INT3(std::string_view op, const int i0, const int i1, const int i2) { - fmt::append(last_opcode, "%-*s%d,%d,%d", PadOp(), op, i0, i1, i2); + fmt::append(last_opcode, "%-*s %d,%d,%d", PadOp(), op, i0, i1, i2); } void DisAsm_INT1(std::string_view op, const int i0) { - fmt::append(last_opcode, "%-*s%d", PadOp(), op, i0); + fmt::append(last_opcode, "%-*s %d", PadOp(), op, i0); } void DisAsm_BRANCH(std::string_view op, const int pc) { @@ -282,7 +282,7 @@ class PPUDisAsm final : public PPCDisAsm } void DisAsm_B2_BRANCH(std::string_view op, u32 b0, u32 b1, const int pc) { - fmt::append(last_opcode, "%-*s%d,%d,0x%x ", PadOp(), op, b0, b1, DisAsmBranchTarget(pc)); + fmt::append(last_opcode, "%-*s %d,%d,0x%x ", PadOp(), op, b0, b1, DisAsmBranchTarget(pc)); } void DisAsm_CR_BRANCH(std::string_view op, u32 cr, const int pc) {