From b6e5c6df8243add9e05fb39dbe60496eb1d2dbb3 Mon Sep 17 00:00:00 2001
From: CYFS <2805686936@qq.com>
Date: Fri, 17 Apr 2026 11:43:20 +0800
Subject: [PATCH]  [bsp][cvitek] fix timer clock frequency for 25MHz crystal

  Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.

  The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
---
 bsp/cvitek/c906_little/board/board.c   | 2 +-
 bsp/cvitek/cv18xx_risc-v/board/board.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsp/cvitek/c906_little/board/board.c b/bsp/cvitek/c906_little/board/board.c
index 31790dcc444..21418d9dce4 100755
--- a/bsp/cvitek/c906_little/board/board.c
+++ b/bsp/cvitek/c906_little/board/board.c
@@ -16,7 +16,7 @@
 
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 {
-    return 245000000ULL;
+    return 25000000ULL;
 }
 
 void rt_hw_board_init(void)
diff --git a/bsp/cvitek/cv18xx_risc-v/board/board.c b/bsp/cvitek/cv18xx_risc-v/board/board.c
index b0c8f0b55d6..6eb309af326 100755
--- a/bsp/cvitek/cv18xx_risc-v/board/board.c
+++ b/bsp/cvitek/cv18xx_risc-v/board/board.c
@@ -48,7 +48,7 @@ struct mem_desc platform_mem_desc[] = {
 
 rt_uint64_t rt_hw_get_clock_timer_freq(void)
 {
-    return 245000000ULL;
+    return 25000000ULL;
 }
 
 void init_bss(void)