diff --git a/bsp/es32f0654/.config b/bsp/es32f0654/.config index 6e404d1fdea..5cb6e5853b2 100644 --- a/bsp/es32f0654/.config +++ b/bsp/es32f0654/.config @@ -94,7 +94,7 @@ CONFIG_FINSH_CMD_SIZE=80 # CONFIG_FINSH_USING_AUTH is not set CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_USING_MSH_DEFAULT=y -# CONFIG_FINSH_USING_MSH_ONLY is not set +CONFIG_FINSH_USING_MSH_ONLY=y CONFIG_FINSH_ARG_MAX=10 # @@ -126,6 +126,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set # # Using WiFi @@ -324,9 +325,22 @@ CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART2=y # CONFIG_BSP_USING_UART3 is not set +# +# SPI Drivers +# +# CONFIG_BSP_USING_SPI0 is not set +# CONFIG_BSP_USING_SPI1 is not set + +# +# I2C Drivers +# +# CONFIG_BSP_USING_I2C0 is not set +# CONFIG_BSP_USING_I2C1 is not set + # # Onboard Peripheral Drivers # +# CONFIG_BSP_USING_SPI_FLASH is not set # # Offboard Peripheral Drivers diff --git a/bsp/es32f0654/README.md b/bsp/es32f0654/README.md index d1436a2a30e..f93d1d3caab 100644 --- a/bsp/es32f0654/README.md +++ b/bsp/es32f0654/README.md @@ -32,11 +32,15 @@ ES-PDS-ES32F0654-V1.0 本 BSP 目前对外设的支持情况如下： | **板载外设** | **支持情况** | **备注** | -| :---------------- | :----------: | :------------------------------------ | -| GPIO | 支持 | 54 GPIOs | -| UART | 支持 | UART0/1/2/3 | +| :---------------- | :----------: | :------------------------------------| +| SPI FLASH | 支持 | | | **片上外设** | **支持情况** | **备注** | +| :---------------- | :----------: | :------------------------------------| +| GPIO | 支持 | 54 GPIOs | +| UART | 支持 | UART0/1/2/3 | +| SPI | 支持 | SPI0/1 | +| I2C | 支持 | I2C0/1 | | **扩展模块** | **支持情况** | **备注** | diff --git a/bsp/es32f0654/applications/main.c b/bsp/es32f0654/applications/main.c index ad340b6989c..fd331eb8d9d 100644 --- a/bsp/es32f0654/applications/main.c +++ b/bsp/es32f0654/applications/main.c @@ -1,12 +1,11 @@ /* - * File : main.c * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2019-01-28 wangyq first implementation + * 2019-01-28 wangyq the first version */ #include diff --git a/bsp/es32f0654/drivers/Kconfig b/bsp/es32f0654/drivers/Kconfig index e175649d018..90d69f81835 100644 --- a/bsp/es32f0654/drivers/Kconfig +++ b/bsp/es32f0654/drivers/Kconfig @@ -28,10 +28,43 @@ menu "Hardware Drivers Config" default n endmenu + menu "SPI Drivers" + config BSP_USING_SPI0 + bool "Enable SPI0 BUS PB03/PB04/PB05(CLK/MISO/MOSI)" + select RT_USING_SPI + select RT_USING_PIN + default n + + config BSP_USING_SPI1 + bool "Enable SPI1 BUS PB13/PB14/PB15(CLK/MISO/MOSI)" + select RT_USING_SPI + select RT_USING_PIN + default n + endmenu + + menu "I2C Drivers" + config BSP_USING_I2C0 + bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)" + select RT_USING_I2C + default n + config BSP_USING_I2C1 + bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)" + select RT_USING_I2C + default n + endmenu + endmenu menu "Onboard Peripheral Drivers" + config BSP_USING_SPI_FLASH + bool "Enable SPI FLASH (W25Q64 spi0)" + select BSP_USING_SPI + select BSP_USING_SPI0 + select RT_USING_SFUD + select RT_SFUD_USING_SFDP + default n + endmenu menu "Offboard Peripheral Drivers" diff --git a/bsp/es32f0654/drivers/SConscript b/bsp/es32f0654/drivers/SConscript index 81e6b3f8e28..10b6261688f 100644 --- a/bsp/es32f0654/drivers/SConscript +++ b/bsp/es32f0654/drivers/SConscript @@ -7,11 +7,25 @@ src = Split(''' board.c ''') -# add gpio drivers. +# add gpio code if GetDepend('RT_USING_PIN'): src += ['drv_gpio.c'] -if GetDepend(['RT_USING_SERIAL']): - src += ['drv_usart.c'] + +# add serial driver code +if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'): + src += ['drv_uart.c'] + +# add spi driver code +if GetDepend('BSP_USING_SPI0') or GetDepend('BSP_USING_SPI1'): + src += ['drv_spi.c'] + +# add i2c driver code +if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'): + src += ['drv_i2c.c'] + +# add spi flash driver code +if GetDepend('BSP_USING_SPI_FLASH'): + src += ['drv_spiflash.c'] CPPPATH = [cwd] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/es32f0654/drivers/board.c b/bsp/es32f0654/drivers/board.c index cb177829e24..9c4098fda67 100644 --- a/bsp/es32f0654/drivers/board.c +++ b/bsp/es32f0654/drivers/board.c @@ -1,5 +1,4 @@ /* - * File : board.c * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 @@ -12,7 +11,7 @@ #include #include #include "board.h" -#include "drv_usart.h" +#include "drv_uart.h" #include "drv_gpio.h" #include #include diff --git a/bsp/es32f0654/drivers/board.h b/bsp/es32f0654/drivers/board.h index 5b27f1208b3..08c221a2d97 100644 --- a/bsp/es32f0654/drivers/board.h +++ b/bsp/es32f0654/drivers/board.h @@ -1,5 +1,4 @@ /* - * File : board.h * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 diff --git a/bsp/es32f0654/drivers/drv_gpio.c b/bsp/es32f0654/drivers/drv_gpio.c index 09171d93aed..2f4fa29292e 100644 --- a/bsp/es32f0654/drivers/drv_gpio.c +++ b/bsp/es32f0654/drivers/drv_gpio.c @@ -1,5 +1,4 @@ /* - * File : drv_gpio.c * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 diff --git a/bsp/es32f0654/drivers/drv_gpio.h b/bsp/es32f0654/drivers/drv_gpio.h index 869300b792f..3032af51ba5 100644 --- a/bsp/es32f0654/drivers/drv_gpio.h +++ b/bsp/es32f0654/drivers/drv_gpio.h @@ -1,5 +1,4 @@ /* - * File : drv_gpio.h * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 diff --git a/bsp/es32f0654/drivers/drv_i2c.c b/bsp/es32f0654/drivers/drv_i2c.c new file mode 100644 index 00000000000..671ede7bbea --- /dev/null +++ b/bsp/es32f0654/drivers/drv_i2c.c @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-01-24 wangyq the first version + */ + +#include +#include +#include +#include "board.h" +#include "drv_i2c.h" +#include +#include + +#ifdef RT_USING_I2C + +#define TIMEOUT 0x0FFF + +/*define i2c Instance*/ +struct rt_i2c_bus_device _i2c_device0; +struct rt_i2c_bus_device _i2c_device1; +i2c_handle_t _h_i2c0, _h_i2c1; + +static void _i2c_init(void) +{ + gpio_init_t gpio_instruct; //i2c function init + + /* Initialize I2C Pin*/ + gpio_instruct.mode = GPIO_MODE_OUTPUT; + gpio_instruct.odos = GPIO_PUSH_PULL; + gpio_instruct.pupd = GPIO_PUSH_UP; + gpio_instruct.odrv = GPIO_OUT_DRIVE_NORMAL; + gpio_instruct.flt = GPIO_FILTER_DISABLE; + gpio_instruct.type = GPIO_TYPE_CMOS; + gpio_instruct.func = GPIO_FUNC_5; + +#ifdef BSP_USING_I2C0 + /* Initialize I2C Function */ + _h_i2c0.perh = I2C0; + _h_i2c0.init.clk_speed = 100000; + _h_i2c0.init.duty = I2C_DUTYCYCLE_2; + _h_i2c0.init.own_addr1 = 0x0A; + _h_i2c0.init.addr_mode = I2C_ADDR_7BIT; + _h_i2c0.init.general_call = I2C_GENERALCALL_DISABLE; + _h_i2c0.init.no_stretch = I2C_NOSTRETCH_ENABLE; + + i2c_reset(&_h_i2c0); + i2c_init(&_h_i2c0); + /* I2C0_SCL->PB8, I2C0_SDA->PB9 */ + gpio_init(GPIOB, GPIO_PIN_8 | GPIO_PIN_9, &gpio_instruct); +#endif/*BSP_USING_I2C0*/ + +#ifdef BSP_USING_I2C1 + /* Initialize i2c function */ + _h_i2c1.perh = I2C1; + _h_i2c1.init.clk_speed = 100000; + _h_i2c1.init.duty = I2C_DUTYCYCLE_2; + _h_i2c1.init.own_addr1 = 0xA0; + _h_i2c1.init.addr_mode = I2C_ADDR_7BIT; + _h_i2c1.init.general_call = I2C_GENERALCALL_DISABLE; + _h_i2c1.init.no_stretch = I2C_NOSTRETCH_ENABLE; + + i2c_reset(&_h_i2c1); + i2c_init(&_h_i2c1); + /* I2C1_SCL->PB10, I2C1_SDA->PB11 */ + gpio_init(GPIOB, GPIO_PIN_10 | GPIO_PIN_11, &gpio_instruct); +#endif/*BSP_USING_I2C1*/ +} + +static rt_size_t es32f0_master_xfer(struct rt_i2c_bus_device *bus, + struct rt_i2c_msg msgs[], + rt_uint32_t num) +{ + struct rt_i2c_msg *msg; + rt_uint32_t i; + rt_err_t ret = RT_ERROR; + + for (i = 0; i < num; i++) + { + msg = &msgs[i]; + if (msg->flags & RT_I2C_RD) + { + if (i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0) + { + i2c_dbg("i2c bus write failed,i2c bus stop!\n"); + goto out; + } + } + else + { + if (i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0) + { + i2c_dbg("i2c bus write failed,i2c bus stop!\n"); + goto out; + } + } + } + + ret = i; + +out: + i2c_dbg("send stop condition\n"); + + return ret; +} + +const struct rt_i2c_bus_device_ops es32f0_i2c_ops = +{ + es32f0_master_xfer, + RT_NULL, + RT_NULL, +}; + +int rt_hw_i2c_init(void) +{ + _i2c_init(); + +#ifdef BSP_USING_I2C0 + rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device)); + _i2c_device0.ops = &es32f0_i2c_ops; + _i2c_device0.priv = &_h_i2c0; + rt_i2c_bus_device_register(&_i2c_device0, "i2c0"); +#endif + +#ifdef BSP_USING_I2C1 + rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device)); + _i2c_device1.ops = &es32f0_i2c_ops; + _i2c_device1.priv = &_h_i2c1; + rt_i2c_bus_device_register(&_i2c_device1, "i2c1"); +#endif + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_i2c_init); +/* end of i2c driver */ +#endif diff --git a/bsp/es32f0654/drivers/drv_i2c.h b/bsp/es32f0654/drivers/drv_i2c.h new file mode 100644 index 00000000000..84c32561c8b --- /dev/null +++ b/bsp/es32f0654/drivers/drv_i2c.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-01-24 wangyq the first version + */ + +#ifndef DRV_I2C_H__ +#define DRV_I2C_H__ + +int rt_hw_i2c_init(void); + +#endif diff --git a/bsp/es32f0654/drivers/drv_spi.c b/bsp/es32f0654/drivers/drv_spi.c new file mode 100644 index 00000000000..bd57d5c1ac7 --- /dev/null +++ b/bsp/es32f0654/drivers/drv_spi.c @@ -0,0 +1,273 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-01-24 wangyq the first version + */ + +#include +#include +#include +#include +#include "board.h" +#include "drv_spi.h" +#include +#include +#include + +#ifdef RT_USING_SPI + +#define SPITIMEOUT 0x0FFF + +rt_err_t spi_configure(struct rt_spi_device *device, + struct rt_spi_configuration *cfg) +{ + spi_handle_t *hspi; + hspi = (spi_handle_t *)device->bus->parent.user_data; + + if (cfg->mode & RT_SPI_SLAVE) + { + hspi->init.mode = SPI_MODE_SLAVER; + } + else + { + hspi->init.mode = SPI_MODE_MASTER; + } + if (cfg->mode & RT_SPI_3WIRE) + { + hspi->init.dir = SPI_DIRECTION_1LINE; + } + else + { + hspi->init.dir = SPI_DIRECTION_2LINES; + } + if (cfg->data_width == 8) + { + hspi->init.data_size = SPI_DATA_SIZE_8; + } + else if (cfg->data_width == 16) + { + hspi->init.data_size = SPI_DATA_SIZE_16; + } + + if (cfg->mode & RT_SPI_CPHA) + { + hspi->init.phase = SPI_CPHA_SECOND; + } + else + { + hspi->init.phase = SPI_CPHA_FIRST; + } + if (cfg->mode & RT_SPI_CPOL) + { + hspi->init.polarity = SPI_CPOL_HIGH; + } + else + { + hspi->init.polarity = SPI_CPOL_LOW; + } + if (cfg->mode & RT_SPI_NO_CS) + { + hspi->init.ss_en = DISABLE; + } + else + { + hspi->init.ss_en = ENABLE; + } + if (cfg->max_hz >= cmu_get_pclk1_clock() / 2) + { + hspi->init.baud = SPI_BAUD_2; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 4) + { + hspi->init.baud = SPI_BAUD_4; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 8) + { + hspi->init.baud = SPI_BAUD_8; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 16) + { + hspi->init.baud = SPI_BAUD_16; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 32) + { + hspi->init.baud = SPI_BAUD_32; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 64) + { + hspi->init.baud = SPI_BAUD_64; + } + else if (cfg->max_hz >= cmu_get_pclk1_clock() / 128) + { + hspi->init.baud = SPI_BAUD_128; + } + else + { + hspi->init.baud = SPI_BAUD_256; + } + spi_init(hspi); + return RT_EOK; +} + +static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message) +{ + rt_err_t res; + spi_handle_t *hspi; + struct es32f0_hw_spi_cs *cs; + + RT_ASSERT(device != RT_NULL); + RT_ASSERT(device->bus != RT_NULL); + RT_ASSERT(device->bus->parent.user_data != RT_NULL); + RT_ASSERT(message->send_buf != RT_NULL || message->recv_buf != RT_NULL); + + hspi = (spi_handle_t *)device->bus->parent.user_data; + cs = device->parent.user_data; + + /***only send data*****/ + if (message->recv_buf == RT_NULL) + { + if (message->cs_take) + { + rt_pin_write(cs->pin, 0); + } + res = spi_send(hspi, (rt_uint8_t *)message->send_buf, (rt_int32_t)message->length, SPITIMEOUT); + if (message->cs_release) + { + rt_pin_write(cs->pin, 1); + } + if (res != RT_EOK) + return RT_ERROR; + } + + /***only receive data*****/ + if (message->send_buf == RT_NULL) + { + if (message->cs_take) + { + rt_pin_write(cs->pin, 0); + } + res = spi_recv(hspi, (rt_uint8_t *)message->recv_buf, (rt_int32_t)message->length, SPITIMEOUT); + if (message->cs_release) + { + rt_pin_write(cs->pin, 1); + } + if (res != RT_EOK) + return RT_ERROR; + } + + /***send & receive*****/ + else + { + if (message->cs_take) + { + rt_pin_write(cs->pin, 0); + } + res = spi_send_recv(hspi, (rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf, + (rt_int32_t)message->length, SPITIMEOUT); + if (message->cs_release) + { + rt_pin_write(cs->pin, 1); + } + if (res != RT_EOK) + return RT_ERROR; + } + + return message->length; +} + +const struct rt_spi_ops es32f0_spi_ops = +{ + spi_configure, + spixfer, +}; + +struct rt_spi_bus _spi_bus0, _spi_bus1; +spi_handle_t _spi0, _spi1; +int es32f0_spi_register_bus(SPI_TypeDef *SPIx, const char *name) +{ + struct rt_spi_bus *spi_bus; + spi_handle_t *spi; + gpio_init_t gpio_instruct; + + if (SPIx == SPI0) + { + _spi0.perh = SPI0; + spi_bus = &_spi_bus0; + spi = &_spi0; + + /*SPI0 gpio init*/ + gpio_instruct.mode = GPIO_MODE_OUTPUT; + gpio_instruct.odos = GPIO_PUSH_PULL; + gpio_instruct.func = GPIO_FUNC_4; + gpio_instruct.type = GPIO_TYPE_CMOS; + gpio_instruct.flt = GPIO_FILTER_DISABLE; + + /*PB3->SPI0_SCK, PB5->SPI0_MOSI*/ + gpio_init(GPIOB, GPIO_PIN_3 | GPIO_PIN_5, &gpio_instruct); + + /*PB4->SPI0_MISO*/ + gpio_instruct.mode = GPIO_MODE_INPUT; + gpio_init(GPIOB, GPIO_PIN_4, &gpio_instruct); + } + else if (SPIx == SPI1) + { + _spi1.perh = SPI0; + spi_bus = &_spi_bus1; + spi = &_spi1; + + /*SPI1 gpio init*/ + gpio_instruct.mode = GPIO_MODE_OUTPUT; + gpio_instruct.odos = GPIO_PUSH_PULL; + gpio_instruct.func = GPIO_FUNC_4; + gpio_instruct.type = GPIO_TYPE_CMOS; + gpio_instruct.flt = GPIO_FILTER_DISABLE; + + /*PB13->SPI1_SCK, PB15->SPI1_MOSI*/ + gpio_init(GPIOB, GPIO_PIN_13 | GPIO_PIN_15, &gpio_instruct); + + /*PB14->SPI1_MISO*/ + gpio_instruct.mode = GPIO_MODE_INPUT; + gpio_init(GPIOB, GPIO_PIN_14, &gpio_instruct); + } + else + { + return -1; + } + spi_bus->parent.user_data = spi; + + return rt_spi_bus_register(spi_bus, name, &es32f0_spi_ops); +} + +rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name) +{ + /*define spi Instance*/ + struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); + RT_ASSERT(spi_device != RT_NULL); + struct es32f0_hw_spi_cs *cs_pin = (struct es32f0_hw_spi_cs *)rt_malloc(sizeof(struct es32f0_hw_spi_cs)); + RT_ASSERT(cs_pin != RT_NULL); + cs_pin->pin = pin; + rt_pin_mode(pin, PIN_MODE_OUTPUT); + rt_pin_write(pin, 1); + return rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin); +} + +int rt_hw_spi_init(void) +{ + int result = 0; + +#ifdef BSP_USING_SPI0 + result = es32f0_spi_register_bus(SPI0, "spi0"); +#endif + +#ifdef BSP_USING_SPI1 + result = es32f0_spi_register_bus(SPI1, "spi1"); +#endif + + return result; +} +INIT_BOARD_EXPORT(rt_hw_spi_init); +#endif /*RT_USING_SPI*/ diff --git a/bsp/es32f0654/drivers/drv_spi.h b/bsp/es32f0654/drivers/drv_spi.h new file mode 100644 index 00000000000..02002b074e3 --- /dev/null +++ b/bsp/es32f0654/drivers/drv_spi.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-01-24 wangyq the first version + */ + +#ifndef DRV_SPI_H__ +#define DRV_SPI_H__ + +#include +#include +#include + +struct es32f0_hw_spi_cs +{ + rt_uint32_t pin; +}; + +//cannot be used before completion init +rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name); +int rt_hw_spi_init(void); + +#endif diff --git a/bsp/es32f0654/drivers/drv_spiflash.c b/bsp/es32f0654/drivers/drv_spiflash.c new file mode 100644 index 00000000000..beb816cbf0b --- /dev/null +++ b/bsp/es32f0654/drivers/drv_spiflash.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-02-15 wangyq the first version + */ + +#include +#include "spi_flash.h" +#include "drv_spiflash.h" +#include "spi_flash_sfud.h" +#include "drv_spi.h" + +#if defined(BSP_USING_SPI_FLASH) +static int rt_hw_spi_flash_init(void) +{ + es32f0_spi_device_attach(50, "spi0", "spi00"); + + if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi00")) + { + return -RT_ERROR; + }; + + return RT_EOK; +} +INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init); +#endif diff --git a/bsp/es32f0654/drivers/drv_spiflash.h b/bsp/es32f0654/drivers/drv_spiflash.h new file mode 100644 index 00000000000..19a24343e58 --- /dev/null +++ b/bsp/es32f0654/drivers/drv_spiflash.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-02-15 wangyq the first version + */ + +#ifndef DRV_NOR_FLASH_H__ +#define DRV_NOR_FLASH_H__ + +int rt_hw_spi_flash_init(void); + +#endif diff --git a/bsp/es32f0654/drivers/drv_usart.c b/bsp/es32f0654/drivers/drv_uart.c similarity index 98% rename from bsp/es32f0654/drivers/drv_usart.c rename to bsp/es32f0654/drivers/drv_uart.c index 144f59d49db..172c736d751 100644 --- a/bsp/es32f0654/drivers/drv_usart.c +++ b/bsp/es32f0654/drivers/drv_uart.c @@ -1,5 +1,4 @@ /* - * File : drv_usart.c * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 @@ -13,7 +12,7 @@ #include #include #include "board.h" -#include "drv_usart.h" +#include "drv_uart.h" #include #include @@ -283,7 +282,7 @@ void BS16T2_UART3_Handler(void) } #endif /* BSP_USING_UART3 */ -int rt_hw_usart_init(void) +int rt_hw_uart_init(void) { struct es32_uart *uart; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; @@ -334,6 +333,6 @@ int rt_hw_usart_init(void) return 0; } -INIT_BOARD_EXPORT(rt_hw_usart_init); +INIT_BOARD_EXPORT(rt_hw_uart_init); #endif diff --git a/bsp/es32f0654/drivers/drv_usart.h b/bsp/es32f0654/drivers/drv_uart.h similarity index 70% rename from bsp/es32f0654/drivers/drv_usart.h rename to bsp/es32f0654/drivers/drv_uart.h index cd7391c7cea..e68d67ca1e7 100644 --- a/bsp/es32f0654/drivers/drv_usart.h +++ b/bsp/es32f0654/drivers/drv_uart.h @@ -1,5 +1,4 @@ /* - * File : drv_usart.h * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 @@ -9,9 +8,9 @@ * 2019-01-23 wangyq the first version */ -#ifndef DRV_USART_H__ -#define DRV_USART_H__ +#ifndef DRV_UART_H__ +#define DRV_UART_H__ -int rt_hw_usart_init(void); +int rt_hw_uart_init(void); #endif diff --git a/bsp/es32f0654/project.uvprojx b/bsp/es32f0654/project.uvprojx index fe59aa858b7..b3cf47908ec 100644 --- a/bsp/es32f0654/project.uvprojx +++ b/bsp/es32f0654/project.uvprojx @@ -365,7 +365,7 @@ - --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) + --keep *.o(.rti_fn.*) --keep *.o(FSymTab) @@ -508,9 +508,9 @@ - drv_usart.c + drv_uart.c 1 - drivers\drv_usart.c + drivers\drv_uart.c @@ -854,76 +854,6 @@ ..\..\components\finsh\msh_file.c - - - finsh_compiler.c - 1 - ..\..\components\finsh\finsh_compiler.c - - - - - finsh_error.c - 1 - ..\..\components\finsh\finsh_error.c - - - - - finsh_heap.c - 1 - ..\..\components\finsh\finsh_heap.c - - - - - finsh_init.c - 1 - ..\..\components\finsh\finsh_init.c - - - - - finsh_node.c - 1 - ..\..\components\finsh\finsh_node.c - - - - - finsh_ops.c - 1 - ..\..\components\finsh\finsh_ops.c - - - - - finsh_parser.c - 1 - ..\..\components\finsh\finsh_parser.c - - - - - finsh_var.c - 1 - ..\..\components\finsh\finsh_var.c - - - - - finsh_vm.c - 1 - ..\..\components\finsh\finsh_vm.c - - - - - finsh_token.c - 1 - ..\..\components\finsh\finsh_token.c - - diff --git a/bsp/es32f0654/rtconfig.h b/bsp/es32f0654/rtconfig.h index a2217aa7bec..95005986763 100644 --- a/bsp/es32f0654/rtconfig.h +++ b/bsp/es32f0654/rtconfig.h @@ -63,6 +63,7 @@ #define FINSH_CMD_SIZE 80 #define FINSH_USING_MSH #define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY #define FINSH_ARG_MAX 10 /* Device virtual file system */ @@ -161,8 +162,15 @@ #define BSP_USING_UART2 +/* SPI Drivers */ + + +/* I2C Drivers */ + + /* Onboard Peripheral Drivers */ + /* Offboard Peripheral Drivers */