Red Pitaya Ecosystem and Applications
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Bazaar/nginx Revert "VNA application added" Apr 18, 2018
Examples Revert "VNA application added" Apr 18, 2018
OS Revert "VNA application added" Apr 18, 2018
Test The incorrect production test script for the Z20 FPGA model was fixed. Nov 27, 2018
api API: removing documentation build from Makefile Jul 7, 2017
api2 Revert "VNA application added" Apr 18, 2018
apps-free Added MIT license file May 10, 2018
apps-tools scpi_manager: the ip detection was fixed. Nov 16, 2018
doc DOC: removed HAMLAB from SDR Jan 9, 2019
fpga Merge remote-tracking branch 'github/master' Dec 21, 2018
generate_DC generate_DC, generate_DC_LO was added. Aug 23, 2018
patches The u-boot patch was added to set default environment. Aug 31, 2018
scpi-server Revert "VNA application added" Apr 18, 2018
test/scpi Revert "SCPI: moving tests again" Mar 2, 2016
tools Device Tree Compiler: updated to bra… Feb 4, 2017
.gitignore added apps, examples Nov 28, 2016 Changelog was updated (0.98-693). Dec 18, 2018
COPYING API: removing references to from the 'srared/' directory Jan 4, 2017
MakeRTD make file for read the docs Mar 27, 2017
Makefile The incorrect production test script for the Z20 FPGA model was fixed. Nov 27, 2018
Makefile.x86 The Z10 specific files was renamed. Sep 4, 2018 README: call for developers Apr 23, 2017 FPGA: renamed logic_orig into logic Mar 22, 2017 Revert "VNA application added" Apr 18, 2018

The previous README file is available here.

Work in progress documentation


Our internal development is shifting toward Jupyter. Jupyter with a set of Python modules provides a great tool for quick prototyping:

  1. UIO drivers written directly in Python,
  2. dynamic and interactive data visualization with bokeh,
  3. data storage and processing with numpy, scipy, ...
  4. source code management with Git and GitHub,
  5. and under development is support for device tree overlays and FPGA manager.

1. UIO (Userspace IO) drivers in Python

Drivers for FPGA memory mapped peripherals can be written directly in Python using mmap, ctypes and numpy. UIO description in a device tree in combination with UDEV rules provides named UIO devices as /dev/uio/name. Each device can be mapped into memory space and locked separately with mmap and fcntl. Register sets can be written using Python ctypes and/or numpy.dtpye. Python offers language features for the creation of elegant APIs.

2. Dynamic and interactive data visualization

As a base Matplotlib provides a vast array of features for data visualization. With the addition of bokeh (JavaScript based library) visualization become dynamic with good frame rates (up to about 16fps depending on data size). There are widget libraries available for making interactive applications.

3. Data storage and digital signal processing

Python makes it easy to store data into a file, since the application is also written in Python, it easy to access data from various processing changes not just a filtered output. A simple data logger for example can write data file onto the SD card, the file can be later loaded onto a PC using the Jupyter file browser. Python is interpreted in Jupyter, which makes it slow. Fortunately most data processing can be done on arrays with dedicated libraries. Numpy and Scipy provide processing functions for a great spectrum of applications. They are well optimized although not very fast on the ZYNQ ARM CPU. Python wrappers can be written around optimized DSP libraries like Ne10. Processing can also be offloaded to the FPGA, project PYNQ is making progress there.

4. Git and GitHub

Applications can be developed directly on the board and edited in the Jupyter editor. Git is now installed on SD card images. In combination with Github it provides a great tool for version control, publishing and distribution of Python applications and libraries. TODO: under Welcome instructions for Git SSH keys, maybe they should be created at first boot and displayed.

5. Device tree overlays and FPGA manager

Device tree overlays are already supported on our current 4.4 based kernel. We are working on a kernel 4.9 based version, which would also support FPGA manager. FPGA manager enables loading a FPGA bitstream with an overlay, which enables proper loading and unloading of kernel drivers (GPIO, LED, XADC, DMA, ...) needed by the overlay. Most of our problems are related to backward compatibility.