Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
Branch: master
Clone or download
Fetching latest commit…
Cannot retrieve the latest commit at this time.
Permalink
Type Name Latest commit message Commit time
Failed to load latest commit information.
_layouts APB Bridge Documentation - First Draft (#1) Oct 24, 2017
assets
docs
rtl/verilog
.gitignore
DATASHEET.md
LICENSE.md
README.md
_config.yml

README.md

AHB-Lite APB4 Bridge

The Roa Logic AHB-Lite APB4 Bridge is a fully parameterized soft IP interconnect bridge between the AMBA 3 AHB-Lite v1.0 and AMBA APB v2.0 bus protocols.

The AHB-Lite APB4 Bridge natively supports a single peripheral, however multiple APB4 peripherals may be connected to a single bridge by including supporting multiplexer logic – See the AMBA APB v2.0 Protocol specification. An APB4 Multiplexer IP implementing this capability is available from Roa Logic

apb4-bridge-sys

Documentation

Features

  • Full support for AMBA 3 AHB-Lite and APB version 2.0 (APB4) protocol
  • Fully parameterized
  • Unlimited APB4 address and data widths supported
  • Configurable number of peripheral-side byte lanes with automatic handling of burst transfers
  • Support for separate clock domain per interface with automatic handling of cross-domain timing.

Interfaces

  • AHB3-Lite slave interface
  • APB master interface

License

Released under the RoaLogic Non-Commercial License

Dependencies

This release requires the ahb3lite package found here https://github.com/RoaLogic/ahb3lite_pkg