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27 lines (15 sloc) 413 Bytes
-DesignTarget: RAM
-OptimizationTarget: Area
-ProcessNode: 50
-Capacity (MB): 256
-WordWidth (bit): 64
-FlashPageSize (Byte): 2048
-FlashBlockSize (KB): 128
-DeviceRoadmap: LOP
-Routing: H-tree
-InternalSensing: true
-MemoryCellInputFile: sample_SLCNAND.cell
-Temperature (K): 380
-BufferDesignOptimization: area
-ForceBank (Total AxB, Active CxD): 1x1, 1x1
-ForceMat (Total AxB, Active CxD): 1x1, 1x1