From 5e48e6c7801dd3845f36abf10fbc5eacd40de1fb Mon Sep 17 00:00:00 2001 From: Sagar Balani Date: Wed, 22 Aug 2018 01:09:42 -0700 Subject: [PATCH 01/30] [barefoot]: Update bfn deb pkg urls for 201807 (#1963) --- platform/barefoot/bfn-platform.mk | 2 +- platform/barefoot/bfn-sai.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/platform/barefoot/bfn-platform.mk b/platform/barefoot/bfn-platform.mk index 6f1e6e30296..774d5986e27 100644 --- a/platform/barefoot/bfn-platform.mk +++ b/platform/barefoot/bfn-platform.mk @@ -1,5 +1,5 @@ BFN_PLATFORM = bfnplatform_1.0.0_amd64.deb -$(BFN_PLATFORM)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_8_2/bfnplatform_1.0.0_amd64.deb" +$(BFN_PLATFORM)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/201807/bfnplatform_1.0.0_amd64.deb" SONIC_ONLINE_DEBS += $(BFN_PLATFORM) # $(BFN_SAI_DEV) $(BFN_SAI_DEV)_DEPENDS += $(BFN_PLATFORM) diff --git a/platform/barefoot/bfn-sai.mk b/platform/barefoot/bfn-sai.mk index 7e507d15a9f..4d0140f14ec 100644 --- a/platform/barefoot/bfn-sai.mk +++ b/platform/barefoot/bfn-sai.mk @@ -1,5 +1,5 @@ BFN_SAI = bfnsdk_1.0.0_amd64.deb -$(BFN_SAI)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/rel_8_2/bfnsdk_1.0.0_amd64.deb" +$(BFN_SAI)_URL = "https://github.com/barefootnetworks/sonic-release-pkgs/raw/201807/bfnsdk_1.0.0_amd64.deb" SONIC_ONLINE_DEBS += $(BFN_SAI) # $(BFN_SAI_DEV) $(BFN_SAI_DEV)_DEPENDS += $(BFN_SAI) From f07181e89b676fb898ff25c1f2b509a7b4d6d690 Mon Sep 17 00:00:00 2001 From: Roy Lee Date: Thu, 30 Aug 2018 20:29:01 +0800 Subject: [PATCH 02/30] [201807][platform] Accton: As5712-54x. Fix sfputil and accton_util (#2002) * [platform] accton as5712-54x, fixed 1. Check i2c buses, they may get fliped on every bootup. 2. QSFP's lp_mode and reset are out of port order. 3. Change QSFP is reset with 1 second period. Signed-off-by: roy_lee * [platform] accton as5712-54x. Fix util.py error about SFP/QSFP's tx_disable and present. Signed-off-by: roy_lee --- .../plugins/sfputil.py | 66 +++++++++++++++---- .../broadcom/sonic-platform-modules-accton | 2 +- 2 files changed, 54 insertions(+), 14 deletions(-) diff --git a/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py index c30ba62c51b..065bf1bdcea 100755 --- a/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as5712_54x-r0/plugins/sfputil.py @@ -2,9 +2,9 @@ # # Platform-specific SFP transceiver interface for SONiC # - try: import time + import os from sonic_sfp.sfputilbase import SfpUtilBase except ImportError as e: raise ImportError("%s - required module not found" % str(e)) @@ -21,8 +21,14 @@ class SfpUtil(SfpUtilBase): BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/" BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/" - BASE_CPLD2_PATH = "/sys/bus/i2c/devices/0-0061/" - BASE_CPLD3_PATH = "/sys/bus/i2c/devices/0-0062/" + BASE_CPLD2_PATH = "/sys/bus/i2c/devices/{0}-0061/" + BASE_CPLD3_PATH = "/sys/bus/i2c/devices/{0}-0062/" + I2C_BUS_ORDER = -1 + + #The sidebands of QSFP is different. + #present is in-order. + #But lp_mode and reset are not. + qsfp_sb_map = [1, 3, 5, 2, 4, 6] _port_to_is_present = {} _port_to_lp_mode = {} @@ -137,18 +143,30 @@ def __init__(self): SfpUtilBase.__init__(self) + #Two i2c buses might get flipped order, check them both. + def update_i2c_order(self): + if self.I2C_BUS_ORDER < 0: + eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 0 + eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom" + if os.path.exists(eeprom_path): + self.I2C_BUS_ORDER = 1 + return self.I2C_BUS_ORDER + def get_presence(self, port_num): # Check for invalid port_num if port_num < self.port_start or port_num > self.port_end: return False + order = self.update_i2c_order() if port_num < 24: - present_path = self.BASE_CPLD2_PATH + "module_present_" + str(self._port_to_i2c_mapping[port_num][0]) + present_path = self.BASE_CPLD2_PATH.format(order) else: - present_path = self.BASE_CPLD3_PATH + "module_present_" + str(self._port_to_i2c_mapping[port_num][0]) + present_path = self.BASE_CPLD3_PATH.format(order) + present_path = present_path + "module_present_" + str(self._port_to_i2c_mapping[port_num][0]) self.__port_to_is_present = present_path - try: val_file = open(self.__port_to_is_present) @@ -165,11 +183,21 @@ def get_presence(self, port_num): return False + def qsfp_sb_remap(self, port_num): + qsfp_start = self.qsfp_port_start + qsfp_index = self._port_to_i2c_mapping[port_num][0] - qsfp_start + qsfp_index = self.qsfp_sb_map[qsfp_index-1] + return qsfp_start+qsfp_index + def get_low_power_mode(self, port_num): if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False - lp_mode_path = self.BASE_CPLD3_PATH + "module_lp_mode_" + str(self._port_to_i2c_mapping[port_num][0]) + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + lp_mode_path = lp_mode_path + "module_lp_mode_" + q = self.qsfp_sb_remap(port_num) + lp_mode_path = lp_mode_path + str(q) try: val_file = open(lp_mode_path) @@ -190,7 +218,11 @@ def set_low_power_mode(self, port_num, lpmode): if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False - lp_mode_path = self.BASE_CPLD3_PATH + "module_lp_mode_" + str(self._port_to_i2c_mapping[port_num][0]) + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + lp_mode_path = lp_mode_path + "module_lp_mode_" + q = self.qsfp_sb_remap(port_num) + lp_mode_path = lp_mode_path + str(q) try: reg_file = open(lp_mode_path, 'r+') @@ -212,7 +244,11 @@ def reset(self, port_num): if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end: return False - mod_rst_path = lp_mode_path = self.BASE_CPLD3_PATH + "module_reset_" + str(self._port_to_i2c_mapping[port_num][0]) + order = self.update_i2c_order() + lp_mode_path = self.BASE_CPLD3_PATH.format(order) + mod_rst_path = lp_mode_path + "module_reset_" + q = self.qsfp_sb_remap(port_num) + mod_rst_path = mod_rst_path + str(q) try: reg_file = open(mod_rst_path, 'r+') @@ -220,9 +256,13 @@ def reset(self, port_num): print "Error: unable to open file: %s" % str(e) return False - reg_value = '1' - - reg_file.write(reg_value) + #toggle reset + reg_file.seek(0) + reg_file.write('0') + time.sleep(1) + reg_file.seek(0) + reg_file.write('1') reg_file.close() + return True - return True \ No newline at end of file + return True diff --git a/platform/broadcom/sonic-platform-modules-accton b/platform/broadcom/sonic-platform-modules-accton index 406c4e675ea..46908e3e931 160000 --- a/platform/broadcom/sonic-platform-modules-accton +++ b/platform/broadcom/sonic-platform-modules-accton @@ -1 +1 @@ -Subproject commit 406c4e675ea73d52827b520958c9956551a94e8e +Subproject commit 46908e3e9315ad7f0742ebfde3281236556f1526 From 90257f53eb49e52a3e620e435591d8d8ff6c2791 Mon Sep 17 00:00:00 2001 From: zzhiyuan Date: Tue, 4 Sep 2018 22:34:40 -0700 Subject: [PATCH 03/30] [devices]: Update 201807 release with transceiver detection for arista devices (#2013) --- platform/broadcom/sonic-platform-modules-arista | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index c114bb1f903..e741d13e226 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit c114bb1f903a5630c3a02d450a026949c323defd +Subproject commit e741d13e22689946174975c93ceb1c0f4accc867 From be56470ab0da978cb78125b2c3cebb152f0ac577 Mon Sep 17 00:00:00 2001 From: Andriy Moroz Date: Thu, 6 Sep 2018 08:43:27 +0300 Subject: [PATCH 04/30] [Mellanox] Update hw-management service config (#2019) Signed-off-by: Andriy Moroz --- .../mellanox/hw-management/Add-systemd-service-config.patch | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/platform/mellanox/hw-management/Add-systemd-service-config.patch b/platform/mellanox/hw-management/Add-systemd-service-config.patch index 4903f508bce..bbaed885dcb 100644 --- a/platform/mellanox/hw-management/Add-systemd-service-config.patch +++ b/platform/mellanox/hw-management/Add-systemd-service-config.patch @@ -29,7 +29,7 @@ new file mode 100644 index 0000000..d18916d --- /dev/null +++ b/debian/hw-management.service -@@ -0,0 +1,10 @@ +@@ -0,0 +1,11 @@ +[Unit] +Description=Mellanox Hardware Management + @@ -37,6 +37,7 @@ index 0000000..d18916d +Type=oneshot +EnvironmentFile=/host/machine.conf +ExecStart=/bin/bash -c "/usr/share/sonic/device/$onie_platform/hw-management start" ++ExecStop=/bin/bash -c "/usr/share/sonic/device/$onie_platform/hw-management stop" + +[Install] +WantedBy=multi-user.target From dd94d9d7cd6ca97c4259cbc2ca06b573231e0049 Mon Sep 17 00:00:00 2001 From: stepanblyschak <38952541+stepanblyschak@users.noreply.github.com> Date: Thu, 16 Aug 2018 07:46:34 +0300 Subject: [PATCH 05/30] [mellanox]: Fix qos.json.j2: apply qos config for active ports (#1932) Signed-off-by: Stepan Blyschak --- .../LS-SN2700/qos.json.j2 | 45 ++++++++++++++----- .../ACS-MSN2100/qos.json.j2 | 44 +++++++++++++----- .../ACS-MSN2410/qos.json.j2 | 44 +++++++++++++----- .../ACS-MSN2700/qos.json.j2 | 45 ++++++++++++++----- .../Mellanox-SN2700-D48C8/qos.json.j2 | 45 ++++++++++++++----- 5 files changed, 170 insertions(+), 53 deletions(-) diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700/qos.json.j2 b/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700/qos.json.j2 index 3e01af3f2c6..b1759cb4211 100644 --- a/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/LS-SN2700/qos.json.j2 @@ -1,3 +1,30 @@ +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + { "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -114,7 +141,7 @@ } }, "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "{{ port_names_active }}": { "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", @@ -148,19 +175,15 @@ } }, "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0": { + "{{ port_names_active }}|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "{{ port_names_active }}|0" : { "scheduler" : "[SCHEDULER|scheduler.1]" }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1": { + "{{ port_names_active }}|1" : { "scheduler" : "[SCHEDULER|scheduler.2]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1": { - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4": { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" } } } - diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 index 74045469dbf..b1759cb4211 100644 --- a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/qos.json.j2 @@ -1,3 +1,30 @@ +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + { "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -114,7 +141,7 @@ } }, "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60": { + "{{ port_names_active }}": { "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", @@ -148,18 +175,15 @@ } }, "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60|0": { + "{{ port_names_active }}|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "{{ port_names_active }}|0" : { "scheduler" : "[SCHEDULER|scheduler.1]" }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60|1": { + "{{ port_names_active }}|1" : { "scheduler" : "[SCHEDULER|scheduler.2]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60|0-1": { - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60|3-4": { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" } } } diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 index 95652cf96f4..b1759cb4211 100644 --- a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/qos.json.j2 @@ -1,3 +1,30 @@ +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + { "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -114,7 +141,7 @@ } }, "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220": { + "{{ port_names_active }}": { "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", @@ -148,18 +175,15 @@ } }, "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220|0": { + "{{ port_names_active }}|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "{{ port_names_active }}|0" : { "scheduler" : "[SCHEDULER|scheduler.1]" }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220|1": { + "{{ port_names_active }}|1" : { "scheduler" : "[SCHEDULER|scheduler.2]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220|0-1": { - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220|3-4": { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" } } } diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 index 3e01af3f2c6..b1759cb4211 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 @@ -1,3 +1,30 @@ +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + { "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -114,7 +141,7 @@ } }, "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { + "{{ port_names_active }}": { "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", @@ -148,19 +175,15 @@ } }, "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0": { + "{{ port_names_active }}|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "{{ port_names_active }}|0" : { "scheduler" : "[SCHEDULER|scheduler.1]" }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1": { + "{{ port_names_active }}|1" : { "scheduler" : "[SCHEDULER|scheduler.2]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1": { - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4": { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" } } } - diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 index d35f614de63..b1759cb4211 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2 @@ -1,3 +1,30 @@ +{%- set PORT_ALL = [] %} + +{%- if PORT is not defined %} + {%- for port_idx in range(0,64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- else %} + {%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') %} + { "TC_TO_PRIORITY_GROUP_MAP": { "AZURE": { @@ -114,7 +141,7 @@ } }, "PORT_QOS_MAP": { - "Ethernet8,Ethernet2,Ethernet0,Ethernet6,Ethernet4,Ethernet108,Ethernet100,Ethernet104,Ethernet106,Ethernet58,Ethernet126,Ethernet96,Ethernet124,Ethernet122,Ethernet92,Ethernet120,Ethernet50,Ethernet52,Ethernet54,Ethernet56,Ethernet76,Ethernet74,Ethernet18,Ethernet70,Ethernet32,Ethernet72,Ethernet16,Ethernet36,Ethernet78,Ethernet60,Ethernet28,Ethernet62,Ethernet14,Ethernet88,Ethernet118,Ethernet24,Ethernet116,Ethernet82,Ethernet114,Ethernet80,Ethernet112,Ethernet86,Ethernet110,Ethernet84,Ethernet48,Ethernet10,Ethernet44,Ethernet42,Ethernet40,Ethernet64,Ethernet66,Ethernet12,Ethernet46,Ethernet20,Ethernet22,Ethernet68": { + "{{ port_names_active }}": { "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", @@ -148,19 +175,15 @@ } }, "QUEUE": { - "Ethernet8,Ethernet2,Ethernet0,Ethernet6,Ethernet4,Ethernet108,Ethernet100,Ethernet104,Ethernet106,Ethernet58,Ethernet126,Ethernet96,Ethernet124,Ethernet122,Ethernet92,Ethernet120,Ethernet50,Ethernet52,Ethernet54,Ethernet56,Ethernet76,Ethernet74,Ethernet18,Ethernet70,Ethernet32,Ethernet72,Ethernet16,Ethernet36,Ethernet78,Ethernet60,Ethernet28,Ethernet62,Ethernet14,Ethernet88,Ethernet118,Ethernet24,Ethernet116,Ethernet82,Ethernet114,Ethernet80,Ethernet112,Ethernet86,Ethernet110,Ethernet84,Ethernet48,Ethernet10,Ethernet44,Ethernet42,Ethernet40,Ethernet64,Ethernet66,Ethernet12,Ethernet46,Ethernet20,Ethernet22,Ethernet68|0": { + "{{ port_names_active }}|3-4" : { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + }, + "{{ port_names_active }}|0" : { "scheduler" : "[SCHEDULER|scheduler.1]" }, - "Ethernet8,Ethernet2,Ethernet0,Ethernet6,Ethernet4,Ethernet108,Ethernet100,Ethernet104,Ethernet106,Ethernet58,Ethernet126,Ethernet96,Ethernet124,Ethernet122,Ethernet92,Ethernet120,Ethernet50,Ethernet52,Ethernet54,Ethernet56,Ethernet76,Ethernet74,Ethernet18,Ethernet70,Ethernet32,Ethernet72,Ethernet16,Ethernet36,Ethernet78,Ethernet60,Ethernet28,Ethernet62,Ethernet14,Ethernet88,Ethernet118,Ethernet24,Ethernet116,Ethernet82,Ethernet114,Ethernet80,Ethernet112,Ethernet86,Ethernet110,Ethernet84,Ethernet48,Ethernet10,Ethernet44,Ethernet42,Ethernet40,Ethernet64,Ethernet66,Ethernet12,Ethernet46,Ethernet20,Ethernet22,Ethernet68|1": { + "{{ port_names_active }}|1" : { "scheduler" : "[SCHEDULER|scheduler.2]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1": { - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet8,Ethernet2,Ethernet0,Ethernet6,Ethernet4,Ethernet108,Ethernet100,Ethernet104,Ethernet106,Ethernet58,Ethernet126,Ethernet96,Ethernet124,Ethernet122,Ethernet92,Ethernet120,Ethernet50,Ethernet52,Ethernet54,Ethernet56,Ethernet76,Ethernet74,Ethernet18,Ethernet70,Ethernet32,Ethernet72,Ethernet16,Ethernet36,Ethernet78,Ethernet60,Ethernet28,Ethernet62,Ethernet14,Ethernet88,Ethernet118,Ethernet24,Ethernet116,Ethernet82,Ethernet114,Ethernet80,Ethernet112,Ethernet86,Ethernet110,Ethernet84,Ethernet48,Ethernet10,Ethernet44,Ethernet42,Ethernet40,Ethernet64,Ethernet66,Ethernet12,Ethernet46,Ethernet20,Ethernet22,Ethernet68|3-4": { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" } } } - From 629317801293a2cf2800834974b719a889f5fbf3 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Fri, 3 Aug 2018 07:53:30 +0800 Subject: [PATCH 06/30] [mlnx-sfp-plugin] enhancement to support transceiver sensor monitoring (#1839) * [mlnx-sfpplugin] enhancement to support tranceiver sensor monitoring * Modify the eeprom folder to make it accessably from pmon container * implement the get_transceiver_change_event API file change list modified: device/mellanox/x86_64-mlnx_lssn2700-r0/plugins/sfputil.py modified: device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py modified: device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py modified: device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py modified: device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py signed-off-by Liu Kebo kebol@mellanox.com * remove commented code * revise the get_transceiver_change_event implementation and remove unused function * remove blank --- .../plugins/sfputil.py | 43 ++++++++++++++++- .../x86_64-mlnx_msn2100-r0/plugins/sfputil.py | 43 ++++++++++++++++- .../x86_64-mlnx_msn2410-r0/plugins/sfputil.py | 48 +++++++++++++++++-- .../x86_64-mlnx_msn2700-r0/plugins/sfputil.py | 43 ++++++++++++++++- .../x86_64-mlnx_msn2740-r0/plugins/sfputil.py | 43 ++++++++++++++++- 5 files changed, 208 insertions(+), 12 deletions(-) diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_lssn2700-r0/plugins/sfputil.py index 6aef1310d51..2eb3d628ff9 100644 --- a/device/mellanox/x86_64-mlnx_lssn2700-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/plugins/sfputil.py @@ -10,10 +10,13 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 PORT_END = 31 PORTS_IN_BLOCK = 32 @@ -22,6 +25,12 @@ class SfpUtil(SfpUtilBase): _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + @property def port_start(self): return self.PORT_START @@ -39,7 +48,7 @@ def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/bsp/qsfp/qsfp{0}" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon7/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) @@ -149,3 +158,33 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py index 4a7b063ac60..631a6b774fb 100644 --- a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py @@ -10,10 +10,13 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 PORT_END = 15 PORTS_IN_BLOCK = 16 @@ -22,6 +25,12 @@ class SfpUtil(SfpUtilBase): _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + @property def port_start(self): return self.PORT_START @@ -39,7 +48,7 @@ def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/bsp/qsfp/qsfp{0}" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon4/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) @@ -149,3 +158,33 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py index d9699aca45a..c379155b82e 100644 --- a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py @@ -10,18 +10,27 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 PORT_END = 55 PORTS_IN_BLOCK = 56 - + QSFP_PORT_START = 48 EEPROM_OFFSET = 1 _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + @property def port_start(self): return self.PORT_START @@ -32,20 +41,21 @@ def port_end(self): @property def qsfp_ports(self): - return range(0, self.PORTS_IN_BLOCK + 1) + return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1) @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/bsp/qsfp/qsfp{0}" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon6/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) SfpUtilBase.__init__(self) + def get_presence(self, port_num): # Check for invalid port_num if port_num < self.port_start or port_num > self.port_end: @@ -149,3 +159,33 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py index 6aef1310d51..2eb3d628ff9 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py @@ -10,10 +10,13 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 PORT_END = 31 PORTS_IN_BLOCK = 32 @@ -22,6 +25,12 @@ class SfpUtil(SfpUtilBase): _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + @property def port_start(self): return self.PORT_START @@ -39,7 +48,7 @@ def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/bsp/qsfp/qsfp{0}" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon7/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) @@ -149,3 +158,33 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py index 6aef1310d51..d617135e3e8 100644 --- a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py @@ -10,10 +10,13 @@ except ImportError as e: raise ImportError("%s - required module not found" % str(e)) +# parameters for DB connection +REDIS_HOSTNAME = "localhost" +REDIS_PORT = 6379 +REDIS_TIMEOUT_USECS = 0 class SfpUtil(SfpUtilBase): """Platform-specific SfpUtil class""" - PORT_START = 0 PORT_END = 31 PORTS_IN_BLOCK = 32 @@ -22,6 +25,12 @@ class SfpUtil(SfpUtilBase): _port_to_eeprom_mapping = {} + db_sel = None + db_sel_timeout = None + db_sel_object = None + db_sel_tbl = None + state_db = None + @property def port_start(self): return self.PORT_START @@ -39,7 +48,7 @@ def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/bsp/qsfp/qsfp{0}" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon6/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) @@ -149,3 +158,33 @@ def reset(self, port_num): return False return False + + def get_transceiver_change_event(self, timeout=0): + phy_port_dict = {} + status = True + + if self.db_sel == None: + from swsscommon import swsscommon + self.state_db = swsscommon.DBConnector(swsscommon.STATE_DB, + REDIS_HOSTNAME, + REDIS_PORT, + REDIS_TIMEOUT_USECS) + + # Subscribe to state table for SFP change notifications + self.db_sel = swsscommon.Select() + self.db_sel_tbl = swsscommon.NotificationConsumer(self.state_db, 'TRANSCEIVER_NOTIFY') + self.db_sel.addSelectable(self.db_sel_tbl) + self.db_sel_timeout = swsscommon.Select.TIMEOUT + self.db_sel_object = swsscommon.Select.OBJECT + + (state, c) = self.db_sel.select(timeout) + if state == self.db_sel_timeout: + status = True + elif state != self.db_sel_object: + status = False + else: + (key, op, fvp) = self.db_sel_tbl.pop() + phy_port_dict[key] = op + + return status, phy_port_dict + From e237df8e215d7d5520134e735fcf8ff01861caa0 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Sat, 4 Aug 2018 07:33:56 +0800 Subject: [PATCH 07/30] [docker-platform-monitor] make file and supervisord conf change for new xcvrd deamon (#1840) * [docker-platform-monitor] make file and supervisord conf change for new xcvrd deamon * make file change for the new daemon * supervisord conf change for the new daemon signed-off-by Liu Kebo kebol@mellanox.com * make xcvrd start sequence aligned with the supervisord conf * update submodules to include xcvrd modification --- dockers/docker-platform-monitor/start.sh | 2 ++ dockers/docker-platform-monitor/supervisord.conf | 9 +++++++++ rules/docker-platform-monitor.mk | 2 +- rules/sonic-xcvrd.mk | 5 +++++ src/sonic-platform-daemons | 2 +- 5 files changed, 18 insertions(+), 2 deletions(-) create mode 100644 rules/sonic-xcvrd.mk diff --git a/dockers/docker-platform-monitor/start.sh b/dockers/docker-platform-monitor/start.sh index b4023c16367..30699694b6d 100755 --- a/dockers/docker-platform-monitor/start.sh +++ b/dockers/docker-platform-monitor/start.sh @@ -26,3 +26,5 @@ if [ -e /usr/share/sonic/platform/fancontrol ]; then fi supervisorctl start ledd + +supervisorctl start xcvrd diff --git a/dockers/docker-platform-monitor/supervisord.conf b/dockers/docker-platform-monitor/supervisord.conf index 13790d70f61..aa947ce2c9a 100644 --- a/dockers/docker-platform-monitor/supervisord.conf +++ b/dockers/docker-platform-monitor/supervisord.conf @@ -45,3 +45,12 @@ autorestart=false stdout_logfile=syslog stderr_logfile=syslog startsecs=0 + +[program:xcvrd] +command=/usr/bin/xcvrd +priority=6 +autostart=false +autorestart=false +stdout_logfile=syslog +stderr_logfile=syslog +startsecs=0 diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk index 00b4d48687c..d6404e18c47 100644 --- a/rules/docker-platform-monitor.mk +++ b/rules/docker-platform-monitor.mk @@ -2,7 +2,7 @@ DOCKER_PLATFORM_MONITOR = docker-platform-monitor.gz $(DOCKER_PLATFORM_MONITOR)_PATH = $(DOCKERS_PATH)/docker-platform-monitor -$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSWSSCOMMON) $(PYTHON_SWSSCOMMON) $(SONIC_LEDD) +$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSWSSCOMMON) $(PYTHON_SWSSCOMMON) $(SONIC_LEDD) $(SONIC_XCVRD) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY2) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SWSSSDK_PY2) $(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE) diff --git a/rules/sonic-xcvrd.mk b/rules/sonic-xcvrd.mk new file mode 100644 index 00000000000..b97f8dd11b7 --- /dev/null +++ b/rules/sonic-xcvrd.mk @@ -0,0 +1,5 @@ +# sonic-xcvrd (SONiC Transceiver monitoring daemon) Debian package + +SONIC_XCVRD = python-sonic-xcvrd_1.0-1_all.deb +$(SONIC_XCVRD)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-xcvrd +SONIC_PYTHON_STDEB_DEBS += $(SONIC_XCVRD) diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons index ce83d58b0af..b1b9169bf4c 160000 --- a/src/sonic-platform-daemons +++ b/src/sonic-platform-daemons @@ -1 +1 @@ -Subproject commit ce83d58b0afffaa3e0b9d57686c814a2b5fd771e +Subproject commit b1b9169bf4cf5b3d0e4778dc51c03b99b15c0c6b From 97b5f3d46239ee2d069cdefd1eaab75cf2217354 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Mon, 6 Aug 2018 14:06:56 +0800 Subject: [PATCH 08/30] update sonic-platform-common submodule for xcvrd support (#1901) --- src/sonic-platform-common | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-platform-common b/src/sonic-platform-common index 76ae431e41d..d98600e8ed8 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit 76ae431e41dca1255f8056b590668c9ca187f031 +Subproject commit d98600e8ed8df0280cb07487132e20adc48d7f6e From 8fc68746f5aeaa6c61cb83869fbfba2a6c337cdc Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Fri, 17 Aug 2018 14:12:00 +0800 Subject: [PATCH 09/30] [mlnx-platform] enhancement for xcvrd implementation on mlnx platform (#1937) * mlnx enhancement for xcvrd implementation * fix conflict --- .../x86_64-mlnx_msn2100-r0/plugins/sfputil.py | 7 ++ .../x86_64-mlnx_msn2410-r0/plugins/sfputil.py | 9 +- .../x86_64-mlnx_msn2700-r0/plugins/sfputil.py | 7 ++ .../x86_64-mlnx_msn2740-r0/plugins/sfputil.py | 7 ++ platform/mellanox/mlnx-sfpd/scripts/mlnx-sfpd | 109 +++++++++++++----- 5 files changed, 106 insertions(+), 33 deletions(-) diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py index 631a6b774fb..a4eda6edfe3 100644 --- a/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/plugins/sfputil.py @@ -30,6 +30,7 @@ class SfpUtil(SfpUtilBase): db_sel_object = None db_sel_tbl = None state_db = None + sfpd_status_tbl = None @property def port_start(self): @@ -176,6 +177,12 @@ def get_transceiver_change_event(self, timeout=0): self.db_sel.addSelectable(self.db_sel_tbl) self.db_sel_timeout = swsscommon.Select.TIMEOUT self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return false + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + return False, phy_port_dict (state, c) = self.db_sel.select(timeout) if state == self.db_sel_timeout: diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py index c379155b82e..8bd4ba78916 100644 --- a/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/plugins/sfputil.py @@ -30,6 +30,7 @@ class SfpUtil(SfpUtilBase): db_sel_object = None db_sel_tbl = None state_db = None + sfpd_status_tbl = None @property def port_start(self): @@ -48,7 +49,7 @@ def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping def __init__(self): - eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon6/qsfp{0}_eeprom" + eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0048/hwmon/hwmon7/qsfp{0}_eeprom" for x in range(0, self.port_end + 1): self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) @@ -177,6 +178,12 @@ def get_transceiver_change_event(self, timeout=0): self.db_sel.addSelectable(self.db_sel_tbl) self.db_sel_timeout = swsscommon.Select.TIMEOUT self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return false + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + return False, phy_port_dict (state, c) = self.db_sel.select(timeout) if state == self.db_sel_timeout: diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py index 2eb3d628ff9..11a5bdcb02b 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/plugins/sfputil.py @@ -30,6 +30,7 @@ class SfpUtil(SfpUtilBase): db_sel_object = None db_sel_tbl = None state_db = None + sfpd_status_tbl = None @property def port_start(self): @@ -176,6 +177,12 @@ def get_transceiver_change_event(self, timeout=0): self.db_sel.addSelectable(self.db_sel_tbl) self.db_sel_timeout = swsscommon.Select.TIMEOUT self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return false + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + return False, phy_port_dict (state, c) = self.db_sel.select(timeout) if state == self.db_sel_timeout: diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py index d617135e3e8..f84cefc6726 100644 --- a/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/plugins/sfputil.py @@ -30,6 +30,7 @@ class SfpUtil(SfpUtilBase): db_sel_object = None db_sel_tbl = None state_db = None + sfpd_status_tbl = None @property def port_start(self): @@ -176,6 +177,12 @@ def get_transceiver_change_event(self, timeout=0): self.db_sel.addSelectable(self.db_sel_tbl) self.db_sel_timeout = swsscommon.Select.TIMEOUT self.db_sel_object = swsscommon.Select.OBJECT + self.sfpd_status_tbl = swsscommon.Table(self.state_db, 'MLNX_SFPD_TASK') + + # Check the liveness of mlnx-sfpd, if it failed, return false + keys = self.sfpd_status_tbl.getKeys() + if 'LIVENESS' not in keys: + return False, phy_port_dict (state, c) = self.db_sel.select(timeout) if state == self.db_sel_timeout: diff --git a/platform/mellanox/mlnx-sfpd/scripts/mlnx-sfpd b/platform/mellanox/mlnx-sfpd/scripts/mlnx-sfpd index e91dbb7a8aa..a1d2e6d9c3b 100644 --- a/platform/mellanox/mlnx-sfpd/scripts/mlnx-sfpd +++ b/platform/mellanox/mlnx-sfpd/scripts/mlnx-sfpd @@ -11,6 +11,7 @@ import time import syslog import signal import json +import threading from python_sdk_api.sx_api import * from swsssdk import SonicV2Connector @@ -26,10 +27,11 @@ STATUS_PLUGIN = '1' STATUS_PLUGOUT = '0' STATUS_UNKNOWN = '2' -sfp_value_status_dict = {SDK_SFP_STATE_IN:STATUS_PLUGIN, SDK_SFP_STATE_OUT:STATUS_PLUGOUT} +SFPD_LIVENESS_UPDATE_INTERVAL_SECS = 30 -#========================== Syslog wrappers ========================== +sfp_value_status_dict = {SDK_SFP_STATE_IN:STATUS_PLUGIN, SDK_SFP_STATE_OUT:STATUS_PLUGOUT} +# ========================== Syslog wrappers ========================== def log_info(msg, also_print_to_console=False): syslog.openlog(SYSLOG_IDENTIFIER) syslog.syslog(syslog.LOG_INFO, msg) @@ -54,8 +56,7 @@ def log_error(msg, also_print_to_console=False): if also_print_to_console: print(msg) -#========================== Signal Handling ========================== - +# ========================== Signal Handling ========================== def signal_handler(sig, frame): if sig == signal.SIGHUP: log_info("Caught SIGHUP - ignoring...") @@ -83,11 +84,14 @@ def sx_recv(fd_p, handle): port_cnt_p = new_uint32_t_p() uint32_t_p_assign(port_cnt_p,64) label_port_list = [] + status = True + module_state = 0 rc = sx_lib_host_ifc_recv(fd_p, pkt, pkt_size_p, recv_info_p) if rc != 0: log_error("event receive exit with error, rc %d" % rc) - exit(rc) + status = False + return status, label_port_list, module_state pmpe_t = recv_info_p.event_info.pmpe port_list_size = pmpe_t.list_size @@ -99,21 +103,50 @@ def sx_recv(fd_p, handle): rc = sx_api_port_device_get(handle, 1 , 0, port_attributes_list, port_cnt_p) port_cnt = uint32_t_p_value(port_cnt_p) - for i in range(0,port_cnt): + for i in range(0, port_cnt): port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list,i) if port_attributes.log_port == logical_port: lable_port = port_attributes.port_mapping.module_port break label_port_list.append(lable_port) - return label_port_list, module_state + return status, label_port_list, module_state, def send_sfp_notification(db, interface, state): - sfp_notify = [interface,state] - msg = json.dumps(sfp_notify,separators=(',',':')) - db.publish('STATE_DB','TRANSCEIVER_NOTIFY', msg) + sfp_notify = [interface, state] + msg = json.dumps(sfp_notify, separators=(',', ':')) + db.publish('STATE_DB', 'TRANSCEIVER_NOTIFY', msg) return +def update_sfpd_liveness_key(db, timeout_secs): + if db.exists('STATE_DB', 'MLNX_SFPD_TASK|LIVENESS'): + db.expire('STATE_DB', 'MLNX_SFPD_TASK|LIVENESS', timeout_secs) + else: + db.set('STATE_DB', 'MLNX_SFPD_TASK|LIVENESS', 'value', 'ok') + db.expire('STATE_DB', 'MLNX_SFPD_TASK|LIVENESS', timeout_secs) + +# Timer thread wrapper class to update mlnx-sfpd liveness info to DB periodically +class sfpd_liveness_update_task: + def __init__(self, db): + self.task_stopping_event = threading.Event() + self.task_timer = None + self.state_db = db + + def task_run(self): + if self.task_stopping_event.isSet(): + log_error("Error: sfpd liveness update thread received stop event, exiting...") + return + + update_sfpd_liveness_key(self.state_db, 2*SFPD_LIVENESS_UPDATE_INTERVAL_SECS) + + self.task_timer = threading.Timer(SFPD_LIVENESS_UPDATE_INTERVAL_SECS, self.task_run) + self.task_timer.start() + + def task_stop(self): + self.task_stopping_event.set() + self.task_timer.join() + + # main start def main(): # Register our signal handlers @@ -121,26 +154,30 @@ def main(): signal.signal(signal.SIGINT, signal_handler) signal.signal(signal.SIGTERM, signal_handler) - #open SDK handler + # Connect to state db for notification sending + state_db = SonicV2Connector(host=REDIS_HOSTIP) + state_db.connect(state_db.STATE_DB) + + # Open SDK handler log_info("starting mlnx-sfpd...") rc, handle = sx_api_open(None) - retry_time = 1 + retry_time = 1 while rc != SX_STATUS_SUCCESS: time.sleep(2**retry_time) retry_time += 1 rc, handle = sx_api_open(None) if retry_time > 20: - log_error("Failed to open api handle.\nPlease check that SDK is running.") + log_error("Failed to open api handle. Please check that SDK is running.") sys.exit(errno.EACCES) - #open recv fd - rx_fd_p = new_sx_fd_t_p() + # Open recv fd + rx_fd_p = new_sx_fd_t_p() rc = sx_api_host_ifc_open(handle, rx_fd_p) if rc != 0: log_error("sx_api_host_ifc_open exit with error, rc %d" % rc) exit(rc) - # set up general host ifc parameters + # Set up general host ifc parameters swid = 0 cmd = SX_ACCESS_CMD_REGISTER uc_p = new_sx_user_channel_t_p() @@ -153,26 +190,34 @@ def main(): log_error("sx_api_host_ifc_trap_id_register_set exit with error, rc %d" % rc) exit(rc) - #connect to state db for notification sending - state_db = SonicV2Connector(host=REDIS_HOSTIP) - state_db.connect(state_db.STATE_DB) + liveness_info_update = sfpd_liveness_update_task(state_db) + liveness_info_update.task_run() - #main loop for sfp event listening + # Main loop for sfp event listening log_info("mlnx-sfpd started") while True: - state = STATUS_UNKNOWN - port_list, module_state = sx_recv(rx_fd_p, handle) - if module_state in sfp_value_status_dict: state = sfp_value_status_dict[module_state] + sfp_state = STATUS_UNKNOWN + rc, port_list, module_state = sx_recv(rx_fd_p, handle) + if not rc: + log_error("Failed to recv event from SDK, please check that SDK is running.") + break + + if module_state in sfp_value_status_dict: sfp_state = sfp_value_status_dict[module_state] - if state != STATUS_UNKNOWN: + if sfp_state != STATUS_UNKNOWN: for port in port_list: - log_info("SFP on port %d state %s" % (port, state)) - send_sfp_notification(state_db, str(port), state) + log_info("SFP on port %d state %s" % (port, sfp_state)) + send_sfp_notification(state_db, str(port), sfp_state) log_info("sfp change event handling done") - ''' - # TODO: clean open handlers before exit, need find out which errors can be raised by SDK in this case. + # Stop liveness update task + liveness_info_update.task_stop() + + # Remove mlnx-sfpd liveness key in DB if not expired yet. + if state_db.exists('STATE_DB', 'MLNX_SFPD_TASK|LIVENESS'): + state_db.delete(state_db, 'MLNX_SFPD_TASK|LIVENESS') + # unregister trap id cmd = SX_ACCESS_CMD_DEREGISTER rc = sx_api_host_ifc_trap_id_register_set(handle, cmd, swid, trap_id, uc_p) @@ -180,20 +225,20 @@ def main(): log_error("sx_api_host_ifc_trap_id_register_set exit with error, rc %d" % rc) exit(rc) - # close read fp + # Close read fp rc = sx_api_host_ifc_close(handle, rx_fd_p) if rc != 0: log_error("sx_api_host_ifc_close exit with error, rc %d" % rc) exit(rc) - # close sdk handler + # Close sdk handler rc = sx_api_close(handle) if rc != 0: - log_error("exit with error, rc %d" % rc) + log_error("sx_api_close exit with error, rc %d" % rc) exit(rc) log_info("mlnx-sfpd exited") - ''' + if __name__ == '__main__': main() From bc4a39fcd80018179cdf6050fdc93242db08a8f9 Mon Sep 17 00:00:00 2001 From: Kebo Liu Date: Sat, 18 Aug 2018 00:06:32 +0800 Subject: [PATCH 10/30] [swsssdk]: update DBInterface submodule (#1942) --- src/sonic-py-swsssdk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-py-swsssdk b/src/sonic-py-swsssdk index ca540c9c51e..6272b5f7abb 160000 --- a/src/sonic-py-swsssdk +++ b/src/sonic-py-swsssdk @@ -1 +1 @@ -Subproject commit ca540c9c51e2bb704802a89ecd2b485578bd8211 +Subproject commit 6272b5f7abb743411c703dac46eb39f951b57818 From 6cf2d10d8390317d8a435aea62573f06778570a5 Mon Sep 17 00:00:00 2001 From: Guohan Lu Date: Thu, 6 Sep 2018 10:15:29 +0000 Subject: [PATCH 11/30] [snmpagent]: update snmpagent submodule ae99de0 Extend RFC 2737 MIB and implement RFC 3433 (#69) Signed-off-by: Guohan Lu --- src/sonic-snmpagent | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index bf1b165458e..ae99de071b3 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit bf1b165458e4e19286d245a3398921057f4df21c +Subproject commit ae99de071b332882aa3ac1e163188af93f602231 From 0aeba8ad3b15623fbe73a0abc9dfbfea49d51372 Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Tue, 18 Sep 2018 18:27:16 -0700 Subject: [PATCH 12/30] [devices]: Update arista driver submodule (#2057) Incorporate a fix for the fan driver on 7050QX-32S --- platform/broadcom/sonic-platform-modules-arista | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index e741d13e226..db4a51be64e 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit e741d13e22689946174975c93ceb1c0f4accc867 +Subproject commit db4a51be64e9ef33463bc745efffeeb63e653fa6 From 2ffbb0e8c0f8a679aca988caae1fc3914bf6a836 Mon Sep 17 00:00:00 2001 From: Sagar Balani Date: Thu, 27 Sep 2018 01:13:01 -0700 Subject: [PATCH 13/30] [barefoot]: Fix bfn sde dep (#2086) --- platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 | 1 + platform/barefoot/docker-syncd-bfn/Dockerfile.j2 | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 b/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 index 9efeeb3f6b5..68604d92f6b 100644 --- a/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 +++ b/platform/barefoot/docker-syncd-bfn-rpc/Dockerfile.j2 @@ -27,6 +27,7 @@ RUN apt-get update \ python-dev \ wget \ cmake \ + libpython3.4 \ && wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \ && tar xvfz 1.0.0.tar.gz \ && cd nanomsg-1.0.0 \ diff --git a/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 b/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 index 3e31e4b9441..25c7872f646 100755 --- a/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 +++ b/platform/barefoot/docker-syncd-bfn/Dockerfile.j2 @@ -11,7 +11,7 @@ debs/{{ deb }}{{' '}} {%- endfor -%} debs/ -RUN apt-get install -y libxml2 libpcap-dev libusb-1.0-0-dev libcurl3 libcurl4-gnutls-dev libunwind8-dev +RUN apt-get install -y libxml2 libpcap-dev libusb-1.0-0-dev libcurl3 libcurl4-gnutls-dev libunwind8-dev libpython3.4 RUN dpkg -i \ {% for deb in docker_syncd_bfn_debs.split(' ') -%} From 786a908012395692ec2c86517ecf57b1521a1d39 Mon Sep 17 00:00:00 2001 From: Guohan Lu Date: Wed, 3 Oct 2018 01:52:36 +0000 Subject: [PATCH 14/30] [submodules]: update sonic-linux-kernel * 493ab6b 2018-10-01 | [Kernel] fix kernel build errors (#65) (origin/201807) [Ying Xie] * 6a58489 2018-10-01 | uart: fix race between uart_put_char() and uart_shutdown() (#64) [lguohan] Signed-off-by: Guohan Lu --- src/sonic-linux-kernel | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index 61923df0455..493ab6b7e7c 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit 61923df04554c64107fc91c095016232fb1859a0 +Subproject commit 493ab6b7e7ca7dfd3708297ceb2f13c999f41063 From 352532abf3b2a223d688318e2e327cb1c2d9b831 Mon Sep 17 00:00:00 2001 From: Guohan Lu Date: Wed, 3 Oct 2018 02:11:51 +0000 Subject: [PATCH 15/30] [submodule]: update sonic-linux-kernel * e9f0369 2018-09-07 | import upstream optoe chunk offset fix (#60) (HEAD, origin/201807) [lguohan] * b9135e2 2018-08-22 | Fix calculation of page_len in sff_8436_read_write function (#57) [yurypm] Signed-off-by: Guohan Lu --- src/sonic-linux-kernel | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index 493ab6b7e7c..e9f036923dc 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit 493ab6b7e7ca7dfd3708297ceb2f13c999f41063 +Subproject commit e9f036923dc0cf77b08474e50e5e15cf954b17ee From fd7c190bca06a5a5f93d2b6a0fe48839d6a6181f Mon Sep 17 00:00:00 2001 From: Mykola Faryma Date: Wed, 26 Sep 2018 19:20:37 +0000 Subject: [PATCH 16/30] [submodules] update dbsyncd and snmpagent pointers for LLDP MIB support Signed-off-by: Mykola Faryma --- src/sonic-dbsyncd | 2 +- src/sonic-snmpagent | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd index 94f2700f67f..987ad0c6fd9 160000 --- a/src/sonic-dbsyncd +++ b/src/sonic-dbsyncd @@ -1 +1 @@ -Subproject commit 94f2700f67f87b431c7ce45e4b9d7788707c6732 +Subproject commit 987ad0c6fd94fbcc2a882da942b48a67be22525f diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index ae99de071b3..b180f4423a6 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit ae99de071b332882aa3ac1e163188af93f602231 +Subproject commit b180f4423a6cd205009f2aed19c2bac441a2dfd0 From c2b1cae2575a80716b3c4886a81feadc1e079e8f Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Wed, 3 Oct 2018 21:02:42 -0700 Subject: [PATCH 17/30] [arista] Update Arista drivers submodule (#2107) --- platform/broadcom/sonic-platform-modules-arista | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index db4a51be64e..e970cf66d5e 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit db4a51be64e9ef33463bc745efffeeb63e653fa6 +Subproject commit e970cf66d5e5828b5ccb2a4fadeb66410a163dd2 From 182c35158c7969eff40e9d8c0baa9b936f7c4e0c Mon Sep 17 00:00:00 2001 From: zzhiyuan Date: Fri, 5 Oct 2018 09:15:26 -0700 Subject: [PATCH 18/30] [devices]: Update arista submodules for SFP txdisable toggle (#2123) With this update the SFPs will set txdisable to 0 when out of reset. Allowing optical cables to be used on these ports. --- platform/broadcom/sonic-platform-modules-arista | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index e970cf66d5e..d085f0e1037 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit e970cf66d5e5828b5ccb2a4fadeb66410a163dd2 +Subproject commit d085f0e1037460b73211bec621f907a3a3d65c6a From 12fe3001839291f8a00c6507596f24c246444b1a Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Tue, 2 Oct 2018 06:10:12 -0700 Subject: [PATCH 19/30] [devices]: Align flash partition at 1M (#2104) Flashes used for the 7050QX-32 and 7050QX-32S have a fw issue. The best option to solve the problem is to upgrade to a newer firmware. However this can only be done while in memory and take 10 seconds. Adding an upgrade mechanism is possible but would need more consideration as flashing the firmware and reformating the flash will exceed the fast-reboot requirements. A quick mitigation is to align the ext4 partition that we create on these vfat based system on a 4k boundary. Here we chose 1M instead but it's the same. Newer version of sfdisk do this automatically but the one in SONiC today doesn't have this behavior. This workaround will only reduce the pace of the flash health degradation. The only long term fix is to flash the firmware. --- files/initramfs-tools/arista-convertfs.j2 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/files/initramfs-tools/arista-convertfs.j2 b/files/initramfs-tools/arista-convertfs.j2 index cd3b381aa27..ffe5797ab72 100644 --- a/files/initramfs-tools/arista-convertfs.j2 +++ b/files/initramfs-tools/arista-convertfs.j2 @@ -172,7 +172,7 @@ umount "$root_mnt" if [ $(echo -n "$root_dev" | tail -c 1) == "1" ]; then # Create a new partition table (content in flash_dev will be deleted) err_msg="Error: repartitioning $flash_dev failed" - cmd="echo ';' | sfdisk $flash_dev || (sleep 3; blockdev --rereadpt $flash_dev && fdisk -l $flash_dev | grep -q ${root_dev}.*Linux)" + cmd="echo '2048' | sfdisk $flash_dev || (sleep 3; blockdev --rereadpt $flash_dev && fdisk -l $flash_dev | grep -q ${root_dev}.*Linux)" run_cmd "$cmd" "$err_msg" fi From 56b8a2cc9aa81e818f9aa4b296c65a1f769b7b70 Mon Sep 17 00:00:00 2001 From: yangbashuang <37615000+yangbashuang@users.noreply.github.com> Date: Wed, 17 Oct 2018 02:18:17 +0800 Subject: [PATCH 20/30] [centec]: update centec platform driver and device data (#2060) --- .../E582-48x2q4z/buffers.json.j2 | 70 + .../E582-48x2q4z/pg_profile_lookup.ini | 21 + .../E582-48x2q4z/port_config.ini | 55 + .../E582-48x2q4z/qos.json | 133 ++ .../E582-48x2q4z/sai.profile | 2 + .../x86_64-centec_e582_48x2q4z-r0/fancontrol | 10 + .../installer.conf | 2 + .../plugins/eeprom.py | 31 + .../plugins/led_control.py | 153 ++ .../plugins/psuutil.py | 74 + .../plugins/sfputil.py | 162 ++ .../E582-48x6q/buffers.json.j2 | 70 + .../E582-48x6q/pg_profile_lookup.ini | 21 + .../E582-48x6q/port_config.ini | 88 +- .../E582-48x6q/qos.json | 133 ++ .../E582-48x6q/sai.profile | 3 +- .../x86_64-centec_e582_48x6q-r0/fancontrol | 10 + .../installer.conf | 1 + .../x86_64-centec_e582_48x6q-r0/minigraph.xml | 1049 ---------- .../plugins/eeprom.py | 31 + .../plugins/led_control.py | 153 ++ .../plugins/psuutil.py | 74 + .../plugins/sfputil.py | 162 ++ .../ES6428A-X48Q2H4/sai.profile | 2 + .../x86_64-ew_es6220_x48q2h4-r0/minigraph.xml | 1049 ---------- dockers/docker-orchagent/orchagent.sh | 5 + platform/centec/libsaithrift-dev.mk | 2 +- platform/centec/one-image.mk | 4 +- .../centec/platform-modules-centec-e582.mk | 19 + platform/centec/python-saithrift.mk | 2 +- platform/centec/rules.mk | 2 +- platform/centec/sai.mk | 5 - platform/centec/sdk.mk | 7 +- .../48x2q4z/cfg/48x2q4z-modules.conf | 14 + .../48x2q4z/cfg/config_db.json | 302 +++ .../48x2q4z/cfg/config_db_l2l3.json | 610 ++++++ .../48x2q4z/cfg/minigraph.xml | 38 + .../48x2q4z/modules/Makefile | 2 + .../48x2q4z/modules/centec_at24c64.c | 602 ++++++ .../modules/centec_e582_48x2q4z_platform.c | 1457 +++++++++++++ .../48x2q4z/modules/dal_kernel.c | 1833 +++++++++++++++++ .../48x2q4z/modules/dal_kernel.h | 171 ++ .../48x2q4z/modules/dal_mpool.c | 350 ++++ .../48x2q4z/modules/dal_mpool.h | 72 + .../48x2q4z/scripts/48x2q4z_platform.sh | 78 + .../scripts/48x2q4z_platform_monitor.py | 217 ++ .../48x2q4z/service/48x2q4z_platform.service | 13 + .../48x6q/cfg/48x6q-modules.conf | 14 + .../48x6q/cfg/config_db.json | 302 +++ .../48x6q/cfg/config_db_l2l3.json | 610 ++++++ .../48x6q/cfg/minigraph.xml | 38 + .../48x6q/modules/Makefile | 2 + .../48x6q/modules/centec_at24c64.c | 602 ++++++ .../modules/centec_e582_48x6q_platform.c | 1381 +++++++++++++ .../48x6q/modules/dal_kernel.c | 1833 +++++++++++++++++ .../48x6q/modules/dal_kernel.h | 171 ++ .../48x6q/modules/dal_mpool.c | 350 ++++ .../48x6q/modules/dal_mpool.h | 72 + .../48x6q/scripts/48x6q_platform.sh | 62 + .../48x6q/scripts/48x6q_platform_monitor.py | 217 ++ .../48x6q/service/48x6q_platform.service | 13 + .../sonic-platform-modules-e582/LICENSE | 15 + .../sonic-platform-modules-e582/README.md | 1 + .../debian/changelog | 11 + .../sonic-platform-modules-e582/debian/compat | 1 + .../debian/control | 17 + .../debian/platform-modules-e582-48x2q4z.init | 38 + .../platform-modules-e582-48x2q4z.install | 7 + .../platform-modules-e582-48x2q4z.postinst | 3 + .../debian/platform-modules-e582-48x6q.init | 38 + .../platform-modules-e582-48x6q.install | 7 + .../platform-modules-e582-48x6q.postinst | 3 + .../sonic-platform-modules-e582/debian/rules | 35 + 73 files changed, 13063 insertions(+), 2144 deletions(-) create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py create mode 100644 device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/fancontrol delete mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/minigraph.xml create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py create mode 100644 device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py delete mode 100644 device/centec/x86_64-ew_es6220_x48q2h4-r0/minigraph.xml create mode 100644 platform/centec/platform-modules-centec-e582.mk delete mode 100644 platform/centec/sai.mk create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/minigraph.xml create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h create mode 100755 platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py create mode 100644 platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/cfg/minigraph.xml create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h create mode 100755 platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py create mode 100644 platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service create mode 100644 platform/centec/sonic-platform-modules-e582/LICENSE create mode 100644 platform/centec/sonic-platform-modules-e582/README.md create mode 100644 platform/centec/sonic-platform-modules-e582/debian/changelog create mode 100644 platform/centec/sonic-platform-modules-e582/debian/compat create mode 100644 platform/centec/sonic-platform-modules-e582/debian/control create mode 100755 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init create mode 100644 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install create mode 100644 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst create mode 100755 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init create mode 100644 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install create mode 100644 platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst create mode 100755 platform/centec/sonic-platform-modules-e582/debian/rules diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 new file mode 100644 index 00000000000..08e21e428b6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/buffers.json.j2 @@ -0,0 +1,70 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(1,default_ports_num+1) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + } +} + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini new file mode 100644 index 00000000000..a65244e69b5 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/pg_profile_lookup.ini @@ -0,0 +1,21 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 1000 5m 34816 18432 16384 0 + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 1000 40m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 1000 300m 49152 18432 30720 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini new file mode 100644 index 00000000000..78a1df9f051 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias speed +Ethernet1 75 eth-0-1 1000 +Ethernet2 73 eth-0-2 1000 +Ethernet3 72 eth-0-3 1000 +Ethernet4 70 eth-0-4 1000 +Ethernet5 69 eth-0-5 1000 +Ethernet6 67 eth-0-6 1000 +Ethernet7 66 eth-0-7 1000 +Ethernet8 64 eth-0-8 1000 +Ethernet9 63 eth-0-9 1000 +Ethernet10 61 eth-0-10 1000 +Ethernet11 60 eth-0-11 1000 +Ethernet12 58 eth-0-12 1000 +Ethernet13 57 eth-0-13 10000 +Ethernet14 56 eth-0-14 10000 +Ethernet15 55 eth-0-15 10000 +Ethernet16 53 eth-0-16 10000 +Ethernet17 52 eth-0-17 10000 +Ethernet18 50 eth-0-18 10000 +Ethernet19 49 eth-0-19 10000 +Ethernet20 48 eth-0-20 10000 +Ethernet21 0 eth-0-21 10000 +Ethernet22 1 eth-0-22 10000 +Ethernet23 3 eth-0-23 10000 +Ethernet24 2 eth-0-24 10000 +Ethernet25 4 eth-0-25 10000 +Ethernet26 5 eth-0-26 10000 +Ethernet27 6 eth-0-27 10000 +Ethernet28 7 eth-0-28 10000 +Ethernet29 8 eth-0-29 10000 +Ethernet30 9 eth-0-30 10000 +Ethernet31 10 eth-0-31 10000 +Ethernet32 12 eth-0-32 10000 +Ethernet33 13 eth-0-33 10000 +Ethernet34 15 eth-0-34 10000 +Ethernet35 16 eth-0-35 10000 +Ethernet36 18 eth-0-36 10000 +Ethernet37 19 eth-0-37 10000 +Ethernet38 21 eth-0-38 10000 +Ethernet39 22 eth-0-39 10000 +Ethernet40 24 eth-0-40 10000 +Ethernet41 25 eth-0-41 10000 +Ethernet42 27 eth-0-42 10000 +Ethernet43 28 eth-0-43 10000 +Ethernet44 30 eth-0-44 10000 +Ethernet45 31 eth-0-45 10000 +Ethernet46 33 eth-0-46 10000 +Ethernet47 34 eth-0-47 10000 +Ethernet48 36 eth-0-48 10000 +Ethernet49 42,41,43,40 eth-0-49 40000 +Ethernet50 45,46,44,47 eth-0-50 40000 +Ethernet51 94,93,95,92 eth-0-51 100000 +Ethernet52 89,90,88,91 eth-0-52 100000 +Ethernet53 85,86,84,87 eth-0-53 100000 +Ethernet54 81,82,80,83 eth-0-54 100000 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json new file mode 100644 index 00000000000..b9dc80abb07 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/qos.json @@ -0,0 +1,133 @@ +{ + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"1", + "10":"1", + "11":"1", + "12":"1", + "13":"1", + "14":"1", + "15":"1", + "16":"2", + "17":"2", + "18":"2", + "19":"2", + "20":"2", + "21":"2", + "22":"2", + "23":"2", + "24":"3", + "25":"3", + "26":"3", + "27":"3", + "28":"3", + "29":"3", + "30":"3", + "31":"3", + "32":"4", + "33":"4", + "34":"4", + "35":"4", + "36":"4", + "37":"4", + "38":"4", + "39":"4", + "40":"5", + "41":"5", + "42":"5", + "43":"5", + "44":"5", + "45":"5", + "46":"5", + "47":"5", + "48":"6", + "49":"6", + "50":"6", + "51":"6", + "52":"6", + "53":"6", + "54":"6", + "55":"6", + "56":"7", + "57":"7", + "58":"7", + "59":"7", + "60":"7", + "61":"7", + "62":"7", + "63":"7" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1": { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2": { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSY": { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "red_max_threshold":"32760", + "red_min_threshold":"4095", + "yellow_max_threshold":"32760", + "yellow_min_threshold":"4095", + "green_max_threshold": "32760", + "green_min_threshold": "4095" + }, + "AZURE_LOSSLESS": { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "red_max_threshold":"32760", + "red_min_threshold":"4095", + "yellow_max_threshold":"32760", + "yellow_min_threshold":"4095", + "green_max_threshold": "32760", + "green_min_threshold": "4095" + } + }, + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "scheduler" : "[SCHEDULER|scheduler.2]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" + }, + + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + } + } +} + + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile new file mode 100644 index 00000000000..6139a61cf0c --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/E582-48x2q4z/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/etc/centec/E582-48x2q4z-chip-profile.txt +SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/etc/centec/E582-48x2q4z-datapath-cfg.txt diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol b/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol new file mode 100644 index 00000000000..5bcd0383896 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/platform/coretemp.0 hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-15/15-002f +DEVNAME=hwmon1=coretemp hwmon5=adt7470 +FCTEMPS=hwmon5/pwm4=hwmon1/temp1_input hwmon5/pwm3=hwmon1/temp1_input hwmon5/pwm2=hwmon1/temp1_input hwmon5/pwm1=hwmon1/temp1_input +FCFANS=hwmon5/pwm4=hwmon5/fan4_input hwmon5/pwm3=hwmon5/fan3_input hwmon5/pwm2=hwmon5/fan2_input hwmon5/pwm1=hwmon5/fan1_input +MINTEMP=hwmon5/pwm4=20 hwmon5/pwm3=20 hwmon5/pwm2=20 hwmon5/pwm1=20 +MAXTEMP=hwmon5/pwm4=60 hwmon5/pwm3=60 hwmon5/pwm2=60 hwmon5/pwm1=60 +MINSTART=hwmon5/pwm4=150 hwmon5/pwm3=150 hwmon5/pwm2=150 hwmon5/pwm1=150 +MINSTOP=hwmon5/pwm4=0 hwmon5/pwm3=0 hwmon5/pwm2=0 hwmon5/pwm1=100 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf b/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf new file mode 100644 index 00000000000..7d60bf73d36 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=no" diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py new file mode 100644 index 00000000000..3fd55c63d8b --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/eeprom.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +############################################################################# +# Centec E582-48X6Q +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + import subprocess + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py new file mode 100644 index 00000000000..4459096cb01 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/led_control.py @@ -0,0 +1,153 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + LED_MODE_UP = [11, 1] + LED_MODE_DOWN = [7, 2] + + def _initSystemLed(self): + try: + with open(self.f_led.format("system"), 'w') as led_file: + led_file.write("5") + DBG_PRINT("init system led to normal") + with open(self.f_led.format("idn"), 'w') as led_file: + led_file.write("1") + DBG_PRINT("init idn led to off") + except IOError as e: + DBG_PRINT(str(e)) + + def _initPanelLed(self): + with open(self.f_led.format("port1"), 'r') as led_file: + shouldInit = (int(led_file.read()) == 0) + + if shouldInit == True: + for (port, ctlid, defmode) in self.led_mapping[1:59]: + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHBB30B', 0, 3, 32, 30, 0, *[x[0] for x in self.led_mapping[21:51]]) + self.udpClient.sendto(data, ('localhost', 8101)) + data = struct.pack('=HHHBB28B', 0, 3, 30, 28, 1, *[x[0] for x in (self.led_mapping[1:21]+self.led_mapping[51:59])]) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHB', 0, 5, 1, 1) + self.udpClient.sendto(data, ('localhost', 8101)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'w') as led_file: + led_file.write(str(defmode)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'r') as led_file: + defmode = int(led_file.read()) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + def _initDefaultConfig(self): + DBG_PRINT("start init led") + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + self._initSystemLed() + self._initPanelLed() + + DBG_PRINT("init led done") + + + # Helper method to map SONiC port name to index + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return self.LED_MODE_UP[0] if (port_idx < 49) else self.LED_MODE_UP[1] + else: + return self.LED_MODE_DOWN[0] if (port_idx < 49) else self.LED_MODE_DOWN[1] + + def _port_led_mode_update(self, port_idx, ledMode): + with open(self.f_led.format("port{}".format(port_idx)), 'w') as led_file: + led_file.write(str(ledMode)) + (port, ctlid) = (self.led_mapping[port_idx][0], self.led_mapping[port_idx][1]) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, ledMode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + # Concrete implementation of port_link_state_change() method + def port_link_state_change(self, portname, state): + port_idx = self._port_name_to_index(portname) + ledMode = self._port_state_to_mode(port_idx, state) + with open(self.f_led.format("port{}".format(port_idx)), 'r') as led_file: + saveMode = int(led_file.read()) + + if ledMode == saveMode: + return + + self._port_led_mode_update(port_idx, ledMode) + DBG_PRINT("update {} led mode from {} to {}".format(portname, saveMode, ledMode)) + + # Constructor + def __init__(self): + # [macid, ctlid, defaultmode] + self.led_mapping = [(0, 0, 0)] # resv + self.led_mapping.extend([(27, 1, 7), (25, 1, 7), (24, 1, 7), (22, 1, 7), (21, 1, 7), (19, 1, 7), (18, 1, 7), (16, 1, 7)]) # panel port 1~8 + self.led_mapping.extend([(15, 1, 7), (13, 1, 7), (12, 1, 7), (10, 1, 7), (9, 1, 7), (8, 1, 7), (7, 1, 7), (5, 1, 7)]) # panel port 9~16 + self.led_mapping.extend([(4, 1, 7), (2, 1, 7), (1, 1, 7), (0, 1, 7), (0, 0, 7), (1, 0, 7), (3, 0, 7), (2, 0, 7)]) # panel port 17~24 + self.led_mapping.extend([(4, 0, 7), (5, 0, 7), (6, 0, 7), (7, 0, 7), (8, 0, 7), (9, 0, 7), (10, 0, 7), (12, 0, 7)]) # panel port 25~32 + self.led_mapping.extend([(13, 0, 7), (15, 0, 7), (16, 0, 7), (18, 0, 7), (19, 0, 7), (21, 0, 7), (22, 0, 7), (24, 0, 7)]) # panel port 33~40 + self.led_mapping.extend([(25, 0, 7), (27, 0, 7), (28, 0, 7), (30, 0, 7), (31, 0, 7), (33, 0, 7), (34, 0, 7), (48, 0, 7)]) # panel port 41~48 + self.led_mapping.extend([(36, 0, 2), (52, 0, 2), (52, 1, 2), (36, 1, 2), (48, 1, 2), (32, 1, 2)]) # panel port 49~54 + self.led_mapping.extend([(11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2), (11, 1, 2)]) + + self.f_led = "/sys/class/leds/{}/brightness" + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + + self._initDefaultConfig() + diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py new file mode 100644 index 00000000000..5f8ba030c1f --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/class/psu/psu{}/" + self.psu_presence = "psu_presence" + self.psu_oper_status = "psu_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_oper_status, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 0 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_presence, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 0 diff --git a/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py new file mode 100644 index 00000000000..4d4b3f3e555 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x2q4z-r0/plugins/sfputil.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python + +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import logging + import struct + import syslog + from socket import * + from select import * + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + + +def DBG_PRINT(str): + print str + "\n" + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(49, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self.eeprom_mapping + + def is_logical_port(self, port_name): + return True + + def get_logical_to_physical(self, port_name): + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return None + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + return [port_idx] + + def get_eeprom_data(self, port): + (ctlid, devid) = self.fiber_mapping[port] + offset = (128 if port in self.qsfp_ports else 0) + r_sel = [self.udpClient] + req = struct.pack('=HHHBBHIBBBBI', + 0, 9, 16, # lchip/msgtype/msglen + ctlid, # uint8 ctl_id + devid, # uint8 slave_dev_id + 0x50, # uint16 dev_addr + (1< self.port_end: + return False + try: + with open(self.f_sfp_present.format(port_num), 'r') as sfp_file: + return 1 == int(sfp_file.read()) + except IOError as e: + DBG_PRINT(str(e)) + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def get_transceiver_change_event(self, timeout=0): + return False, {} diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 new file mode 100644 index 00000000000..08e21e428b6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/buffers.json.j2 @@ -0,0 +1,70 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set default_ports_num = 54 -%} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) -%} + {%- set cable_len = [] -%} + {%- for local_port in DEVICE_NEIGHBOR -%} + {%- if local_port == port_name -%} + {%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%} + {%- set neighbor_role = neighbor.type -%} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role -%} + {%- set roles1 = roles1 | lower -%} + {%- set roles2 = roles2 | lower -%} + {%- if roles1 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%} + {%- elif roles2 in ports2cable -%} + {%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endfor -%} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif -%} +{% endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{# Generate list of ports if not defined #} +{% if PORT is not defined %} + {% set PORT = [] %} + {% for port_idx in range(1,default_ports_num+1) %} + {% if PORT.append("Ethernet%d" % (port_idx)) %}{% endif %} + {% endfor %} +{% endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + + {% endfor %} + } + } +} + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini new file mode 100644 index 00000000000..a65244e69b5 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/pg_profile_lookup.ini @@ -0,0 +1,21 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 1000 5m 34816 18432 16384 0 + 10000 5m 34816 18432 16384 0 + 25000 5m 34816 18432 16384 0 + 40000 5m 34816 18432 16384 0 + 50000 5m 34816 18432 16384 0 + 100000 5m 36864 18432 18432 0 + 1000 40m 36864 18432 18432 0 + 10000 40m 36864 18432 18432 0 + 25000 40m 39936 18432 21504 0 + 40000 40m 41984 18432 23552 0 + 50000 40m 41984 18432 23552 0 + 100000 40m 54272 18432 35840 0 + 1000 300m 49152 18432 30720 0 + 10000 300m 49152 18432 30720 0 + 25000 300m 71680 18432 53248 0 + 40000 300m 94208 18432 75776 0 + 50000 300m 94208 18432 75776 0 + 100000 300m 184320 18432 165888 0 + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini index b9a831f22e8..efb24937cec 100644 --- a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/port_config.ini @@ -1,33 +1,55 @@ -# name lanes -Ethernet0 1 -Ethernet4 2 -Ethernet8 3 -Ethernet12 4 -Ethernet16 5 -Ethernet20 6 -Ethernet24 7 -Ethernet28 8 -Ethernet32 9 -Ethernet36 10 -Ethernet40 11 -Ethernet44 12 -Ethernet48 13 -Ethernet52 14 -Ethernet56 15 -Ethernet60 16 -Ethernet64 17 -Ethernet68 18 -Ethernet72 19 -Ethernet76 20 -Ethernet80 21 -Ethernet84 22 -Ethernet88 23 -Ethernet92 24 -Ethernet96 25 -Ethernet100 26 -Ethernet104 27 -Ethernet108 28 -Ethernet112 29 -Ethernet116 30 -Ethernet120 31 -Ethernet124 32 +# name lanes alias speed +Ethernet1 4 eth-0-1 1000 +Ethernet2 5 eth-0-2 1000 +Ethernet3 6 eth-0-3 1000 +Ethernet4 8 eth-0-4 1000 +Ethernet5 9 eth-0-5 1000 +Ethernet6 10 eth-0-6 1000 +Ethernet7 12 eth-0-7 1000 +Ethernet8 13 eth-0-8 1000 +Ethernet9 14 eth-0-9 1000 +Ethernet10 16 eth-0-10 1000 +Ethernet11 17 eth-0-11 1000 +Ethernet12 18 eth-0-12 1000 +Ethernet13 20 eth-0-13 10000 +Ethernet14 21 eth-0-14 10000 +Ethernet15 22 eth-0-15 10000 +Ethernet16 24 eth-0-16 10000 +Ethernet17 25 eth-0-17 10000 +Ethernet18 26 eth-0-18 10000 +Ethernet19 28 eth-0-19 10000 +Ethernet20 30 eth-0-20 10000 +Ethernet21 31 eth-0-21 10000 +Ethernet22 32 eth-0-22 10000 +Ethernet23 34 eth-0-23 10000 +Ethernet24 35 eth-0-24 10000 +Ethernet25 36 eth-0-25 10000 +Ethernet26 37 eth-0-26 10000 +Ethernet27 39 eth-0-27 10000 +Ethernet28 40 eth-0-28 10000 +Ethernet29 41 eth-0-29 10000 +Ethernet30 43 eth-0-30 10000 +Ethernet31 47 eth-0-31 10000 +Ethernet32 46 eth-0-32 10000 +Ethernet33 45 eth-0-33 10000 +Ethernet34 44 eth-0-34 10000 +Ethernet35 92 eth-0-35 10000 +Ethernet36 93 eth-0-36 10000 +Ethernet37 94 eth-0-37 10000 +Ethernet38 95 eth-0-38 10000 +Ethernet39 90 eth-0-39 10000 +Ethernet40 89 eth-0-40 10000 +Ethernet41 88 eth-0-41 10000 +Ethernet42 87 eth-0-42 10000 +Ethernet43 86 eth-0-43 10000 +Ethernet44 85 eth-0-44 10000 +Ethernet45 84 eth-0-45 10000 +Ethernet46 82 eth-0-46 10000 +Ethernet47 81 eth-0-47 10000 +Ethernet48 80 eth-0-48 10000 +Ethernet49 77,78,76,79 eth-0-49 40000 +Ethernet50 73,74,72,75 eth-0-50 40000 +Ethernet51 70,71,69,68 eth-0-51 40000 +Ethernet52 61,63,60,62 eth-0-52 40000 +Ethernet53 59,57,58,56 eth-0-53 40000 +Ethernet54 53,55,54,52 eth-0-54 40000 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json new file mode 100644 index 00000000000..b9dc80abb07 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/qos.json @@ -0,0 +1,133 @@ +{ + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"1", + "10":"1", + "11":"1", + "12":"1", + "13":"1", + "14":"1", + "15":"1", + "16":"2", + "17":"2", + "18":"2", + "19":"2", + "20":"2", + "21":"2", + "22":"2", + "23":"2", + "24":"3", + "25":"3", + "26":"3", + "27":"3", + "28":"3", + "29":"3", + "30":"3", + "31":"3", + "32":"4", + "33":"4", + "34":"4", + "35":"4", + "36":"4", + "37":"4", + "38":"4", + "39":"4", + "40":"5", + "41":"5", + "42":"5", + "43":"5", + "44":"5", + "45":"5", + "46":"5", + "47":"5", + "48":"6", + "49":"6", + "50":"6", + "51":"6", + "52":"6", + "53":"6", + "54":"6", + "55":"6", + "56":"7", + "57":"7", + "58":"7", + "59":"7", + "60":"7", + "61":"7", + "62":"7", + "63":"7" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1": { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2": { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "pfc_enable": "3,4" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSY": { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "red_max_threshold":"32760", + "red_min_threshold":"4095", + "yellow_max_threshold":"32760", + "yellow_min_threshold":"4095", + "green_max_threshold": "32760", + "green_min_threshold": "4095" + }, + "AZURE_LOSSLESS": { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "red_max_threshold":"32760", + "red_min_threshold":"4095", + "yellow_max_threshold":"32760", + "yellow_min_threshold":"4095", + "green_max_threshold": "32760", + "green_min_threshold": "4095" + } + }, + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "scheduler" : "[SCHEDULER|scheduler.1]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "scheduler" : "[SCHEDULER|scheduler.2]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" + }, + + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "scheduler" : "[SCHEDULER|scheduler.0]", + "wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]" + } + } +} + + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile index 2eb3ce5f612..c03fcf630c5 100644 --- a/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile +++ b/device/centec/x86_64-centec_e582_48x6q-r0/E582-48x6q/sai.profile @@ -1 +1,2 @@ -BOARD_CONFIG_FILE_PATH=/etc/centec/E582-48x6q.json +SAI_INIT_CONFIG_FILE=/etc/centec/E582-48x6q-chip-profile.txt +SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/etc/centec/E582-48x6q-datapath-cfg.txt diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol b/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol new file mode 100644 index 00000000000..5bcd0383896 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH=hwmon1=devices/platform/coretemp.0 hwmon5=devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-15/15-002f +DEVNAME=hwmon1=coretemp hwmon5=adt7470 +FCTEMPS=hwmon5/pwm4=hwmon1/temp1_input hwmon5/pwm3=hwmon1/temp1_input hwmon5/pwm2=hwmon1/temp1_input hwmon5/pwm1=hwmon1/temp1_input +FCFANS=hwmon5/pwm4=hwmon5/fan4_input hwmon5/pwm3=hwmon5/fan3_input hwmon5/pwm2=hwmon5/fan2_input hwmon5/pwm1=hwmon5/fan1_input +MINTEMP=hwmon5/pwm4=20 hwmon5/pwm3=20 hwmon5/pwm2=20 hwmon5/pwm1=20 +MAXTEMP=hwmon5/pwm4=60 hwmon5/pwm3=60 hwmon5/pwm2=60 hwmon5/pwm1=60 +MINSTART=hwmon5/pwm4=150 hwmon5/pwm3=150 hwmon5/pwm2=150 hwmon5/pwm1=150 +MINSTOP=hwmon5/pwm4=0 hwmon5/pwm3=0 hwmon5/pwm2=0 hwmon5/pwm1=100 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf b/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf index 5e62742c11b..7d60bf73d36 100644 --- a/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf +++ b/device/centec/x86_64-centec_e582_48x6q-r0/installer.conf @@ -1 +1,2 @@ CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=no" diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/minigraph.xml b/device/centec/x86_64-centec_e582_48x6q-r0/minigraph.xml deleted file mode 100644 index 950c52a6413..00000000000 --- a/device/centec/x86_64-centec_e582_48x6q-r0/minigraph.xml +++ /dev/null @@ -1,1049 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - sonic - 10.0.0.34 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - sonic - 10.0.0.36 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - sonic - 10.0.0.38 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - sonic - 10.0.0.40 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - sonic - 10.0.0.42 - 1 - 180 - 60 - - - sonic - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - sonic - 10.0.0.44 - 1 - 180 - 60 - - - sonic - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - sonic - 10.0.0.46 - 1 - 180 - 60 - - - sonic - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - sonic - 10.0.0.48 - 1 - 180 - 60 - - - sonic - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - sonic - 10.0.0.50 - 1 - 180 - 60 - - - sonic - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - sonic - 10.0.0.52 - 1 - 180 - 60 - - - sonic - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - sonic - 10.0.0.54 - 1 - 180 - 60 - - - sonic - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - sonic - 10.0.0.56 - 1 - 180 - 60 - - - sonic - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - sonic - 10.0.0.58 - 1 - 180 - 60 - - - sonic - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - sonic - 10.0.0.60 - 1 - 180 - 60 - - - sonic - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - sonic - 10.0.0.62 - 1 - 180 - 60 - - - sonic - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - sonic - - -
10.0.0.33
- - - - -
10.0.0.1
- - - - -
10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - - - - - - - - HostIP - Loopback0 - - 10.1.0.32/32 - - 10.1.0.32/32 - - - - - - - - sonic - - - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - sonic - E582-48x6q - - - - sonic - E582-48x6q - diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py new file mode 100644 index 00000000000..3fd55c63d8b --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/eeprom.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +############################################################################# +# Centec E582-48X6Q +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + import subprocess + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0057/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py new file mode 100644 index 00000000000..d25bf6f8b47 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/led_control.py @@ -0,0 +1,153 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import swsssdk + import threading + import os + import logging + import struct + import time + import syslog + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + LED_MODE_UP = [11, 1] + LED_MODE_DOWN = [7, 2] + + def _initSystemLed(self): + try: + with open(self.f_led.format("system"), 'w') as led_file: + led_file.write("5") + DBG_PRINT("init system led to normal") + with open(self.f_led.format("idn"), 'w') as led_file: + led_file.write("1") + DBG_PRINT("init idn led to off") + except IOError as e: + DBG_PRINT(str(e)) + + def _initPanelLed(self): + with open(self.f_led.format("port1"), 'r') as led_file: + shouldInit = (int(led_file.read()) == 0) + + if shouldInit == True: + for (port, ctlid, defmode) in self.led_mapping[1:59]: + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHBB34B', 0, 3, 36, 34, 0, *[x[0] for x in self.led_mapping[1:35]]) + self.udpClient.sendto(data, ('localhost', 8101)) + data = struct.pack('=HHHBB24B', 0, 3, 26, 24, 1, *[x[0] for x in self.led_mapping[35:59]]) + self.udpClient.sendto(data, ('localhost', 8101)) + + data = struct.pack('=HHHB', 0, 5, 1, 1) + self.udpClient.sendto(data, ('localhost', 8101)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'w') as led_file: + led_file.write(str(defmode)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + for idx in range(1, 55): + (port, ctlid, defmode) = self.led_mapping[idx] + with open(self.f_led.format("port{}".format(idx)), 'r') as led_file: + defmode = int(led_file.read()) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, defmode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("init port{} led to mode={}".format(idx, defmode)) + + def _initDefaultConfig(self): + DBG_PRINT("start init led") + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + self._initSystemLed() + self._initPanelLed() + + DBG_PRINT("init led done") + + + # Helper method to map SONiC port name to index + def _port_name_to_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + return port_idx + + def _port_state_to_mode(self, port_idx, state): + if state == "up": + return self.LED_MODE_UP[0] if (port_idx < 49) else self.LED_MODE_UP[1] + else: + return self.LED_MODE_DOWN[0] if (port_idx < 49) else self.LED_MODE_DOWN[1] + + def _port_led_mode_update(self, port_idx, ledMode): + with open(self.f_led.format("port{}".format(port_idx)), 'w') as led_file: + led_file.write(str(ledMode)) + (port, ctlid) = (self.led_mapping[port_idx][0], self.led_mapping[port_idx][1]) + data = struct.pack('=HHHBBH', 0, 7, 4, ctlid, ledMode, port) + self.udpClient.sendto(data, ('localhost', 8101)) + + # Concrete implementation of port_link_state_change() method + def port_link_state_change(self, portname, state): + port_idx = self._port_name_to_index(portname) + ledMode = self._port_state_to_mode(port_idx, state) + with open(self.f_led.format("port{}".format(port_idx)), 'r') as led_file: + saveMode = int(led_file.read()) + + if ledMode == saveMode: + return + + self._port_led_mode_update(port_idx, ledMode) + DBG_PRINT("update {} led mode from {} to {}".format(portname, saveMode, ledMode)) + + # Constructor + def __init__(self): + # [macid, ctlid, defaultmode] + self.led_mapping = [(0, 0, 0)] # resv + self.led_mapping.extend([(4, 0, 7), (5, 0, 7), (6, 0, 7), (8, 0, 7), (9, 0, 7), (10, 0, 7), (12, 0, 7), (13, 0, 7)]) # panel port 1~8 + self.led_mapping.extend([(14, 0, 7), (16, 0, 7), (17, 0, 7), (18, 0, 7), (20, 0, 7), (21, 0, 7), (22, 0, 7), (24, 0, 7)]) # panel port 9~16 + self.led_mapping.extend([(25, 0, 7), (26, 0, 7), (28, 0, 7), (30, 0, 7), (31, 0, 7), (32, 0, 7), (34, 0, 7), (35, 0, 7)]) # panel port 17~24 + self.led_mapping.extend([(48, 0, 7), (49, 0, 7), (51, 0, 7), (36, 0, 7), (37, 0, 7), (39, 0, 7), (55, 0, 7), (54, 0, 7)]) # panel port 25~32 + self.led_mapping.extend([(53, 0, 7), (52, 0, 7), (52, 1, 7), (53, 1, 7), (54, 1, 7), (55, 1, 7), (38, 1, 7), (37, 1, 7)]) # panel port 33~40 + self.led_mapping.extend([(36, 1, 7), (51, 1, 7), (50, 1, 7), (49, 1, 7), (48, 1, 7), (34, 1, 7), (33, 1, 7), (32, 1, 7)]) # panel port 41~48 + self.led_mapping.extend([(28, 1, 2), (24, 1, 2), (20, 1, 2), (12, 1, 2), (8, 1, 2), (4, 1, 2)]) # panel port 49~54 + self.led_mapping.extend([(0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2), (0, 1, 2)]) + + self.f_led = "/sys/class/leds/{}/brightness" + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + + self._initDefaultConfig() + diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py new file mode 100644 index 00000000000..5f8ba030c1f --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/psuutil.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python + +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC PSU Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + self.psu_path = "/sys/class/psu/psu{}/" + self.psu_presence = "psu_presence" + self.psu_oper_status = "psu_status" + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_oper_status, 'r') as power_status: + status = int(power_status.read()) + except IOError: + return False + + return status == 0 + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + status = 0 + try: + with open(self.psu_path.format(index) + self.psu_presence, 'r') as presence_status: + status = int(presence_status.read()) + except IOError: + return False + + return status == 0 diff --git a/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py new file mode 100644 index 00000000000..8d1281492d6 --- /dev/null +++ b/device/centec/x86_64-centec_e582_48x6q-r0/plugins/sfputil.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python + +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import logging + import struct + import syslog + from socket import * + from select import * + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + + +def DBG_PRINT(str): + print str + "\n" + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + SONIC_PORT_NAME_PREFIX = "Ethernet" + PORT_START = 1 + PORT_END = 54 + PORTS_IN_BLOCK = 54 + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(49, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self.eeprom_mapping + + def is_logical_port(self, port_name): + return True + + def get_logical_to_physical(self, port_name): + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return None + + port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + return [port_idx] + + def get_eeprom_data(self, port): + (ctlid, devid) = self.fiber_mapping[port] + offset = (128 if port in self.qsfp_ports else 0) + r_sel = [self.udpClient] + req = struct.pack('=HHHBBHIBBBBI', + 0, 9, 16, # lchip/msgtype/msglen + ctlid, # uint8 ctl_id + devid, # uint8 slave_dev_id + 0x50, # uint16 dev_addr + (1< self.port_end: + return False + try: + with open(self.f_sfp_present.format(port_num), 'r') as sfp_file: + return 1 == int(sfp_file.read()) + except IOError as e: + DBG_PRINT(str(e)) + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return False + + def get_transceiver_change_event(self, timeout=0): + return False, {} diff --git a/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile index 6a5af192a2b..8a53138d243 100644 --- a/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile +++ b/device/centec/x86_64-ew_es6220_x48q2h4-r0/ES6428A-X48Q2H4/sai.profile @@ -1 +1,3 @@ BOARD_CONFIG_FILE_PATH=/etc/centec/ES6428A-X48Q2H4.json +SAI_INIT_CONFIG_FILE=/etc/centec/ES6428A-X48Q2H4-chip-profile.txt +SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/etc/centec/ES6428A-X48Q2H4-datapath-cfg.txt diff --git a/device/centec/x86_64-ew_es6220_x48q2h4-r0/minigraph.xml b/device/centec/x86_64-ew_es6220_x48q2h4-r0/minigraph.xml deleted file mode 100644 index cb0e9d4e2b0..00000000000 --- a/device/centec/x86_64-ew_es6220_x48q2h4-r0/minigraph.xml +++ /dev/null @@ -1,1049 +0,0 @@ - - - - - - ARISTA01T0 - 10.0.0.33 - sonic - 10.0.0.32 - 1 - 180 - 60 - - - sonic - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - sonic - 10.0.0.34 - 1 - 180 - 60 - - - sonic - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - sonic - 10.0.0.36 - 1 - 180 - 60 - - - sonic - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - sonic - 10.0.0.38 - 1 - 180 - 60 - - - sonic - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - sonic - 10.0.0.40 - 1 - 180 - 60 - - - sonic - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - sonic - 10.0.0.42 - 1 - 180 - 60 - - - sonic - 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- - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - - - - - - - - - - - DeviceInterfaceLink - sonic - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - sonic - Ethernet124 - ARISTA16T0 - Ethernet1 - - - - - sonic - ES6428A-X48Q2H4 - - - - sonic - ES6428A-X48Q2H4 - diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index af9e5b0766a..7758ceeed59 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -20,6 +20,11 @@ elif [ "$platform" == "cavium" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" elif [ "$platform" == "nephos" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" +elif [ "$platform" == "centec" ]; then + last_byte=$(python -c "print '$MAC_ADDRESS'[-2:]") + aligned_last_byte=$(python -c "print format(int(int('$last_byte', 16) + 1), '02x')") # put mask and take away the 0x prefix + ALIGNED_MAC_ADDRESS=$(python -c "print '$MAC_ADDRESS'[:-2] + '$aligned_last_byte'") # put aligned byte into the end of MAC + ORCHAGENT_ARGS+="-m $ALIGNED_MAC_ADDRESS" elif [ "$platform" == "barefoot" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" fi diff --git a/platform/centec/libsaithrift-dev.mk b/platform/centec/libsaithrift-dev.mk index fc1fe398080..f3f5b4dfbf7 100644 --- a/platform/centec/libsaithrift-dev.mk +++ b/platform/centec/libsaithrift-dev.mk @@ -1,6 +1,6 @@ # libsaithrift-dev package -LIBSAITHRIFT_DEV_CENTEC = libsaithrift-dev_1.2.1_amd64.deb +LIBSAITHRIFT_DEV_CENTEC = libsaithrift-dev_1.3.0_amd64.deb $(LIBSAITHRIFT_DEV_CENTEC)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI $(LIBSAITHRIFT_DEV_CENTEC)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(CENTEC_SAI) $(LIBSAITHRIFT_DEV_CENTEC)_RDEPENDS += $(LIBTHRIFT) $(CENTEC_SAI) diff --git a/platform/centec/one-image.mk b/platform/centec/one-image.mk index 7ad205dce52..d9aa401b2e6 100644 --- a/platform/centec/one-image.mk +++ b/platform/centec/one-image.mk @@ -3,6 +3,8 @@ SONIC_ONE_IMAGE = sonic-centec.bin $(SONIC_ONE_IMAGE)_MACHINE = centec $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie -$(SONIC_ONE_IMAGE)_INSTALLS += $(CENTEC_SDK_KERNEL) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CENTEC_E582_48X6Q_PLATFORM_MODULE) \ + $(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) + diff --git a/platform/centec/platform-modules-centec-e582.mk b/platform/centec/platform-modules-centec-e582.mk new file mode 100644 index 00000000000..e86c428a740 --- /dev/null +++ b/platform/centec/platform-modules-centec-e582.mk @@ -0,0 +1,19 @@ +# Centec E582-48X6Q Platform modules + + +CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION =1.1 +CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION =1.1 + +export CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION +export CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION + +CENTEC_E582_48X6Q_PLATFORM_MODULE = platform-modules-e582-48x6q_$(CENTEC_E582_48X6Q_PLATFORM_MODULE_VERSION)_amd64.deb + +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-e582 +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(CENTEC_E582_48X6Q_PLATFORM_MODULE)_PLATFORM = x86_64-centec_e582_48x6q-r0 +SONIC_DPKG_DEBS += $(CENTEC_E582_48X6Q_PLATFORM_MODULE) + +CENTEC_E582_48X2Q4Z_PLATFORM_MODULE = platform-modules-e582-48x2q4z_$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE_VERSION)_amd64.deb +$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE)_PLATFORM = x86_64-centec_e582_48x2q4z-r0 +$(eval $(call add_extra_package,$(CENTEC_E582_48X6Q_PLATFORM_MODULE),$(CENTEC_E582_48X2Q4Z_PLATFORM_MODULE))) diff --git a/platform/centec/python-saithrift.mk b/platform/centec/python-saithrift.mk index 30bd8715397..6801b859ad1 100644 --- a/platform/centec/python-saithrift.mk +++ b/platform/centec/python-saithrift.mk @@ -1,6 +1,6 @@ # python-saithrift package -PYTHON_SAITHRIFT_CENTEC = python-saithrift_1.2.1_amd64.deb +PYTHON_SAITHRIFT_CENTEC = python-saithrift_1.3.0_amd64.deb $(PYTHON_SAITHRIFT_CENTEC)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI $(PYTHON_SAITHRIFT_CENTEC)_DEPENDS += $(CENTEC_SAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV) SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_CENTEC) diff --git a/platform/centec/rules.mk b/platform/centec/rules.mk index 8b676f87ece..823144dc25c 100644 --- a/platform/centec/rules.mk +++ b/platform/centec/rules.mk @@ -1,5 +1,5 @@ +include $(PLATFORM_PATH)/platform-modules-centec-e582.mk include $(PLATFORM_PATH)/sdk.mk -include $(PLATFORM_PATH)/sai.mk include $(PLATFORM_PATH)/docker-orchagent-centec.mk include $(PLATFORM_PATH)/docker-syncd-centec.mk include $(PLATFORM_PATH)/docker-syncd-centec-rpc.mk diff --git a/platform/centec/sai.mk b/platform/centec/sai.mk deleted file mode 100644 index 299b36a69eb..00000000000 --- a/platform/centec/sai.mk +++ /dev/null @@ -1,5 +0,0 @@ -# Centec SAI -CENTEC_SAI = libsai_1.0.0_amd64.deb -$(CENTEC_SAI)_URL = https://github.com/CentecNetworks/goldengate-sai/raw/master/lib/SONiC_1.0/libsai_1.0.0_amd64.deb - -SONIC_ONLINE_DEBS += $(CENTEC_SAI) diff --git a/platform/centec/sdk.mk b/platform/centec/sdk.mk index e3ce05f6b74..6a460e9e9f9 100644 --- a/platform/centec/sdk.mk +++ b/platform/centec/sdk.mk @@ -1,4 +1,5 @@ -CENTEC_SDK_KERNEL = centec-gg-sdk3.5-modules-3.16.0-4-amd64.deb -$(CENTEC_SDK_KERNEL)_URL = "https://github.com/CentecNetworks/goldengate-sai/raw/master/lib/SONiC_1.0/centec-gg-sdk3.5-modules-3.16.0-4-amd64.deb" +# Centec SAI +CENTEC_SAI = libsai_1.3.0_amd64.deb +$(CENTEC_SAI)_URL = https://github.com/CentecNetworks/goldengate-sai/raw/master/lib/SONiC_1.3.0/libsai_1.3.0-1.0_amd64.deb -SONIC_ONLINE_DEBS += $(CENTEC_SDK_KERNEL) +SONIC_ONLINE_DEBS += $(CENTEC_SAI) diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf new file mode 100644 index 00000000000..7a7881c8c0d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/48x2q4z-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +lm77 +adt7470 +tun diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json new file mode 100644 index 00000000000..3a5c8ba914b --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db.json @@ -0,0 +1,302 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": 65100, + "deployment_id": null, + "hostname": "switch1", + "type": "LeafRouter", + "hwsku": "E582-48x6q" + + } + }, + "BGP_PEER_RANGE": {}, + "VLAN": {}, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "100000", + "mtu": "9100" + } + }, + "SYSLOG_SERVER": {}, + "VLAN_INTERFACE": {}, + "PORTCHANNEL_INTERFACE": {}, + "PORTCHANNEL": {}, + "MGMT_INTERFACE": {}, + "DHCP_SERVER": {}, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "ACL_TABLE": {}, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json new file mode 100644 index 00000000000..dd40332f904 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/config_db_l2l3.json @@ -0,0 +1,610 @@ +{ + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]", + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + }, + "AZURE_LOSSY": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "56": "7", + "54": "6", + "28": "3", + "48": "6", + "29": "3", + "60": "7", + "61": "7", + "62": "7", + "63": "7", + "49": "6", + "34": "4", + "24": "3", + "25": "3", + "26": "3", + "27": "3", + "20": "2", + "21": "2", + "22": "2", + "23": "2", + "46": "5", + "47": "5", + "44": "5", + "45": "5", + "42": "5", + "43": "5", + "40": "5", + "41": "5", + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "5": "0", + "4": "0", + "7": "0", + "6": "0", + "9": "1", + "8": "1", + "35": "4", + "13": "1", + "12": "1", + "15": "1", + "58": "7", + "11": "1", + "10": "1", + "39": "4", + "38": "4", + "59": "7", + "14": "1", + "17": "2", + "16": "2", + "19": "2", + "18": "2", + "31": "3", + "30": "3", + "51": "6", + "36": "4", + "53": "6", + "52": "6", + "33": "4", + "55": "6", + "37": "4", + "32": "4", + "57": "7", + "50": "6" + } + }, + "DEVICE_METADATA": { + "localhost": { + "hwsku": "E582-48x6q", + "hostname": "switch1", + "bgp_asn": "None", + "deployment_id": "None", + "type": "LeafRouter" + } + }, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "100000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "100000", + "mtu": "9100" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "pfc_enable": "3,4", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type": "DWRR", + "weight": "25" + }, + "scheduler.1": { + "type": "DWRR", + "weight": "30" + }, + "scheduler.2": { + "type": "DWRR", + "weight": "20" + } + }, + "VLAN": { + "Vlan500": { + "dhcp_servers": [ + "192.168.5.1", + "192.168.5.2", + "192.168.5.3", + "192.168.5.4" + ], + "members": [ + "Ethernet5", + "Ethernet6", + "Ethernet7", + "Ethernet8" + ], + "vlanid": "500" + }, + "Vlan600": { + "dhcp_servers": [ + "192.168.6.1", + "192.168.6.2", + "192.168.6.3", + "192.168.6.4" + ], + "members": [ + "Ethernet5", + "Ethernet6" + ], + "vlanid": "600" + }, + "Vlan700": { + "dhcp_servers": [ + "192.168.7.1", + "192.168.7.2", + "192.168.7.3", + "192.168.7.4" + ], + "members": [ + "Ethernet5", + "Ethernet7" + ], + "vlanid": "700" + }, + "Vlan800": { + "dhcp_servers": [ + "192.168.8.1", + "192.168.8.2", + "192.168.8.3", + "192.168.8.4" + ], + "members": [ + "Ethernet5", + "Ethernet8" + ], + "vlanid": "800" + } + }, + "VLAN_MEMBER": { + "Vlan500|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan500|Ethernet6": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet7": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet8": { + "tagging_mode": "untagged" + }, + "Vlan600|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan600|Ethernet6": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet7": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet8": { + "tagging_mode": "tagged" + } + }, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + }, + "VLAN_INTERFACE": { + "Vlan500|192.168.5.1/24": {}, + "Vlan600|192.168.6.1/24": {}, + "Vlan700|192.168.7.1/24": {}, + "Vlan800|192.168.8.1/24": {} + }, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "CABLE_LENGTH": { + "AZURE": { + "Ethernet8": "40m", + "Ethernet9": "40m", + "Ethernet2": "40m", + "Ethernet3": "40m", + "Ethernet1": "40m", + "Ethernet6": "40m", + "Ethernet7": "40m", + "Ethernet4": "40m", + "Ethernet5": "40m", + "Ethernet22": "40m", + "Ethernet50": "40m", + "Ethernet51": "40m", + "Ethernet52": "40m", + "Ethernet53": "40m", + "Ethernet54": "40m", + "Ethernet38": "40m", + "Ethernet39": "40m", + "Ethernet18": "40m", + "Ethernet19": "40m", + "Ethernet14": "40m", + "Ethernet15": "40m", + "Ethernet16": "40m", + "Ethernet17": "40m", + "Ethernet10": "40m", + "Ethernet11": "40m", + "Ethernet12": "40m", + "Ethernet35": "40m", + "Ethernet37": "40m", + "Ethernet32": "40m", + "Ethernet33": "40m", + "Ethernet30": "40m", + "Ethernet31": "40m", + "Ethernet49": "40m", + "Ethernet48": "40m", + "Ethernet47": "40m", + "Ethernet36": "40m", + "Ethernet45": "40m", + "Ethernet44": "40m", + "Ethernet43": "40m", + "Ethernet42": "40m", + "Ethernet41": "40m", + "Ethernet40": "40m", + "Ethernet29": "40m", + "Ethernet28": "40m", + "Ethernet34": "40m", + "Ethernet46": "40m", + "Ethernet21": "40m", + "Ethernet20": "40m", + "Ethernet23": "40m", + "Ethernet13": "40m", + "Ethernet25": "40m", + "Ethernet24": "40m", + "Ethernet27": "40m", + "Ethernet26": "40m" + } + }, + "CRM": { + "Config": { + "acl_table_threshold_type": "percentage", + "nexthop_group_threshold_type": "percentage", + "fdb_entry_high_threshold": "85", + "acl_entry_threshold_type": "percentage", + "ipv6_neighbor_low_threshold": "70", + "nexthop_group_member_low_threshold": "70", + "acl_group_high_threshold": "85", + "ipv4_route_high_threshold": "85", + "acl_counter_high_threshold": "85", + "ipv4_route_low_threshold": "70", + "ipv4_route_threshold_type": "percentage", + "ipv4_neighbor_low_threshold": "70", + "acl_group_threshold_type": "percentage", + "ipv4_nexthop_high_threshold": "85", + "ipv6_route_threshold_type": "percentage", + "nexthop_group_low_threshold": "70", + "ipv4_neighbor_high_threshold": "85", + "ipv6_route_high_threshold": "85", + "ipv6_nexthop_threshold_type": "percentage", + "polling_interval": "300", + "ipv4_nexthop_threshold_type": "percentage", + "acl_group_low_threshold": "70", + "acl_entry_low_threshold": "70", + "nexthop_group_member_threshold_type": "percentage", + "ipv4_nexthop_low_threshold": "70", + "acl_counter_threshold_type": "percentage", + "ipv6_neighbor_high_threshold": "85", + "nexthop_group_member_high_threshold": "85", + "acl_table_low_threshold": "70", + "fdb_entry_threshold_type": "percentage", + "ipv6_neighbor_threshold_type": "percentage", + "acl_table_high_threshold": "85", + "ipv6_nexthop_low_threshold": "70", + "acl_counter_low_threshold": "70", + "ipv4_neighbor_threshold_type": "percentage", + "nexthop_group_high_threshold": "85", + "ipv6_route_low_threshold": "70", + "acl_entry_high_threshold": "85", + "fdb_entry_low_threshold": "70", + "ipv6_nexthop_high_threshold": "85" + } + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/minigraph.xml b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/minigraph.xml new file mode 100644 index 00000000000..791e2b1e769 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/cfg/minigraph.xml @@ -0,0 +1,38 @@ + + + + + + + + + + + + + + + + + switch1 + + + + + + + + + + + + + switch1 + E582-48x2q4z + + + + switch1 + E582-48x2q4z + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile new file mode 100644 index 00000000000..d1ca9824aa9 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := centec_e582_48x2q4z_platform.o dal.o centec_at24c64.o +dal-y := dal_kernel.o dal_mpool.o diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c new file mode 100644 index 00000000000..e1835df8862 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_at24c64.c @@ -0,0 +1,602 @@ +/* + * at24.c - handle most I2C EEPROMs + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_data { + struct at24_platform_data chip; + int use_smbus; + + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + struct bin_attribute bin; + + u8 *writebuf; + unsigned write_max; + unsigned num_addresses; + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct i2c_client *client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + +#define AT24_SIZE_BYTELEN 5 +#define AT24_SIZE_FLAGS 8 + +#define AT24_BITMASK(x) (BIT(x) - 1) + +/* create non-zero magic value for given eeprom parameters */ +#define AT24_DEVICE_MAGIC(_len, _flags) \ + ((1 << AT24_SIZE_FLAGS | (_flags)) \ + << AT24_SIZE_BYTELEN | ilog2(_len)) + +static const struct i2c_device_id at24_ctc_ids[] = { + { "24c64-ctc", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ctc_ids); + +/*-------------------------------------------------------------------------*/ + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + */ +static struct i2c_client *at24_translate_offset(struct at24_data *at24, + unsigned *offset) +{ + unsigned i = 0; + + if (at24->chip.flags & AT24_FLAG_ADDR16) { + i = *offset >> 16; + *offset &= 0xffff; + } else { + i = *offset >> 8; + *offset &= 0xff; + } + + return at24->client[i]; +} + +static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + struct i2c_client *client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + /* + * REVISIT some multi-address chips don't rollover page reads to + * the next slave address, so we may need to truncate the count. + * Those chips might need another quirk flag. + * + * If the real hardware used four adjacent 24c02 chips and that + * were misconfigured as one 24c08, that would be a similar effect: + * one "eeprom" file not four, but larger reads would fail when + * they crossed certain pages. + */ + + /* + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + */ + client = at24_translate_offset(at24, &offset); + + if (count > io_limit) + count = io_limit; + + count = 1; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + status = i2c_smbus_write_byte_data(client, (offset >> 8) & 0x0ff, offset & 0x0ff ); + status = i2c_smbus_read_byte(client); + if (status >= 0) { + buf[0] = status; + status = count; + } + + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_read(struct at24_data *at24, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + memset(buf, 0, count); + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_read(at24, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_read(at24, buf, off, count); +} + + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. This routine + * writes at most one page. + */ +static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, + unsigned offset, size_t count) +{ + struct i2c_client *client; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page; + + /* Get corresponding I2C address and adjust offset */ + client = at24_translate_offset(at24, &offset); + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->chip.page_size); + if (offset + count > next_page) + count = next_page - offset; + + /* + * Writes fail if the previous one didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + status = i2c_smbus_write_word_data(client, (offset >> 8) & 0x0ff, (offset & 0xFF) | buf[0]); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, + size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_write(at24, buf, off, 1); /* only one-byte to write; TODO page wirte */ + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + if (unlikely(off >= attr->size)) + return -EFBIG; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_write(at24, buf, off, count); +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_OF +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ + const __be32 *val; + struct device_node *node = client->dev.of_node; + + if (node) { + if (of_get_property(node, "read-only", NULL)) + chip->flags |= AT24_FLAG_READONLY; + val = of_get_property(node, "pagesize", NULL); + if (val) + chip->page_size = be32_to_cpup(val); + } +} +#else +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ } +#endif /* CONFIG_OF */ + +static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct at24_platform_data chip; + bool writable; + int use_smbus = 0; + struct at24_data *at24; + int err; + unsigned i, num_addresses; + kernel_ulong_t magic; + + if (client->dev.platform_data) { + chip = *(struct at24_platform_data *)client->dev.platform_data; + } else { + if (!id->driver_data) + return -ENODEV; + + magic = id->driver_data; + chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); + magic >>= AT24_SIZE_BYTELEN; + chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); + + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + + /* update chipdata if OF is present */ + at24_get_ofdata(client, &chip); + + chip.setup = NULL; + chip.context = NULL; + } + + if (!is_power_of_2(chip.byte_len)) + dev_warn(&client->dev, + "byte_len looks suspicious (no power of 2)!\n"); + if (!chip.page_size) { + dev_err(&client->dev, "page_size must not be 0!\n"); + return -EINVAL; + } + if (!is_power_of_2(chip.page_size)) + dev_warn(&client->dev, + "page_size looks suspicious (no power of 2)!\n"); + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)) { + use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + return -EPFNOSUPPORT; + } + use_smbus = I2C_SMBUS_BYTE_DATA; + } + + if (chip.flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(chip.byte_len, (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); + + at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->use_smbus = use_smbus; + at24->chip = chip; + at24->num_addresses = num_addresses; + + printk(KERN_ALERT "at24_probe chip.byte_len = 0x%x\n", chip.byte_len); + printk(KERN_ALERT "at24_probe chip.flags = 0x%x\n", chip.flags); + printk(KERN_ALERT "at24_probe chip.magic = 0x%lx\n", id->driver_data); + printk(KERN_ALERT "at24_probe use_smbus = %d\n", at24->use_smbus); + printk(KERN_ALERT "at24_probe num_addresses = %d\n", at24->num_addresses); + + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + sysfs_bin_attr_init(&at24->bin); + at24->bin.attr.name = "eeprom"; + at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; + at24->bin.read = at24_bin_read; + at24->bin.size = chip.byte_len; + + writable = !(chip.flags & AT24_FLAG_READONLY); + if (writable) { + if (!use_smbus || i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { + unsigned write_max = chip.page_size; + + at24->bin.write = at24_bin_write; + at24->bin.attr.mode |= S_IWUSR; + + if (write_max > io_limit) + write_max = io_limit; + if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + at24->write_max = write_max; + + /* buffer (data + address at the beginning) */ + at24->writebuf = devm_kzalloc(&client->dev, write_max + 2, GFP_KERNEL); + if (!at24->writebuf) + return -ENOMEM; + } else { + dev_warn(&client->dev, "cannot write due to controller restrictions."); + } + } + + at24->client[0] = client; + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + at24->client[i] = i2c_new_dummy(client->adapter, client->addr + i); + if (!at24->client[i]) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + i); + err = -EADDRINUSE; + goto err_clients; + } + } + + err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); + if (err) + goto err_clients; + + i2c_set_clientdata(client, at24); + + printk(KERN_ALERT "at24_probe %s done\n", client->name); + + return 0; + +err_clients: + for (i = 1; i < num_addresses; i++) + if (at24->client[i]) + i2c_unregister_device(at24->client[i]); + + return err; +} + +static int at24_remove(struct i2c_client *client) +{ + struct at24_data *at24; + int i; + + at24 = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); + + for (i = 1; i < at24->num_addresses; i++) + i2c_unregister_device(at24->client[i]); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +static struct i2c_board_info i2c_devs = { + I2C_BOARD_INFO("24c64-ctc", 0x57), +}; + +static struct i2c_adapter *adapter = NULL; +static struct i2c_client *client = NULL; + +static int ctc_at24c64_init(void) +{ + printk(KERN_ALERT "ctc_at24c64_init\n"); + + adapter = i2c_get_adapter(0); + if(adapter == NULL){ + printk(KERN_ALERT "i2c_get_adapter == NULL\n"); + return -1; + } + + client = i2c_new_device(adapter, &i2c_devs); + if(client == NULL){ + printk(KERN_ALERT "i2c_new_device == NULL\n"); + i2c_put_adapter(adapter); + adapter = NULL; + return -1; + } + + return 0; +} + +static void ctc_at24c64_exit(void) +{ + printk(KERN_ALERT "ctc_at24c64_exit\n"); + if(client){ + i2c_unregister_device(client); + } + if(adapter){ + i2c_put_adapter(adapter); + } +} + +static struct i2c_driver at24_ctc_driver = { + .driver = { + .name = "at24-ctc", + .owner = THIS_MODULE, + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ctc_ids, +}; + +static int __init at24_ctc_init(void) +{ + if (!io_limit) { + pr_err("at24_ctc: io_limit must not be 0!\n"); + return -EINVAL; + } + + io_limit = rounddown_pow_of_two(io_limit); + + ctc_at24c64_init(); + + return i2c_add_driver(&at24_ctc_driver); +} +module_init(at24_ctc_init); + +static void __exit at24_ctc_exit(void) +{ + ctc_at24c64_exit(); + i2c_del_driver(&at24_ctc_driver); +} +module_exit(at24_ctc_exit); + +MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); +MODULE_AUTHOR("David Brownell and Wolfram Sang"); +MODULE_LICENSE("GPL"); +/* XXX */ + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c new file mode 100644 index 00000000000..16bed86593b --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/centec_e582_48x2q4z_platform.c @@ -0,0 +1,1457 @@ +#include +#include +#include +#include +#include +#include +#include + +#define SEP(XXX) 1 +#define IS_INVALID_PTR(_PTR_) ((_PTR_ == NULL) || IS_ERR(_PTR_)) +#define IS_VALID_PTR(_PTR_) (!IS_INVALID_PTR(_PTR_)) + +#if SEP("defines") +#define PCA9548_CHANNEL_NUM 8 +#define PCA9548_ADAPT_ID_START 10 +#define SFP_NUM 48 +#define QSFP_NUM 6 +#define PORT_NUM (SFP_NUM+QSFP_NUM) +#endif + +#if SEP("i2c:master") +static struct i2c_adapter *i2c_adp_master = NULL; /* i2c-0-cpu */ + +static int e582_48x2q4z_init_i2c_master(void) +{ + /* find i2c-core master */ + i2c_adp_master = i2c_get_adapter(0); + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x2q4z_init_i2c_master can't find i2c-core bus\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_master(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_adp_master)) { + i2c_put_adapter(i2c_adp_master); + i2c_adp_master = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:pca9548") +static struct pca954x_platform_mode i2c_dev_pca9548_platform_mode[PCA9548_CHANNEL_NUM] = { + [0] = { + .adap_id = PCA9548_ADAPT_ID_START, + .deselect_on_exit = 1, + .class = 0, + }, + [1] = { + .adap_id = PCA9548_ADAPT_ID_START + 1, + .deselect_on_exit = 1, + .class = 0, + }, + [2] = { + .adap_id = PCA9548_ADAPT_ID_START + 2, + .deselect_on_exit = 1, + .class = 0, + }, + [3] = { + .adap_id = PCA9548_ADAPT_ID_START + 3, + .deselect_on_exit = 1, + .class = 0, + }, + [4] = { + .adap_id = PCA9548_ADAPT_ID_START + 4, + .deselect_on_exit = 1, + .class = 0, + }, + [5] = { + .adap_id = PCA9548_ADAPT_ID_START + 5, + .deselect_on_exit = 1, + .class = 0, + }, + [6] = { + .adap_id = PCA9548_ADAPT_ID_START + 6, + .deselect_on_exit = 1, + .class = 0, + }, + [7] = { + .adap_id = PCA9548_ADAPT_ID_START + 7, + .deselect_on_exit = 1, + .class = 0, + } +}; +static struct pca954x_platform_data i2c_dev_pca9548_platform_data = { + .modes = i2c_dev_pca9548_platform_mode, + .num_modes = PCA9548_CHANNEL_NUM, +}; +static struct i2c_board_info i2c_dev_pca9548 = { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &i2c_dev_pca9548_platform_data, +}; +static struct i2c_client *i2c_client_pca9548x = NULL; + +static int e582_48x2q4z_init_i2c_pca9548(void) +{ + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x2q4z_init_i2c_pca9548 can't find i2c-core bus\n"); + return -1; + } + + /* install i2c-mux */ + i2c_client_pca9548x = i2c_new_device(i2c_adp_master, &i2c_dev_pca9548); + if(IS_INVALID_PTR(i2c_client_pca9548x)) + { + i2c_client_pca9548x = NULL; + printk(KERN_CRIT "install e582_48x2q4z board pca9548 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_pca9548(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_client_pca9548x)) { + i2c_unregister_device(i2c_client_pca9548x); + i2c_client_pca9548x = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:adt7470") +static struct i2c_board_info i2c_dev_adt7470 = { + I2C_BOARD_INFO("adt7470", 0x2F), +}; +static struct i2c_adapter *i2c_adp_adt7470 = NULL; /* pca9548x-channel 4 */ +static struct i2c_client *i2c_client_adt7470 = NULL; + +static int e582_48x2q4z_init_i2c_adt7470(void) +{ + i2c_adp_adt7470 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 4); + if(IS_INVALID_PTR(i2c_adp_adt7470)) + { + i2c_adp_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x2q4z board adt7470 failed\n"); + return -1; + } + + i2c_client_adt7470 = i2c_new_device(i2c_adp_adt7470, &i2c_dev_adt7470); + if(IS_INVALID_PTR(i2c_client_adt7470)){ + i2c_client_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x2q4z board adt7470 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_adt7470(void) +{ + if(IS_VALID_PTR(i2c_client_adt7470)) { + i2c_unregister_device(i2c_client_adt7470); + i2c_client_adt7470 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_adt7470)) { + i2c_put_adapter(i2c_adp_adt7470); + i2c_adp_adt7470 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:psu") +static struct i2c_adapter *i2c_adp_psu1 = NULL; /* psu1 channel 1 */ +static struct i2c_adapter *i2c_adp_psu2 = NULL; /* psu2 channel 0 */ +static struct i2c_board_info i2c_dev_psu1 = { + I2C_BOARD_INFO("i2c-psu1", 0x38), +}; +static struct i2c_board_info i2c_dev_psu2 = { + I2C_BOARD_INFO("i2c-psu2", 0x38), +}; +static struct i2c_client *i2c_client_psu1 = NULL; +static struct i2c_client *i2c_client_psu2 = NULL; + +static int e582_48x2q4z_init_i2c_psu(void) +{ + i2c_adp_psu1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 1); + if(IS_INVALID_PTR(i2c_adp_psu1)) + { + i2c_adp_psu1 = NULL; + printk(KERN_CRIT "get e582_48x2q4z psu1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_psu2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 0); + if(IS_INVALID_PTR(i2c_adp_psu2)) + { + i2c_adp_psu2 = NULL; + printk(KERN_CRIT "get e582_48x2q4z psu2 i2c-adp failed\n"); + return -1; + } + + i2c_client_psu1 = i2c_new_device(i2c_adp_psu1, &i2c_dev_psu1); + if(IS_INVALID_PTR(i2c_client_psu1)){ + i2c_client_psu1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client psu1 failed\n"); + return -1; + } + + i2c_client_psu2 = i2c_new_device(i2c_adp_psu2, &i2c_dev_psu2); + if(IS_INVALID_PTR(i2c_client_psu2)){ + i2c_client_psu2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client psu2 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_psu(void) +{ + if(IS_VALID_PTR(i2c_client_psu1)) { + i2c_unregister_device(i2c_client_psu1); + i2c_client_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_psu2)) { + i2c_unregister_device(i2c_client_psu2); + i2c_client_psu2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu1)) + { + i2c_put_adapter(i2c_adp_psu1); + i2c_adp_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu2)) + { + i2c_put_adapter(i2c_adp_psu2); + i2c_adp_psu2 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:epld") +static struct i2c_board_info i2c_dev_epld = { + I2C_BOARD_INFO("i2c-epld", 0x58), +}; +static struct i2c_client *i2c_client_epld = NULL; + +static int e582_48x2q4z_init_i2c_epld(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x2q4z_init_i2c_epld can't find i2c-core bus\n"); + return -1; + } + + i2c_client_epld = i2c_new_device(i2c_adp_master, &i2c_dev_epld); + if(IS_INVALID_PTR(i2c_client_epld)) + { + i2c_client_epld = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client epld failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_epld(void) +{ + if(IS_VALID_PTR(i2c_client_epld)) { + i2c_unregister_device(i2c_client_epld); + i2c_client_epld = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:gpio") +static struct i2c_adapter *i2c_adp_gpio0 = NULL; /* gpio0 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio1 = NULL; /* gpio1 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio2 = NULL; /* gpio2 channel 5 */ +static struct i2c_adapter *i2c_adp_gpio3 = NULL; /* gpio3 channel 6 */ +static struct i2c_adapter *i2c_adp_gpio4 = NULL; /* gpio4 channel 7 */ +static struct i2c_board_info i2c_dev_gpio0 = { + I2C_BOARD_INFO("i2c-gpio0", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio1 = { + I2C_BOARD_INFO("i2c-gpio1", 0x22), +}; +static struct i2c_board_info i2c_dev_gpio2 = { + I2C_BOARD_INFO("i2c-gpio2", 0x23), +}; +static struct i2c_board_info i2c_dev_gpio3 = { + I2C_BOARD_INFO("i2c-gpio3", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio4 = { + I2C_BOARD_INFO("i2c-gpio4", 0x22), +}; +static struct i2c_client *i2c_client_gpio0 = NULL; +static struct i2c_client *i2c_client_gpio1 = NULL; +static struct i2c_client *i2c_client_gpio2 = NULL; +static struct i2c_client *i2c_client_gpio3 = NULL; +static struct i2c_client *i2c_client_gpio4 = NULL; + +static int e582_48x2q4z_init_i2c_gpio(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x2q4z_init_i2c_gpio can't find i2c-core bus\n"); + return -1; + } + + i2c_adp_gpio0 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio0)) + { + i2c_adp_gpio0 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio0 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio1)) + { + i2c_adp_gpio1 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_gpio2)) + { + i2c_adp_gpio2 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio2 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio3 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 6); + if(IS_INVALID_PTR(i2c_adp_gpio3)) + { + i2c_adp_gpio3 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio3 i2c-adp failed\n"); + return -1; + } + + i2c_adp_gpio4 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 7); + if(IS_INVALID_PTR(i2c_adp_gpio4)) + { + i2c_adp_gpio4 = NULL; + printk(KERN_CRIT "get e582_48x2q4z gpio4 i2c-adp failed\n"); + return -1; + } + + i2c_client_gpio0 = i2c_new_device(i2c_adp_gpio0, &i2c_dev_gpio0); + if(IS_INVALID_PTR(i2c_client_gpio0)) + { + i2c_client_gpio0 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio0 failed\n"); + return -1; + } + + i2c_client_gpio1 = i2c_new_device(i2c_adp_gpio1, &i2c_dev_gpio1); + if(IS_INVALID_PTR(i2c_client_gpio1)) + { + i2c_client_gpio1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio1 failed\n"); + return -1; + } + + i2c_client_gpio2 = i2c_new_device(i2c_adp_gpio2, &i2c_dev_gpio2); + if(IS_INVALID_PTR(i2c_client_gpio2)) + { + i2c_client_gpio2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio2 failed\n"); + return -1; + } + + i2c_client_gpio3 = i2c_new_device(i2c_adp_gpio3, &i2c_dev_gpio3); + if(IS_INVALID_PTR(i2c_client_gpio3)) + { + i2c_client_gpio3 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio3 failed\n"); + return -1; + } + + i2c_client_gpio4 = i2c_new_device(i2c_adp_gpio4, &i2c_dev_gpio4); + if(IS_INVALID_PTR(i2c_client_gpio4)) + { + i2c_client_gpio4 = NULL; + printk(KERN_CRIT "create e582_48x2q4z board i2c client gpio4 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_i2c_gpio(void) +{ + if(IS_VALID_PTR(i2c_client_gpio0)) { + i2c_unregister_device(i2c_client_gpio0); + i2c_client_gpio0 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio1)) { + i2c_unregister_device(i2c_client_gpio1); + i2c_client_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio2)) { + i2c_unregister_device(i2c_client_gpio2); + i2c_client_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio3)) { + i2c_unregister_device(i2c_client_gpio3); + i2c_client_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio4)) { + i2c_unregister_device(i2c_client_gpio4); + i2c_client_gpio4 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio0)) + { + i2c_put_adapter(i2c_adp_gpio0); + i2c_adp_gpio0 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio1)) + { + i2c_put_adapter(i2c_adp_gpio1); + i2c_adp_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio2)) + { + i2c_put_adapter(i2c_adp_gpio2); + i2c_adp_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio3)) + { + i2c_put_adapter(i2c_adp_gpio3); + i2c_adp_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_gpio4)) + { + i2c_put_adapter(i2c_adp_gpio4); + i2c_adp_gpio4 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:smbus") +static int e582_48x2q4z_smbus_read_reg(struct i2c_client *client, unsigned char reg, unsigned char* value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret >= 0) { + *value = (unsigned char)ret; + } + else + { + *value = 0; + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} + +static int e582_48x2q4z_smbus_write_reg(struct i2c_client *client, unsigned char reg, unsigned char value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_write_byte_data(client, reg, value); + if (ret != 0) + { + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} +#endif + +#if SEP("drivers:psu") +static struct class* psu_class = NULL; +static struct device* psu_dev_psu1 = NULL; +static struct device* psu_dev_psu2 = NULL; + +static ssize_t e582_48x2q4z_psu_read_presence(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char present_no = 0; + unsigned char present = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio2; + present_no = 30; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio2; + present_no = 29; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_psu_client, present_no/8, &present); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((present & (1<<(present_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_psu_read_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char workstate_no = 0; + unsigned char workstate = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio2; + workstate_no = 36; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio2; + workstate_no = 35; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_psu_client, workstate_no/8, &workstate); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((workstate & (1<<(workstate_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static DEVICE_ATTR(psu_presence, S_IRUGO, e582_48x2q4z_psu_read_presence, NULL); +static DEVICE_ATTR(psu_status, S_IRUGO, e582_48x2q4z_psu_read_status, NULL); + +static int e582_48x2q4z_init_psu(void) +{ + int ret = 0; + + psu_class = class_create(THIS_MODULE, "psu"); + if (IS_INVALID_PTR(psu_class)) + { + psu_class = NULL; + printk(KERN_CRIT "create e582_48x2q4z class psu failed\n"); + return -1; + } + + psu_dev_psu1 = device_create(psu_class, NULL, MKDEV(222,0), NULL, "psu1"); + if (IS_INVALID_PTR(psu_dev_psu1)) + { + psu_dev_psu1 = NULL; + printk(KERN_CRIT "create e582_48x2q4z psu1 device failed\n"); + return -1; + } + + psu_dev_psu2 = device_create(psu_class, NULL, MKDEV(222,1), NULL, "psu2"); + if (IS_INVALID_PTR(psu_dev_psu2)) + { + psu_dev_psu2 = NULL; + printk(KERN_CRIT "create e582_48x2q4z psu2 device failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu1 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu1 device attr:status failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu2 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z psu2 device attr:status failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x2q4z_exit_psu(void) +{ + if (IS_VALID_PTR(psu_dev_psu1)) + { + device_remove_file(psu_dev_psu1, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu1, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,0)); + } + + if (IS_VALID_PTR(psu_dev_psu2)) + { + device_remove_file(psu_dev_psu2, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu2, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,1)); + } + + if (IS_VALID_PTR(psu_class)) + { + class_destroy(psu_class); + psu_class = NULL; + } + + return 0; +} +#endif + +#if SEP("drivers:leds") +extern void e582_48x2q4z_led_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x2q4z_led_get(struct led_classdev *led_cdev); +extern void e582_48x2q4z_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x2q4z_led_port_get(struct led_classdev *led_cdev); + +static struct led_classdev led_dev_system = { + .name = "system", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_idn = { + .name = "idn", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan1 = { + .name = "fan1", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan2 = { + .name = "fan2", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan3 = { + .name = "fan3", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_fan4 = { + .name = "fan4", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_psu1 = { + .name = "psu1", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_psu2 = { + .name = "psu2", + .brightness_set = e582_48x2q4z_led_set, + .brightness_get = e582_48x2q4z_led_get, +}; +static struct led_classdev led_dev_port[PORT_NUM] = { +{ .name = "port1", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port2", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port3", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port4", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port5", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port6", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port7", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port8", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port9", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port10", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port11", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port12", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port13", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port14", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port15", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port16", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port17", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port18", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port19", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port20", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port21", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port22", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port23", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port24", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port25", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port26", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port27", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port28", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port29", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port30", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port31", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port32", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port33", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port34", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port35", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port36", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port37", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port38", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port39", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port40", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port41", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port42", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port43", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port44", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port45", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port46", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port47", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port48", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port49", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port50", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port51", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port52", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port53", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,}, +{ .name = "port54", .brightness_set = e582_48x2q4z_led_port_set, .brightness_get = e582_48x2q4z_led_port_get,} +}; +static unsigned char port_led_mode[PORT_NUM] = {0}; + +void e582_48x2q4z_led_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0x0F; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0xFE; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return; + } + + led_value = ((led_value & mask) | ((set_value << shift) & (~mask))); + + ret = e582_48x2q4z_smbus_write_reg(i2c_led_client, reg, led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s led attr failed\n", led_cdev->name); + return; + } + + return; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return; +} + +enum led_brightness e582_48x2q4z_led_get(struct led_classdev *led_cdev) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0xF0; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0x01; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x2q4z_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return 0; + } + + led_value = ((led_value & mask) >> shift); + + return led_value; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return 0; +} + +void e582_48x2q4z_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + port_led_mode[portNum-1] = set_value; + + return; +} + +enum led_brightness e582_48x2q4z_led_port_get(struct led_classdev *led_cdev) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + return port_led_mode[portNum-1]; +} + +static int e582_48x2q4z_init_led(void) +{ + int ret = 0; + int i = 0; + + ret = led_classdev_register(NULL, &led_dev_system); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_system device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_idn); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_idn device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan2 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan3); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan3 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan4); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_fan4 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_psu1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z led_dev_psu2 device failed\n"); + return -1; + } + + for (i=0; i PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 31;/*32-39*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 9;/*0-7*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 17;/*0-7*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 17;/*8-15*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 1;/*32-39*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 41;/*0-7*/ + i2c_sfp_client = i2c_client_gpio4; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + reg_no = portNum - 33;/*16-21*/ + i2c_sfp_client = i2c_client_gpio4; + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x0; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 );/*1:PRESENT 0:ABSENT*/ + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_sfp_read_enable(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char value = 0; + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum - 1;/*0-7*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 9;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 33;/*8-15*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return sprintf(buf, "%d\n", 0); + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x2q4z_sfp_write_enable(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int ret = 0; + unsigned char value = 0; + unsigned char set_value = simple_strtol(buf, NULL, 10); + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + unsigned char output_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + return size; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum - 1;/*0-7*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 9;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*8-13*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return size; + } + + set_value = ((set_value > 0) ? 0 : 1 ); + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, dir_bank, 0x0); + if (ret != 0) + { + printk(KERN_CRIT "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + return size; + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s presence failed\n", name); + return size; + } + + if (set_value) + { + value = (value | (1<<(reg_no % 8))); + } + else + { + value = (value & (~(1<<(reg_no % 8)))); + } + + output_bank = (reg_no/8) + 0x8; + ret = e582_48x2q4z_smbus_write_reg(i2c_sfp_client, output_bank, value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s presence failed\n", name); + return size; + } + + return size; +} + +static DEVICE_ATTR(sfp_presence, S_IRUGO, e582_48x2q4z_sfp_read_presence, NULL); +static DEVICE_ATTR(sfp_enable, S_IRUGO|S_IWUSR, e582_48x2q4z_sfp_read_enable, e582_48x2q4z_sfp_write_enable); +static int e582_48x2q4z_init_sfp(void) +{ + int ret = 0; + int i = 0; + + sfp_class = class_create(THIS_MODULE, "sfp"); + if (IS_INVALID_PTR(sfp_class)) + { + sfp_class = NULL; + printk(KERN_CRIT "create e582_48x2q4z class sfp failed\n"); + return -1; + } + + for (i=1; i<=PORT_NUM; i++) + { + sfp_dev[i] = device_create(sfp_class, NULL, MKDEV(223,i), NULL, "sfp%d", i); + if (IS_INVALID_PTR(sfp_dev[i])) + { + sfp_dev[i] = NULL; + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device attr:presence failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_enable); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x2q4z sfp[%d] device attr:enable failed\n", i); + continue; + } + } + + return ret; +} + +static int e582_48x2q4z_exit_sfp(void) +{ + int i = 0; + + for (i=1; i<=PORT_NUM; i++) + { + if (IS_VALID_PTR(sfp_dev[i])) + { + device_remove_file(sfp_dev[i], &dev_attr_sfp_presence); + device_remove_file(sfp_dev[i], &dev_attr_sfp_enable); + device_destroy(sfp_class, MKDEV(223,i)); + sfp_dev[i] = NULL; + } + } + + if (IS_VALID_PTR(sfp_class)) + { + class_destroy(sfp_class); + sfp_class = NULL; + } + + return 0; +} +#endif + +static int e582_48x2q4z_init(void) +{ + int ret = 0; + int failed = 0; + + printk(KERN_ALERT "install e582_48x2q4z board dirver...\n"); + + ret = e582_48x2q4z_init_i2c_master(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_pca9548(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_adt7470(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_epld(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_i2c_gpio(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_led(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x2q4z_init_sfp(); + if (ret != 0) + { + failed = 1; + } + + if (failed) + printk(KERN_INFO "install e582_48x2q4z board driver failed\n"); + else + printk(KERN_ALERT "install e582_48x2q4z board dirver...ok\n"); + + return 0; +} + +static void e582_48x2q4z_exit(void) +{ + printk(KERN_INFO "uninstall e582_48x2q4z board dirver...\n"); + + e582_48x2q4z_exit_sfp(); + e582_48x2q4z_exit_led(); + e582_48x2q4z_exit_psu(); + e582_48x2q4z_exit_i2c_gpio(); + e582_48x2q4z_exit_i2c_epld(); + e582_48x2q4z_exit_i2c_psu(); + e582_48x2q4z_exit_i2c_adt7470(); + e582_48x2q4z_exit_i2c_pca9548(); + e582_48x2q4z_exit_i2c_master(); +} + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("yangbs centecNetworks, Inc"); +MODULE_DESCRIPTION("e582-48x2q4z board driver"); +module_init(e582_48x2q4z_init); +module_exit(e582_48x2q4z_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c new file mode 100644 index 00000000000..32a38f842cf --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.c @@ -0,0 +1,1833 @@ +/** + @file dal_kernal.c + + @date 2012-10-18 + + @version v2.0 + + +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) +#include +#endif +#include "dal_kernel.h" +#include "dal_mpool.h" +#include +MODULE_AUTHOR("Centec Networks Inc."); +MODULE_DESCRIPTION("DAL kernel module"); +MODULE_LICENSE("GPL"); + +/* DMA memory pool size */ +static char* dma_pool_size; +module_param(dma_pool_size, charp, 0); +MODULE_PARM_DESC(dma_pool_size, + "Specify DMA memory pool size (default 4MB)"); + +/***************************************************************************** + * defines + *****************************************************************************/ +#define MB_SIZE 0x100000 +#define CTC_MAX_INTR_NUM 8 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_VENDOR_VID 0xc001 +#define CTC_HUMBER_DEVICE_ID 0x6048 +#define CTC_GOLDENGATE_DEVICE_ID 0xc010 +#define CTC_PCIE_VENDOR_ID 0xcb10 +#define CTC_DUET2_DEVICE_ID 0x7148 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_GREATBELT_DEVICE_ID 0x03e8 /* TBD */ +#define DAL_MAX_CHIP_NUM 8 /* [GB] used */ +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#define DAL_UNTAG_BLOCK 0 +#define DAL_DISCARD_BLOCK 1 +#define DAL_MATCHED_BLOCK 2 +#define DAL_CUR_MATCH_BLOCk 3 +/***************************************************************************** + * typedef + *****************************************************************************/ +/* Control Data */ +typedef struct dal_isr_s +{ + int irq; + void (* isr)(void*); + void* isr_data; + int trigger; + int count; + wait_queue_head_t wqh; +} dal_isr_t; + +typedef struct dal_kernel_dev_s +{ + struct list_head list; + struct pci_dev* pci_dev; + + /* PCI I/O mapped base address */ + uintptr logic_address; + + /* Physical address */ + unsigned long long phys_address; +} dal_kern_dev_t; + +typedef struct _dma_segment +{ + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long* blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +typedef irqreturn_t (*p_func) (int irq, void* dev_id); + +/*************************************************************************** + *declared + ***************************************************************************/ +static unsigned int linux_dal_poll0(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll1(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll2(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll3(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll4(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll5(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll6(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll7(struct file* filp, struct poll_table_struct* p); + +/***************************************************************************** + * global variables + *****************************************************************************/ +static dal_kern_dev_t dal_dev[DAL_MAX_CHIP_NUM]; +static dal_isr_t dal_isr[CTC_MAX_INTR_NUM]; +static int dal_chip_num = 0; +static int dal_version = 0; +static int dal_intr_num = 0; +static int use_high_memory = 0; +static unsigned int* dma_virt_base[DAL_MAX_CHIP_NUM]; +#ifndef DMA_MEM_MODE_PLATFORM +static unsigned int* dma_virt_base_tmp[DAL_MAX_CHIP_NUM]; +#endif +static unsigned long long dma_phy_base[DAL_MAX_CHIP_NUM]; +static unsigned int dma_mem_size = 0xc00000; +static unsigned int msi_irq_base[DAL_MAX_CHIP_NUM]; +static unsigned int msi_irq_num[DAL_MAX_CHIP_NUM]; +static unsigned int msi_used = 0; +static struct class *dal_class; + +static LIST_HEAD(_dma_seg); +static int dal_debug = 0; +module_param(dal_debug, int, 0); +MODULE_PARM_DESC(dal_debug, "Set debug level (default 0)"); + +static struct pci_device_id dal_id_table[] = +{ + {PCI_DEVICE(CTC_VENDOR_VID, CTC_GREATBELT_DEVICE_ID)}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_GOLDENGATE_DEVICE_ID)}, + {PCI_DEVICE((CTC_PCIE_VENDOR_ID+1), (CTC_GOLDENGATE_DEVICE_ID+1))}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_DUET2_DEVICE_ID)}, + {0, }, +}; + +static wait_queue_head_t poll_intr[CTC_MAX_INTR_NUM]; + +p_func intr_handler_fun[CTC_MAX_INTR_NUM]; + +static int poll_intr_trigger[CTC_MAX_INTR_NUM]; + +static struct file_operations dal_intr_fops[CTC_MAX_INTR_NUM] = +{ + { + .owner = THIS_MODULE, + .poll = linux_dal_poll0, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll1, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll2, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll3, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll4, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll5, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll6, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll7, + }, +}; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif +/***************************************************************************** + * macros + *****************************************************************************/ +#define VERIFY_CHIP_INDEX(n) (n < dal_chip_num) + +#define _KERNEL_INTERUPT_PROCESS +static irqreturn_t +intr0_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + + if(poll_intr_trigger[0]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[0] = 1; + wake_up(&poll_intr[0]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr1_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[1]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[1] = 1; + wake_up(&poll_intr[1]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr2_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[2]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[2] = 1; + wake_up(&poll_intr[2]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr3_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[3]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[3] = 1; + wake_up(&poll_intr[3]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr4_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[4]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[4] = 1; + wake_up(&poll_intr[4]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr5_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[5]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[5] = 1; + wake_up(&poll_intr[5]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr6_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[6]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[6] = 1; + wake_up(&poll_intr[6]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr7_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[7]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[7] = 1; + wake_up(&poll_intr[7]); + } + } + + return IRQ_HANDLED; +} + +int +dal_interrupt_register(unsigned int irq, int prio, void (* isr)(void*), void* data) +{ + int ret; + unsigned char str[16]; + unsigned char* int_name = NULL; + unsigned int intr_num_tmp = 0; + unsigned int intr_num = CTC_MAX_INTR_NUM; + unsigned long irq_flags = 0; + + if (dal_intr_num >= CTC_MAX_INTR_NUM) + { + printk("Interrupt numbers exceeds max.\n"); + return -1; + } + + if (msi_used) + { + int_name = "dal_msi"; + } + else + { + int_name = "dal_intr"; + } + + + for (intr_num_tmp=0;intr_num_tmp < CTC_MAX_INTR_NUM; intr_num_tmp++) + { + if (irq == dal_isr[intr_num_tmp].irq) + { + if (0 == msi_used) + { + dal_isr[intr_num_tmp].count++; + printk("Interrupt irq %d register count %d.\n", irq, dal_isr[intr_num_tmp].count); + } + return 0; + } + if ((0 == dal_isr[intr_num_tmp].irq) && (CTC_MAX_INTR_NUM == intr_num)) + { + intr_num = intr_num_tmp; + dal_isr[intr_num].count = 0; + } + } + dal_isr[intr_num].irq = irq; + dal_isr[intr_num].isr = isr; + dal_isr[intr_num].isr_data = data; + dal_isr[intr_num].count++; + + init_waitqueue_head(&poll_intr[intr_num]); + + /* only user mode */ + if ((NULL == isr) && (NULL == data)) + { + snprintf(str, 16, "%s%d", "dal_intr", intr_num); + ret = register_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, + str, &dal_intr_fops[intr_num]); + if (ret < 0) + { + printk("Register character device for irq %d failed, ret= %d", irq, ret); + return ret; + } + } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) + irq_flags = 0; +#else + irq_flags = IRQF_DISABLED; +#endif + if ((ret = request_irq(irq, + intr_handler_fun[intr_num], + irq_flags, + int_name, + &dal_isr[intr_num])) < 0) + { + printk("Cannot request irq %d, ret %d.\n", irq, ret); + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, str); + } + + if (0 == ret) + { + dal_intr_num++; + } + + return ret; +} + +int +dal_interrupt_unregister(unsigned int irq) +{ + unsigned char str[16]; + int intr_idx = 0; + int find_flag = 0; + + /* get intr device index */ + for (intr_idx = 0; intr_idx < CTC_MAX_INTR_NUM; intr_idx++) + { + if (dal_isr[intr_idx].irq == irq) + { + find_flag = 1; + break; + } + } + + if (find_flag == 0) + { + printk ("irq%d is not registered! unregister failed \n", irq); + return -1; + } + + dal_isr[intr_idx].count--; + if (0 != dal_isr[intr_idx].count) + { + printk("Interrupt irq %d unregister count %d.\n", irq, dal_isr[intr_idx].count); + return -1; + } + snprintf(str, 16, "%s%d", "dal_intr", intr_idx); + + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_idx, str); + + free_irq(irq, &dal_isr[intr_idx]); + + dal_isr[intr_idx].irq = 0; + + dal_intr_num--; + + return 0; +} + +int +dal_interrupt_set_en(unsigned int irq, unsigned int enable) +{ + enable ? enable_irq(irq) : disable_irq_nosync(irq); + return 0; +} + +static int +_dal_set_msi_enabe(unsigned int lchip, unsigned int irq_num) +{ + int ret = 0; + + if (irq_num == 1) + { + ret = pci_enable_msi(dal_dev[lchip].pci_dev); + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = 1; + } + else + { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 79)) + ret = pci_enable_msi_exact(dal_dev[lchip].pci_dev, irq_num); +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 26, 32)) + ret = pci_enable_msi_block(dal_dev[lchip].pci_dev, irq_num); +#else + ret = -1; +#endif + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = irq_num; + } + + return ret; +} + +static int +_dal_set_msi_disable(unsigned int lchip) +{ + + pci_disable_msi(dal_dev[lchip].pci_dev); + + msi_irq_base[lchip] = 0; + msi_irq_num[lchip] = 0; + + return 0; +} + +int +dal_set_msi_cap(unsigned long arg) +{ + int ret = 0; + int index = 0; + dal_msi_info_t msi_info; + + if (copy_from_user(&msi_info, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + printk("####dal_set_msi_cap lchip %d base %d num:%d\n", msi_info.lchip, msi_info.irq_base, msi_info.irq_num); + if (msi_info.irq_num > 0) + { + if (0 == msi_used) + { + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + else if ((1 == msi_used) && (msi_info.irq_num != msi_irq_num[msi_info.lchip])) + { + for (index = 0; index < msi_irq_num[msi_info.lchip]; index++) + { + dal_interrupt_unregister(msi_irq_base[msi_info.lchip]+index); + } + _dal_set_msi_disable(msi_info.lchip); + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + } + else + { + msi_used = 0; + ret = _dal_set_msi_disable(msi_info.lchip); + } + + return ret; +} + +int +dal_user_interrupt_register(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####register interrupt irq:%d\n", irq); + return dal_interrupt_register(irq, 0, NULL, NULL); +} + +int +dal_user_interrupt_unregister(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####unregister interrupt irq:%d\n", irq); + return dal_interrupt_unregister(irq); +} + +int +dal_user_interrupt_set_en(unsigned long arg) +{ + dal_intr_parm_t dal_intr_parm; + + if (copy_from_user(&dal_intr_parm, (void*)arg, sizeof(dal_intr_parm_t))) + { + return -EFAULT; + } + + return dal_interrupt_set_en(dal_intr_parm.irq, dal_intr_parm.enable); +} + +/* + * Function: _dal_dma_segment_free + */ + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +#ifndef DMA_MEM_MODE_PLATFORM +static int +_dal_find_largest_segment(dma_segment_t* dseg) +{ + int i, j, blks, found; + unsigned long seg_begin; + unsigned long seg_end; + unsigned long seg_tmp; + + blks = dseg->blk_cnt; + + /* Clear all block tags */ + for (i = 0; i < blks; i++) + { + dseg->blk_ptr[i] &= ~3; + } + + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) + { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == DAL_UNTAG_BLOCK) + { + /* Initial segment size is the block size */ + seg_begin = dseg->blk_ptr[i]; + seg_end = seg_begin + dseg->blk_size; + dseg->blk_ptr[i] |= DAL_CUR_MATCH_BLOCk; + + /* Loop looking for adjacent blocks */ + do + { + found = 0; + + for (j = i + 1; j < blks && (seg_end - seg_begin) < dseg->req_size; j++) + { + seg_tmp = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((seg_tmp & 3) == DAL_UNTAG_BLOCK) + { + if (seg_tmp == (seg_begin - dseg->blk_size)) + { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_begin = seg_tmp; + found = 1; + } + else if (seg_tmp == seg_end) + { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_end += dseg->blk_size; + found = 1; + } + } + } + } + while (found); + + if ((seg_end - seg_begin) > dseg->seg_size) + { + /* The current block is largest so far */ + dseg->seg_begin = seg_begin; + dseg->seg_end = seg_end; + dseg->seg_size = seg_end - seg_begin; + + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } + else if ((dseg->blk_ptr[j] & 3) == DAL_MATCHED_BLOCK) + { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } + else + { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + + return 0; +} + +/* + * Function: _alloc_dma_blocks + */ +static int +_dal_alloc_dma_blocks(dma_segment_t* dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) + { + printk("No more DMA blocks\n"); + return -1; + } + + start = dseg->blk_cnt; + dseg->blk_cnt += blks; + + for (i = start; i < dseg->blk_cnt; i++) + { + addr = __get_free_pages(GFP_ATOMIC, dseg->blk_order); + if (addr) + { + dseg->blk_ptr[i] = addr; + } + else + { + printk("DMA allocation failed\n"); + return -1; + } + } + + return 0; +} + +/* + * Function: _dal_dma_segment_alloc + */ +static dma_segment_t* +_dal_dma_segment_alloc(unsigned int size, unsigned int blk_size) +{ + dma_segment_t* dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) + { + return NULL; + } + + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_ATOMIC)) == NULL) + { + return NULL; + } + + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) + { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = kmalloc(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) + { + kfree(dseg); + return NULL; + } + + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + _dal_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size); + + /* Allocate more blocks until we have a complete segment */ + do + { + _dal_find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) + { + break; + } + } + while (_dal_alloc_dma_blocks(dseg, 8) == 0); + + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) + { + if ((dseg->blk_ptr[i] & 3) == 2) + { + dseg->blk_ptr[i] &= ~3; + + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_RESERVE(VIRT_TO_PAGE((void*)page_addr)); + } + } + else if (dseg->blk_ptr[i]) + { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + + return dseg; +} + +/* + * Function: _dal_dma_segment_free + */ +static void +_dal_dma_segment_free(dma_segment_t* dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) + { + for (i = 0; i < dseg->blk_cnt; i++) + { + if (dseg->blk_ptr[i]) + { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: -dal_pgalloc + */ +static void* +_dal_pgalloc(unsigned int size) +{ + dma_segment_t* dseg; + unsigned int blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dal_dma_segment_alloc(size, blk_size)) == NULL) + { + return NULL; + } + + if (dseg->seg_size < size) + { + /* If we didn't get the full size then forget it */ + printk("Notice: Can not get enough memory for requset!!\n"); + printk("actual size:0x%lx, request size:0x%x\n", dseg->seg_size, size); + //-_dal_dma_segment_free(dseg); + //-return NULL; + } + + list_add(&dseg->list, &_dma_seg); + return (void*)dseg->seg_begin; +} + +/* + * Function: _dal_pgfree + */ +static int +_dal_pgfree(void* ptr) +{ + struct list_head* pos; + + list_for_each(pos, &_dma_seg) + { + dma_segment_t* dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void*)dseg->seg_begin) + { + list_del(&dseg->list); + _dal_dma_segment_free(dseg); + return 0; + } + } + return -1; +} +#endif +static void +dal_alloc_dma_pool(int lchip, int size) +{ + if (use_high_memory) + { + dma_phy_base[lchip] = virt_to_bus(high_memory); + dma_virt_base[lchip] = ioremap_nocache(dma_phy_base[lchip], size); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_virt_base[lchip] = dma_alloc_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + &dma_phy_base[lchip], GFP_KERNEL); + + printk(KERN_WARNING "########Using DMA_MEM_MODE_PLATFORM \n"); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + /* Get DMA memory from kernel */ + dma_virt_base_tmp[lchip] = _dal_pgalloc(size); + dma_phy_base[lchip] = virt_to_bus(dma_virt_base_tmp[lchip]); + dma_virt_base [lchip]= ioremap_nocache(dma_phy_base[lchip], size); +#endif + } +} + +static void +dal_free_dma_pool(int lchip) +{ + int ret = 0; + ret = ret; + if (use_high_memory) + { + iounmap(dma_virt_base[lchip]); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_free_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + dma_virt_base[lchip], dma_phy_base[lchip]); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + iounmap(dma_virt_base[lchip]); + ret = _dal_pgfree(dma_virt_base_tmp[lchip]); + if(ret<0) + { + printk("Dma free memory fail !!!!!! \n"); + } +#endif + } +} + +#define _KERNEL_DAL_IO +static int +_dal_pci_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *value = *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset); + return 0; +} + +int +dal_create_irq_mapping(unsigned long arg) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) + +#ifndef NO_IRQ +#define NO_IRQ (-1) +#endif + dal_irq_mapping_t irq_map; + + if (copy_from_user(&irq_map, (void*)arg, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } + + irq_map.sw_irq = irq_create_mapping(NULL, irq_map.hw_irq); + if (irq_map.sw_irq == NO_IRQ) + { + printk("IRQ mapping fail !!!!!! \n"); + return -1; + } + + if (copy_to_user((dal_irq_mapping_t*)arg, (void*)&irq_map, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } +#endif + return 0; +} + +int +dal_pci_read(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_read((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int*)(&(cmdpara_chip.value))); + + if (copy_to_user((dal_chip_parm_t*)arg, (void*)&cmdpara_chip, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +_dal_pci_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset) = value; + return 0; +} + +int +dal_pci_write(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_write((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int)cmdpara_chip.value); + + return 0; +} + +int +dal_pci_conf_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_read_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} + +int +dal_pci_conf_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_write_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} +int +dal_user_read_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + if (dal_pci_conf_read(dal_cfg.lchip, dal_cfg.offset, &dal_cfg.value)) + { + printk("dal_pci_conf_read failed.\n"); + return -EFAULT; + } + + if (copy_to_user((dal_pci_cfg_ioctl_t*)arg, (void*)&dal_cfg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return 0; +} + +int +dal_user_write_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return dal_pci_conf_write(dal_cfg.lchip, dal_cfg.offset, dal_cfg.value); +} + +static int +linux_get_device(unsigned long arg) +{ + dal_user_dev_t user_dev; + int lchip = 0; + + if (copy_from_user(&user_dev, (void*)arg, sizeof(user_dev))) + { + return -EFAULT; + } + + user_dev.chip_num = dal_chip_num; + lchip = user_dev.lchip; + + if (lchip < dal_chip_num) + { + user_dev.phy_base0 = (unsigned int)dal_dev[lchip].phys_address; + user_dev.phy_base1 = (unsigned int)(dal_dev[lchip].phys_address >> 32); + + user_dev.bus_no = dal_dev[lchip].pci_dev->bus->number; + user_dev.dev_no = dal_dev[lchip].pci_dev->device; + user_dev.fun_no = dal_dev[lchip].pci_dev->devfn; + } + + if (copy_to_user((dal_user_dev_t*)arg, (void*)&user_dev, sizeof(user_dev))) + { + return -EFAULT; + } + + return 0; +} + +/* set dal version, copy to user */ +static int +linux_get_dal_version(unsigned long arg) +{ + int dal_ver = VERSION_1DOT2; /* set dal version */ + + if (copy_to_user((int*)arg, (void*)&dal_ver, sizeof(dal_ver))) + { + return -EFAULT; + } + + dal_version = dal_ver; /* up sw */ + + return 0; +} + +static int +linux_get_dma_info(unsigned long arg) +{ + dma_info_t dma_para; + + if (copy_from_user(&dma_para, (void*)arg, sizeof(dma_info_t))) + { + return -EFAULT; + } + + dma_para.phy_base = (unsigned int)dma_phy_base[dma_para.lchip]; + dma_para.phy_base_hi = dma_phy_base[dma_para.lchip] >> 32; + dma_para.size = dma_mem_size; + + if (copy_to_user((dma_info_t*)arg, (void*)&dma_para, sizeof(dma_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_get_msi_info(unsigned long arg) +{ + dal_msi_info_t msi_para; + unsigned int lchip = 0; + + /* get lchip form user mode */ + if (copy_from_user(&msi_para, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + lchip = msi_para.lchip; + + msi_para.irq_base = msi_irq_base[lchip]; + msi_para.irq_num = msi_irq_num[lchip]; + + /* send msi info to user mode */ + if (copy_to_user((dal_msi_info_t*)arg, (void*)&msi_para, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + return 0; +} + + +static int +dal_get_intr_info(unsigned long arg) +{ + dal_intr_info_t intr_para; + unsigned int intr_num = 0; + + /* get lchip form user mode */ + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + intr_para.irq_idx = CTC_MAX_INTR_NUM; + for (intr_num=0; intr_num< CTC_MAX_INTR_NUM; intr_num++) + { + if (intr_para.irq == dal_isr[intr_num].irq) + { + intr_para.irq_idx = intr_num; + break; + } + } + + if (CTC_MAX_INTR_NUM == intr_para.irq_idx) + { + printk("Interrupt %d cann't find.\n", intr_para.irq); + } + /* send msi info to user mode */ + if (copy_to_user((dal_intr_info_t*)arg, (void*)&intr_para, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_cache_inval(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv((unsigned long)intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +static int +dal_cache_flush(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv(intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +int +linux_dal_probe(struct pci_dev* pdev, const struct pci_device_id* id) +{ + dal_kern_dev_t* dev = NULL; + int bar = 0; + int ret = 0; + unsigned int temp = 0; + unsigned int lchip = 0; + + printk(KERN_WARNING "********found dal device*****\n"); + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (NULL == dal_dev[lchip].pci_dev) + { + break; + } + } + + if (lchip >= DAL_MAX_CHIP_NUM) + { + printk("Exceed max local chip num\n"); + return -1; + } + + dev = &dal_dev[lchip]; + if (NULL == dev) + { + printk("Cannot obtain PCI resources\n"); + } + + lchip = lchip; + dal_chip_num += 1; + + dev->pci_dev = pdev; + + if (pci_enable_device(pdev) < 0) + { + printk("Cannot enable PCI device: vendor id = %x, device id = %x\n", + pdev->vendor, pdev->device); + } + + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + if (ret) + { + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (ret) + { + printk("Could not set PCI DMA Mask\n"); + return ret; + } + } + + if (pci_request_regions(pdev, DAL_NAME) < 0) + { + printk("Cannot obtain PCI resources\n"); + } + + dev->phys_address = pci_resource_start(pdev, bar); + dev->logic_address = (uintptr)ioremap_nocache(dev->phys_address, + pci_resource_len(dev->pci_dev, bar)); + + _dal_pci_read(lchip, 0x48, &temp); + if (((temp >> 8) & 0xffff) == 0x3412) + { + printk("Little endian Cpu detected!!! \n"); + _dal_pci_write(lchip, 0x48, 0xFFFFFFFF); + } + + pci_set_master(pdev); + + /* alloc dma_mem_size for every chip */ + if (dma_mem_size) + { + dal_alloc_dma_pool(lchip, dma_mem_size); + + /*add check Dma memory pool cannot cross 4G space*/ + if ((0==(dma_phy_base[lchip]>>32)) && (0!=((dma_phy_base[lchip]+dma_mem_size)>>32))) + { + printk("Dma malloc memory cross 4G space!!!!!! \n"); + return -1; + } + } + + printk(KERN_WARNING "linux_dal_probe end*****\n"); + + return 0; +} + +void +linux_dal_remove(struct pci_dev* pdev) +{ + unsigned int lchip = 0; + unsigned int flag = 0; + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (pdev == dal_dev[lchip].pci_dev) + { + flag = 1; + break; + } + } + + if (1 == flag) + { + dal_free_dma_pool(lchip); + pci_release_regions(pdev); + pci_disable_device(pdev); + + dal_dev[lchip].pci_dev = NULL; + dal_chip_num--; + } + + +} + +#ifdef CONFIG_COMPAT +static long +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) +static int +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else +static int +linux_dal_ioctl(struct inode* inode, struct file* file, + unsigned int cmd, unsigned long arg) +#endif + +#endif +{ + switch (cmd) + { + + case CMD_READ_CHIP: + return dal_pci_read(arg); + + case CMD_WRITE_CHIP: + return dal_pci_write(arg); + + case CMD_GET_DEVICES: + return linux_get_device(arg); + + case CMD_GET_DAL_VERSION: + return linux_get_dal_version(arg); + + case CMD_GET_DMA_INFO: + return linux_get_dma_info(arg); + + case CMD_PCI_CONFIG_READ: + return dal_user_read_pci_conf(arg); + + case CMD_PCI_CONFIG_WRITE: + return dal_user_write_pci_conf(arg); + + case CMD_REG_INTERRUPTS: + return dal_user_interrupt_register(arg); + + case CMD_UNREG_INTERRUPTS: + return dal_user_interrupt_unregister(arg); + + case CMD_EN_INTERRUPTS: + return dal_user_interrupt_set_en(arg); + + case CMD_SET_MSI_CAP: + return dal_set_msi_cap(arg); + + case CMD_GET_MSI_INFO: + return dal_get_msi_info(arg); + + case CMD_IRQ_MAPPING: + return dal_create_irq_mapping(arg); + + case CMD_GET_INTR_INFO: + return dal_get_intr_info(arg); + + case CMD_CACHE_INVAL: + return dal_cache_inval(arg); + + case CMD_CACHE_FLUSH: + return dal_cache_flush(arg); + + default: + break; + } + + return 0; +} + +static unsigned int +linux_dal_poll0(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[0], p); + local_irq_save(flags); + if (poll_intr_trigger[0]) + { + poll_intr_trigger[0] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll1(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[1], p); + local_irq_save(flags); + if (poll_intr_trigger[1]) + { + poll_intr_trigger[1] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll2(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[2], p); + local_irq_save(flags); + if (poll_intr_trigger[2]) + { + poll_intr_trigger[2] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll3(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[3], p); + local_irq_save(flags); + if (poll_intr_trigger[3]) + { + poll_intr_trigger[3] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll4(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[4], p); + local_irq_save(flags); + if (poll_intr_trigger[4]) + { + poll_intr_trigger[4] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll5(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[5], p); + local_irq_save(flags); + if (poll_intr_trigger[5]) + { + poll_intr_trigger[5] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll6(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[6], p); + local_irq_save(flags); + if (poll_intr_trigger[6]) + { + poll_intr_trigger[6] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll7(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[7], p); + local_irq_save(flags); + if (poll_intr_trigger[7]) + { + poll_intr_trigger[7] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static struct pci_driver linux_dal_driver = +{ + .name = DAL_NAME, + .id_table = dal_id_table, + .probe = linux_dal_probe, + .remove = linux_dal_remove, +}; + +static struct file_operations fops = +{ + .owner = THIS_MODULE, +#ifdef CONFIG_COMPAT + .compat_ioctl = linux_dal_ioctl, + .unlocked_ioctl = linux_dal_ioctl, +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) + .unlocked_ioctl = linux_dal_ioctl, +#else + .ioctl = linux_dal_ioctl, +#endif +#endif +}; + + +static int __init +linux_dal_init(void) +{ + int ret = 0; + + /* Get DMA memory pool size form dal.ok input param, or use default dma_mem_size */ + if (dma_pool_size) + { + if ((dma_pool_size[strlen(dma_pool_size) - 1] & ~0x20) == 'M') + { + dma_mem_size = simple_strtoul(dma_pool_size, NULL, 0); + printk("dma_mem_size: 0x%x \n", dma_mem_size); + + dma_mem_size *= MB_SIZE; + } + else + { + printk("DMA memory pool size must be specified as e.g. dma_pool_size=8M\n"); + } + + if (dma_mem_size & (dma_mem_size - 1)) + { + printk("dma_mem_size must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + dma_mem_size = 0; + } + } + + ret = register_chrdev(DAL_DEV_MAJOR, DAL_NAME, &fops); + if (ret < 0) + { + printk(KERN_WARNING "Register linux_dal device, ret %d\n", ret); + return ret; + } + + ret = pci_register_driver(&linux_dal_driver); + if (ret < 0) + { + printk(KERN_WARNING "Register ASIC PCI driver failed, ret %d\n", ret); + return ret; + } + + /* alloc /dev/linux_dal node */ + dal_class = class_create(THIS_MODULE, DAL_NAME); + device_create(dal_class, NULL, MKDEV(DAL_DEV_MAJOR, 0), NULL, DAL_NAME); + + /* init interrupt function */ + intr_handler_fun[0] = intr0_handler; + intr_handler_fun[1] = intr1_handler; + intr_handler_fun[2] = intr2_handler; + intr_handler_fun[3] = intr3_handler; + intr_handler_fun[4] = intr4_handler; + intr_handler_fun[5] = intr5_handler; + intr_handler_fun[6] = intr6_handler; + intr_handler_fun[7] = intr7_handler; + + return ret; +} + +static void __exit +linux_dal_exit(void) +{ + device_destroy(dal_class, MKDEV(DAL_DEV_MAJOR, 0)); + class_destroy(dal_class); + unregister_chrdev(DAL_DEV_MAJOR, "linux_dal"); + pci_unregister_driver(&linux_dal_driver); +} + +module_init(linux_dal_init); +module_exit(linux_dal_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h new file mode 100644 index 00000000000..850a4cffa73 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_kernel.h @@ -0,0 +1,171 @@ +/** + @file dal_kernel_io.h + + @author Copyright (C) 2012 Centec Networks Inc. All rights reserved. + + @date 2012-4-9 + + @version v2.0 + +*/ +#ifndef _DAL_KERNEL_H_ +#define _DAL_KERNEL_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +#ifndef SDK_IN_USERMODE +#ifdef PHYS_ADDR_IS_64BIT +typedef long long intptr; +typedef unsigned long long uintptr; +#else +typedef int intptr; +typedef unsigned int uintptr; +#endif +#endif + +#define DAL_PCI_READ_ADDR 0x0 +#define DAL_PCI_READ_DATA 0xc +#define DAL_PCI_WRITE_ADDR 0x8 +#define DAL_PCI_WRITE_DATA 0x4 +#define DAL_PCI_STATUS 0x10 + +#define DAL_PCI_STATUS_IN_PROCESS 31 +#define DAL_PCI_STATUS_BAD_PARITY 5 +#define DAL_PCI_STATUS_CPU_ACCESS_ERR 4 +#define DAL_PCI_STATUS_READ_CMD 3 +#define DAL_PCI_STATUS_REGISTER_ERR 1 +#define DAL_PCI_STATUS_REGISTER_ACK 0 + +#define DAL_PCI_ACCESS_TIMEOUT 0x64 + +#define DAL_NAME "linux_dal" /* "linux_dal" */ + +#define DAL_DEV_MAJOR 198 + +#define DAL_DEV_INTR_MAJOR_BASE 200 + +#define DAL_DEV_NAME "/dev/" DAL_NAME +#define DAL_ONE_KB 1024 +#define DAL_ONE_MB (1024*1024) +struct dal_chip_parm_s +{ + unsigned int lchip; /*tmp should be uint8*/ + unsigned int fpga_id; /*tmp add*/ + unsigned int reg_addr; + unsigned int value; +}; +typedef struct dal_chip_parm_s dal_chip_parm_t; + +struct dal_intr_parm_s +{ + unsigned int irq; + unsigned int enable; +}; +typedef struct dal_intr_parm_s dal_intr_parm_t; + +struct dal_irq_mapping_s +{ + unsigned int hw_irq; + unsigned int sw_irq; +}; +typedef struct dal_irq_mapping_s dal_irq_mapping_t; + +struct dal_user_dev_s +{ + unsigned int chip_num; /*output: local chip number*/ + unsigned int lchip; /*input: local chip id*/ + unsigned int phy_base0; /* low 32bits physical base address */ + unsigned int phy_base1; /* high 32bits physical base address */ + unsigned int bus_no; + unsigned int dev_no; + unsigned int fun_no; + void* virt_base[2]; /* Virtual base address; this must be last member */ +}; +typedef struct dal_user_dev_s dal_user_dev_t; + +struct dma_info_s +{ + unsigned int lchip; + unsigned int phy_base; + unsigned int phy_base_hi; + unsigned int size; + unsigned int* virt_base; +}; +typedef struct dma_info_s dma_info_t; + +struct dal_pci_cfg_ioctl_s +{ + unsigned int lchip; /* Device ID */ + unsigned int offset; + unsigned int value; +}; +typedef struct dal_pci_cfg_ioctl_s dal_pci_cfg_ioctl_t; + +struct dal_msi_info_s +{ + unsigned int lchip; + unsigned int irq_base; + unsigned int irq_num; +}; +typedef struct dal_msi_info_s dal_msi_info_t; + +struct dal_intr_info_s +{ + unsigned int irq; + unsigned int irq_idx; +}; +typedef struct dal_intr_info_s dal_intr_info_t; + +struct dal_dma_cache_info_s +{ + unsigned long ptr; + unsigned int length; +}; +typedef struct dal_dma_cache_info_s dal_dma_cache_info_t; + +#define CMD_MAGIC 'C' +#define CMD_WRITE_CHIP _IO(CMD_MAGIC, 0) /* for humber ioctrol*/ +#define CMD_READ_CHIP _IO(CMD_MAGIC, 1) /* for humber ioctrol*/ +#define CMD_GET_DEVICES _IO(CMD_MAGIC, 2) +#define CMD_GET_DAL_VERSION _IO(CMD_MAGIC, 3) +#define CMD_PCI_CONFIG_WRITE _IO(CMD_MAGIC, 4) +#define CMD_PCI_CONFIG_READ _IO(CMD_MAGIC, 5) +#define CMD_GET_DMA_INFO _IO(CMD_MAGIC, 6) +#define CMD_REG_INTERRUPTS _IO(CMD_MAGIC, 7) +#define CMD_UNREG_INTERRUPTS _IO(CMD_MAGIC, 8) +#define CMD_EN_INTERRUPTS _IO(CMD_MAGIC, 9) +#define CMD_I2C_READ _IO(CMD_MAGIC, 10) +#define CMD_I2C_WRITE _IO(CMD_MAGIC, 11) +#define CMD_GET_MSI_INFO _IO(CMD_MAGIC, 12) +#define CMD_SET_MSI_CAP _IO(CMD_MAGIC, 13) +#define CMD_IRQ_MAPPING _IO(CMD_MAGIC, 14) +#define CMD_GET_INTR_INFO _IO(CMD_MAGIC, 15) +#define CMD_CACHE_INVAL _IO(CMD_MAGIC, 16) +#define CMD_CACHE_FLUSH _IO(CMD_MAGIC, 17) + +enum dal_version_e +{ + VERSION_MIN, + VERSION_1DOT0, + VERSION_1DOT1, + VERSION_1DOT2, + + VERSION_MAX +}; +typedef enum dal_version_e dal_version_t; + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * DAL_ONE_KB) + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c new file mode 100644 index 00000000000..5aca222a138 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.c @@ -0,0 +1,350 @@ +#include "dal_mpool.h" + +#ifdef __KERNEL__ +#include +#include + +#define DAL_MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define DAL_FREE(x) kfree(x) + +static spinlock_t dal_mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&dal_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&dal_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&dal_mpool_lock, flags) +#define DAL_PRINT(fmt,arg...) printk(fmt,##arg) +#else /* !__KERNEL__*/ + +#include +#include "sal.h" +#define DAL_MALLOC(x) malloc(x) +#define DAL_FREE(x) free(x) +static sal_mutex_t* dal_mpool_lock; +#define MPOOL_LOCK_INIT() sal_mutex_create(&dal_mpool_lock) +#define MPOOL_LOCK() sal_mutex_lock(dal_mpool_lock) +#define MPOOL_UNLOCK() sal_mutex_unlock(dal_mpool_lock) +#define DAL_PRINT(fmt,arg...) sal_printf(fmt,##arg) + +#endif /* __KERNEL__ */ + + + +dal_mpool_mem_t* g_free_block_ptr = NULL; + +/* System cache line size */ +#ifndef DAL_CACHE_LINE_BYTES +#define DAL_CACHE_LINE_BYTES 256 +#endif + +#define DAL_MAX_CHIP_NUM 32 +static dal_mpool_mem_t* p_desc_pool[DAL_MAX_CHIP_NUM] = {0}; +static dal_mpool_mem_t* p_data_pool[DAL_MAX_CHIP_NUM] = {0}; + +int +dal_mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +dal_mpool_mem_t* +_dal_mpool_create(void* base, int size, int type) +{ + dal_mpool_mem_t* head = NULL; + dal_mpool_mem_t* tail = NULL; + + head = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (head == NULL) + { + return NULL; + } + + tail = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (tail == NULL) + { + DAL_FREE(head); + return NULL; + } + + head->size = tail->size = 0; + head->type = type; + head->address = base; + tail->address = head->address + size; + head->next = tail; + tail->next = NULL; + + return head; +} + +dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base, int size) +{ + dal_mpool_mem_t* head = NULL; + int mod = (int)(((unsigned long)base) & (DAL_CACHE_LINE_BYTES - 1)); + + MPOOL_LOCK(); + + if (mod) + { + base = (char*)base + (DAL_CACHE_LINE_BYTES - mod); + size -= (DAL_CACHE_LINE_BYTES - mod); + } + + size &= ~(DAL_CACHE_LINE_BYTES - 1); + + /* init for common linkptr, only used for GB */ + head = _dal_mpool_create(base, size, DAL_MPOOL_TYPE_USELESS); + if (NULL == head) + { + MPOOL_UNLOCK(); + return NULL; + } + + /* init for desc linkptr */ + p_desc_pool[lchip] = _dal_mpool_create(base, DAL_MPOOL_MAX_DESX_SIZE, DAL_MPOOL_TYPE_DESC); + if (NULL == p_desc_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + return NULL; + } + + /* init for data linkptr */ + p_data_pool[lchip] = _dal_mpool_create(((char*)base+DAL_MPOOL_MAX_DESX_SIZE), (size - DAL_MPOOL_MAX_DESX_SIZE), DAL_MPOOL_TYPE_DATA); + if (NULL == p_data_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + DAL_FREE(p_desc_pool[lchip]->next); + DAL_FREE(p_desc_pool[lchip]); + return NULL; + } + + MPOOL_UNLOCK(); + + return head; +} + +dal_mpool_mem_t* +_dal_mpool_alloc_comon(dal_mpool_mem_t* ptr, int size, int type) +{ + dal_mpool_mem_t* new_ptr = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address - (ptr->address + ptr->size) >= size) + { + break; + } + + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) + { + return NULL; + } + + new_ptr = DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (!new_ptr) + { + return NULL; + } + + new_ptr->type = type; + new_ptr->address = ptr->address + ptr->size; + new_ptr->size = size; + new_ptr->next = ptr->next; + ptr->next = new_ptr; + + return new_ptr; +} + +void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type) +{ + dal_mpool_mem_t* ptr = NULL; + dal_mpool_mem_t* new_ptr = NULL; + int mod; + + MPOOL_LOCK(); + + mod = size & (DAL_CACHE_LINE_BYTES - 1); + if (mod != 0) + { + size += (DAL_CACHE_LINE_BYTES - mod); + } + + switch(type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + default: + MPOOL_UNLOCK(); + return NULL; + break; + } + + MPOOL_UNLOCK(); + if( NULL == new_ptr ) + { + return NULL; + } + + return new_ptr->address; +} + +void +_dal_mpool_free(dal_mpool_mem_t* ptr, void* addr, int type) +{ + unsigned char* address = (unsigned char*)addr; + dal_mpool_mem_t* prev = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address == address) + { + break; + } + + ptr = ptr->next; + } + + if (ptr && ptr->next) + { + prev = ptr; + ptr = ptr->next; + prev->next = ptr->next; + DAL_FREE(ptr); + } + + return; +} + +void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr) +{ + dal_mpool_mem_t* ptr = pool; + + MPOOL_LOCK(); + + switch(pool->type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_USELESS); + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DESC); + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DATA); + break; + default: + break; + } + + MPOOL_UNLOCK(); + return; +} + +int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr, * next; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_desc_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_data_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + MPOOL_UNLOCK(); + + return 0; +} + +int +dal_mpool_usage(dal_mpool_mem_t* pool, int type) +{ + int usage = 0; + dal_mpool_mem_t* ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { + if (ptr->type == type || ptr->type == -1) + { + usage += ptr->size; + } + } + + MPOOL_UNLOCK(); + + return usage; +} + +int +dal_mpool_debug(dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr; + int index = 0; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { +// DAL_PRINT("%2dst mpool block: address=0x%8x, size=0x%x \n", index, (unsigned int)ptr->address, ptr->size); + DAL_PRINT("%2dst mpool block: address=%p, size=0x%x \n", index, ptr->address, ptr->size); // note + index++; + } + + MPOOL_UNLOCK(); + + return 0; +} + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h new file mode 100644 index 00000000000..d93f8886813 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/dal_mpool.h @@ -0,0 +1,72 @@ +/** + @file dal_mpool.h + + @author Copyright (C) 2011 Centec Networks Inc. All rights reserved. + + @date 2012-5-10 + + @version v2.0 + + This file contains the dma memory init, allocation and free APIs +*/ + +#ifndef _DMA_MPOOL_H +#define _DMA_MPOOL_H +#ifdef __cplusplus +extern "C" { +#endif + +#define DAL_MPOOL_MAX_DESX_SIZE (1024*1024) + +enum dal_mpool_type_e +{ + DAL_MPOOL_TYPE_USELESS, /* just compatible with GB */ + DAL_MPOOL_TYPE_DESC, /* dma mpool op for desc */ + DAL_MPOOL_TYPE_DATA /* dma mpool op for data */ +}; +typedef enum dal_mpool_type_e dal_mpool_type_t; + +struct dal_mpool_mem_s +{ + unsigned char* address; + int size; + int type; + struct dal_mpool_mem_s* next; +}; +typedef struct dal_mpool_mem_s dal_mpool_mem_t; + +/** + @brief This function is to alloc dma memory + + @param[in] size size of memory + + @return NULL + +*/ +extern int +dal_mpool_init(void); + +extern dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base_ptr, int size); + +extern void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type); + +extern void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr); + +extern int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool); + +extern int +dal_mpool_usage(dal_mpool_mem_t* pool, int type); + +extern int +dal_mpool_debug(dal_mpool_mem_t* pool); +#ifdef __cplusplus +} +#endif + +#endif /* !_DMA_MPOOL_H */ + + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh new file mode 100755 index 00000000000..2f6583bc487 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform.sh @@ -0,0 +1,78 @@ +#!/bin/bash + +#platform init script for centec e582-48x2q4z + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # I801 adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find I801" && exit 1 +} + +init_devnum + +if [ "$1" == "init" ]; then + #install drivers and dependencies + depmod -a + modprobe i2c-i801 + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + i2cset -y 0 0x58 0x8 0x3f + modprobe lm77 + modprobe tun + modprobe dal + modprobe centec_at24c64 + modprobe centec_e582_48x2q4z_platform + i2cset -y 15 0x21 0x18 0x0 + i2cset -y 15 0x21 0x19 0x0 + i2cset -y 15 0x21 0x1a 0xff + i2cset -y 15 0x21 0x1b 0xff + i2cset -y 15 0x21 0x1c 0xff + i2cset -y 15 0x21 0x8 0x0 + i2cset -y 15 0x21 0x9 0x0 + i2cset -y 15 0x22 0x18 0xff + i2cset -y 15 0x22 0x19 0x0 + i2cset -y 15 0x22 0x1a 0x0 + i2cset -y 15 0x22 0x1b 0xff + i2cset -y 15 0x22 0x1c 0xff + i2cset -y 15 0x22 0x9 0x0 + i2cset -y 15 0x22 0xa 0x0 + i2cset -y 16 0x21 0x18 0x0 + i2cset -y 16 0x21 0x19 0x0 + i2cset -y 16 0x21 0x1a 0xff + i2cset -y 16 0x21 0x1b 0xff + i2cset -y 16 0x21 0x1c 0xff + i2cset -y 16 0x21 0x8 0x0 + i2cset -y 16 0x21 0x9 0x0 + i2cset -y 17 0x22 0x18 0xff + i2cset -y 17 0x22 0x19 0x0 + i2cset -y 17 0x22 0x1a 0xff + i2cset -y 17 0x22 0x1b 0x0 + i2cset -y 17 0x22 0x1c 0xff + i2cset -y 17 0x22 0x9 0x0 + i2cset -y 17 0x22 0xb 0x0c + + #start platform monitor + rm -rf /usr/bin/platform_monitor + ln -s /usr/bin/48x2q4z_platform_monitor.py /usr/bin/platform_monitor + python /usr/bin/platform_monitor & +elif [ "$1" == "deinit" ]; then + kill -9 $(pidof platform_monitor) > /dev/null 2>&1 + rm -rf /usr/bin/platform_monitor + modprobe -r centec_e582_48x2q4z_platform + modprobe -r centec_at24c64 + modprobe -r dal + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "e582-48x2q4z_platform : Invalid option !" +fi diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py new file mode 100644 index 00000000000..2d8d2c440a8 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/scripts/48x2q4z_platform_monitor.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of sfp presence scan logic +# +############################################################################# + +try: + import os + import os.path + import threading + import time + import logging + import struct + import syslog + import swsssdk + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-pmon") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +PORT_NUMBER = (48+6) + +class PlatformMonitor: + + """init board platform default config""" + def __init__(self): + """[ctlid, slavedevid]""" + self.fiber_mapping = [(0, 0)] # res + self.fiber_mapping.extend([(1, 7), (1, 6), (1, 5), (1, 4), (1, 3), (1, 2), (1, 1), (1, 0)]) # panel port 1~8 + self.fiber_mapping.extend([(1, 15), (1, 14), (1, 13), (1, 12), (1, 11), (1, 10), (1, 9), (1, 8)]) # panel port 9~16 + self.fiber_mapping.extend([(1, 19), (1, 17), (1, 16), (1, 18), (0, 7), (0, 6), (0, 5), (0, 4)]) # panel port 17~24 + self.fiber_mapping.extend([(0, 3), (0, 2), (0, 1), (0, 0), (0, 15), (0, 14), (0, 13), (0, 12)]) # panel port 25~32 + self.fiber_mapping.extend([(0, 11), (0, 10), (0, 9), (0, 8), (0, 23), (0, 22), (0, 21), (0, 20)]) # panel port 33~40 + self.fiber_mapping.extend([(0, 19), (0, 18), (0, 17), (0, 16), (0, 31), (0, 26), (0, 29), (0, 27)]) # panel port 41~48 + self.fiber_mapping.extend([(0, 24), (0, 25), (1, 23), (1, 22), (1, 21), (1, 20)]) # panel port 49~54 + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + self.sfp_present = [0]*(PORT_NUMBER+1) + self.sfp_enable = [0]*(PORT_NUMBER+1) + self.f_sfp_present = "/sys/class/sfp/sfp{}/sfp_presence" + self.f_sfp_enable = "/sys/class/sfp/sfp{}/sfp_enable" + self.sfp_scan_timer = 0 + + def is_qsfp(self, port): + if port <= 48: + return False + else: + return True + + def get_sfp_present(self, port): + with open(self.f_sfp_present.format(port), 'r') as sfp_file: + return int(sfp_file.read()) + + def set_sfp_present(self, port, present): + self.sfp_present[port] = present + + def set_sfp_enable(self, port, enable): + if self.is_qsfp(port): + if enable: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("1") + self.sfp_enable[port] = 1 + else: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("0") + self.sfp_enable[port] = 0 + else: + (ctlid, devid) = self.fiber_mapping[port] + req = struct.pack('=HHHBBHIBBBBI', 0, 9, 16, ctlid, devid, 0x50, 0, 0x56, 1, 0xf, 0, 1) + self.udpClient.sendto(req, ('localhost', 8101)) + rsp, addr = self.udpClient.recvfrom(1024) + rsp_data = struct.unpack('=HHHBBHIBBBBIi512B', rsp) + enable_v = rsp_data[13] + if enable: + enable_v &= 0xf0 + else: + enable_v |= 0x0f + data = struct.pack('=HHHBBHBBBB', 0, 11, 8, ctlid, 0x56, 0x50, devid, enable_v, 0xf, 0) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("set sfp{} to {}".format(port, ("enable" if enable else "disable"))) + + def initialize_configdb(self): + try: + f_mac = os.popen('ip link show eth0 | grep ether | awk \'{print $2}\'') + mac_addr = f_mac.read(17) + last_byte = mac_addr[-2:] + aligned_last_byte = format(int(int(str(last_byte), 16) + 1), '02x') + mac_addr = mac_addr[:-2] + aligned_last_byte + DBG_PRINT("start connect swss config-db to set device mac-address") + swss = swsssdk.SonicV2Connector() + swss.connect(swss.CONFIG_DB) + swss.set(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac', mac_addr) + mac_addr = swss.get(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac') + DBG_PRINT("set device mac-address: %s" % mac_addr) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize_rpc(self): + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + def initialize_gpio(self): + # set gpio 1,2,3,4,5,6,7,8 output mode + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 0 to reset i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 1 to release i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + DBG_PRINT("config ctc chip gpio done.") + + def initialize_sfp(self): + try: + for port in range(1, PORT_NUMBER+1): + if self.get_sfp_present(port): + self.set_sfp_present(port, 1) + self.set_sfp_enable(port, 1) + else: + self.set_sfp_present(port, 0) + self.set_sfp_enable(port, 0) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize(self): + DBG_PRINT("start connect to sdk rpc server.") + + self.initialize_configdb() + self.initialize_rpc() + self.initialize_gpio() + self.initialize_sfp() + + def sfp_scan(self): + try: + for port in range(1, PORT_NUMBER+1): + cur_present = self.get_sfp_present(port) + if self.sfp_present[port] != cur_present: + self.set_sfp_present(port, cur_present) + self.set_sfp_enable(port, cur_present) + except IOError as e: + DBG_PRINT(str(e)) + + def start(self): + while True: + self.sfp_scan() + time.sleep(1) + +if __name__ == "__main__": + monitor = PlatformMonitor() + monitor.initialize() + monitor.start() + diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service b/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service new file mode 100644 index 00000000000..008db145b11 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/service/48x2q4z_platform.service @@ -0,0 +1,13 @@ +[Unit] +Description=Centec e582 48x2q4z platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-e582-48x2q4z start +ExecStop=-/etc/init.d/platform-modules-e582-48x2q4z stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf new file mode 100644 index 00000000000..7a7881c8c0d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/48x6q-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +lm77 +adt7470 +tun diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json new file mode 100644 index 00000000000..995ac0444b9 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db.json @@ -0,0 +1,302 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": 65100, + "deployment_id": null, + "hostname": "switch1", + "type": "LeafRouter", + "hwsku": "E582-48x6q" + + } + }, + "BGP_PEER_RANGE": {}, + "VLAN": {}, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "40000", + "mtu": "9100" + } + }, + "SYSLOG_SERVER": {}, + "VLAN_INTERFACE": {}, + "PORTCHANNEL_INTERFACE": {}, + "PORTCHANNEL": {}, + "MGMT_INTERFACE": {}, + "DHCP_SERVER": {}, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "ACL_TABLE": {}, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json new file mode 100644 index 00000000000..ce6909f3a20 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/config_db_l2l3.json @@ -0,0 +1,610 @@ +{ + "QUEUE": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|0-2": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|3-4": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSLESS]", + "scheduler": "[SCHEDULER|scheduler.0]" + }, + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54|5-7": { + "wred_profile": "[WRED_PROFILE|AZURE_LOSSY]" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + }, + "AZURE_LOSSY": { + "red_max_threshold": "32760", + "yellow_max_threshold": "32760", + "green_min_threshold": "4095", + "red_min_threshold": "4095", + "yellow_min_threshold": "4095", + "green_max_threshold": "32760", + "wred_yellow_enable": "true", + "wred_green_enable": "true" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "56": "7", + "54": "6", + "28": "3", + "48": "6", + "29": "3", + "60": "7", + "61": "7", + "62": "7", + "63": "7", + "49": "6", + "34": "4", + "24": "3", + "25": "3", + "26": "3", + "27": "3", + "20": "2", + "21": "2", + "22": "2", + "23": "2", + "46": "5", + "47": "5", + "44": "5", + "45": "5", + "42": "5", + "43": "5", + "40": "5", + "41": "5", + "1": "0", + "0": "0", + "3": "0", + "2": "0", + "5": "0", + "4": "0", + "7": "0", + "6": "0", + "9": "1", + "8": "1", + "35": "4", + "13": "1", + "12": "1", + "15": "1", + "58": "7", + "11": "1", + "10": "1", + "39": "4", + "38": "4", + "59": "7", + "14": "1", + "17": "2", + "16": "2", + "19": "2", + "18": "2", + "31": "3", + "30": "3", + "51": "6", + "36": "4", + "53": "6", + "52": "6", + "33": "4", + "55": "6", + "37": "4", + "32": "4", + "57": "7", + "50": "6" + } + }, + "DEVICE_METADATA": { + "localhost": { + "hwsku": "E582-48x6q", + "hostname": "switch1", + "bgp_asn": "None", + "deployment_id": "None", + "type": "LeafRouter" + } + }, + "PORT": { + "Ethernet1": { + "alias": "eth-0-1", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet2": { + "alias": "eth-0-2", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet3": { + "alias": "eth-0-3", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet4": { + "alias": "eth-0-4", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet5": { + "alias": "eth-0-5", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet6": { + "alias": "eth-0-6", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet7": { + "alias": "eth-0-7", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet8": { + "alias": "eth-0-8", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet9": { + "alias": "eth-0-9", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet10": { + "alias": "eth-0-10", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet11": { + "alias": "eth-0-11", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet12": { + "alias": "eth-0-12", + "speed": "1000", + "mtu": "9100" + }, + "Ethernet13": { + "alias": "eth-0-13", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet14": { + "alias": "eth-0-14", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet15": { + "alias": "eth-0-15", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet16": { + "alias": "eth-0-16", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet17": { + "alias": "eth-0-17", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet18": { + "alias": "eth-0-18", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet19": { + "alias": "eth-0-19", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet20": { + "alias": "eth-0-20", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet21": { + "alias": "eth-0-21", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet22": { + "alias": "eth-0-22", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet23": { + "alias": "eth-0-23", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet24": { + "alias": "eth-0-24", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet25": { + "alias": "eth-0-25", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet26": { + "alias": "eth-0-26", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet27": { + "alias": "eth-0-27", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet28": { + "alias": "eth-0-28", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet29": { + "alias": "eth-0-29", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet30": { + "alias": "eth-0-30", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet31": { + "alias": "eth-0-31", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet32": { + "alias": "eth-0-32", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet33": { + "alias": "eth-0-33", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet34": { + "alias": "eth-0-34", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet35": { + "alias": "eth-0-35", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet36": { + "alias": "eth-0-36", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet37": { + "alias": "eth-0-37", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet38": { + "alias": "eth-0-38", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet39": { + "alias": "eth-0-39", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet40": { + "alias": "eth-0-40", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet41": { + "alias": "eth-0-41", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet42": { + "alias": "eth-0-42", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet43": { + "alias": "eth-0-43", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet44": { + "alias": "eth-0-44", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet45": { + "alias": "eth-0-45", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet46": { + "alias": "eth-0-46", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet47": { + "alias": "eth-0-47", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet48": { + "alias": "eth-0-48", + "speed": "10000", + "mtu": "9100" + }, + "Ethernet49": { + "alias": "eth-0-49", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet50": { + "alias": "eth-0-50", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet51": { + "alias": "eth-0-51", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet52": { + "alias": "eth-0-52", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet53": { + "alias": "eth-0-53", + "speed": "40000", + "mtu": "9100" + }, + "Ethernet54": { + "alias": "eth-0-54", + "speed": "40000", + "mtu": "9100" + } + }, + "PORT_QOS_MAP": { + "Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53,Ethernet54": { + "pfc_enable": "3,4", + "dscp_to_tc_map": "[DSCP_TO_TC_MAP|AZURE]" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type": "DWRR", + "weight": "25" + }, + "scheduler.1": { + "type": "DWRR", + "weight": "30" + }, + "scheduler.2": { + "type": "DWRR", + "weight": "20" + } + }, + "VLAN": { + "Vlan500": { + "dhcp_servers": [ + "192.168.5.1", + "192.168.5.2", + "192.168.5.3", + "192.168.5.4" + ], + "members": [ + "Ethernet5", + "Ethernet6", + "Ethernet7", + "Ethernet8" + ], + "vlanid": "500" + }, + "Vlan600": { + "dhcp_servers": [ + "192.168.6.1", + "192.168.6.2", + "192.168.6.3", + "192.168.6.4" + ], + "members": [ + "Ethernet5", + "Ethernet6" + ], + "vlanid": "600" + }, + "Vlan700": { + "dhcp_servers": [ + "192.168.7.1", + "192.168.7.2", + "192.168.7.3", + "192.168.7.4" + ], + "members": [ + "Ethernet5", + "Ethernet7" + ], + "vlanid": "700" + }, + "Vlan800": { + "dhcp_servers": [ + "192.168.8.1", + "192.168.8.2", + "192.168.8.3", + "192.168.8.4" + ], + "members": [ + "Ethernet5", + "Ethernet8" + ], + "vlanid": "800" + } + }, + "VLAN_MEMBER": { + "Vlan500|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan500|Ethernet6": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet7": { + "tagging_mode": "untagged" + }, + "Vlan500|Ethernet8": { + "tagging_mode": "untagged" + }, + "Vlan600|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan600|Ethernet6": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan700|Ethernet7": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet5": { + "tagging_mode": "tagged" + }, + "Vlan800|Ethernet8": { + "tagging_mode": "tagged" + } + }, + "INTERFACE": { + "Ethernet1|192.168.1.1/24": {}, + "Ethernet2|192.168.2.1/24": {}, + "Ethernet3|192.168.3.1/24": {}, + "Ethernet4|192.168.4.1/24": {} + }, + "VLAN_INTERFACE": { + "Vlan500|192.168.5.1/24": {}, + "Vlan600|192.168.6.1/24": {}, + "Vlan700|192.168.7.1/24": {}, + "Vlan800|192.168.8.1/24": {} + }, + "LOOPBACK_INTERFACE": { + "Loopback0|127.0.0.1/8": {} + }, + "CABLE_LENGTH": { + "AZURE": { + "Ethernet8": "40m", + "Ethernet9": "40m", + "Ethernet2": "40m", + "Ethernet3": "40m", + "Ethernet1": "40m", + "Ethernet6": "40m", + "Ethernet7": "40m", + "Ethernet4": "40m", + "Ethernet5": "40m", + "Ethernet22": "40m", + "Ethernet50": "40m", + "Ethernet51": "40m", + "Ethernet52": "40m", + "Ethernet53": "40m", + "Ethernet54": "40m", + "Ethernet38": "40m", + "Ethernet39": "40m", + "Ethernet18": "40m", + "Ethernet19": "40m", + "Ethernet14": "40m", + "Ethernet15": "40m", + "Ethernet16": "40m", + "Ethernet17": "40m", + "Ethernet10": "40m", + "Ethernet11": "40m", + "Ethernet12": "40m", + "Ethernet35": "40m", + "Ethernet37": "40m", + "Ethernet32": "40m", + "Ethernet33": "40m", + "Ethernet30": "40m", + "Ethernet31": "40m", + "Ethernet49": "40m", + "Ethernet48": "40m", + "Ethernet47": "40m", + "Ethernet36": "40m", + "Ethernet45": "40m", + "Ethernet44": "40m", + "Ethernet43": "40m", + "Ethernet42": "40m", + "Ethernet41": "40m", + "Ethernet40": "40m", + "Ethernet29": "40m", + "Ethernet28": "40m", + "Ethernet34": "40m", + "Ethernet46": "40m", + "Ethernet21": "40m", + "Ethernet20": "40m", + "Ethernet23": "40m", + "Ethernet13": "40m", + "Ethernet25": "40m", + "Ethernet24": "40m", + "Ethernet27": "40m", + "Ethernet26": "40m" + } + }, + "CRM": { + "Config": { + "acl_table_threshold_type": "percentage", + "nexthop_group_threshold_type": "percentage", + "fdb_entry_high_threshold": "85", + "acl_entry_threshold_type": "percentage", + "ipv6_neighbor_low_threshold": "70", + "nexthop_group_member_low_threshold": "70", + "acl_group_high_threshold": "85", + "ipv4_route_high_threshold": "85", + "acl_counter_high_threshold": "85", + "ipv4_route_low_threshold": "70", + "ipv4_route_threshold_type": "percentage", + "ipv4_neighbor_low_threshold": "70", + "acl_group_threshold_type": "percentage", + "ipv4_nexthop_high_threshold": "85", + "ipv6_route_threshold_type": "percentage", + "nexthop_group_low_threshold": "70", + "ipv4_neighbor_high_threshold": "85", + "ipv6_route_high_threshold": "85", + "ipv6_nexthop_threshold_type": "percentage", + "polling_interval": "300", + "ipv4_nexthop_threshold_type": "percentage", + "acl_group_low_threshold": "70", + "acl_entry_low_threshold": "70", + "nexthop_group_member_threshold_type": "percentage", + "ipv4_nexthop_low_threshold": "70", + "acl_counter_threshold_type": "percentage", + "ipv6_neighbor_high_threshold": "85", + "nexthop_group_member_high_threshold": "85", + "acl_table_low_threshold": "70", + "fdb_entry_threshold_type": "percentage", + "ipv6_neighbor_threshold_type": "percentage", + "acl_table_high_threshold": "85", + "ipv6_nexthop_low_threshold": "70", + "acl_counter_low_threshold": "70", + "ipv4_neighbor_threshold_type": "percentage", + "nexthop_group_high_threshold": "85", + "ipv6_route_low_threshold": "70", + "acl_entry_high_threshold": "85", + "fdb_entry_low_threshold": "70", + "ipv6_nexthop_high_threshold": "85" + } + } +} diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/cfg/minigraph.xml b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/minigraph.xml new file mode 100644 index 00000000000..fc313eb8463 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/cfg/minigraph.xml @@ -0,0 +1,38 @@ + + + + + + + + + + + + + + + + + switch1 + + + + + + + + + + + + + switch1 + E582-48x6q + + + + switch1 + E582-48x6q + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile b/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile new file mode 100644 index 00000000000..25df81bba42 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := centec_e582_48x6q_platform.o dal.o centec_at24c64.o +dal-y := dal_kernel.o dal_mpool.o diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c new file mode 100644 index 00000000000..e1835df8862 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_at24c64.c @@ -0,0 +1,602 @@ +/* + * at24.c - handle most I2C EEPROMs + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_data { + struct at24_platform_data chip; + int use_smbus; + + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + struct bin_attribute bin; + + u8 *writebuf; + unsigned write_max; + unsigned num_addresses; + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct i2c_client *client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + +#define AT24_SIZE_BYTELEN 5 +#define AT24_SIZE_FLAGS 8 + +#define AT24_BITMASK(x) (BIT(x) - 1) + +/* create non-zero magic value for given eeprom parameters */ +#define AT24_DEVICE_MAGIC(_len, _flags) \ + ((1 << AT24_SIZE_FLAGS | (_flags)) \ + << AT24_SIZE_BYTELEN | ilog2(_len)) + +static const struct i2c_device_id at24_ctc_ids[] = { + { "24c64-ctc", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ctc_ids); + +/*-------------------------------------------------------------------------*/ + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + */ +static struct i2c_client *at24_translate_offset(struct at24_data *at24, + unsigned *offset) +{ + unsigned i = 0; + + if (at24->chip.flags & AT24_FLAG_ADDR16) { + i = *offset >> 16; + *offset &= 0xffff; + } else { + i = *offset >> 8; + *offset &= 0xff; + } + + return at24->client[i]; +} + +static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + struct i2c_client *client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + /* + * REVISIT some multi-address chips don't rollover page reads to + * the next slave address, so we may need to truncate the count. + * Those chips might need another quirk flag. + * + * If the real hardware used four adjacent 24c02 chips and that + * were misconfigured as one 24c08, that would be a similar effect: + * one "eeprom" file not four, but larger reads would fail when + * they crossed certain pages. + */ + + /* + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + */ + client = at24_translate_offset(at24, &offset); + + if (count > io_limit) + count = io_limit; + + count = 1; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + + status = i2c_smbus_write_byte_data(client, (offset >> 8) & 0x0ff, offset & 0x0ff ); + status = i2c_smbus_read_byte(client); + if (status >= 0) { + buf[0] = status; + status = count; + } + + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_read(struct at24_data *at24, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + memset(buf, 0, count); + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_read(at24, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_read(at24, buf, off, count); +} + + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. This routine + * writes at most one page. + */ +static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, + unsigned offset, size_t count) +{ + struct i2c_client *client; + ssize_t status; + unsigned long timeout, write_time; + unsigned next_page; + + /* Get corresponding I2C address and adjust offset */ + client = at24_translate_offset(at24, &offset); + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->chip.page_size); + if (offset + count > next_page) + count = next_page - offset; + + /* + * Writes fail if the previous one didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + write_time = jiffies; + + status = i2c_smbus_write_word_data(client, (offset >> 8) & 0x0ff, (offset & 0xFF) | buf[0]); + if (status == 0) + status = count; + + dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off, + size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ssize_t status; + + status = at24_eeprom_write(at24, buf, off, 1); /* only one-byte to write; TODO page wirte */ + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&at24->lock); + + return retval; +} + +static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + struct at24_data *at24; + + if (unlikely(off >= attr->size)) + return -EFBIG; + + at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); + return at24_write(at24, buf, off, count); +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_OF +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ + const __be32 *val; + struct device_node *node = client->dev.of_node; + + if (node) { + if (of_get_property(node, "read-only", NULL)) + chip->flags |= AT24_FLAG_READONLY; + val = of_get_property(node, "pagesize", NULL); + if (val) + chip->page_size = be32_to_cpup(val); + } +} +#else +static void at24_get_ofdata(struct i2c_client *client, + struct at24_platform_data *chip) +{ } +#endif /* CONFIG_OF */ + +static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct at24_platform_data chip; + bool writable; + int use_smbus = 0; + struct at24_data *at24; + int err; + unsigned i, num_addresses; + kernel_ulong_t magic; + + if (client->dev.platform_data) { + chip = *(struct at24_platform_data *)client->dev.platform_data; + } else { + if (!id->driver_data) + return -ENODEV; + + magic = id->driver_data; + chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); + magic >>= AT24_SIZE_BYTELEN; + chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); + + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + + /* update chipdata if OF is present */ + at24_get_ofdata(client, &chip); + + chip.setup = NULL; + chip.context = NULL; + } + + if (!is_power_of_2(chip.byte_len)) + dev_warn(&client->dev, + "byte_len looks suspicious (no power of 2)!\n"); + if (!chip.page_size) { + dev_err(&client->dev, "page_size must not be 0!\n"); + return -EINVAL; + } + if (!is_power_of_2(chip.page_size)) + dev_warn(&client->dev, + "page_size looks suspicious (no power of 2)!\n"); + + /* Use I2C operations unless we're stuck with SMBus extensions. */ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)) { + use_smbus = I2C_SMBUS_WORD_DATA; + } else if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + use_smbus = I2C_SMBUS_BYTE_DATA; + } else { + return -EPFNOSUPPORT; + } + use_smbus = I2C_SMBUS_BYTE_DATA; + } + + if (chip.flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(chip.byte_len, (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); + + at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->use_smbus = use_smbus; + at24->chip = chip; + at24->num_addresses = num_addresses; + + printk(KERN_ALERT "at24_probe chip.byte_len = 0x%x\n", chip.byte_len); + printk(KERN_ALERT "at24_probe chip.flags = 0x%x\n", chip.flags); + printk(KERN_ALERT "at24_probe chip.magic = 0x%lx\n", id->driver_data); + printk(KERN_ALERT "at24_probe use_smbus = %d\n", at24->use_smbus); + printk(KERN_ALERT "at24_probe num_addresses = %d\n", at24->num_addresses); + + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + sysfs_bin_attr_init(&at24->bin); + at24->bin.attr.name = "eeprom"; + at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR; + at24->bin.read = at24_bin_read; + at24->bin.size = chip.byte_len; + + writable = !(chip.flags & AT24_FLAG_READONLY); + if (writable) { + if (!use_smbus || i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { + unsigned write_max = chip.page_size; + + at24->bin.write = at24_bin_write; + at24->bin.attr.mode |= S_IWUSR; + + if (write_max > io_limit) + write_max = io_limit; + if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) + write_max = I2C_SMBUS_BLOCK_MAX; + at24->write_max = write_max; + + /* buffer (data + address at the beginning) */ + at24->writebuf = devm_kzalloc(&client->dev, write_max + 2, GFP_KERNEL); + if (!at24->writebuf) + return -ENOMEM; + } else { + dev_warn(&client->dev, "cannot write due to controller restrictions."); + } + } + + at24->client[0] = client; + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + at24->client[i] = i2c_new_dummy(client->adapter, client->addr + i); + if (!at24->client[i]) { + dev_err(&client->dev, "address 0x%02x unavailable\n", client->addr + i); + err = -EADDRINUSE; + goto err_clients; + } + } + + err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin); + if (err) + goto err_clients; + + i2c_set_clientdata(client, at24); + + printk(KERN_ALERT "at24_probe %s done\n", client->name); + + return 0; + +err_clients: + for (i = 1; i < num_addresses; i++) + if (at24->client[i]) + i2c_unregister_device(at24->client[i]); + + return err; +} + +static int at24_remove(struct i2c_client *client) +{ + struct at24_data *at24; + int i; + + at24 = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &at24->bin); + + for (i = 1; i < at24->num_addresses; i++) + i2c_unregister_device(at24->client[i]); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +static struct i2c_board_info i2c_devs = { + I2C_BOARD_INFO("24c64-ctc", 0x57), +}; + +static struct i2c_adapter *adapter = NULL; +static struct i2c_client *client = NULL; + +static int ctc_at24c64_init(void) +{ + printk(KERN_ALERT "ctc_at24c64_init\n"); + + adapter = i2c_get_adapter(0); + if(adapter == NULL){ + printk(KERN_ALERT "i2c_get_adapter == NULL\n"); + return -1; + } + + client = i2c_new_device(adapter, &i2c_devs); + if(client == NULL){ + printk(KERN_ALERT "i2c_new_device == NULL\n"); + i2c_put_adapter(adapter); + adapter = NULL; + return -1; + } + + return 0; +} + +static void ctc_at24c64_exit(void) +{ + printk(KERN_ALERT "ctc_at24c64_exit\n"); + if(client){ + i2c_unregister_device(client); + } + if(adapter){ + i2c_put_adapter(adapter); + } +} + +static struct i2c_driver at24_ctc_driver = { + .driver = { + .name = "at24-ctc", + .owner = THIS_MODULE, + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ctc_ids, +}; + +static int __init at24_ctc_init(void) +{ + if (!io_limit) { + pr_err("at24_ctc: io_limit must not be 0!\n"); + return -EINVAL; + } + + io_limit = rounddown_pow_of_two(io_limit); + + ctc_at24c64_init(); + + return i2c_add_driver(&at24_ctc_driver); +} +module_init(at24_ctc_init); + +static void __exit at24_ctc_exit(void) +{ + ctc_at24c64_exit(); + i2c_del_driver(&at24_ctc_driver); +} +module_exit(at24_ctc_exit); + +MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); +MODULE_AUTHOR("David Brownell and Wolfram Sang"); +MODULE_LICENSE("GPL"); +/* XXX */ + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c new file mode 100644 index 00000000000..6ef18ca62f4 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/centec_e582_48x6q_platform.c @@ -0,0 +1,1381 @@ +#include +#include +#include +#include +#include +#include +#include + +#define SEP(XXX) 1 +#define IS_INVALID_PTR(_PTR_) ((_PTR_ == NULL) || IS_ERR(_PTR_)) +#define IS_VALID_PTR(_PTR_) (!IS_INVALID_PTR(_PTR_)) + +#if SEP("defines") +#define PCA9548_CHANNEL_NUM 8 +#define PCA9548_ADAPT_ID_START 10 +#define SFP_NUM 48 +#define QSFP_NUM 6 +#define PORT_NUM (SFP_NUM+QSFP_NUM) +#endif + +#if SEP("i2c:master") +static struct i2c_adapter *i2c_adp_master = NULL; /* i2c-0-cpu */ + +static int e582_48x6q_init_i2c_master(void) +{ + /* find i2c-core master */ + i2c_adp_master = i2c_get_adapter(0); + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x6q_init_i2c_master can't find i2c-core bus\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_master(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_adp_master)) { + i2c_put_adapter(i2c_adp_master); + i2c_adp_master = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:pca9548") +static struct pca954x_platform_mode i2c_dev_pca9548_platform_mode[PCA9548_CHANNEL_NUM] = { + [0] = { + .adap_id = PCA9548_ADAPT_ID_START, + .deselect_on_exit = 1, + .class = 0, + }, + [1] = { + .adap_id = PCA9548_ADAPT_ID_START + 1, + .deselect_on_exit = 1, + .class = 0, + }, + [2] = { + .adap_id = PCA9548_ADAPT_ID_START + 2, + .deselect_on_exit = 1, + .class = 0, + }, + [3] = { + .adap_id = PCA9548_ADAPT_ID_START + 3, + .deselect_on_exit = 1, + .class = 0, + }, + [4] = { + .adap_id = PCA9548_ADAPT_ID_START + 4, + .deselect_on_exit = 1, + .class = 0, + }, + [5] = { + .adap_id = PCA9548_ADAPT_ID_START + 5, + .deselect_on_exit = 1, + .class = 0, + }, + [6] = { + .adap_id = PCA9548_ADAPT_ID_START + 6, + .deselect_on_exit = 1, + .class = 0, + }, + [7] = { + .adap_id = PCA9548_ADAPT_ID_START + 7, + .deselect_on_exit = 1, + .class = 0, + } +}; +static struct pca954x_platform_data i2c_dev_pca9548_platform_data = { + .modes = i2c_dev_pca9548_platform_mode, + .num_modes = PCA9548_CHANNEL_NUM, +}; +static struct i2c_board_info i2c_dev_pca9548 = { + I2C_BOARD_INFO("pca9548", 0x70), + .platform_data = &i2c_dev_pca9548_platform_data, +}; +static struct i2c_client *i2c_client_pca9548x = NULL; + +static int e582_48x6q_init_i2c_pca9548(void) +{ + if(IS_INVALID_PTR(i2c_adp_master)) + { + i2c_adp_master = NULL; + printk(KERN_CRIT "e582_48x6q_init_i2c_pca9548 can't find i2c-core bus\n"); + return -1; + } + + /* install i2c-mux */ + i2c_client_pca9548x = i2c_new_device(i2c_adp_master, &i2c_dev_pca9548); + if(IS_INVALID_PTR(i2c_client_pca9548x)) + { + i2c_client_pca9548x = NULL; + printk(KERN_CRIT "install e582_48x6q board pca9548 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_pca9548(void) +{ + /* uninstall i2c-core master */ + if(IS_VALID_PTR(i2c_client_pca9548x)) { + i2c_unregister_device(i2c_client_pca9548x); + i2c_client_pca9548x = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:adt7470") +static struct i2c_board_info i2c_dev_adt7470 = { + I2C_BOARD_INFO("adt7470", 0x2F), +}; +static struct i2c_adapter *i2c_adp_adt7470 = NULL; /* pca9548x-channel 5 */ +static struct i2c_client *i2c_client_adt7470 = NULL; + +static int e582_48x6q_init_i2c_adt7470(void) +{ + i2c_adp_adt7470 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 5); + if(IS_INVALID_PTR(i2c_adp_adt7470)) + { + i2c_adp_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x6q board adt7470 failed\n"); + return -1; + } + + i2c_client_adt7470 = i2c_new_device(i2c_adp_adt7470, &i2c_dev_adt7470); + if(IS_INVALID_PTR(i2c_client_adt7470)){ + i2c_client_adt7470 = NULL; + printk(KERN_CRIT "install e582_48x6q board adt7470 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_adt7470(void) +{ + if(IS_VALID_PTR(i2c_client_adt7470)) { + i2c_unregister_device(i2c_client_adt7470); + i2c_client_adt7470 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_adt7470)) { + i2c_put_adapter(i2c_adp_adt7470); + i2c_adp_adt7470 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:psu") +static struct i2c_adapter *i2c_adp_psu1 = NULL; /* psu1 channel 3 */ +static struct i2c_adapter *i2c_adp_psu2 = NULL; /* psu2 channel 1 */ +static struct i2c_board_info i2c_dev_psu1 = { + I2C_BOARD_INFO("i2c-psu1", 0x38), +}; +static struct i2c_board_info i2c_dev_psu2 = { + I2C_BOARD_INFO("i2c-psu2", 0x38), +}; +static struct i2c_client *i2c_client_psu1 = NULL; +static struct i2c_client *i2c_client_psu2 = NULL; + +static int e582_48x6q_init_i2c_psu(void) +{ + i2c_adp_psu1 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 3); + if(IS_INVALID_PTR(i2c_adp_psu1)) + { + i2c_adp_psu1 = NULL; + printk(KERN_CRIT "get e582_48x6q psu1 i2c-adp failed\n"); + return -1; + } + + i2c_adp_psu2 = i2c_get_adapter(PCA9548_ADAPT_ID_START + 1); + if(IS_INVALID_PTR(i2c_adp_psu2)) + { + i2c_adp_psu2 = NULL; + printk(KERN_CRIT "get e582_48x6q psu2 i2c-adp failed\n"); + return -1; + } + + i2c_client_psu1 = i2c_new_device(i2c_adp_psu1, &i2c_dev_psu1); + if(IS_INVALID_PTR(i2c_client_psu1)){ + i2c_client_psu1 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client psu1 failed\n"); + return -1; + } + + i2c_client_psu2 = i2c_new_device(i2c_adp_psu2, &i2c_dev_psu2); + if(IS_INVALID_PTR(i2c_client_psu2)){ + i2c_client_psu2 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client psu2 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_psu(void) +{ + if(IS_VALID_PTR(i2c_client_psu1)) { + i2c_unregister_device(i2c_client_psu1); + i2c_client_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_psu2)) { + i2c_unregister_device(i2c_client_psu2); + i2c_client_psu2 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu1)) + { + i2c_put_adapter(i2c_adp_psu1); + i2c_adp_psu1 = NULL; + } + + if(IS_VALID_PTR(i2c_adp_psu2)) + { + i2c_put_adapter(i2c_adp_psu2); + i2c_adp_psu2 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:epld") +static struct i2c_board_info i2c_dev_epld = { + I2C_BOARD_INFO("i2c-epld", 0x58), +}; +static struct i2c_client *i2c_client_epld = NULL; + +static int e582_48x6q_init_i2c_epld(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x6q_init_i2c_epld can't find i2c-core bus\n"); + return -1; + } + + i2c_client_epld = i2c_new_device(i2c_adp_master, &i2c_dev_epld); + if(IS_INVALID_PTR(i2c_client_epld)) + { + i2c_client_epld = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client epld failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_epld(void) +{ + if(IS_VALID_PTR(i2c_client_epld)) { + i2c_unregister_device(i2c_client_epld); + i2c_client_epld = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:gpio") +static struct i2c_board_info i2c_dev_gpio0 = { + I2C_BOARD_INFO("i2c-gpio0", 0x20), +}; +static struct i2c_board_info i2c_dev_gpio1 = { + I2C_BOARD_INFO("i2c-gpio1", 0x21), +}; +static struct i2c_board_info i2c_dev_gpio2 = { + I2C_BOARD_INFO("i2c-gpio2", 0x22), +}; +static struct i2c_board_info i2c_dev_gpio3 = { + I2C_BOARD_INFO("i2c-gpio3", 0x23), +}; +static struct i2c_board_info i2c_dev_gpio4 = { + I2C_BOARD_INFO("i2c-gpio4", 0x24), +}; +static struct i2c_client *i2c_client_gpio0 = NULL; +static struct i2c_client *i2c_client_gpio1 = NULL; +static struct i2c_client *i2c_client_gpio2 = NULL; +static struct i2c_client *i2c_client_gpio3 = NULL; +static struct i2c_client *i2c_client_gpio4 = NULL; + +static int e582_48x6q_init_i2c_gpio(void) +{ + if (IS_INVALID_PTR(i2c_adp_master)) + { + printk(KERN_CRIT "e582_48x6q_init_i2c_gpio can't find i2c-core bus\n"); + return -1; + } + + i2c_client_gpio0 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio0); + if(IS_INVALID_PTR(i2c_client_gpio0)) + { + i2c_client_gpio0 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio0 failed\n"); + return -1; + } + + i2c_client_gpio1 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio1); + if(IS_INVALID_PTR(i2c_client_gpio1)) + { + i2c_client_gpio1 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio1 failed\n"); + return -1; + } + + i2c_client_gpio2 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio2); + if(IS_INVALID_PTR(i2c_client_gpio2)) + { + i2c_client_gpio2 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio2 failed\n"); + return -1; + } + + i2c_client_gpio3 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio3); + if(IS_INVALID_PTR(i2c_client_gpio3)) + { + i2c_client_gpio3 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio3 failed\n"); + return -1; + } + + i2c_client_gpio4 = i2c_new_device(i2c_adp_master, &i2c_dev_gpio4); + if(IS_INVALID_PTR(i2c_client_gpio4)) + { + i2c_client_gpio4 = NULL; + printk(KERN_CRIT "create e582_48x6q board i2c client gpio4 failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_i2c_gpio(void) +{ + if(IS_VALID_PTR(i2c_client_gpio0)) { + i2c_unregister_device(i2c_client_gpio0); + i2c_client_gpio0 = NULL; + } + + if((i2c_client_gpio1)) { + i2c_unregister_device(i2c_client_gpio1); + i2c_client_gpio1 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio2)) { + i2c_unregister_device(i2c_client_gpio2); + i2c_client_gpio2 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio3)) { + i2c_unregister_device(i2c_client_gpio3); + i2c_client_gpio3 = NULL; + } + + if(IS_VALID_PTR(i2c_client_gpio4)) { + i2c_unregister_device(i2c_client_gpio4); + i2c_client_gpio4 = NULL; + } + + return 0; +} +#endif + +#if SEP("i2c:smbus") +static int e582_48x6q_smbus_read_reg(struct i2c_client *client, unsigned char reg, unsigned char* value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret >= 0) { + *value = (unsigned char)ret; + } + else + { + *value = 0; + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} + +static int e582_48x6q_smbus_write_reg(struct i2c_client *client, unsigned char reg, unsigned char value) +{ + int ret = 0; + + if (IS_INVALID_PTR(client)) + { + printk(KERN_CRIT "invalid i2c client"); + return -1; + } + + ret = i2c_smbus_write_byte_data(client, reg, value); + if (ret != 0) + { + printk(KERN_CRIT "i2c_smbus op failed: ret=%d reg=%d\n",ret ,reg); + return ret; + } + + return 0; +} +#endif + +#if SEP("drivers:psu") +static struct class* psu_class = NULL; +static struct device* psu_dev_psu1 = NULL; +static struct device* psu_dev_psu2 = NULL; + +static ssize_t e582_48x6q_psu_read_presence(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char present_no = 0; + unsigned char present = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio0; + present_no = 17; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio0; + present_no = 9; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x6q_smbus_read_reg(i2c_psu_client, present_no/8, &present); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((present & (1<<(present_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_psu_read_status(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char workstate_no = 0; + unsigned char workstate = 0; + unsigned char value = 0; + struct i2c_client *i2c_psu_client = NULL; + + if (psu_dev_psu1 == dev) + { + i2c_psu_client = i2c_client_gpio0; + workstate_no = 21; + } + else if (psu_dev_psu2 == dev) + { + i2c_psu_client = i2c_client_gpio0; + workstate_no = 13; + } + else + { + return sprintf(buf, "Error: unknown psu device\n"); + } + + if (IS_INVALID_PTR(i2c_psu_client)) + { + return sprintf(buf, "Error: psu i2c-adapter invalid\n"); + } + + ret = e582_48x6q_smbus_read_reg(i2c_psu_client, workstate_no/8, &workstate); + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + if (ret != 0) + { + return sprintf(buf, "Error: read psu data:%s failed\n", attr->attr.name); + } + + value = ((workstate & (1<<(workstate_no%8))) ? 1 : 0 ); + + return sprintf(buf, "%d\n", value); +} + +static DEVICE_ATTR(psu_presence, S_IRUGO, e582_48x6q_psu_read_presence, NULL); +static DEVICE_ATTR(psu_status, S_IRUGO, e582_48x6q_psu_read_status, NULL); + +static int e582_48x6q_init_psu(void) +{ + int ret = 0; + + psu_class = class_create(THIS_MODULE, "psu"); + if (IS_INVALID_PTR(psu_class)) + { + psu_class = NULL; + printk(KERN_CRIT "create e582_48x6q class psu failed\n"); + return -1; + } + + psu_dev_psu1 = device_create(psu_class, NULL, MKDEV(222,0), NULL, "psu1"); + if (IS_INVALID_PTR(psu_dev_psu1)) + { + psu_dev_psu1 = NULL; + printk(KERN_CRIT "create e582_48x6q psu1 device failed\n"); + return -1; + } + + psu_dev_psu2 = device_create(psu_class, NULL, MKDEV(222,1), NULL, "psu2"); + if (IS_INVALID_PTR(psu_dev_psu2)) + { + psu_dev_psu2 = NULL; + printk(KERN_CRIT "create e582_48x6q psu2 device failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu1 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu1, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu1 device attr:status failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu2 device attr:presence failed\n"); + return -1; + } + + ret = device_create_file(psu_dev_psu2, &dev_attr_psu_status); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q psu2 device attr:status failed\n"); + return -1; + } + + return 0; +} + +static int e582_48x6q_exit_psu(void) +{ + if (IS_VALID_PTR(psu_dev_psu1)) + { + device_remove_file(psu_dev_psu1, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu1, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,0)); + } + + if (IS_VALID_PTR(psu_dev_psu2)) + { + device_remove_file(psu_dev_psu2, &dev_attr_psu_presence); + device_remove_file(psu_dev_psu2, &dev_attr_psu_status); + device_destroy(psu_class, MKDEV(222,1)); + } + + if (IS_VALID_PTR(psu_class)) + { + class_destroy(psu_class); + psu_class = NULL; + } + + return 0; +} +#endif + +#if SEP("drivers:leds") +extern void e582_48x6q_led_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x6q_led_get(struct led_classdev *led_cdev); +extern void e582_48x6q_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value); +extern enum led_brightness e582_48x6q_led_port_get(struct led_classdev *led_cdev); + +static struct led_classdev led_dev_system = { + .name = "system", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_idn = { + .name = "idn", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan1 = { + .name = "fan1", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan2 = { + .name = "fan2", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan3 = { + .name = "fan3", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_fan4 = { + .name = "fan4", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_psu1 = { + .name = "psu1", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_psu2 = { + .name = "psu2", + .brightness_set = e582_48x6q_led_set, + .brightness_get = e582_48x6q_led_get, +}; +static struct led_classdev led_dev_port[PORT_NUM] = { +{ .name = "port1", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port2", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port3", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port4", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port5", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port6", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port7", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port8", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port9", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port10", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port11", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port12", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port13", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port14", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port15", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port16", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port17", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port18", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port19", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port20", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port21", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port22", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port23", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port24", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port25", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port26", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port27", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port28", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port29", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port30", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port31", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port32", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port33", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port34", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port35", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port36", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port37", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port38", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port39", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port40", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port41", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port42", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port43", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port44", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port45", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port46", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port47", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port48", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port49", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port50", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port51", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port52", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port53", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,}, +{ .name = "port54", .brightness_set = e582_48x6q_led_port_set, .brightness_get = e582_48x6q_led_port_get,} +}; +static unsigned char port_led_mode[PORT_NUM] = {0}; + +void e582_48x6q_led_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0x0F; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0xFE; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x6q_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return; + } + + led_value = ((led_value & mask) | ((set_value << shift) & (~mask))); + + ret = e582_48x6q_smbus_write_reg(i2c_led_client, reg, led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s led attr failed\n", led_cdev->name); + return; + } + + return; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return; +} + +enum led_brightness e582_48x6q_led_get(struct led_classdev *led_cdev) +{ + int ret = 0; + unsigned char reg = 0; + unsigned char mask = 0; + unsigned char shift = 0; + unsigned char led_value = 0; + struct i2c_client *i2c_led_client = i2c_client_epld; + + if (0 == strcmp(led_dev_system.name, led_cdev->name)) + { + reg = 0x2; + mask = 0xF0; + shift = 4; + } + else if (0 == strcmp(led_dev_idn.name, led_cdev->name)) + { + reg = 0x3; + mask = 0x01; + shift = 0; + } + else if (0 == strcmp(led_dev_fan1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan2.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan3.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_fan4.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu1.name, led_cdev->name)) + { + goto not_support; + } + else if (0 == strcmp(led_dev_psu2.name, led_cdev->name)) + { + goto not_support; + } + else + { + goto not_support; + } + + ret = e582_48x6q_smbus_read_reg(i2c_led_client, reg, &led_value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s led attr failed\n", led_cdev->name); + return 0; + } + + led_value = ((led_value & mask) >> shift); + + return led_value; + +not_support: + + printk(KERN_INFO "Error: not support device:%s\n", led_cdev->name); + return 0; +} + +void e582_48x6q_led_port_set(struct led_classdev *led_cdev, enum led_brightness set_value) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + port_led_mode[portNum-1] = set_value; + + return; +} + +enum led_brightness e582_48x6q_led_port_get(struct led_classdev *led_cdev) +{ + int portNum = 0; + + sscanf(led_cdev->name, "port%d", &portNum); + + return port_led_mode[portNum-1]; +} + +static int e582_48x6q_init_led(void) +{ + int ret = 0; + int i = 0; + + ret = led_classdev_register(NULL, &led_dev_system); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_system device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_idn); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_idn device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan2 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan3); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan3 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_fan4); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_fan4 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu1); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_psu1 device failed\n"); + return -1; + } + + ret = led_classdev_register(NULL, &led_dev_psu2); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q led_dev_psu2 device failed\n"); + return -1; + } + + for (i=0; i PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 31;/*32-39*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum + 7;/*16-23*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum - 17;/*0-7*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 1;/*24-31*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 25;/*8-15*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 9;/*32-39*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + reg_no = portNum - 25;/*24-29*/ + i2c_sfp_client = i2c_client_gpio4; + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x0; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 );/*1:PRESENT 0:ABSENT*/ + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_sfp_read_enable(struct device *dev, struct device_attribute *attr, char *buf) +{ + int ret = 0; + unsigned char value = 0; + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + value = 0; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 23;/*24-31*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum + 15;/*32-39*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*24-31*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return sprintf(buf, "%d\n", 0); + } + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0xff); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + return sprintf(buf, "Error: read sfp data:%s failed\n", attr->attr.name); + } + + value = ((value & (1<<(reg_no%8))) ? 0 : 1 ); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t e582_48x6q_sfp_write_enable(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int ret = 0; + unsigned char value = 0; + unsigned char set_value = simple_strtol(buf, NULL, 10); + unsigned char reg_no = 0; + unsigned char dir_bank = 0; + unsigned char input_bank = 0; + unsigned char output_bank = 0; + int portNum = 0; + const char *name = dev_name(dev); + struct i2c_client *i2c_sfp_client = NULL; + + sscanf(name, "sfp%d", &portNum); + + if ((portNum < 1) || (portNum > PORT_NUM)) + { + printk(KERN_CRIT "sfp read presence, invalid port number!\n"); + return size; + } + + if ((portNum >= 1) && (portNum <= 8)) + { + reg_no = portNum + 23;/*24-31*/ + i2c_sfp_client = i2c_client_gpio0; + } + else if ((portNum >= 9) && (portNum <= 16)) + { + reg_no = portNum - 1;/*8-15*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 17) && (portNum <= 24)) + { + reg_no = portNum + 15;/*32-39*/ + i2c_sfp_client = i2c_client_gpio1; + } + else if ((portNum >= 25) && (portNum <= 32)) + { + reg_no = portNum - 9;/*16-23*/ + i2c_sfp_client = i2c_client_gpio2; + } + else if ((portNum >= 33) && (portNum <= 40)) + { + reg_no = portNum - 33;/*0-7*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 41) && (portNum <= 48)) + { + reg_no = portNum - 17;/*24-31*/ + i2c_sfp_client = i2c_client_gpio3; + } + else if ((portNum >= 49) && (portNum <= 54)) + { + printk(KERN_INFO "%s not supported!\n", name); + return size; + } + + set_value = ((set_value > 0) ? 0 : 1 ); + + dir_bank = (reg_no/8) + 0x18; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, dir_bank, 0x0); + if (ret != 0) + { + printk(KERN_CRIT "Error: read sfp data:%s set dir-ctl failed\n", attr->attr.name); + return size; + } + + input_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_read_reg(i2c_sfp_client, input_bank, &value); + if (ret != 0) + { + printk(KERN_CRIT "Error: read %s presence failed\n", name); + return size; + } + + if (set_value) + { + value = (value | (1<<(reg_no % 8))); + } + else + { + value = (value & (~(1<<(reg_no % 8)))); + } + + output_bank = (reg_no/8) + 0x8; + ret = e582_48x6q_smbus_write_reg(i2c_sfp_client, output_bank, value); + if (ret != 0) + { + printk(KERN_CRIT "Error: write %s presence failed\n", name); + return size; + } + + return size; +} + +static DEVICE_ATTR(sfp_presence, S_IRUGO, e582_48x6q_sfp_read_presence, NULL); +static DEVICE_ATTR(sfp_enable, S_IRUGO|S_IWUSR, e582_48x6q_sfp_read_enable, e582_48x6q_sfp_write_enable); +static int e582_48x6q_init_sfp(void) +{ + int ret = 0; + int i = 0; + + sfp_class = class_create(THIS_MODULE, "sfp"); + if (IS_INVALID_PTR(sfp_class)) + { + sfp_class = NULL; + printk(KERN_CRIT "create e582_48x6q class sfp failed\n"); + return -1; + } + + for (i=1; i<=PORT_NUM; i++) + { + sfp_dev[i] = device_create(sfp_class, NULL, MKDEV(223,i), NULL, "sfp%d", i); + if (IS_INVALID_PTR(sfp_dev[i])) + { + sfp_dev[i] = NULL; + printk(KERN_CRIT "create e582_48x6q sfp[%d] device failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_presence); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q sfp[%d] device attr:presence failed\n", i); + continue; + } + + ret = device_create_file(sfp_dev[i], &dev_attr_sfp_enable); + if (ret != 0) + { + printk(KERN_CRIT "create e582_48x6q sfp[%d] device attr:enable failed\n", i); + continue; + } + } + + return ret; +} + +static int e582_48x6q_exit_sfp(void) +{ + int i = 0; + + for (i=1; i<=PORT_NUM; i++) + { + if (IS_VALID_PTR(sfp_dev[i])) + { + device_remove_file(sfp_dev[i], &dev_attr_sfp_presence); + device_remove_file(sfp_dev[i], &dev_attr_sfp_enable); + device_destroy(sfp_class, MKDEV(223,i)); + sfp_dev[i] = NULL; + } + } + + if (IS_VALID_PTR(sfp_class)) + { + class_destroy(sfp_class); + sfp_class = NULL; + } + + return 0; +} +#endif + +static int e582_48x6q_init(void) +{ + int ret = 0; + int failed = 0; + + printk(KERN_ALERT "install e582_48x6q board dirver...\n"); + + ret = e582_48x6q_init_i2c_master(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_pca9548(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_adt7470(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_epld(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_i2c_gpio(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_psu(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_led(); + if (ret != 0) + { + failed = 1; + } + + ret = e582_48x6q_init_sfp(); + if (ret != 0) + { + failed = 1; + } + + if (failed) + printk(KERN_INFO "install e582_48x6q board driver failed\n"); + else + printk(KERN_ALERT "install e582_48x6q board dirver...ok\n"); + + return 0; +} + +static void e582_48x6q_exit(void) +{ + printk(KERN_INFO "uninstall e582_48x6q board dirver...\n"); + + e582_48x6q_exit_sfp(); + e582_48x6q_exit_led(); + e582_48x6q_exit_psu(); + e582_48x6q_exit_i2c_gpio(); + e582_48x6q_exit_i2c_epld(); + e582_48x6q_exit_i2c_psu(); + e582_48x6q_exit_i2c_adt7470(); + e582_48x6q_exit_i2c_pca9548(); + e582_48x6q_exit_i2c_master(); +} + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("yangbs centecNetworks, Inc"); +MODULE_DESCRIPTION("e582-48x6q board driver"); +module_init(e582_48x6q_init); +module_exit(e582_48x6q_exit); + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c new file mode 100644 index 00000000000..32a38f842cf --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.c @@ -0,0 +1,1833 @@ +/** + @file dal_kernal.c + + @date 2012-10-18 + + @version v2.0 + + +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) +#include +#endif +#include "dal_kernel.h" +#include "dal_mpool.h" +#include +MODULE_AUTHOR("Centec Networks Inc."); +MODULE_DESCRIPTION("DAL kernel module"); +MODULE_LICENSE("GPL"); + +/* DMA memory pool size */ +static char* dma_pool_size; +module_param(dma_pool_size, charp, 0); +MODULE_PARM_DESC(dma_pool_size, + "Specify DMA memory pool size (default 4MB)"); + +/***************************************************************************** + * defines + *****************************************************************************/ +#define MB_SIZE 0x100000 +#define CTC_MAX_INTR_NUM 8 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_VENDOR_VID 0xc001 +#define CTC_HUMBER_DEVICE_ID 0x6048 +#define CTC_GOLDENGATE_DEVICE_ID 0xc010 +#define CTC_PCIE_VENDOR_ID 0xcb10 +#define CTC_DUET2_DEVICE_ID 0x7148 + +#define MEM_MAP_RESERVE SetPageReserved +#define MEM_MAP_UNRESERVE ClearPageReserved + +#define CTC_GREATBELT_DEVICE_ID 0x03e8 /* TBD */ +#define DAL_MAX_CHIP_NUM 8 /* [GB] used */ +#define VIRT_TO_PAGE(p) virt_to_page((p)) +#define DAL_UNTAG_BLOCK 0 +#define DAL_DISCARD_BLOCK 1 +#define DAL_MATCHED_BLOCK 2 +#define DAL_CUR_MATCH_BLOCk 3 +/***************************************************************************** + * typedef + *****************************************************************************/ +/* Control Data */ +typedef struct dal_isr_s +{ + int irq; + void (* isr)(void*); + void* isr_data; + int trigger; + int count; + wait_queue_head_t wqh; +} dal_isr_t; + +typedef struct dal_kernel_dev_s +{ + struct list_head list; + struct pci_dev* pci_dev; + + /* PCI I/O mapped base address */ + uintptr logic_address; + + /* Physical address */ + unsigned long long phys_address; +} dal_kern_dev_t; + +typedef struct _dma_segment +{ + struct list_head list; + unsigned long req_size; /* Requested DMA segment size */ + unsigned long blk_size; /* DMA block size */ + unsigned long blk_order; /* DMA block size in alternate format */ + unsigned long seg_size; /* Current DMA segment size */ + unsigned long seg_begin; /* Logical address of segment */ + unsigned long seg_end; /* Logical end address of segment */ + unsigned long* blk_ptr; /* Array of logical DMA block addresses */ + int blk_cnt_max; /* Maximum number of block to allocate */ + int blk_cnt; /* Current number of blocks allocated */ +} dma_segment_t; + +typedef irqreturn_t (*p_func) (int irq, void* dev_id); + +/*************************************************************************** + *declared + ***************************************************************************/ +static unsigned int linux_dal_poll0(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll1(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll2(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll3(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll4(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll5(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll6(struct file* filp, struct poll_table_struct* p); +static unsigned int linux_dal_poll7(struct file* filp, struct poll_table_struct* p); + +/***************************************************************************** + * global variables + *****************************************************************************/ +static dal_kern_dev_t dal_dev[DAL_MAX_CHIP_NUM]; +static dal_isr_t dal_isr[CTC_MAX_INTR_NUM]; +static int dal_chip_num = 0; +static int dal_version = 0; +static int dal_intr_num = 0; +static int use_high_memory = 0; +static unsigned int* dma_virt_base[DAL_MAX_CHIP_NUM]; +#ifndef DMA_MEM_MODE_PLATFORM +static unsigned int* dma_virt_base_tmp[DAL_MAX_CHIP_NUM]; +#endif +static unsigned long long dma_phy_base[DAL_MAX_CHIP_NUM]; +static unsigned int dma_mem_size = 0xc00000; +static unsigned int msi_irq_base[DAL_MAX_CHIP_NUM]; +static unsigned int msi_irq_num[DAL_MAX_CHIP_NUM]; +static unsigned int msi_used = 0; +static struct class *dal_class; + +static LIST_HEAD(_dma_seg); +static int dal_debug = 0; +module_param(dal_debug, int, 0); +MODULE_PARM_DESC(dal_debug, "Set debug level (default 0)"); + +static struct pci_device_id dal_id_table[] = +{ + {PCI_DEVICE(CTC_VENDOR_VID, CTC_GREATBELT_DEVICE_ID)}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_GOLDENGATE_DEVICE_ID)}, + {PCI_DEVICE((CTC_PCIE_VENDOR_ID+1), (CTC_GOLDENGATE_DEVICE_ID+1))}, + {PCI_DEVICE(CTC_PCIE_VENDOR_ID, CTC_DUET2_DEVICE_ID)}, + {0, }, +}; + +static wait_queue_head_t poll_intr[CTC_MAX_INTR_NUM]; + +p_func intr_handler_fun[CTC_MAX_INTR_NUM]; + +static int poll_intr_trigger[CTC_MAX_INTR_NUM]; + +static struct file_operations dal_intr_fops[CTC_MAX_INTR_NUM] = +{ + { + .owner = THIS_MODULE, + .poll = linux_dal_poll0, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll1, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll2, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll3, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll4, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll5, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll6, + }, + { + .owner = THIS_MODULE, + .poll = linux_dal_poll7, + }, +}; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) +#include +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +#endif +/***************************************************************************** + * macros + *****************************************************************************/ +#define VERIFY_CHIP_INDEX(n) (n < dal_chip_num) + +#define _KERNEL_INTERUPT_PROCESS +static irqreturn_t +intr0_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + + if(poll_intr_trigger[0]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[0] = 1; + wake_up(&poll_intr[0]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr1_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[1]) + { + return IRQ_HANDLED; + } + + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[1] = 1; + wake_up(&poll_intr[1]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr2_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[2]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[2] = 1; + wake_up(&poll_intr[2]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr3_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[3]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[3] = 1; + wake_up(&poll_intr[3]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr4_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[4]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[4] = 1; + wake_up(&poll_intr[4]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr5_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[5]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[5] = 1; + wake_up(&poll_intr[5]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr6_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[6]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[6] = 1; + wake_up(&poll_intr[6]); + } + } + + return IRQ_HANDLED; +} + +static irqreturn_t +intr7_handler(int irq, void* dev_id) +{ + dal_isr_t* p_dal_isr = (dal_isr_t*)dev_id; + if(poll_intr_trigger[7]) + { + return IRQ_HANDLED; + } + disable_irq_nosync(irq); + + if (p_dal_isr) + { + if (p_dal_isr->isr) + { + /* kernel mode interrupt handler */ + p_dal_isr->isr(p_dal_isr->isr_data); + } + else if ((NULL == p_dal_isr->isr) && (NULL == p_dal_isr->isr_data)) + { + /* user mode interrupt handler */ + poll_intr_trigger[7] = 1; + wake_up(&poll_intr[7]); + } + } + + return IRQ_HANDLED; +} + +int +dal_interrupt_register(unsigned int irq, int prio, void (* isr)(void*), void* data) +{ + int ret; + unsigned char str[16]; + unsigned char* int_name = NULL; + unsigned int intr_num_tmp = 0; + unsigned int intr_num = CTC_MAX_INTR_NUM; + unsigned long irq_flags = 0; + + if (dal_intr_num >= CTC_MAX_INTR_NUM) + { + printk("Interrupt numbers exceeds max.\n"); + return -1; + } + + if (msi_used) + { + int_name = "dal_msi"; + } + else + { + int_name = "dal_intr"; + } + + + for (intr_num_tmp=0;intr_num_tmp < CTC_MAX_INTR_NUM; intr_num_tmp++) + { + if (irq == dal_isr[intr_num_tmp].irq) + { + if (0 == msi_used) + { + dal_isr[intr_num_tmp].count++; + printk("Interrupt irq %d register count %d.\n", irq, dal_isr[intr_num_tmp].count); + } + return 0; + } + if ((0 == dal_isr[intr_num_tmp].irq) && (CTC_MAX_INTR_NUM == intr_num)) + { + intr_num = intr_num_tmp; + dal_isr[intr_num].count = 0; + } + } + dal_isr[intr_num].irq = irq; + dal_isr[intr_num].isr = isr; + dal_isr[intr_num].isr_data = data; + dal_isr[intr_num].count++; + + init_waitqueue_head(&poll_intr[intr_num]); + + /* only user mode */ + if ((NULL == isr) && (NULL == data)) + { + snprintf(str, 16, "%s%d", "dal_intr", intr_num); + ret = register_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, + str, &dal_intr_fops[intr_num]); + if (ret < 0) + { + printk("Register character device for irq %d failed, ret= %d", irq, ret); + return ret; + } + } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) + irq_flags = 0; +#else + irq_flags = IRQF_DISABLED; +#endif + if ((ret = request_irq(irq, + intr_handler_fun[intr_num], + irq_flags, + int_name, + &dal_isr[intr_num])) < 0) + { + printk("Cannot request irq %d, ret %d.\n", irq, ret); + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_num, str); + } + + if (0 == ret) + { + dal_intr_num++; + } + + return ret; +} + +int +dal_interrupt_unregister(unsigned int irq) +{ + unsigned char str[16]; + int intr_idx = 0; + int find_flag = 0; + + /* get intr device index */ + for (intr_idx = 0; intr_idx < CTC_MAX_INTR_NUM; intr_idx++) + { + if (dal_isr[intr_idx].irq == irq) + { + find_flag = 1; + break; + } + } + + if (find_flag == 0) + { + printk ("irq%d is not registered! unregister failed \n", irq); + return -1; + } + + dal_isr[intr_idx].count--; + if (0 != dal_isr[intr_idx].count) + { + printk("Interrupt irq %d unregister count %d.\n", irq, dal_isr[intr_idx].count); + return -1; + } + snprintf(str, 16, "%s%d", "dal_intr", intr_idx); + + unregister_chrdev(DAL_DEV_INTR_MAJOR_BASE + intr_idx, str); + + free_irq(irq, &dal_isr[intr_idx]); + + dal_isr[intr_idx].irq = 0; + + dal_intr_num--; + + return 0; +} + +int +dal_interrupt_set_en(unsigned int irq, unsigned int enable) +{ + enable ? enable_irq(irq) : disable_irq_nosync(irq); + return 0; +} + +static int +_dal_set_msi_enabe(unsigned int lchip, unsigned int irq_num) +{ + int ret = 0; + + if (irq_num == 1) + { + ret = pci_enable_msi(dal_dev[lchip].pci_dev); + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = 1; + } + else + { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 79)) + ret = pci_enable_msi_exact(dal_dev[lchip].pci_dev, irq_num); +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 26, 32)) + ret = pci_enable_msi_block(dal_dev[lchip].pci_dev, irq_num); +#else + ret = -1; +#endif + if (ret) + { + printk ("msi enable failed!!! lchip = %d, irq_num = %d\n", lchip, irq_num); + pci_disable_msi(dal_dev[lchip].pci_dev); + msi_used = 0; + } + + msi_irq_base[lchip] = dal_dev[lchip].pci_dev->irq; + msi_irq_num[lchip] = irq_num; + } + + return ret; +} + +static int +_dal_set_msi_disable(unsigned int lchip) +{ + + pci_disable_msi(dal_dev[lchip].pci_dev); + + msi_irq_base[lchip] = 0; + msi_irq_num[lchip] = 0; + + return 0; +} + +int +dal_set_msi_cap(unsigned long arg) +{ + int ret = 0; + int index = 0; + dal_msi_info_t msi_info; + + if (copy_from_user(&msi_info, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + printk("####dal_set_msi_cap lchip %d base %d num:%d\n", msi_info.lchip, msi_info.irq_base, msi_info.irq_num); + if (msi_info.irq_num > 0) + { + if (0 == msi_used) + { + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + else if ((1 == msi_used) && (msi_info.irq_num != msi_irq_num[msi_info.lchip])) + { + for (index = 0; index < msi_irq_num[msi_info.lchip]; index++) + { + dal_interrupt_unregister(msi_irq_base[msi_info.lchip]+index); + } + _dal_set_msi_disable(msi_info.lchip); + msi_used = 1; + ret = _dal_set_msi_enabe(msi_info.lchip, msi_info.irq_num); + } + } + else + { + msi_used = 0; + ret = _dal_set_msi_disable(msi_info.lchip); + } + + return ret; +} + +int +dal_user_interrupt_register(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####register interrupt irq:%d\n", irq); + return dal_interrupt_register(irq, 0, NULL, NULL); +} + +int +dal_user_interrupt_unregister(unsigned long arg) +{ + int irq = 0; + if (copy_from_user(&irq, (void*)arg, sizeof(int))) + { + return -EFAULT; + } + printk("####unregister interrupt irq:%d\n", irq); + return dal_interrupt_unregister(irq); +} + +int +dal_user_interrupt_set_en(unsigned long arg) +{ + dal_intr_parm_t dal_intr_parm; + + if (copy_from_user(&dal_intr_parm, (void*)arg, sizeof(dal_intr_parm_t))) + { + return -EFAULT; + } + + return dal_interrupt_set_en(dal_intr_parm.irq, dal_intr_parm.enable); +} + +/* + * Function: _dal_dma_segment_free + */ + +/* + * Function: _find_largest_segment + * + * Purpose: + * Find largest contiguous segment from a pool of DMA blocks. + * Parameters: + * dseg - DMA segment descriptor + * Returns: + * 0 on success, < 0 on error. + * Notes: + * Assembly stops if a segment of the requested segment size + * has been obtained. + * + * Lower address bits of the DMA blocks are used as follows: + * 0: Untagged + * 1: Discarded block + * 2: Part of largest contiguous segment + * 3: Part of current contiguous segment + */ +#ifndef DMA_MEM_MODE_PLATFORM +static int +_dal_find_largest_segment(dma_segment_t* dseg) +{ + int i, j, blks, found; + unsigned long seg_begin; + unsigned long seg_end; + unsigned long seg_tmp; + + blks = dseg->blk_cnt; + + /* Clear all block tags */ + for (i = 0; i < blks; i++) + { + dseg->blk_ptr[i] &= ~3; + } + + for (i = 0; i < blks && dseg->seg_size < dseg->req_size; i++) + { + /* First block must be an untagged block */ + if ((dseg->blk_ptr[i] & 3) == DAL_UNTAG_BLOCK) + { + /* Initial segment size is the block size */ + seg_begin = dseg->blk_ptr[i]; + seg_end = seg_begin + dseg->blk_size; + dseg->blk_ptr[i] |= DAL_CUR_MATCH_BLOCk; + + /* Loop looking for adjacent blocks */ + do + { + found = 0; + + for (j = i + 1; j < blks && (seg_end - seg_begin) < dseg->req_size; j++) + { + seg_tmp = dseg->blk_ptr[j]; + /* Check untagged blocks only */ + if ((seg_tmp & 3) == DAL_UNTAG_BLOCK) + { + if (seg_tmp == (seg_begin - dseg->blk_size)) + { + /* Found adjacent block below current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_begin = seg_tmp; + found = 1; + } + else if (seg_tmp == seg_end) + { + /* Found adjacent block above current segment */ + dseg->blk_ptr[j] |= DAL_CUR_MATCH_BLOCk; + seg_end += dseg->blk_size; + found = 1; + } + } + } + } + while (found); + + if ((seg_end - seg_begin) > dseg->seg_size) + { + /* The current block is largest so far */ + dseg->seg_begin = seg_begin; + dseg->seg_end = seg_end; + dseg->seg_size = seg_end - seg_begin; + + /* Re-tag current and previous largest segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + /* Tag current segment as the largest */ + dseg->blk_ptr[j] &= ~1; + } + else if ((dseg->blk_ptr[j] & 3) == DAL_MATCHED_BLOCK) + { + /* Discard previous largest segment */ + dseg->blk_ptr[j] ^= 3; + } + } + } + else + { + /* Discard all blocks in current segment */ + for (j = 0; j < blks; j++) + { + if ((dseg->blk_ptr[j] & 3) == DAL_CUR_MATCH_BLOCk) + { + dseg->blk_ptr[j] &= ~2; + } + } + } + } + } + + return 0; +} + +/* + * Function: _alloc_dma_blocks + */ +static int +_dal_alloc_dma_blocks(dma_segment_t* dseg, int blks) +{ + int i, start; + unsigned long addr; + + if (dseg->blk_cnt + blks > dseg->blk_cnt_max) + { + printk("No more DMA blocks\n"); + return -1; + } + + start = dseg->blk_cnt; + dseg->blk_cnt += blks; + + for (i = start; i < dseg->blk_cnt; i++) + { + addr = __get_free_pages(GFP_ATOMIC, dseg->blk_order); + if (addr) + { + dseg->blk_ptr[i] = addr; + } + else + { + printk("DMA allocation failed\n"); + return -1; + } + } + + return 0; +} + +/* + * Function: _dal_dma_segment_alloc + */ +static dma_segment_t* +_dal_dma_segment_alloc(unsigned int size, unsigned int blk_size) +{ + dma_segment_t* dseg; + int i, blk_ptr_size; + unsigned long page_addr; + struct sysinfo si; + + /* Sanity check */ + if (size == 0 || blk_size == 0) + { + return NULL; + } + + /* Allocate an initialize DMA segment descriptor */ + if ((dseg = kmalloc(sizeof(dma_segment_t), GFP_ATOMIC)) == NULL) + { + return NULL; + } + + memset(dseg, 0, sizeof(dma_segment_t)); + dseg->req_size = size; + dseg->blk_size = PAGE_ALIGN(blk_size); + + while ((PAGE_SIZE << dseg->blk_order) < dseg->blk_size) + { + dseg->blk_order++; + } + + si_meminfo(&si); + dseg->blk_cnt_max = (si.totalram << PAGE_SHIFT) / dseg->blk_size; + blk_ptr_size = dseg->blk_cnt_max * sizeof(unsigned long); + /* Allocate an initialize DMA block pool */ + dseg->blk_ptr = kmalloc(blk_ptr_size, GFP_KERNEL); + if (dseg->blk_ptr == NULL) + { + kfree(dseg); + return NULL; + } + + memset(dseg->blk_ptr, 0, blk_ptr_size); + /* Allocate minimum number of blocks */ + _dal_alloc_dma_blocks(dseg, dseg->req_size / dseg->blk_size); + + /* Allocate more blocks until we have a complete segment */ + do + { + _dal_find_largest_segment(dseg); + if (dseg->seg_size >= dseg->req_size) + { + break; + } + } + while (_dal_alloc_dma_blocks(dseg, 8) == 0); + + /* Reserve all pages in the DMA segment and free unused blocks */ + for (i = 0; i < dseg->blk_cnt; i++) + { + if ((dseg->blk_ptr[i] & 3) == 2) + { + dseg->blk_ptr[i] &= ~3; + + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_RESERVE(VIRT_TO_PAGE((void*)page_addr)); + } + } + else if (dseg->blk_ptr[i]) + { + dseg->blk_ptr[i] &= ~3; + free_pages(dseg->blk_ptr[i], dseg->blk_order); + dseg->blk_ptr[i] = 0; + } + } + + return dseg; +} + +/* + * Function: _dal_dma_segment_free + */ +static void +_dal_dma_segment_free(dma_segment_t* dseg) +{ + int i; + unsigned long page_addr; + + if (dseg->blk_ptr) + { + for (i = 0; i < dseg->blk_cnt; i++) + { + if (dseg->blk_ptr[i]) + { + for (page_addr = dseg->blk_ptr[i]; + page_addr < dseg->blk_ptr[i] + dseg->blk_size; + page_addr += PAGE_SIZE) + { + MEM_MAP_UNRESERVE(VIRT_TO_PAGE(page_addr)); + } + + free_pages(dseg->blk_ptr[i], dseg->blk_order); + } + } + + kfree(dseg->blk_ptr); + kfree(dseg); + } +} + +/* + * Function: -dal_pgalloc + */ +static void* +_dal_pgalloc(unsigned int size) +{ + dma_segment_t* dseg; + unsigned int blk_size; + + blk_size = (size < DMA_BLOCK_SIZE) ? size : DMA_BLOCK_SIZE; + if ((dseg = _dal_dma_segment_alloc(size, blk_size)) == NULL) + { + return NULL; + } + + if (dseg->seg_size < size) + { + /* If we didn't get the full size then forget it */ + printk("Notice: Can not get enough memory for requset!!\n"); + printk("actual size:0x%lx, request size:0x%x\n", dseg->seg_size, size); + //-_dal_dma_segment_free(dseg); + //-return NULL; + } + + list_add(&dseg->list, &_dma_seg); + return (void*)dseg->seg_begin; +} + +/* + * Function: _dal_pgfree + */ +static int +_dal_pgfree(void* ptr) +{ + struct list_head* pos; + + list_for_each(pos, &_dma_seg) + { + dma_segment_t* dseg = list_entry(pos, dma_segment_t, list); + if (ptr == (void*)dseg->seg_begin) + { + list_del(&dseg->list); + _dal_dma_segment_free(dseg); + return 0; + } + } + return -1; +} +#endif +static void +dal_alloc_dma_pool(int lchip, int size) +{ + if (use_high_memory) + { + dma_phy_base[lchip] = virt_to_bus(high_memory); + dma_virt_base[lchip] = ioremap_nocache(dma_phy_base[lchip], size); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_virt_base[lchip] = dma_alloc_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + &dma_phy_base[lchip], GFP_KERNEL); + + printk(KERN_WARNING "########Using DMA_MEM_MODE_PLATFORM \n"); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + /* Get DMA memory from kernel */ + dma_virt_base_tmp[lchip] = _dal_pgalloc(size); + dma_phy_base[lchip] = virt_to_bus(dma_virt_base_tmp[lchip]); + dma_virt_base [lchip]= ioremap_nocache(dma_phy_base[lchip], size); +#endif + } +} + +static void +dal_free_dma_pool(int lchip) +{ + int ret = 0; + ret = ret; + if (use_high_memory) + { + iounmap(dma_virt_base[lchip]); + } + else + { +#ifdef DMA_MEM_MODE_PLATFORM + dma_free_coherent(&(dal_dev[lchip].pci_dev->dev), dma_mem_size, + dma_virt_base[lchip], dma_phy_base[lchip]); +#endif + +#ifndef DMA_MEM_MODE_PLATFORM + iounmap(dma_virt_base[lchip]); + ret = _dal_pgfree(dma_virt_base_tmp[lchip]); + if(ret<0) + { + printk("Dma free memory fail !!!!!! \n"); + } +#endif + } +} + +#define _KERNEL_DAL_IO +static int +_dal_pci_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *value = *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset); + return 0; +} + +int +dal_create_irq_mapping(unsigned long arg) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 0, 0)) + +#ifndef NO_IRQ +#define NO_IRQ (-1) +#endif + dal_irq_mapping_t irq_map; + + if (copy_from_user(&irq_map, (void*)arg, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } + + irq_map.sw_irq = irq_create_mapping(NULL, irq_map.hw_irq); + if (irq_map.sw_irq == NO_IRQ) + { + printk("IRQ mapping fail !!!!!! \n"); + return -1; + } + + if (copy_to_user((dal_irq_mapping_t*)arg, (void*)&irq_map, sizeof(dal_irq_mapping_t))) + { + return -EFAULT; + } +#endif + return 0; +} + +int +dal_pci_read(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_read((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int*)(&(cmdpara_chip.value))); + + if (copy_to_user((dal_chip_parm_t*)arg, (void*)&cmdpara_chip, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +_dal_pci_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + *(volatile unsigned int*)(dal_dev[lchip].logic_address + offset) = value; + return 0; +} + +int +dal_pci_write(unsigned long arg) +{ + dal_chip_parm_t cmdpara_chip; + + if (copy_from_user(&cmdpara_chip, (void*)arg, sizeof(dal_chip_parm_t))) + { + return -EFAULT; + } + + _dal_pci_write((unsigned char)cmdpara_chip.lchip, (unsigned int)cmdpara_chip.reg_addr, + (unsigned int)cmdpara_chip.value); + + return 0; +} + +int +dal_pci_conf_read(unsigned char lchip, unsigned int offset, unsigned int* value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_read_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} + +int +dal_pci_conf_write(unsigned char lchip, unsigned int offset, unsigned int value) +{ + if (!VERIFY_CHIP_INDEX(lchip)) + { + return -1; + } + + pci_write_config_dword(dal_dev[lchip].pci_dev, offset, value); + return 0; +} +int +dal_user_read_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + if (dal_pci_conf_read(dal_cfg.lchip, dal_cfg.offset, &dal_cfg.value)) + { + printk("dal_pci_conf_read failed.\n"); + return -EFAULT; + } + + if (copy_to_user((dal_pci_cfg_ioctl_t*)arg, (void*)&dal_cfg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return 0; +} + +int +dal_user_write_pci_conf(unsigned long arg) +{ + dal_pci_cfg_ioctl_t dal_cfg; + + if (copy_from_user(&dal_cfg, (void*)arg, sizeof(dal_pci_cfg_ioctl_t))) + { + return -EFAULT; + } + + return dal_pci_conf_write(dal_cfg.lchip, dal_cfg.offset, dal_cfg.value); +} + +static int +linux_get_device(unsigned long arg) +{ + dal_user_dev_t user_dev; + int lchip = 0; + + if (copy_from_user(&user_dev, (void*)arg, sizeof(user_dev))) + { + return -EFAULT; + } + + user_dev.chip_num = dal_chip_num; + lchip = user_dev.lchip; + + if (lchip < dal_chip_num) + { + user_dev.phy_base0 = (unsigned int)dal_dev[lchip].phys_address; + user_dev.phy_base1 = (unsigned int)(dal_dev[lchip].phys_address >> 32); + + user_dev.bus_no = dal_dev[lchip].pci_dev->bus->number; + user_dev.dev_no = dal_dev[lchip].pci_dev->device; + user_dev.fun_no = dal_dev[lchip].pci_dev->devfn; + } + + if (copy_to_user((dal_user_dev_t*)arg, (void*)&user_dev, sizeof(user_dev))) + { + return -EFAULT; + } + + return 0; +} + +/* set dal version, copy to user */ +static int +linux_get_dal_version(unsigned long arg) +{ + int dal_ver = VERSION_1DOT2; /* set dal version */ + + if (copy_to_user((int*)arg, (void*)&dal_ver, sizeof(dal_ver))) + { + return -EFAULT; + } + + dal_version = dal_ver; /* up sw */ + + return 0; +} + +static int +linux_get_dma_info(unsigned long arg) +{ + dma_info_t dma_para; + + if (copy_from_user(&dma_para, (void*)arg, sizeof(dma_info_t))) + { + return -EFAULT; + } + + dma_para.phy_base = (unsigned int)dma_phy_base[dma_para.lchip]; + dma_para.phy_base_hi = dma_phy_base[dma_para.lchip] >> 32; + dma_para.size = dma_mem_size; + + if (copy_to_user((dma_info_t*)arg, (void*)&dma_para, sizeof(dma_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_get_msi_info(unsigned long arg) +{ + dal_msi_info_t msi_para; + unsigned int lchip = 0; + + /* get lchip form user mode */ + if (copy_from_user(&msi_para, (void*)arg, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + lchip = msi_para.lchip; + + msi_para.irq_base = msi_irq_base[lchip]; + msi_para.irq_num = msi_irq_num[lchip]; + + /* send msi info to user mode */ + if (copy_to_user((dal_msi_info_t*)arg, (void*)&msi_para, sizeof(dal_msi_info_t))) + { + return -EFAULT; + } + + return 0; +} + + +static int +dal_get_intr_info(unsigned long arg) +{ + dal_intr_info_t intr_para; + unsigned int intr_num = 0; + + /* get lchip form user mode */ + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + intr_para.irq_idx = CTC_MAX_INTR_NUM; + for (intr_num=0; intr_num< CTC_MAX_INTR_NUM; intr_num++) + { + if (intr_para.irq == dal_isr[intr_num].irq) + { + intr_para.irq_idx = intr_num; + break; + } + } + + if (CTC_MAX_INTR_NUM == intr_para.irq_idx) + { + printk("Interrupt %d cann't find.\n", intr_para.irq); + } + /* send msi info to user mode */ + if (copy_to_user((dal_intr_info_t*)arg, (void*)&intr_para, sizeof(dal_intr_info_t))) + { + return -EFAULT; + } + + return 0; +} + +static int +dal_cache_inval(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv((unsigned long)intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +static int +dal_cache_flush(unsigned long arg) +{ + dal_dma_cache_info_t intr_para; + + if (copy_from_user(&intr_para, (void*)arg, sizeof(dal_dma_cache_info_t))) + { + return -EFAULT; + } + +#if 0 + dma_cache_wback_inv(intr_para.ptr, intr_para.length); +#endif + +#if 0 + dma_sync_single_for_cpu(NULL, intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); + + + dma_cache_sync(NULL, (void*)intr_para.ptr, intr_para.length, DMA_BIDIRECTIONAL); +#endif + return 0; +} + +int +linux_dal_probe(struct pci_dev* pdev, const struct pci_device_id* id) +{ + dal_kern_dev_t* dev = NULL; + int bar = 0; + int ret = 0; + unsigned int temp = 0; + unsigned int lchip = 0; + + printk(KERN_WARNING "********found dal device*****\n"); + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (NULL == dal_dev[lchip].pci_dev) + { + break; + } + } + + if (lchip >= DAL_MAX_CHIP_NUM) + { + printk("Exceed max local chip num\n"); + return -1; + } + + dev = &dal_dev[lchip]; + if (NULL == dev) + { + printk("Cannot obtain PCI resources\n"); + } + + lchip = lchip; + dal_chip_num += 1; + + dev->pci_dev = pdev; + + if (pci_enable_device(pdev) < 0) + { + printk("Cannot enable PCI device: vendor id = %x, device id = %x\n", + pdev->vendor, pdev->device); + } + + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + if (ret) + { + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (ret) + { + printk("Could not set PCI DMA Mask\n"); + return ret; + } + } + + if (pci_request_regions(pdev, DAL_NAME) < 0) + { + printk("Cannot obtain PCI resources\n"); + } + + dev->phys_address = pci_resource_start(pdev, bar); + dev->logic_address = (uintptr)ioremap_nocache(dev->phys_address, + pci_resource_len(dev->pci_dev, bar)); + + _dal_pci_read(lchip, 0x48, &temp); + if (((temp >> 8) & 0xffff) == 0x3412) + { + printk("Little endian Cpu detected!!! \n"); + _dal_pci_write(lchip, 0x48, 0xFFFFFFFF); + } + + pci_set_master(pdev); + + /* alloc dma_mem_size for every chip */ + if (dma_mem_size) + { + dal_alloc_dma_pool(lchip, dma_mem_size); + + /*add check Dma memory pool cannot cross 4G space*/ + if ((0==(dma_phy_base[lchip]>>32)) && (0!=((dma_phy_base[lchip]+dma_mem_size)>>32))) + { + printk("Dma malloc memory cross 4G space!!!!!! \n"); + return -1; + } + } + + printk(KERN_WARNING "linux_dal_probe end*****\n"); + + return 0; +} + +void +linux_dal_remove(struct pci_dev* pdev) +{ + unsigned int lchip = 0; + unsigned int flag = 0; + + for (lchip = 0; lchip < DAL_MAX_CHIP_NUM; lchip ++) + { + if (pdev == dal_dev[lchip].pci_dev) + { + flag = 1; + break; + } + } + + if (1 == flag) + { + dal_free_dma_pool(lchip); + pci_release_regions(pdev); + pci_disable_device(pdev); + + dal_dev[lchip].pci_dev = NULL; + dal_chip_num--; + } + + +} + +#ifdef CONFIG_COMPAT +static long +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) +static int +linux_dal_ioctl(struct file* file, + unsigned int cmd, unsigned long arg) +#else +static int +linux_dal_ioctl(struct inode* inode, struct file* file, + unsigned int cmd, unsigned long arg) +#endif + +#endif +{ + switch (cmd) + { + + case CMD_READ_CHIP: + return dal_pci_read(arg); + + case CMD_WRITE_CHIP: + return dal_pci_write(arg); + + case CMD_GET_DEVICES: + return linux_get_device(arg); + + case CMD_GET_DAL_VERSION: + return linux_get_dal_version(arg); + + case CMD_GET_DMA_INFO: + return linux_get_dma_info(arg); + + case CMD_PCI_CONFIG_READ: + return dal_user_read_pci_conf(arg); + + case CMD_PCI_CONFIG_WRITE: + return dal_user_write_pci_conf(arg); + + case CMD_REG_INTERRUPTS: + return dal_user_interrupt_register(arg); + + case CMD_UNREG_INTERRUPTS: + return dal_user_interrupt_unregister(arg); + + case CMD_EN_INTERRUPTS: + return dal_user_interrupt_set_en(arg); + + case CMD_SET_MSI_CAP: + return dal_set_msi_cap(arg); + + case CMD_GET_MSI_INFO: + return dal_get_msi_info(arg); + + case CMD_IRQ_MAPPING: + return dal_create_irq_mapping(arg); + + case CMD_GET_INTR_INFO: + return dal_get_intr_info(arg); + + case CMD_CACHE_INVAL: + return dal_cache_inval(arg); + + case CMD_CACHE_FLUSH: + return dal_cache_flush(arg); + + default: + break; + } + + return 0; +} + +static unsigned int +linux_dal_poll0(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[0], p); + local_irq_save(flags); + if (poll_intr_trigger[0]) + { + poll_intr_trigger[0] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll1(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[1], p); + local_irq_save(flags); + if (poll_intr_trigger[1]) + { + poll_intr_trigger[1] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll2(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[2], p); + local_irq_save(flags); + if (poll_intr_trigger[2]) + { + poll_intr_trigger[2] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll3(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[3], p); + local_irq_save(flags); + if (poll_intr_trigger[3]) + { + poll_intr_trigger[3] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll4(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[4], p); + local_irq_save(flags); + if (poll_intr_trigger[4]) + { + poll_intr_trigger[4] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll5(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[5], p); + local_irq_save(flags); + if (poll_intr_trigger[5]) + { + poll_intr_trigger[5] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll6(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[6], p); + local_irq_save(flags); + if (poll_intr_trigger[6]) + { + poll_intr_trigger[6] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static unsigned int +linux_dal_poll7(struct file* filp, struct poll_table_struct* p) +{ + unsigned int mask = 0; + unsigned long flags; + + poll_wait(filp, &poll_intr[7], p); + local_irq_save(flags); + if (poll_intr_trigger[7]) + { + poll_intr_trigger[7] = 0; + mask |= POLLIN | POLLRDNORM; + } + + local_irq_restore(flags); + + return mask; +} + +static struct pci_driver linux_dal_driver = +{ + .name = DAL_NAME, + .id_table = dal_id_table, + .probe = linux_dal_probe, + .remove = linux_dal_remove, +}; + +static struct file_operations fops = +{ + .owner = THIS_MODULE, +#ifdef CONFIG_COMPAT + .compat_ioctl = linux_dal_ioctl, + .unlocked_ioctl = linux_dal_ioctl, +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) + .unlocked_ioctl = linux_dal_ioctl, +#else + .ioctl = linux_dal_ioctl, +#endif +#endif +}; + + +static int __init +linux_dal_init(void) +{ + int ret = 0; + + /* Get DMA memory pool size form dal.ok input param, or use default dma_mem_size */ + if (dma_pool_size) + { + if ((dma_pool_size[strlen(dma_pool_size) - 1] & ~0x20) == 'M') + { + dma_mem_size = simple_strtoul(dma_pool_size, NULL, 0); + printk("dma_mem_size: 0x%x \n", dma_mem_size); + + dma_mem_size *= MB_SIZE; + } + else + { + printk("DMA memory pool size must be specified as e.g. dma_pool_size=8M\n"); + } + + if (dma_mem_size & (dma_mem_size - 1)) + { + printk("dma_mem_size must be a power of 2 (1M, 2M, 4M, 8M etc.)\n"); + dma_mem_size = 0; + } + } + + ret = register_chrdev(DAL_DEV_MAJOR, DAL_NAME, &fops); + if (ret < 0) + { + printk(KERN_WARNING "Register linux_dal device, ret %d\n", ret); + return ret; + } + + ret = pci_register_driver(&linux_dal_driver); + if (ret < 0) + { + printk(KERN_WARNING "Register ASIC PCI driver failed, ret %d\n", ret); + return ret; + } + + /* alloc /dev/linux_dal node */ + dal_class = class_create(THIS_MODULE, DAL_NAME); + device_create(dal_class, NULL, MKDEV(DAL_DEV_MAJOR, 0), NULL, DAL_NAME); + + /* init interrupt function */ + intr_handler_fun[0] = intr0_handler; + intr_handler_fun[1] = intr1_handler; + intr_handler_fun[2] = intr2_handler; + intr_handler_fun[3] = intr3_handler; + intr_handler_fun[4] = intr4_handler; + intr_handler_fun[5] = intr5_handler; + intr_handler_fun[6] = intr6_handler; + intr_handler_fun[7] = intr7_handler; + + return ret; +} + +static void __exit +linux_dal_exit(void) +{ + device_destroy(dal_class, MKDEV(DAL_DEV_MAJOR, 0)); + class_destroy(dal_class); + unregister_chrdev(DAL_DEV_MAJOR, "linux_dal"); + pci_unregister_driver(&linux_dal_driver); +} + +module_init(linux_dal_init); +module_exit(linux_dal_exit); + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h new file mode 100644 index 00000000000..850a4cffa73 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_kernel.h @@ -0,0 +1,171 @@ +/** + @file dal_kernel_io.h + + @author Copyright (C) 2012 Centec Networks Inc. All rights reserved. + + @date 2012-4-9 + + @version v2.0 + +*/ +#ifndef _DAL_KERNEL_H_ +#define _DAL_KERNEL_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(CONFIG_RESOURCES_64BIT) || defined(CONFIG_PHYS_ADDR_T_64BIT) +#define PHYS_ADDR_IS_64BIT +#endif + +#ifndef SDK_IN_USERMODE +#ifdef PHYS_ADDR_IS_64BIT +typedef long long intptr; +typedef unsigned long long uintptr; +#else +typedef int intptr; +typedef unsigned int uintptr; +#endif +#endif + +#define DAL_PCI_READ_ADDR 0x0 +#define DAL_PCI_READ_DATA 0xc +#define DAL_PCI_WRITE_ADDR 0x8 +#define DAL_PCI_WRITE_DATA 0x4 +#define DAL_PCI_STATUS 0x10 + +#define DAL_PCI_STATUS_IN_PROCESS 31 +#define DAL_PCI_STATUS_BAD_PARITY 5 +#define DAL_PCI_STATUS_CPU_ACCESS_ERR 4 +#define DAL_PCI_STATUS_READ_CMD 3 +#define DAL_PCI_STATUS_REGISTER_ERR 1 +#define DAL_PCI_STATUS_REGISTER_ACK 0 + +#define DAL_PCI_ACCESS_TIMEOUT 0x64 + +#define DAL_NAME "linux_dal" /* "linux_dal" */ + +#define DAL_DEV_MAJOR 198 + +#define DAL_DEV_INTR_MAJOR_BASE 200 + +#define DAL_DEV_NAME "/dev/" DAL_NAME +#define DAL_ONE_KB 1024 +#define DAL_ONE_MB (1024*1024) +struct dal_chip_parm_s +{ + unsigned int lchip; /*tmp should be uint8*/ + unsigned int fpga_id; /*tmp add*/ + unsigned int reg_addr; + unsigned int value; +}; +typedef struct dal_chip_parm_s dal_chip_parm_t; + +struct dal_intr_parm_s +{ + unsigned int irq; + unsigned int enable; +}; +typedef struct dal_intr_parm_s dal_intr_parm_t; + +struct dal_irq_mapping_s +{ + unsigned int hw_irq; + unsigned int sw_irq; +}; +typedef struct dal_irq_mapping_s dal_irq_mapping_t; + +struct dal_user_dev_s +{ + unsigned int chip_num; /*output: local chip number*/ + unsigned int lchip; /*input: local chip id*/ + unsigned int phy_base0; /* low 32bits physical base address */ + unsigned int phy_base1; /* high 32bits physical base address */ + unsigned int bus_no; + unsigned int dev_no; + unsigned int fun_no; + void* virt_base[2]; /* Virtual base address; this must be last member */ +}; +typedef struct dal_user_dev_s dal_user_dev_t; + +struct dma_info_s +{ + unsigned int lchip; + unsigned int phy_base; + unsigned int phy_base_hi; + unsigned int size; + unsigned int* virt_base; +}; +typedef struct dma_info_s dma_info_t; + +struct dal_pci_cfg_ioctl_s +{ + unsigned int lchip; /* Device ID */ + unsigned int offset; + unsigned int value; +}; +typedef struct dal_pci_cfg_ioctl_s dal_pci_cfg_ioctl_t; + +struct dal_msi_info_s +{ + unsigned int lchip; + unsigned int irq_base; + unsigned int irq_num; +}; +typedef struct dal_msi_info_s dal_msi_info_t; + +struct dal_intr_info_s +{ + unsigned int irq; + unsigned int irq_idx; +}; +typedef struct dal_intr_info_s dal_intr_info_t; + +struct dal_dma_cache_info_s +{ + unsigned long ptr; + unsigned int length; +}; +typedef struct dal_dma_cache_info_s dal_dma_cache_info_t; + +#define CMD_MAGIC 'C' +#define CMD_WRITE_CHIP _IO(CMD_MAGIC, 0) /* for humber ioctrol*/ +#define CMD_READ_CHIP _IO(CMD_MAGIC, 1) /* for humber ioctrol*/ +#define CMD_GET_DEVICES _IO(CMD_MAGIC, 2) +#define CMD_GET_DAL_VERSION _IO(CMD_MAGIC, 3) +#define CMD_PCI_CONFIG_WRITE _IO(CMD_MAGIC, 4) +#define CMD_PCI_CONFIG_READ _IO(CMD_MAGIC, 5) +#define CMD_GET_DMA_INFO _IO(CMD_MAGIC, 6) +#define CMD_REG_INTERRUPTS _IO(CMD_MAGIC, 7) +#define CMD_UNREG_INTERRUPTS _IO(CMD_MAGIC, 8) +#define CMD_EN_INTERRUPTS _IO(CMD_MAGIC, 9) +#define CMD_I2C_READ _IO(CMD_MAGIC, 10) +#define CMD_I2C_WRITE _IO(CMD_MAGIC, 11) +#define CMD_GET_MSI_INFO _IO(CMD_MAGIC, 12) +#define CMD_SET_MSI_CAP _IO(CMD_MAGIC, 13) +#define CMD_IRQ_MAPPING _IO(CMD_MAGIC, 14) +#define CMD_GET_INTR_INFO _IO(CMD_MAGIC, 15) +#define CMD_CACHE_INVAL _IO(CMD_MAGIC, 16) +#define CMD_CACHE_FLUSH _IO(CMD_MAGIC, 17) + +enum dal_version_e +{ + VERSION_MIN, + VERSION_1DOT0, + VERSION_1DOT1, + VERSION_1DOT2, + + VERSION_MAX +}; +typedef enum dal_version_e dal_version_t; + +/* We try to assemble a contiguous segment from chunks of this size */ +#define DMA_BLOCK_SIZE (512 * DAL_ONE_KB) + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c new file mode 100644 index 00000000000..5aca222a138 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.c @@ -0,0 +1,350 @@ +#include "dal_mpool.h" + +#ifdef __KERNEL__ +#include +#include + +#define DAL_MALLOC(x) kmalloc(x, GFP_ATOMIC) +#define DAL_FREE(x) kfree(x) + +static spinlock_t dal_mpool_lock; +#define MPOOL_LOCK_INIT() spin_lock_init(&dal_mpool_lock) +#define MPOOL_LOCK() unsigned long flags; spin_lock_irqsave(&dal_mpool_lock, flags) +#define MPOOL_UNLOCK() spin_unlock_irqrestore(&dal_mpool_lock, flags) +#define DAL_PRINT(fmt,arg...) printk(fmt,##arg) +#else /* !__KERNEL__*/ + +#include +#include "sal.h" +#define DAL_MALLOC(x) malloc(x) +#define DAL_FREE(x) free(x) +static sal_mutex_t* dal_mpool_lock; +#define MPOOL_LOCK_INIT() sal_mutex_create(&dal_mpool_lock) +#define MPOOL_LOCK() sal_mutex_lock(dal_mpool_lock) +#define MPOOL_UNLOCK() sal_mutex_unlock(dal_mpool_lock) +#define DAL_PRINT(fmt,arg...) sal_printf(fmt,##arg) + +#endif /* __KERNEL__ */ + + + +dal_mpool_mem_t* g_free_block_ptr = NULL; + +/* System cache line size */ +#ifndef DAL_CACHE_LINE_BYTES +#define DAL_CACHE_LINE_BYTES 256 +#endif + +#define DAL_MAX_CHIP_NUM 32 +static dal_mpool_mem_t* p_desc_pool[DAL_MAX_CHIP_NUM] = {0}; +static dal_mpool_mem_t* p_data_pool[DAL_MAX_CHIP_NUM] = {0}; + +int +dal_mpool_init(void) +{ + MPOOL_LOCK_INIT(); + return 0; +} + +dal_mpool_mem_t* +_dal_mpool_create(void* base, int size, int type) +{ + dal_mpool_mem_t* head = NULL; + dal_mpool_mem_t* tail = NULL; + + head = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (head == NULL) + { + return NULL; + } + + tail = (dal_mpool_mem_t*)DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (tail == NULL) + { + DAL_FREE(head); + return NULL; + } + + head->size = tail->size = 0; + head->type = type; + head->address = base; + tail->address = head->address + size; + head->next = tail; + tail->next = NULL; + + return head; +} + +dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base, int size) +{ + dal_mpool_mem_t* head = NULL; + int mod = (int)(((unsigned long)base) & (DAL_CACHE_LINE_BYTES - 1)); + + MPOOL_LOCK(); + + if (mod) + { + base = (char*)base + (DAL_CACHE_LINE_BYTES - mod); + size -= (DAL_CACHE_LINE_BYTES - mod); + } + + size &= ~(DAL_CACHE_LINE_BYTES - 1); + + /* init for common linkptr, only used for GB */ + head = _dal_mpool_create(base, size, DAL_MPOOL_TYPE_USELESS); + if (NULL == head) + { + MPOOL_UNLOCK(); + return NULL; + } + + /* init for desc linkptr */ + p_desc_pool[lchip] = _dal_mpool_create(base, DAL_MPOOL_MAX_DESX_SIZE, DAL_MPOOL_TYPE_DESC); + if (NULL == p_desc_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + return NULL; + } + + /* init for data linkptr */ + p_data_pool[lchip] = _dal_mpool_create(((char*)base+DAL_MPOOL_MAX_DESX_SIZE), (size - DAL_MPOOL_MAX_DESX_SIZE), DAL_MPOOL_TYPE_DATA); + if (NULL == p_data_pool[lchip]) + { + MPOOL_UNLOCK(); + DAL_FREE(head->next); + DAL_FREE(head); + DAL_FREE(p_desc_pool[lchip]->next); + DAL_FREE(p_desc_pool[lchip]); + return NULL; + } + + MPOOL_UNLOCK(); + + return head; +} + +dal_mpool_mem_t* +_dal_mpool_alloc_comon(dal_mpool_mem_t* ptr, int size, int type) +{ + dal_mpool_mem_t* new_ptr = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address - (ptr->address + ptr->size) >= size) + { + break; + } + + ptr = ptr->next; + } + + if (!(ptr && ptr->next)) + { + return NULL; + } + + new_ptr = DAL_MALLOC(sizeof(dal_mpool_mem_t)); + if (!new_ptr) + { + return NULL; + } + + new_ptr->type = type; + new_ptr->address = ptr->address + ptr->size; + new_ptr->size = size; + new_ptr->next = ptr->next; + ptr->next = new_ptr; + + return new_ptr; +} + +void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type) +{ + dal_mpool_mem_t* ptr = NULL; + dal_mpool_mem_t* new_ptr = NULL; + int mod; + + MPOOL_LOCK(); + + mod = size & (DAL_CACHE_LINE_BYTES - 1); + if (mod != 0) + { + size += (DAL_CACHE_LINE_BYTES - mod); + } + + switch(type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + new_ptr = _dal_mpool_alloc_comon(ptr, size, type); + if (NULL == new_ptr) + { + MPOOL_UNLOCK(); + return NULL; + } + break; + default: + MPOOL_UNLOCK(); + return NULL; + break; + } + + MPOOL_UNLOCK(); + if( NULL == new_ptr ) + { + return NULL; + } + + return new_ptr->address; +} + +void +_dal_mpool_free(dal_mpool_mem_t* ptr, void* addr, int type) +{ + unsigned char* address = (unsigned char*)addr; + dal_mpool_mem_t* prev = NULL; + + while (ptr && ptr->next) + { + if (ptr->next->address == address) + { + break; + } + + ptr = ptr->next; + } + + if (ptr && ptr->next) + { + prev = ptr; + ptr = ptr->next; + prev->next = ptr->next; + DAL_FREE(ptr); + } + + return; +} + +void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr) +{ + dal_mpool_mem_t* ptr = pool; + + MPOOL_LOCK(); + + switch(pool->type) + { + case DAL_MPOOL_TYPE_USELESS: + ptr = pool; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_USELESS); + break; + case DAL_MPOOL_TYPE_DESC: + ptr = p_desc_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DESC); + break; + case DAL_MPOOL_TYPE_DATA: + ptr = p_data_pool[lchip]; + _dal_mpool_free(ptr, addr, DAL_MPOOL_TYPE_DATA); + break; + default: + break; + } + + MPOOL_UNLOCK(); + return; +} + +int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr, * next; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_desc_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + for (ptr = p_data_pool[lchip]; ptr; ptr = next) + { + next = ptr->next; + DAL_FREE(ptr); + } + + MPOOL_UNLOCK(); + + return 0; +} + +int +dal_mpool_usage(dal_mpool_mem_t* pool, int type) +{ + int usage = 0; + dal_mpool_mem_t* ptr; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { + if (ptr->type == type || ptr->type == -1) + { + usage += ptr->size; + } + } + + MPOOL_UNLOCK(); + + return usage; +} + +int +dal_mpool_debug(dal_mpool_mem_t* pool) +{ + dal_mpool_mem_t* ptr; + int index = 0; + + MPOOL_LOCK(); + + for (ptr = pool; ptr; ptr = ptr->next) + { +// DAL_PRINT("%2dst mpool block: address=0x%8x, size=0x%x \n", index, (unsigned int)ptr->address, ptr->size); + DAL_PRINT("%2dst mpool block: address=%p, size=0x%x \n", index, ptr->address, ptr->size); // note + index++; + } + + MPOOL_UNLOCK(); + + return 0; +} + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h new file mode 100644 index 00000000000..d93f8886813 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/modules/dal_mpool.h @@ -0,0 +1,72 @@ +/** + @file dal_mpool.h + + @author Copyright (C) 2011 Centec Networks Inc. All rights reserved. + + @date 2012-5-10 + + @version v2.0 + + This file contains the dma memory init, allocation and free APIs +*/ + +#ifndef _DMA_MPOOL_H +#define _DMA_MPOOL_H +#ifdef __cplusplus +extern "C" { +#endif + +#define DAL_MPOOL_MAX_DESX_SIZE (1024*1024) + +enum dal_mpool_type_e +{ + DAL_MPOOL_TYPE_USELESS, /* just compatible with GB */ + DAL_MPOOL_TYPE_DESC, /* dma mpool op for desc */ + DAL_MPOOL_TYPE_DATA /* dma mpool op for data */ +}; +typedef enum dal_mpool_type_e dal_mpool_type_t; + +struct dal_mpool_mem_s +{ + unsigned char* address; + int size; + int type; + struct dal_mpool_mem_s* next; +}; +typedef struct dal_mpool_mem_s dal_mpool_mem_t; + +/** + @brief This function is to alloc dma memory + + @param[in] size size of memory + + @return NULL + +*/ +extern int +dal_mpool_init(void); + +extern dal_mpool_mem_t* +dal_mpool_create(unsigned char lchip, void* base_ptr, int size); + +extern void* +dal_mpool_alloc(unsigned char lchip, dal_mpool_mem_t* pool, int size, int type); + +extern void +dal_mpool_free(unsigned char lchip, dal_mpool_mem_t* pool, void* addr); + +extern int +dal_mpool_destroy(unsigned char lchip, dal_mpool_mem_t* pool); + +extern int +dal_mpool_usage(dal_mpool_mem_t* pool, int type); + +extern int +dal_mpool_debug(dal_mpool_mem_t* pool); +#ifdef __cplusplus +} +#endif + +#endif /* !_DMA_MPOOL_H */ + + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh new file mode 100755 index 00000000000..e8f81a20d9d --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform.sh @@ -0,0 +1,62 @@ +#!/bin/bash + +#platform init script for centec e582-48x6q + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # I801 adapter can be at either dffd0000 or dfff0000 + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find I801" && exit 1 +} + +init_devnum + +if [ "$1" == "init" ]; then + #install drivers and dependencies + depmod -a + modprobe i2c-i801 + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-pca954x force_deselect_on_exit=1 + i2cset -y 0 0x58 0x8 0x3f + i2cset -y 0 0x20 0x1b 0x0 + i2cset -y 0 0x20 0xb 0x0 + i2cset -y 0 0x21 0x19 0x0 + i2cset -y 0 0x21 0x9 0x0 + i2cset -y 0 0x21 0x1c 0x0 + i2cset -y 0 0x21 0xc 0x0 + i2cset -y 0 0x22 0x1a 0x0 + i2cset -y 0 0x22 0xa 0x0 + i2cset -y 0 0x23 0x18 0x0 + i2cset -y 0 0x23 0x8 0x0 + i2cset -y 0 0x23 0x1b 0x0 + i2cset -y 0 0x23 0xb 0x0 + modprobe lm77 + modprobe tun + modprobe dal + modprobe centec_at24c64 + modprobe centec_e582_48x6q_platform + + #start platform monitor + rm -rf /usr/bin/platform_monitor + ln -s /usr/bin/48x6q_platform_monitor.py /usr/bin/platform_monitor + python /usr/bin/platform_monitor & +elif [ "$1" == "deinit" ]; then + kill -9 $(pidof platform_monitor) > /dev/null 2>&1 + rm -rf /usr/bin/platform_monitor + modprobe -r centec_e582_48x6q_platform + modprobe -r centec_at24c64 + modprobe -r dal + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev +else + echo "e582-48x6q_platform : Invalid option !" +fi diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py new file mode 100644 index 00000000000..d08802a35f3 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/scripts/48x6q_platform_monitor.py @@ -0,0 +1,217 @@ +#!/usr/bin/env python + +############################################################################# +# Centec +# +# Module contains an implementation of sfp presence scan logic +# +############################################################################# + +try: + import os + import os.path + import threading + import time + import logging + import struct + import syslog + import swsssdk + from socket import * + from select import * +except ImportError, e: + raise ImportError(str(e) + " - required module not found") + + +def DBG_PRINT(str): + syslog.openlog("centec-pmon") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +PORT_NUMBER = (48+6) + +class PlatformMonitor: + + """init board platform default config""" + def __init__(self): + """[ctlid, slavedevid]""" + self.fiber_mapping = [(0, 0)] # res + self.fiber_mapping.extend([(0, 0), (0, 1), (0, 2), (0, 3), (0, 4), (0, 5), (0, 6), (0, 7)]) # panel port 1~8 + self.fiber_mapping.extend([(0, 14), (0, 13), (0, 15), (0, 12), (0, 8), (0, 11), (0, 9), (0, 10)]) # panel port 9~16 + self.fiber_mapping.extend([(0, 22), (0, 21), (0, 23), (0, 20), (0, 16), (0, 19), (0, 17), (0, 18)]) # panel port 17~24 + self.fiber_mapping.extend([(1, 4), (1, 3), (1, 5), (1, 2), (1, 6), (1, 1), (1, 7), (1, 0)]) # panel port 25~32 + self.fiber_mapping.extend([(1, 8), (1, 15), (1, 9), (1, 14), (1, 10), (1, 13), (1, 11), (1, 12)]) # panel port 33~40 + self.fiber_mapping.extend([(1, 22), (1, 21), (1, 23), (1, 20), (1, 16), (1, 19), (1, 17), (1, 18)]) # panel port 41~48 + self.fiber_mapping.extend([(1, 28), (1, 29), (1, 26), (1, 27), (1, 24), (1, 25)]) # panel port 49~54 + + self.udpClient = socket(AF_INET, SOCK_DGRAM) + self.sfp_present = [0]*(PORT_NUMBER+1) + self.sfp_enable = [0]*(PORT_NUMBER+1) + self.f_sfp_present = "/sys/class/sfp/sfp{}/sfp_presence" + self.f_sfp_enable = "/sys/class/sfp/sfp{}/sfp_enable" + self.sfp_scan_timer = 0 + + def is_qsfp(self, port): + if port <= 48: + return False + else: + return True + + def get_sfp_present(self, port): + with open(self.f_sfp_present.format(port), 'r') as sfp_file: + return int(sfp_file.read()) + + def set_sfp_present(self, port, present): + self.sfp_present[port] = present + + def set_sfp_enable(self, port, enable): + if self.is_qsfp(port): + if enable: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("1") + self.sfp_enable[port] = 1 + else: + with open(self.f_sfp_enable.format(port), 'w') as sfp_file: + sfp_file.write("0") + self.sfp_enable[port] = 0 + else: + (ctlid, devid) = self.fiber_mapping[port] + req = struct.pack('=HHHBBHIBBBBI', 0, 9, 16, ctlid, devid, 0x50, 0, 0x56, 1, 0xf, 0, 1) + self.udpClient.sendto(req, ('localhost', 8101)) + rsp, addr = self.udpClient.recvfrom(1024) + rsp_data = struct.unpack('=HHHBBHIBBBBIi512B', rsp) + enable_v = rsp_data[13] + if enable: + enable_v &= 0xf0 + else: + enable_v |= 0x0f + data = struct.pack('=HHHBBHBBBB', 0, 11, 8, ctlid, 0x56, 0x50, devid, enable_v, 0xf, 0) + self.udpClient.sendto(data, ('localhost', 8101)) + DBG_PRINT("set sfp{} to {}".format(port, ("enable" if enable else "disable"))) + + def initialize_configdb(self): + try: + f_mac = os.popen('ip link show eth0 | grep ether | awk \'{print $2}\'') + mac_addr = f_mac.read(17) + last_byte = mac_addr[-2:] + aligned_last_byte = format(int(int(str(last_byte), 16) + 1), '02x') + mac_addr = mac_addr[:-2] + aligned_last_byte + DBG_PRINT("start connect swss config-db to set device mac-address") + swss = swsssdk.SonicV2Connector() + swss.connect(swss.CONFIG_DB) + swss.set(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac', mac_addr) + mac_addr = swss.get(swss.CONFIG_DB, "DEVICE_METADATA|localhost", 'mac') + DBG_PRINT("set device mac-address: %s" % mac_addr) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize_rpc(self): + while True: + try: + r_sel = [self.udpClient] + echo_req = struct.pack('=HHH', 0, 1, 0) + self.udpClient.sendto(echo_req, ('localhost', 8101)) + result = select(r_sel, [], [], 1) + if self.udpClient in result[0]: + echo_rsp, srv_addr = self.udpClient.recvfrom(1024) + if echo_rsp: + break + DBG_PRINT("connect to sdk rpc server timeout, try again.") + except IOError as e: + DBG_PRINT(str(e)) + + DBG_PRINT("connect to sdk rpc server success.") + + def initialize_gpio(self): + # set gpio 1,2,3,4,5,6,7,8 output mode + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 1, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 0 to reset i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 0) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + # set gpio 1,2,3,4,5,6,7,8 output 1 to release i2c bridge + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 1, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 2, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 3, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 4, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 5, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 6, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 7, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + gpio_init = struct.pack('=HHHBBB', 0, 13, 3, 2, 8, 1) + self.udpClient.sendto(gpio_init, ('localhost', 8101)) + DBG_PRINT("config ctc chip gpio done.") + + def initialize_sfp(self): + try: + for port in range(1, PORT_NUMBER+1): + if self.get_sfp_present(port): + self.set_sfp_present(port, 1) + self.set_sfp_enable(port, 1) + else: + self.set_sfp_present(port, 0) + self.set_sfp_enable(port, 0) + except IOError as e: + DBG_PRINT(str(e)) + + def initialize(self): + DBG_PRINT("start connect to sdk rpc server.") + + self.initialize_configdb() + self.initialize_rpc() + self.initialize_gpio() + self.initialize_sfp() + + def sfp_scan(self): + try: + for port in range(1, PORT_NUMBER+1): + cur_present = self.get_sfp_present(port) + if self.sfp_present[port] != cur_present: + self.set_sfp_present(port, cur_present) + self.set_sfp_enable(port, cur_present) + except IOError as e: + DBG_PRINT(str(e)) + + def start(self): + while True: + self.sfp_scan() + time.sleep(1) + +if __name__ == "__main__": + monitor = PlatformMonitor() + monitor.initialize() + monitor.start() + diff --git a/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service b/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service new file mode 100644 index 00000000000..ad9b1fb1b3a --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/48x6q/service/48x6q_platform.service @@ -0,0 +1,13 @@ +[Unit] +Description=Centec e582 48x6q platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-e582-48x6q start +ExecStop=-/etc/init.d/platform-modules-e582-48x6q stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/centec/sonic-platform-modules-e582/LICENSE b/platform/centec/sonic-platform-modules-e582/LICENSE new file mode 100644 index 00000000000..99228517bae --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2017 Centec, Inc + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/centec/sonic-platform-modules-e582/README.md b/platform/centec/sonic-platform-modules-e582/README.md new file mode 100644 index 00000000000..61b3ef6c87f --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/README.md @@ -0,0 +1 @@ +platform drivers for Centec E582 for the SONiC project diff --git a/platform/centec/sonic-platform-modules-e582/debian/changelog b/platform/centec/sonic-platform-modules-e582/debian/changelog new file mode 100644 index 00000000000..3f4ff89c1be --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/changelog @@ -0,0 +1,11 @@ +sonic-centec-platform-modules (1.1) unstable; urgency=low + + * Add support for centec e582-48x2q4z + + -- yangbs Thu, 25 Jan 2018 13:43:40 +0800 + +sonic-centec-platform-modules (1.0) unstable; urgency=low + + * Initial release + + -- yangbs Mon, 22 Jan 2018 13:43:40 +0800 diff --git a/platform/centec/sonic-platform-modules-e582/debian/compat b/platform/centec/sonic-platform-modules-e582/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control new file mode 100644 index 00000000000..103b6eca242 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/control @@ -0,0 +1,17 @@ +Source: sonic-centec-platform-modules +Section: main +Priority: extra +Maintainer: yangbs +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: platform-modules-e582-48x2q4z +Architecture: amd64 +Depends: linux-image-3.16.0-5-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-e582-48x6q +Architecture: amd64 +Depends: linux-image-3.16.0-5-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init new file mode 100755 index 00000000000..3ef5e7e30b6 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.init @@ -0,0 +1,38 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup e582-48x2q4z board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + /usr/bin/48x2q4z_platform.sh init + + echo "done." + ;; + +stop) + /usr/bin/48x2q4z_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: service platform-modules-e582-48x2q4z {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install new file mode 100644 index 00000000000..9d570eef6cc --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.install @@ -0,0 +1,7 @@ +48x2q4z/cfg/48x2q4z-modules.conf etc/modules-load.d +48x2q4z/cfg/minigraph.xml etc/sonic +48x2q4z/cfg/config_db.json etc/sonic +48x2q4z/cfg/config_db_l2l3.json etc/sonic +48x2q4z/scripts/48x2q4z_platform.sh usr/bin +48x2q4z/scripts/48x2q4z_platform_monitor.py usr/bin +48x2q4z/service/48x2q4z_platform.service lib/systemd/system diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst new file mode 100644 index 00000000000..b4a1fcbe4e6 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x2q4z.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable 48x2q4z_platform.service +systemctl start 48x2q4z_platform.service diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init new file mode 100755 index 00000000000..1c5b0c1c497 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.init @@ -0,0 +1,38 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup e582-48x6q board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + /usr/bin/48x6q_platform.sh init + + echo "done." + ;; + +stop) + /usr/bin/48x6q_platform.sh deinit + echo "done." + + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: service platform-modules-e582-48x6q {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install new file mode 100644 index 00000000000..0bb57745302 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.install @@ -0,0 +1,7 @@ +48x6q/cfg/48x6q-modules.conf etc/modules-load.d +48x6q/cfg/minigraph.xml etc/sonic +48x6q/cfg/config_db.json etc/sonic +48x6q/cfg/config_db_l2l3.json etc/sonic +48x6q/scripts/48x6q_platform.sh usr/bin +48x6q/scripts/48x6q_platform_monitor.py usr/bin +48x6q/service/48x6q_platform.service lib/systemd/system diff --git a/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst new file mode 100644 index 00000000000..fea0c4eebda --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/platform-modules-e582-48x6q.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable 48x6q_platform.service +systemctl start 48x6q_platform.service diff --git a/platform/centec/sonic-platform-modules-e582/debian/rules b/platform/centec/sonic-platform-modules-e582/debian/rules new file mode 100755 index 00000000000..9f5d67b1af5 --- /dev/null +++ b/platform/centec/sonic-platform-modules-e582/debian/rules @@ -0,0 +1,35 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= 48x6q 48x2q4z + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-e582-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp -f $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-e582-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/modules/*.ko; \ + rm -rf debian/platform-modules-e582-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)/*.ko; \ + done) + From 83c21150e572454f37b194f94a4c6f8fcbb5a035 Mon Sep 17 00:00:00 2001 From: Samuel Angebault Date: Fri, 16 Nov 2018 12:41:43 -0800 Subject: [PATCH 21/30] [devices]: Update arista driver submodule (#2251) - Force fans to 100% upon loading the kernel driver for safety --- platform/broadcom/sonic-platform-modules-arista | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index d085f0e1037..887996d9395 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit d085f0e1037460b73211bec621f907a3a3d65c6a +Subproject commit 887996d9395dbdc96818020bd50e04da6f124ed5 From b818397e2804b5c1f9b5a5b36ce0e34d8a4c5077 Mon Sep 17 00:00:00 2001 From: paavaanan Date: Thu, 22 Nov 2018 15:57:11 +0530 Subject: [PATCH 22/30] Dell submodule update for depmod fixes (#2292) --- platform/broadcom/sonic-platform-modules-dell | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/broadcom/sonic-platform-modules-dell b/platform/broadcom/sonic-platform-modules-dell index 8bc799d2601..8778f07ee2d 160000 --- a/platform/broadcom/sonic-platform-modules-dell +++ b/platform/broadcom/sonic-platform-modules-dell @@ -1 +1 @@ -Subproject commit 8bc799d26011622be07e03f888b4dd4c6b014d38 +Subproject commit 8778f07ee2df381c595c6a3c0f7b5d832543951a From 2ffa1e95735456b22d384216efc8ce962728a98c Mon Sep 17 00:00:00 2001 From: "Kevin(Shengkai) Wang" Date: Sat, 1 Dec 2018 18:12:37 +0800 Subject: [PATCH 23/30] [Mellanox] Update hw-management service config (#2325) Signed-off-by: Kevin Wang --- .../Add-systemd-service-config.patch | 31 +++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/platform/mellanox/hw-management/Add-systemd-service-config.patch b/platform/mellanox/hw-management/Add-systemd-service-config.patch index bbaed885dcb..1fc41469172 100644 --- a/platform/mellanox/hw-management/Add-systemd-service-config.patch +++ b/platform/mellanox/hw-management/Add-systemd-service-config.patch @@ -36,11 +36,38 @@ index 0000000..d18916d +[Service] +Type=oneshot +EnvironmentFile=/host/machine.conf -+ExecStart=/bin/bash -c "/usr/share/sonic/device/$onie_platform/hw-management start" -+ExecStop=/bin/bash -c "/usr/share/sonic/device/$onie_platform/hw-management stop" ++ExecStart=/bin/bash -c "/usr/bin/hw-management-service.sh $onie_platform start" ++ExecStop=/bin/bash -c "/usr/bin/hw-management-service.sh $onie_platform stop" + +[Install] +WantedBy=multi-user.target +diff --git a/usr/usr/bin/hw-management-service.sh b/usr/usr/bin/hw-management-service.sh +new file mode 100755 +index 0000000..e3774e5 +--- /dev/null ++++ b/usr/usr/bin/hw-management-service.sh +@@ -0,0 +1,21 @@ ++#!/bin/bash ++ ++if [ $# -ne 2 ] ++then ++ echo "Error: Invalid parameters" ++ exit 1 ++fi ++ ++if [ -f /etc/sonic/config_db.json ] ++then ++ mac_exist=$(grep -c "\"mac\"" /etc/sonic/config_db.json) ++ mac_is_none=$(grep "\"mac\"" /etc/sonic/config_db.json | grep -c "\"None\"") ++ if [ "$mac_exist" == "0" ] || [ "$mac_is_none" == "1" ] ++ then ++ echo "No MAC address, need hw-management service in updategraph" ++ exec /usr/share/sonic/device/$1/hw-management $2 ++ exit 0 ++ fi ++fi ++ ++echo "MAC address already exists in config_db.json, do nothing" diff --git a/debian/rules b/debian/rules index fc38817..fba4150 100755 --- a/debian/rules From 9a644525689b9f2c3d3ce4e942f0db922f4ad7dd Mon Sep 17 00:00:00 2001 From: Qi Luo Date: Wed, 14 Nov 2018 01:13:10 -0800 Subject: [PATCH 24/30] Store thrift source packages in blob (#2255) Signed-off-by: Qi Luo --- src/thrift/Makefile | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/thrift/Makefile b/src/thrift/Makefile index 786a10641e6..dad28571b92 100644 --- a/src/thrift/Makefile +++ b/src/thrift/Makefile @@ -10,12 +10,15 @@ DERIVED_TARGETS = libthrift-dev_$(THRIFT_VERSION_FULL)_amd64.deb \ python-thrift_$(THRIFT_VERSION_FULL)_amd64.deb \ thrift-compiler_$(THRIFT_VERSION_FULL)_amd64.deb +#THRIFT_LINK_PRE = http://http.debian.net/debian/pool/main/t/thrift +THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/packages/debian + $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf thrift-$(THRIFT_VERSION) - wget -nc http://http.debian.net/debian/pool/main/t/thrift/thrift_$(THRIFT_VERSION).orig.tar.gz - wget -nc http://http.debian.net/debian/pool/main/t/thrift/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz - wget -nc http://http.debian.net/debian/pool/main/t/thrift/thrift_$(THRIFT_VERSION_FULL).dsc + wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION).orig.tar.gz?sv=2015-04-05&sr=b&sig=wM3B01UnZQYYr7ZGXmCvRn6MMeS5hn5Oa5G5%2Btub53g%3D&se=2028-11-11T02%3A20%3A36Z&sp=r" + wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=76bx%2BN8uxYbuI%2BEq8uK%2B8cTKTzVmjtjsQ9weejWNINk%3D&se=2028-11-11T02%3A19%3A30Z&sp=r" + wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=Vpk1eJ97I5aWrtjAYS8w8AKyLXcJKFGIVFOOBGR3a5I%3D&se=2028-11-11T02%3A20%3A20Z&sp=r" dpkg-source -x thrift_$(THRIFT_VERSION_FULL).dsc pushd thrift-$(THRIFT_VERSION) From 8b6d69ac9b6e6793bb6b75a8958d65aa1407b17e Mon Sep 17 00:00:00 2001 From: Qi Luo Date: Wed, 14 Nov 2018 19:32:29 -0800 Subject: [PATCH 25/30] Fix bug: wget rename saved file (#2259) Signed-off-by: Qi Luo --- src/thrift/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/thrift/Makefile b/src/thrift/Makefile index dad28571b92..03b56ff3439 100644 --- a/src/thrift/Makefile +++ b/src/thrift/Makefile @@ -16,9 +16,9 @@ THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/packages/debian $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf thrift-$(THRIFT_VERSION) - wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION).orig.tar.gz?sv=2015-04-05&sr=b&sig=wM3B01UnZQYYr7ZGXmCvRn6MMeS5hn5Oa5G5%2Btub53g%3D&se=2028-11-11T02%3A20%3A36Z&sp=r" - wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=76bx%2BN8uxYbuI%2BEq8uK%2B8cTKTzVmjtjsQ9weejWNINk%3D&se=2028-11-11T02%3A19%3A30Z&sp=r" - wget -nc "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=Vpk1eJ97I5aWrtjAYS8w8AKyLXcJKFGIVFOOBGR3a5I%3D&se=2028-11-11T02%3A20%3A20Z&sp=r" + wget -nc -O "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION).orig.tar.gz?sv=2015-04-05&sr=b&sig=wM3B01UnZQYYr7ZGXmCvRn6MMeS5hn5Oa5G5%2Btub53g%3D&se=2028-11-11T02%3A20%3A36Z&sp=r" + wget -nc -O "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=76bx%2BN8uxYbuI%2BEq8uK%2B8cTKTzVmjtjsQ9weejWNINk%3D&se=2028-11-11T02%3A19%3A30Z&sp=r" + wget -nc -O "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=Vpk1eJ97I5aWrtjAYS8w8AKyLXcJKFGIVFOOBGR3a5I%3D&se=2028-11-11T02%3A20%3A20Z&sp=r" dpkg-source -x thrift_$(THRIFT_VERSION_FULL).dsc pushd thrift-$(THRIFT_VERSION) From 4af5328140c92f0a39c2f6b4cf6a2f7b674aa5fa Mon Sep 17 00:00:00 2001 From: lguohan Date: Sat, 17 Nov 2018 20:10:18 -0800 Subject: [PATCH 26/30] [thrift]: change wget download from -nc to -N (#2268) -nc will not download if already here and return error -N will compare the timestamp and not download the file. Signed-off-by: Guohan Lu --- src/thrift/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/thrift/Makefile b/src/thrift/Makefile index 03b56ff3439..077b7fb308b 100644 --- a/src/thrift/Makefile +++ b/src/thrift/Makefile @@ -16,9 +16,9 @@ THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/packages/debian $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf thrift-$(THRIFT_VERSION) - wget -nc -O "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION).orig.tar.gz?sv=2015-04-05&sr=b&sig=wM3B01UnZQYYr7ZGXmCvRn6MMeS5hn5Oa5G5%2Btub53g%3D&se=2028-11-11T02%3A20%3A36Z&sp=r" - wget -nc -O "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=76bx%2BN8uxYbuI%2BEq8uK%2B8cTKTzVmjtjsQ9weejWNINk%3D&se=2028-11-11T02%3A19%3A30Z&sp=r" - wget -nc -O "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=Vpk1eJ97I5aWrtjAYS8w8AKyLXcJKFGIVFOOBGR3a5I%3D&se=2028-11-11T02%3A20%3A20Z&sp=r" + wget -NO "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION).orig.tar.gz?sv=2015-04-05&sr=b&sig=wM3B01UnZQYYr7ZGXmCvRn6MMeS5hn5Oa5G5%2Btub53g%3D&se=2028-11-11T02%3A20%3A36Z&sp=r" + wget -NO "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).debian.tar.xz?sv=2015-04-05&sr=b&sig=76bx%2BN8uxYbuI%2BEq8uK%2B8cTKTzVmjtjsQ9weejWNINk%3D&se=2028-11-11T02%3A19%3A30Z&sp=r" + wget -NO "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_$(THRIFT_VERSION_FULL).dsc?sv=2015-04-05&sr=b&sig=Vpk1eJ97I5aWrtjAYS8w8AKyLXcJKFGIVFOOBGR3a5I%3D&se=2028-11-11T02%3A20%3A20Z&sp=r" dpkg-source -x thrift_$(THRIFT_VERSION_FULL).dsc pushd thrift-$(THRIFT_VERSION) From fea4bdfc049e606376b4f92971e290e577da8975 Mon Sep 17 00:00:00 2001 From: "Kevin(Shengkai) Wang" Date: Wed, 5 Dec 2018 02:08:02 +0800 Subject: [PATCH 27/30] Fix redis-py version to 2.10.6 (#2342) Signed-off-by: Kevin Wang --- files/build_templates/sonic_debian_extension.j2 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index 02ac97ba2b9..bb8c0fa7b15 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -75,7 +75,7 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install $CONFIG sudo rm -rf $FILESYSTEM_ROOT/$CONFIG_ENGINE_WHEEL_NAME # Install Python client for Redis -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install redis +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install "redis==2.10.6" sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip install redis-dump-load # Install SwSS SDK Python 2 package From c164caf529393d75b5cd130a16329ae71bd7eccc Mon Sep 17 00:00:00 2001 From: simonJi2018 <37395146+simonJi2018@users.noreply.github.com> Date: Tue, 4 Dec 2018 10:09:43 -0800 Subject: [PATCH 28/30] update sdk and sai for 201807 (#2330) * update device driver and support qos and fix some driver bug * modified device file for support qos and fix some device init error --- .../Accton-AS7116-54X/buffers.json.j2 | 2 + .../Accton-AS7116-54X/buffers_defaults_t0.j2 | 72 + .../Accton-AS7116-54X/buffers_defaults_t1.j2 | 72 + .../Accton-AS7116-54X/pg_profile_lookup.ini | 17 + .../Accton-AS7116-54X/port_config.ini | 15 +- .../Accton-AS7116-54X/port_config.nps | 414 +++++ .../Accton-AS7116-54X/port_config_as7116.ini | 55 - .../Accton-AS7116-54X/qos.json.j2 | 289 ++- .../Accton-AS7116-54X/sai.profile | 4 +- .../installer.conf | 1 + .../led_proc_init.nps | 20 +- .../x86_64-accton_as7116_54x-r0/minigraph.xml | 1008 +---------- .../plugins/psuutil.py | 92 + .../plugins/sfputil.py | 10 +- .../x86_64-accton_as7116_54x-r0/sensors.conf | 13 + .../INGRASYS-S9130-32X/buffers.json.j2 | 2 + .../INGRASYS-S9130-32X/buffers_defaults_t0.j2 | 69 + .../INGRASYS-S9130-32X/buffers_defaults_t1.j2 | 69 + .../INGRASYS-S9130-32X/pg_profile_lookup.ini | 17 + .../INGRASYS-S9130-32X/port_config.nps | 34 + .../INGRASYS-S9130-32X/qos.json.j2 | 289 ++- .../minigraph.xml | 86 +- .../plugins/sfputil.py | 3 + .../INGRASYS-S9230-64X/buffers.json.j2 | 2 + .../INGRASYS-S9230-64X/buffers_defaults_t0.j2 | 69 + .../INGRASYS-S9230-64X/buffers_defaults_t1.j2 | 69 + .../INGRASYS-S9230-64X/pg_profile_lookup.ini | 17 + .../INGRASYS-S9230-64X/port_config.ini | 8 +- .../INGRASYS-S9230-64X/port_config.nps | 1545 ++++++++--------- .../INGRASYS-S9230-64X/qos.json.j2 | 289 ++- .../led_proc_init.nps | 2 +- .../plugins/sfputil.py | 2 + platform/nephos/sai.mk | 11 +- platform/nephos/sdk.mk | 7 +- .../modules/x86-64-accton-as7116-54x-fan.c | 52 +- .../as7116-54x/utils/accton_as7116_util.py | 10 +- .../nephos/sonic-platform-modules-ingrasys | 2 +- 37 files changed, 2223 insertions(+), 2515 deletions(-) create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers.json.j2 create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t0.j2 create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t1.j2 create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/pg_profile_lookup.ini create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.nps delete mode 100644 device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config_as7116.ini create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py create mode 100644 device/accton/x86_64-accton_as7116_54x-r0/sensors.conf create mode 100644 device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini create mode 100644 device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 create mode 100644 device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers.json.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t0.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..a70672f1462 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t0.j2 @@ -0,0 +1,72 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 48) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(48, 54) %} + {%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t1.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..a70672f1462 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/buffers_defaults_t1.j2 @@ -0,0 +1,72 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 48) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {%- for port_idx in range(48, 54) %} + {%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/pg_profile_lookup.ini b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.ini b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.ini index 6e5276fc726..52c59bc9d29 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.ini +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.ini @@ -47,12 +47,9 @@ Ethernet44 76 Ethernet45/1 44 Ethernet45 77 Ethernet46/1 45 Ethernet46 78 Ethernet47/1 46 Ethernet47 79 Ethernet48/1 47 -Ethernet48 80 Ethernet49/1 48 -Ethernet49 81 Ethernet50/1 49 -Ethernet50 82 Ethernet51/1 50 -Ethernet51 83 Ethernet52/1 51 -Ethernet52 84,85,86,87 Ethernet53/1 52 -Ethernet53 104,105,106,107 Ethernet54/1 53 -Ethernet54 108,109,110,111 Ethernet55/1 54 -Ethernet55 112,113,114,115 Ethernet56/1 55 -Ethernet56 116,117,118,119 Ethernet57/1 56 +Ethernet48 84,85,86,87 Ethernet49/1 48 +Ethernet49 80,81,82,83 Ethernet50/1 49 +Ethernet50 104,105,106,107 Ethernet51/1 50 +Ethernet51 108,109,110,111 Ethernet52/1 51 +Ethernet52 112,113,114,115 Ethernet53/1 52 +Ethernet53 116,117,118,119 Ethernet54/1 53 \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.nps b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.nps new file mode 100644 index 00000000000..e639b4572fe --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config.nps @@ -0,0 +1,414 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true +init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap portlist=0 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=15 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=16 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=17 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=18 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=19 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=22 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=24 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=26 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=28 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=30 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=32 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=33 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=34 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=35 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=36 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=37 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=38 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=39 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=40 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=41 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=42 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=43 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=44 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=45 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=46 lane-cnt=1 property=tx data=0x2 +phy set lane-swap portlist=47 lane-cnt=1 property=tx data=0x3 +phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.3.1.2 +phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x1.3.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x2.0.3.1 +phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=0 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=1 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=2 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=3 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=4 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=5 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=6 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=7 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=8 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=9 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=10 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=11 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=12 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=13 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=14 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=15 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=16 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=17 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=18 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=19 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=20 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=21 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=22 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=23 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=24 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=25 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=26 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=27 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=28 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=29 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=30 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=31 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=32 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=33 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=34 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=35 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=36 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=37 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=38 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=39 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=40 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=41 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=42 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=43 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=44 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=45 lane-cnt=1 property=rx data=0x2 +phy set lane-swap portlist=46 lane-cnt=1 property=rx data=0x3 +phy set lane-swap portlist=47 lane-cnt=1 property=rx data=0x0 +phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x2.1.0.3 +phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.3.2 +phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x3.1.0.2 +phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x1.1.0.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=0 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=1 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=2 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=3 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=4 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=5 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=6 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=7 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=8 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=9 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=10 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=11 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=12 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=13 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=14 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=15 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=16 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=17 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=18 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=19 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=20 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=21 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=22 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=23 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=24 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=25 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=26 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=27 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=28 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=29 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=30 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=31 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=32 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=33 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=34 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=35 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=36 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=37 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=38 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=39 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=40 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=41 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=42 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=43 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=44 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=45 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=46 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=47 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c +phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x6.6.6.6 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b +phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x0.0.0.0 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x8.8.8.8 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x2.2.2.2 +phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x1.1.1.1 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a +phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x7.7.7.7 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 +port set property portlist=0-47 speed=25g +port set property portlist=48-53 speed=100g +port set property portlist=129-130 speed=10g +port set property portlist=0-47 medium-type=sr +port set property portlist=48-53 medium-type=sr4 +port set property portlist=129-130 medium-type=kr +port set adver portlist=129-130 speed-10g-kr +port set property portlist=129-130 an=enable +port set property portlist=0-53,129-130 admin=enable + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config_as7116.ini b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config_as7116.ini deleted file mode 100644 index 0c124743d9e..00000000000 --- a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/port_config_as7116.ini +++ /dev/null @@ -1,55 +0,0 @@ -# name lanes alias index -Ethernet0 8 Ethernet1/1 0 -Ethernet1 9 Ethernet2/1 1 -Ethernet2 10 Ethernet3/1 2 -Ethernet3 11 Ethernet4/1 3 -Ethernet4 12 Ethernet5/1 4 -Ethernet5 13 Ethernet6/1 5 -Ethernet6 14 Ethernet7/1 6 -Ethernet7 15 Ethernet8/1 7 -Ethernet8 16 Ethernet9/1 8 -Ethernet9 17 Ethernet10/1 9 -Ethernet10 18 Ethernet11/1 10 -Ethernet11 19 Ethernet12/1 11 -Ethernet12 20 Ethernet13/1 12 -Ethernet13 21 Ethernet14/1 13 -Ethernet14 22 Ethernet15/1 14 -Ethernet15 23 Ethernet16/1 15 -Ethernet16 32 Ethernet17/1 16 -Ethernet17 33 Ethernet18/1 17 -Ethernet18 34 Ethernet19/1 18 -Ethernet19 35 Ethernet20/1 19 -Ethernet20 40 Ethernet21/1 20 -Ethernet21 41 Ethernet22/1 21 -Ethernet22 42 Ethernet23/1 22 -Ethernet23 43 Ethernet24/1 23 -Ethernet24 48 Ethernet25/1 24 -Ethernet25 49 Ethernet26/1 25 -Ethernet26 50 Ethernet27/1 26 -Ethernet27 51 Ethernet28/1 27 -Ethernet28 56 Ethernet29/1 28 -Ethernet29 57 Ethernet30/1 29 -Ethernet30 58 Ethernet31/1 30 -Ethernet31 59 Ethernet32/1 31 -Ethernet32 64 Ethernet33/1 32 -Ethernet33 65 Ethernet34/1 33 -Ethernet34 66 Ethernet35/1 34 -Ethernet35 67 Ethernet36/1 35 -Ethernet36 68 Ethernet37/1 36 -Ethernet37 69 Ethernet38/1 37 -Ethernet38 70 Ethernet39/1 38 -Ethernet39 71 Ethernet40/1 39 -Ethernet40 72 Ethernet41/1 40 -Ethernet41 73 Ethernet42/1 41 -Ethernet42 74 Ethernet43/1 42 -Ethernet43 75 Ethernet44/1 43 -Ethernet44 76 Ethernet45/1 44 -Ethernet45 77 Ethernet46/1 45 -Ethernet46 78 Ethernet47/1 46 -Ethernet47 79 Ethernet48/1 47 -Ethernet48 80,81,82,83 Ethernet49/1 48 -Ethernet49 84,85,86,87 Ethernet50/1 49 -Ethernet50 104,105,106,107 Ethernet51/1 50 -Ethernet51 108,109,110,111 Ethernet52/1 51 -Ethernet52 112,113,114,115 Ethernet53/1 52 -Ethernet53 116,117,118,119 Ethernet54/1 56 \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/qos.json.j2 b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/qos.json.j2 index 6f3f6990d87..5c5fc6e4969 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/qos.json.j2 +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/qos.json.j2 @@ -1,153 +1,136 @@ -{ - "TC_TO_PRIORITY_GROUP_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "MAP_PFC_PRIORITY_TO_QUEUE": { - "AZURE": { - "3": "3", - "4": "4" - } - }, - "TC_TO_QUEUE_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "DSCP_TO_TC_MAP": { - "AZURE": { - "0":"1", - "1":"0", - "2":"0", - "3":"3", - "4":"4", - "5":"0", - "6":"0", - "7":"0", - "8":"1", - "9":"0", - "10":"0", - "11":"0", - "12":"0", - "13":"0", - "14":"0", - "15":"0", - "16":"0", - "17":"0", - "18":"0", - "19":"0", - "20":"0", - "21":"0", - "22":"0", - "23":"0", - "24":"0", - "25":"0", - "26":"0", - "27":"0", - "28":"0", - "29":"0", - "30":"0", - "31":"0", - "32":"0", - "33":"0", - "34":"0", - "35":"0", - "36":"0", - "37":"0", - "38":"0", - "39":"0", - "40":"0", - "41":"0", - "42":"0", - "43":"0", - "44":"0", - "45":"0", - "46":"0", - "47":"0", - "48":"0", - "49":"0", - "50":"0", - "51":"0", - "52":"0", - "53":"0", - "54":"0", - "55":"0", - "56":"0", - "57":"0", - "58":"0", - "59":"0", - "60":"0", - "61":"0", - "62":"0", - "63":"0" - } - }, - "SCHEDULER": { - "scheduler.0" : { - "type":"DWRR", - "weight": "25" - }, - "scheduler.1" : { - "type":"DWRR", - "weight": "30" - }, - "scheduler.2" : { - "type":"DWRR", - "weight": "20" - } - }, - "PORT_QOS_MAP": { - "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53": { - "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", - "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", - "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", - "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", - "pfc_enable": "3,4" - } - }, - "WRED_PROFILE": { - "AZURE_LOSSY" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - }, - "AZURE_LOSSLESS" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - } - }, - "QUEUE": { - "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|3-4" : { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|0" : { - "scheduler" : "[SCHEDULER|scheduler.1]" - }, - "Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|1" : { - "scheduler" : "[SCHEDULER|scheduler.2]" - } - } -} +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"613984", + "red_min_threshold":"76608", + "yellow_max_threshold":"628320", + "yellow_min_threshold":"78400", + "green_max_threshold": "642656", + "green_min_threshold": "80192" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"613984", + "red_min_threshold":"76608", + "yellow_max_threshold":"628320", + "yellow_min_threshold":"78400", + "green_max_threshold": "642656", + "green_min_threshold": "80192" + } + }, + "QUEUE": { + } +} diff --git a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/sai.profile b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/sai.profile index d43b2a33f42..880f47910ac 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/sai.profile +++ b/device/accton/x86_64-accton_as7116_54x-r0/Accton-AS7116-54X/sai.profile @@ -1,2 +1,2 @@ -SAI_INIT_CONFIG_FILE=/etc/nps/tau-as7116-4806.cfg -SAI_DSH_CONFIG_FILE=/etc/nps/tau-as7116-4806.dsh +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/led_proc_init.nps +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps diff --git a/device/accton/x86_64-accton_as7116_54x-r0/installer.conf b/device/accton/x86_64-accton_as7116_54x-r0/installer.conf index 925a32fc0c3..4eeedca86a4 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/installer.conf +++ b/device/accton/x86_64-accton_as7116_54x-r0/installer.conf @@ -1,3 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pci=noaer" \ No newline at end of file diff --git a/device/accton/x86_64-accton_as7116_54x-r0/led_proc_init.nps b/device/accton/x86_64-accton_as7116_54x-r0/led_proc_init.nps index 9a97d94c0b0..e25c78018ad 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/led_proc_init.nps +++ b/device/accton/x86_64-accton_as7116_54x-r0/led_proc_init.nps @@ -1,20 +1,10 @@ -#This configuration file is for customer init value feature. Please refer to mtk_cfg.h/mtk_cfg.c for detail. -#1. The lines beginning with # are comment lines. The lines beginning with number are the setting lines. -#2. There are five parameters which can be set. -# 1) the first is unit. -# 2) the second is NPS_CFG_TYPE_XXX. Refer to NPS_CFG_TYPE_T. -# 3) the 3-5 are {param0, param1, value} pairs. Refer to NPS_CFG_VALUE_T. Support HEX format. -# 4) the (unit, NPS_CFG_TYPE_XXX, param0, param1) group is the key to get the correspingding value. -# There should be no same (unit, NPS_CFG_TYPE_XXX, param0, param1) group. -#3. User must follow correct format to apply the setting. Please refer to below commentted example(#0 NPS_CFG_TYPE_L2_ADDR_MODE 0 0 1); -#4. Usage under the linux shell: -# 1) ./image-path/image-name -c cfg-path/NPS_Ari_EVB_24.cfg : mamually specify directory path if they are not in current work dirctory. -# 2) ./image-name -c NPS_Ari_EVB_24.cfg : the image and the NPS_Ari_EVB_24.cfg are in the current work directory. - #unit NPS_CFG_TYPE_XXX param0 param1 value #---- ---------------- ------ ------ ----- 0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 -0 NPS_CFG_TYPE_LED_CFG 0 0 3 -0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 5 0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/minigraph.xml b/device/accton/x86_64-accton_as7116_54x-r0/minigraph.xml index d538a8cbd70..91269c2f68f 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/minigraph.xml +++ b/device/accton/x86_64-accton_as7116_54x-r0/minigraph.xml @@ -1,625 +1,6 @@ - - - ARISTA01T0 - 10.1.1.33 - switch1 - 10.0.0.32 - 1 - 180 - 60 - - - switch1 - 10.0.0.0 - ARISTA01T2 - 10.0.0.1 - 1 - 180 - 60 - - - ARISTA02T0 - 10.0.0.35 - switch1 - 10.0.0.34 - 1 - 180 - 60 - - - switch1 - 10.0.0.2 - ARISTA02T2 - 10.0.0.3 - 1 - 180 - 60 - - - ARISTA03T0 - 10.0.0.37 - switch1 - 10.0.0.36 - 1 - 180 - 60 - - - switch1 - 10.0.0.4 - ARISTA03T2 - 10.0.0.5 - 1 - 180 - 60 - - - ARISTA04T0 - 10.0.0.39 - switch1 - 10.0.0.38 - 1 - 180 - 60 - - - switch1 - 10.0.0.6 - ARISTA04T2 - 10.0.0.7 - 1 - 180 - 60 - - - ARISTA05T0 - 10.0.0.41 - switch1 - 10.0.0.40 - 1 - 180 - 60 - - - switch1 - 10.0.0.8 - ARISTA05T2 - 10.0.0.9 - 1 - 180 - 60 - - - ARISTA06T0 - 10.0.0.43 - switch1 - 10.0.0.42 - 1 - 180 - 60 - - - switch1 - 10.0.0.10 - ARISTA06T2 - 10.0.0.11 - 1 - 180 - 60 - - - ARISTA07T0 - 10.0.0.45 - switch1 - 10.0.0.44 - 1 - 180 - 60 - - - switch1 - 10.0.0.12 - ARISTA07T2 - 10.0.0.13 - 1 - 180 - 60 - - - ARISTA08T0 - 10.0.0.47 - switch1 - 10.0.0.46 - 1 - 180 - 60 - - - switch1 - 10.0.0.14 - ARISTA08T2 - 10.0.0.15 - 1 - 180 - 60 - - - ARISTA09T0 - 10.0.0.49 - switch1 - 10.0.0.48 - 1 - 180 - 60 - - - switch1 - 10.0.0.16 - ARISTA09T2 - 10.0.0.17 - 1 - 180 - 60 - - - ARISTA10T0 - 10.0.0.51 - switch1 - 10.0.0.50 - 1 - 180 - 60 - - - switch1 - 10.0.0.18 - ARISTA10T2 - 10.0.0.19 - 1 - 180 - 60 - - - ARISTA11T0 - 10.0.0.53 - switch1 - 10.0.0.52 - 1 - 180 - 60 - - - switch1 - 10.0.0.20 - ARISTA11T2 - 10.0.0.21 - 1 - 180 - 60 - - - ARISTA12T0 - 10.0.0.55 - switch1 - 10.0.0.54 - 1 - 180 - 60 - - - switch1 - 10.0.0.22 - ARISTA12T2 - 10.0.0.23 - 1 - 180 - 60 - - - ARISTA13T0 - 10.0.0.57 - switch1 - 10.0.0.56 - 1 - 180 - 60 - - - switch1 - 10.0.0.24 - ARISTA13T2 - 10.0.0.25 - 1 - 180 - 60 - - - ARISTA14T0 - 10.0.0.59 - switch1 - 10.0.0.58 - 1 - 180 - 60 - - - switch1 - 10.0.0.26 - ARISTA14T2 - 10.0.0.27 - 1 - 180 - 60 - - - ARISTA15T0 - 10.0.0.61 - switch1 - 10.0.0.60 - 1 - 180 - 60 - - - switch1 - 10.0.0.28 - ARISTA15T2 - 10.0.0.29 - 1 - 180 - 60 - - - ARISTA16T0 - 10.0.0.63 - switch1 - 10.0.0.62 - 1 - 180 - 60 - - - switch1 - 10.0.0.30 - ARISTA16T2 - 10.0.0.31 - 1 - 180 - 60 - - - - - 65100 - switch1 - - -
10.0.0.33
- - - - -
10.0.0.1
- - - - -
10.0.0.35
- - - - -
10.0.0.3
- - - - -
10.0.0.37
- - - - -
10.0.0.5
- - - - -
10.0.0.39
- - - - -
10.0.0.7
- - - - -
10.0.0.41
- - - - -
10.0.0.9
- - - - -
10.0.0.43
- - - - -
10.0.0.11
- - - - -
10.0.0.45
- - - - -
10.0.0.13
- - - - -
10.0.0.47
- - - - -
10.0.0.15
- - - - -
10.0.0.49
- - - - -
10.0.0.17
- - - - -
10.0.0.51
- - - - -
10.0.0.19
- - - - -
10.0.0.53
- - - - -
10.0.0.21
- - - - -
10.0.0.55
- - - - -
10.0.0.23
- - - - -
10.0.0.57
- - - - -
10.0.0.25
- - - - -
10.0.0.59
- - - - -
10.0.0.27
- - - - -
10.0.0.61
- - - - -
10.0.0.29
- - - - -
10.0.0.63
- - - - -
10.0.0.31
- - - - - - - - 64001 - ARISTA01T0 - - - - 65200 - ARISTA01T2 - - - - 64002 - ARISTA02T0 - - - - 65200 - ARISTA02T2 - - - - 64003 - ARISTA03T0 - - - - 65200 - ARISTA03T2 - - - - 64004 - ARISTA04T0 - - - - 65200 - ARISTA04T2 - - - - 64005 - ARISTA05T0 - - - - 65200 - ARISTA05T2 - - - - 64006 - ARISTA06T0 - - - - 65200 - ARISTA06T2 - - - - 64007 - ARISTA07T0 - - - - 65200 - ARISTA07T2 - - - - 64008 - ARISTA08T0 - - - - 65200 - ARISTA08T2 - - - - 64009 - ARISTA09T0 - - - - 65200 - ARISTA09T2 - - - - 64010 - ARISTA10T0 - - - - 65200 - ARISTA10T2 - - - - 64011 - ARISTA11T0 - - - - 65200 - ARISTA11T2 - - - - 64012 - ARISTA12T0 - - - - 65200 - ARISTA12T2 - - - - 64013 - ARISTA13T0 - - - - 65200 - ARISTA13T2 - - - - 64014 - ARISTA14T0 - - - - 65200 - ARISTA14T2 - - - - 64015 - ARISTA15T0 - - - - 65200 - ARISTA15T2 - - - - 64016 - ARISTA16T0 - - - - 65200 - ARISTA16T2 - - - @@ -642,168 +23,7 @@ switch1 - - - - Ethernet0 - 10.0.0.0/31 - - - - Ethernet4 - 10.0.0.2/31 - - - - Ethernet8 - 10.0.0.4/31 - - - - Ethernet12 - 10.0.0.6/31 - - - - Ethernet16 - 10.0.0.8/31 - - - - Ethernet20 - 10.0.0.10/31 - - - - Ethernet24 - 10.0.0.12/31 - - - - Ethernet28 - 10.0.0.14/31 - - - - Ethernet32 - 10.0.0.16/31 - - - - Ethernet36 - 10.0.0.18/31 - - - - Ethernet40 - 10.0.0.20/31 - - - - Ethernet44 - 10.0.0.22/31 - - - - Ethernet48 - 10.0.0.24/31 - - - - Ethernet52 - 10.0.0.26/31 - - - - Ethernet56 - 10.0.0.28/31 - - - - Ethernet60 - 10.0.0.30/31 - - - - Ethernet64 - 10.0.0.32/31 - - - - Ethernet68 - 10.0.0.34/31 - - - - Ethernet72 - 10.0.0.36/31 - - - - Ethernet76 - 10.0.0.38/31 - - - - Ethernet80 - 10.0.0.40/31 - - - - Ethernet84 - 10.0.0.42/31 - - - - Ethernet88 - 10.0.0.44/31 - - - - Ethernet92 - 10.0.0.46/31 - - - - Ethernet96 - 10.0.0.48/31 - - - - Ethernet100 - 10.0.0.50/31 - - - - Ethernet104 - 10.0.0.52/31 - - - - Ethernet108 - 10.0.0.54/31 - - - - Ethernet112 - 10.0.0.56/31 - - - - Ethernet116 - 10.0.0.58/31 - - - - Ethernet120 - 10.0.0.60/31 - - - - Ethernet124 - 10.0.0.62/31 - - + @@ -811,232 +31,6 @@ - - - DeviceInterfaceLink - switch1 - Ethernet0 - ARISTA01T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet4 - ARISTA02T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet8 - ARISTA03T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet12 - ARISTA04T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet16 - ARISTA05T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet20 - ARISTA06T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet24 - ARISTA07T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet28 - ARISTA08T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet32 - ARISTA09T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet36 - ARISTA10T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet40 - ARISTA11T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet44 - ARISTA12T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet48 - ARISTA13T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet52 - ARISTA14T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet56 - ARISTA15T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet60 - ARISTA16T2 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet64 - ARISTA01T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet68 - ARISTA02T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet72 - ARISTA03T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet76 - ARISTA04T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet80 - ARISTA05T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet84 - ARISTA06T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet88 - ARISTA07T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet92 - ARISTA08T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet96 - ARISTA09T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet100 - ARISTA10T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet104 - ARISTA11T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet108 - ARISTA12T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet112 - ARISTA13T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet116 - ARISTA14T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet120 - ARISTA15T0 - Ethernet1 - - - DeviceInterfaceLink - switch1 - Ethernet124 - ARISTA16T0 - Ethernet1 - - switch1 diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py new file mode 100644 index 00000000000..08fd2648f31 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/10-0050", + "/sys/bus/i2c/devices/11-0053"] + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_power_good' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_absent = 0 + attr_file ='psu_present' + attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 1): + status = 1 + + return status + diff --git a/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py index 974bedc4db1..1a6c1103891 100644 --- a/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py +++ b/device/accton/x86_64-accton_as7116_54x-r0/plugins/sfputil.py @@ -79,10 +79,7 @@ def __init__(self): eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom' for x in range(self._port_start, self._port_end + 1): port_eeprom_path = eeprom_path.format(self._port_to_i2c_mapping[x]) - if x == 53: - self._port_to_eeprom_mapping[56] = port_eeprom_path # ugly!!!! - else: - self._port_to_eeprom_mapping[x] = port_eeprom_path + self._port_to_eeprom_mapping[x] = port_eeprom_path SfpUtilBase.__init__(self) @@ -135,6 +132,9 @@ def get_presence(self, port_num): return True return False + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError @property def port_start(self): @@ -151,5 +151,3 @@ def qsfp_ports(self): @property def port_to_eeprom_mapping(self): return self._port_to_eeprom_mapping - - diff --git a/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf b/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf new file mode 100644 index 00000000000..9edb51a9e72 --- /dev/null +++ b/device/accton/x86_64-accton_as7116_54x-r0/sensors.conf @@ -0,0 +1,13 @@ +# libsensors configuration file + +chip "as7116_54x_fan-*" + label fan1 "front fan 1" + label fan2 "front fan 2" + label fan3 "front fan 3" + label fan4 "front fan 4" + label fan5 "front fan 5" + label fan6 "rear fan 1" + label fan7 "rear fan 2" + label fan8 "rear fan 3" + label fan9 "rear fan 4" + label fan10 "rear fan 5" diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..46f0e9f29df --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t0.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..46f0e9f29df --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/buffers_defaults_t1.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 32) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps index f9e5396d0cf..49068859b25 100644 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/port_config.nps @@ -308,6 +308,40 @@ phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c2 data=0x01 phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=cn1 data=0x01 phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c0 data=0x02 phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c1 data=0x03 +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 port set property unit=0 portlist=0-31 speed=100g port set property unit=0 portlist=129-130 speed=10g port set property unit=0 portlist=0-31 medium-type=sr4 diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 index 62464d7d39f..42eef17c362 100644 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/INGRASYS-S9130-32X/qos.json.j2 @@ -1,153 +1,136 @@ -{ - "TC_TO_PRIORITY_GROUP_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "MAP_PFC_PRIORITY_TO_QUEUE": { - "AZURE": { - "3": "3", - "4": "4" - } - }, - "TC_TO_QUEUE_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "DSCP_TO_TC_MAP": { - "AZURE": { - "0":"1", - "1":"0", - "2":"0", - "3":"3", - "4":"4", - "5":"0", - "6":"0", - "7":"0", - "8":"1", - "9":"0", - "10":"0", - "11":"0", - "12":"0", - "13":"0", - "14":"0", - "15":"0", - "16":"0", - "17":"0", - "18":"0", - "19":"0", - "20":"0", - "21":"0", - "22":"0", - "23":"0", - "24":"0", - "25":"0", - "26":"0", - "27":"0", - "28":"0", - "29":"0", - "30":"0", - "31":"0", - "32":"0", - "33":"0", - "34":"0", - "35":"0", - "36":"0", - "37":"0", - "38":"0", - "39":"0", - "40":"0", - "41":"0", - "42":"0", - "43":"0", - "44":"0", - "45":"0", - "46":"0", - "47":"0", - "48":"0", - "49":"0", - "50":"0", - "51":"0", - "52":"0", - "53":"0", - "54":"0", - "55":"0", - "56":"0", - "57":"0", - "58":"0", - "59":"0", - "60":"0", - "61":"0", - "62":"0", - "63":"0" - } - }, - "SCHEDULER": { - "scheduler.0" : { - "type":"DWRR", - "weight": "25" - }, - "scheduler.1" : { - "type":"DWRR", - "weight": "30" - }, - "scheduler.2" : { - "type":"DWRR", - "weight": "20" - } - }, - "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": { - "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", - "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", - "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", - "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", - "pfc_enable": "3,4" - } - }, - "WRED_PROFILE": { - "AZURE_LOSSY" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - }, - "AZURE_LOSSLESS" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - } - }, - "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : { - "scheduler" : "[SCHEDULER|scheduler.1]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : { - "scheduler" : "[SCHEDULER|scheduler.2]" - } - } -} +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + } + }, + "QUEUE": { + } +} diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml index 6b29a7eb83b..949ea6641b0 100644 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/minigraph.xml @@ -1,55 +1,6 @@ - - - OCPSCH0104001MS - 10.10.1.26 - OCPSCH01040GGLF - 10.10.1.25 - 1 - 10 - 3 - - - OCPSCH0104002MS - 10.10.2.26 - OCPSCH01040GGLF - 10.10.2.25 - 1 - 10 - 3 - - - - - 64536 - OCPSCH01040GGLF - - -
10.10.1.26
- - - - -
10.10.2.26
- - - - - - - - 64542 - OCPSCH0104001MS - - - - 64543 - OCPSCH0104002MS - - - @@ -72,18 +23,7 @@ OCPSCH01040GGLF - - - - Ethernet0 - 10.10.1.25/30 - - - - Ethernet4 - 10.10.2.25/30 - - + @@ -91,24 +31,7 @@ - - - 40000 - DeviceInterfaceLink - OCPSCH0104001MS - Ethernet24 - OCPSCH01040GGLF - Ethernet0 - - - 40000 - DeviceInterfaceLink - OCPSCH0104002MS - Ethernet24 - OCPSCH01040GGLF - Ethernet4 - - + OCPSCH01040GGLF @@ -136,11 +59,6 @@ - - ErspanDestinationIpv4 - - 2.2.2.2 - diff --git a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py index 387c8155eef..36e6095ac03 100644 --- a/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9130_32x-r0/plugins/sfputil.py @@ -185,3 +185,6 @@ def reset(self, port_num): gpio_file.close() return True + + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 new file mode 100644 index 00000000000..1083a6210fc --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..2647541197f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t0.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..2647541197f --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/buffers_defaults_t1.j2 @@ -0,0 +1,69 @@ +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '20971328' %} +{% set ingress_lossy_pool_size = '20971328' %} +{% set egress_lossless_pool_size = '20971328' %} +{% set egress_lossy_pool_size = '20971328' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 64) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "{{ ingress_lossless_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + "size": "{{ ingress_lossy_pool_size }}", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + "size": "{{ egress_lossy_pool_size }}", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "xon":"78400", + "xoff":"132160", + "size":"3584", + "static_th":"82880" + }, + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossy_pool]", + "size":"3584", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossy_pool]", + "size":"3584", + "dynamic_th":"-4" + } + }, +{%- endmacro %} + +{# the typo of generate_pg_profils dued to buffers_config.j2 #} +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_pg_profils(port_names) %} + "BUFFER_PG": { + } +{%- endmacro %} + +{# Default, we do not bind any buffer profiles. #} +{%- macro generate_queue_buffers(port_names) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini new file mode 100644 index 00000000000..d98b0eca6d1 --- /dev/null +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 3584 32256 59136 36736 + 25000 5m 3584 41216 68096 45696 + 40000 5m 3584 47488 74368 51968 + 50000 5m 3584 52864 79744 57344 + 100000 5m 3584 78400 132160 82880 + 10000 40m 3584 32256 59136 36736 + 25000 40m 3584 41216 68096 45696 + 40000 40m 3584 47488 74368 51968 + 50000 40m 3584 52864 79744 57344 + 100000 40m 3584 78400 132160 82880 + 10000 300m 3584 32256 65856 36736 + 25000 300m 3584 41216 84672 45696 + 40000 300m 3584 47488 101024 51968 + 50000 300m 3584 52864 113120 57344 + 100000 300m 3584 78400 198688 82880 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini index 18b9d933a66..d57c1f35018 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.ini @@ -1,6 +1,6 @@ # name lanes alias index -Ethernet0 4,5,6,7 Ethernet1/1 0 -Ethernet4 0,1,2,3 Ethernet2/1 1 +Ethernet0 0,1,2,3 Ethernet1/1 0 +Ethernet4 4,5,6,7 Ethernet2/1 1 Ethernet8 20,21,22,23 Ethernet3/1 2 Ethernet12 16,17,18,19 Ethernet4/1 3 Ethernet16 36,37,38,39 Ethernet5/1 4 @@ -61,5 +61,5 @@ Ethernet232 220,221,222,223 Ethernet59/1 58 Ethernet236 216,217,218,219 Ethernet60/1 59 Ethernet240 236,237,238,239 Ethernet61/1 60 Ethernet244 232,233,234,235 Ethernet62/1 61 -Ethernet248 252,253,254,255 Ethernet63/1 62 -Ethernet252 248,249,250,251 Ethernet64/1 63 +Ethernet248 248,249,250,251 Ethernet63/1 62 +Ethernet252 252,253,254,255 Ethernet64/1 63 \ No newline at end of file diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps index 4f86c1c4423..0e14b9ced3f 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/port_config.nps @@ -1,864 +1,681 @@ -init start stage unit=0 low-level -init set port-map unit=0 port=0 eth-macro=1 lane=0 max-speed=100g active=true -init set port-map unit=0 port=1 eth-macro=0 lane=0 max-speed=100g active=true -init set port-map unit=0 port=2 eth-macro=5 lane=0 max-speed=100g active=true -init set port-map unit=0 port=3 eth-macro=4 lane=0 max-speed=100g active=true -init set port-map unit=0 port=4 eth-macro=9 lane=0 max-speed=100g active=true -init set port-map unit=0 port=5 eth-macro=8 lane=0 max-speed=100g active=true -init set port-map unit=0 port=6 eth-macro=13 lane=0 max-speed=100g active=true -init set port-map unit=0 port=7 eth-macro=12 lane=0 max-speed=100g active=true -init set port-map unit=0 port=8 eth-macro=17 lane=0 max-speed=100g active=true -init set port-map unit=0 port=9 eth-macro=16 lane=0 max-speed=100g active=true -init set port-map unit=0 port=10 eth-macro=21 lane=0 max-speed=100g active=true -init set port-map unit=0 port=11 eth-macro=20 lane=0 max-speed=100g active=true -init set port-map unit=0 port=12 eth-macro=25 lane=0 max-speed=100g active=true -init set port-map unit=0 port=13 eth-macro=24 lane=0 max-speed=100g active=true -init set port-map unit=0 port=14 eth-macro=29 lane=0 max-speed=100g active=true -init set port-map unit=0 port=15 eth-macro=28 lane=0 max-speed=100g active=true -init set port-map unit=0 port=16 eth-macro=33 lane=0 max-speed=100g active=true -init set port-map unit=0 port=17 eth-macro=32 lane=0 max-speed=100g active=true -init set port-map unit=0 port=18 eth-macro=37 lane=0 max-speed=100g active=true -init set port-map unit=0 port=19 eth-macro=36 lane=0 max-speed=100g active=true -init set port-map unit=0 port=20 eth-macro=41 lane=0 max-speed=100g active=true -init set port-map unit=0 port=21 eth-macro=40 lane=0 max-speed=100g active=true -init set port-map unit=0 port=22 eth-macro=45 lane=0 max-speed=100g active=true -init set port-map unit=0 port=23 eth-macro=44 lane=0 max-speed=100g active=true -init set port-map unit=0 port=24 eth-macro=49 lane=0 max-speed=100g active=true -init set port-map unit=0 port=25 eth-macro=48 lane=0 max-speed=100g active=true -init set port-map unit=0 port=26 eth-macro=53 lane=0 max-speed=100g active=true -init set port-map unit=0 port=27 eth-macro=52 lane=0 max-speed=100g active=true -init set port-map unit=0 port=28 eth-macro=57 lane=0 max-speed=100g active=true -init set port-map unit=0 port=29 eth-macro=56 lane=0 max-speed=100g active=true -init set port-map unit=0 port=30 eth-macro=61 lane=0 max-speed=100g active=true -init set port-map unit=0 port=31 eth-macro=60 lane=0 max-speed=100g active=true -init set port-map unit=0 port=32 eth-macro=3 lane=0 max-speed=100g active=true -init set port-map unit=0 port=33 eth-macro=2 lane=0 max-speed=100g active=true -init set port-map unit=0 port=34 eth-macro=7 lane=0 max-speed=100g active=true -init set port-map unit=0 port=35 eth-macro=6 lane=0 max-speed=100g active=true -init set port-map unit=0 port=36 eth-macro=11 lane=0 max-speed=100g active=true -init set port-map unit=0 port=37 eth-macro=10 lane=0 max-speed=100g active=true -init set port-map unit=0 port=38 eth-macro=15 lane=0 max-speed=100g active=true -init set port-map unit=0 port=39 eth-macro=14 lane=0 max-speed=100g active=true -init set port-map unit=0 port=40 eth-macro=19 lane=0 max-speed=100g active=true -init set port-map unit=0 port=41 eth-macro=18 lane=0 max-speed=100g active=true -init set port-map unit=0 port=42 eth-macro=23 lane=0 max-speed=100g active=true -init set port-map unit=0 port=43 eth-macro=22 lane=0 max-speed=100g active=true -init set port-map unit=0 port=44 eth-macro=27 lane=0 max-speed=100g active=true -init set port-map unit=0 port=45 eth-macro=26 lane=0 max-speed=100g active=true -init set port-map unit=0 port=46 eth-macro=31 lane=0 max-speed=100g active=true -init set port-map unit=0 port=47 eth-macro=30 lane=0 max-speed=100g active=true -init set port-map unit=0 port=48 eth-macro=35 lane=0 max-speed=100g active=true -init set port-map unit=0 port=49 eth-macro=34 lane=0 max-speed=100g active=true -init set port-map unit=0 port=50 eth-macro=39 lane=0 max-speed=100g active=true -init set port-map unit=0 port=51 eth-macro=38 lane=0 max-speed=100g active=true -init set port-map unit=0 port=52 eth-macro=43 lane=0 max-speed=100g active=true -init set port-map unit=0 port=53 eth-macro=42 lane=0 max-speed=100g active=true -init set port-map unit=0 port=54 eth-macro=47 lane=0 max-speed=100g active=true -init set port-map unit=0 port=55 eth-macro=46 lane=0 max-speed=100g active=true -init set port-map unit=0 port=56 eth-macro=51 lane=0 max-speed=100g active=true -init set port-map unit=0 port=57 eth-macro=50 lane=0 max-speed=100g active=true -init set port-map unit=0 port=58 eth-macro=55 lane=0 max-speed=100g active=true -init set port-map unit=0 port=59 eth-macro=54 lane=0 max-speed=100g active=true -init set port-map unit=0 port=60 eth-macro=59 lane=0 max-speed=100g active=true -init set port-map unit=0 port=61 eth-macro=58 lane=0 max-speed=100g active=true -init set port-map unit=0 port=62 eth-macro=63 lane=0 max-speed=100g active=true -init set port-map unit=0 port=63 eth-macro=62 lane=0 max-speed=100g active=true -init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true -init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true -init start stage unit=0 task-rsrc -init start stage unit=0 module -init start stage unit=0 task -phy set lane-swap unit=0 portlist=0 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=1 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=2 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=3 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=4 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=5 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=6 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=7 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=8 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=9 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=10 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=11 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=12 lane-cnt=4 property=tx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=13 lane-cnt=4 property=tx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=14 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=15 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=16 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=17 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=18 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=19 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=20 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=21 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=22 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=23 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=24 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=25 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=26 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=27 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=28 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=29 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=30 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=31 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=32 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=33 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=34 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=35 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=36 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=37 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=38 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=39 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=40 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=41 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=42 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=43 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=44 lane-cnt=4 property=tx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=45 lane-cnt=4 property=tx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=46 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=47 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=56 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=57 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=58 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=59 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=60 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=61 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=62 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=63 lane-cnt=4 property=tx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=tx data=0x1 -phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 -phy set lane-swap unit=0 portlist=0 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=1 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=2 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=3 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=4 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=5 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=6 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=7 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=8 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=9 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=10 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=11 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=12 lane-cnt=4 property=rx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=13 lane-cnt=4 property=rx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=14 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=15 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=16 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=17 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=18 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=19 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=20 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=21 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=22 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=23 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=24 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=25 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=26 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=27 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=28 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=29 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=30 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=31 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=32 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=33 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=34 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=35 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=36 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=37 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=38 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=39 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=40 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=41 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=42 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=43 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=44 lane-cnt=4 property=rx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=45 lane-cnt=4 property=rx data=0x3.2.1.0 -phy set lane-swap unit=0 portlist=46 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=47 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=54 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=55 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=56 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=57 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=58 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=59 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=60 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=61 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=62 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=63 lane-cnt=4 property=rx data=0x0.1.2.3 -phy set lane-swap unit=0 portlist=129 lane-cnt=1 property=rx data=0x1 -phy set lane-swap unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 -phy set polarity-rev unit=0 portlist=0 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=1 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=2 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=3 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=4 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=5 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=6 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=7 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=8 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=9 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=10 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=11 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=12 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=13 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=14 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=15 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=16 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=17 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=18 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=19 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=20 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=21 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=22 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=23 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=24 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=25 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=26 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=27 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=28 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=29 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=30 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=31 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=32 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=33 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=34 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=35 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=36 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=37 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=38 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=39 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=40 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=41 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=42 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=43 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=44 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=45 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=46 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=47 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=54 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=55 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=56 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=57 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=58 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=59 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=60 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=61 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=62 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=63 lane-cnt=4 property=tx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=tx data=0x0 -phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=tx data=0x0 -phy set polarity-rev unit=0 portlist=0 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=1 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=2 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=3 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=4 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=5 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=6 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=7 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=8 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=9 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=10 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=11 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=12 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=13 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=14 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=15 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=16 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=17 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=18 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=19 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=20 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=21 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=22 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=23 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=24 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=25 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=26 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=27 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=28 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=29 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=30 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=31 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=32 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=33 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=34 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=35 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=36 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=37 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=38 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=39 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=40 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=41 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=42 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=43 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=44 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=45 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=46 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=47 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=54 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=55 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=56 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=57 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=58 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=59 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=60 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=61 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=62 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=63 lane-cnt=4 property=rx data=0x0.0.0.0 -phy set polarity-rev unit=0 portlist=129 lane-cnt=1 property=rx data=0x0 -phy set polarity-rev unit=0 portlist=130 lane-cnt=1 property=rx data=0x0 -phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=0 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=1 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=2 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=3 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=4 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=5 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=6 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=7 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=8 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=9 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=10 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=11 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=12 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=13 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=14 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=15 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=16 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=17 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=18 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=19 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=20 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=21 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=22 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c -phy set pre-emphasis unit=0 portlist=23 lane-cnt=4 property=c1 data=0x4.4.4.4 -phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=24 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=25 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=26 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=27 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=28 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=29 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=30 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=31 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=32 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=33 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=33 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=33 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=33 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=34 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=34 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=34 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=34 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=35 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=35 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=35 lane-cnt=4 property=c0 data=0x19.19.19.19 -phy set pre-emphasis unit=0 portlist=35 lane-cnt=4 property=c1 data=0x7.7.7.7 -phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=36 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=37 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=37 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=37 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a -phy set pre-emphasis unit=0 portlist=37 lane-cnt=4 property=c1 data=0x6.6.6.6 -phy set pre-emphasis unit=0 portlist=38 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=38 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=38 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=38 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=39 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=39 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=39 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=39 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=40 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=41 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=41 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=41 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b -phy set pre-emphasis unit=0 portlist=41 lane-cnt=4 property=c1 data=0x5.5.5.5 -phy set pre-emphasis unit=0 portlist=42 lane-cnt=4 property=c2 data=0x1.1.1.1 -phy set pre-emphasis unit=0 portlist=42 lane-cnt=4 property=cn1 data=0x3.3.3.3 -phy set pre-emphasis unit=0 portlist=42 lane-cnt=4 property=c0 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portlist=26 admin=enable -port set property unit=0 portlist=27 admin=enable -port set property unit=0 portlist=28 admin=enable -port set property unit=0 portlist=29 admin=enable -port set property unit=0 portlist=30 admin=enable -port set property unit=0 portlist=31 admin=enable -port set property unit=0 portlist=32 admin=enable -port set property unit=0 portlist=33 admin=enable -port set property unit=0 portlist=34 admin=enable -port set property unit=0 portlist=35 admin=enable -port set property unit=0 portlist=36 admin=enable -port set property unit=0 portlist=37 admin=enable -port set property unit=0 portlist=38 admin=enable -port set property unit=0 portlist=39 admin=enable -port set property unit=0 portlist=40 admin=enable -port set property unit=0 portlist=41 admin=enable -port set property unit=0 portlist=42 admin=enable -port set property unit=0 portlist=43 admin=enable -port set property unit=0 portlist=44 admin=enable -port set property unit=0 portlist=45 admin=enable -port set property unit=0 portlist=46 admin=enable -port set property unit=0 portlist=47 admin=enable -port set property unit=0 portlist=48 admin=enable -port set property unit=0 portlist=49 admin=enable -port set property unit=0 portlist=50 admin=enable -port set property unit=0 portlist=51 admin=enable -port set property unit=0 portlist=52 admin=enable -port set property unit=0 portlist=53 admin=enable -port set property unit=0 portlist=54 admin=enable -port set property unit=0 portlist=55 admin=enable -port set property unit=0 portlist=56 admin=enable -port set property unit=0 portlist=57 admin=enable -port set property unit=0 portlist=58 admin=enable -port set property unit=0 portlist=59 admin=enable -port set property unit=0 portlist=60 admin=enable -port set property unit=0 portlist=61 admin=enable -port set property unit=0 portlist=62 admin=enable -port set property unit=0 portlist=63 admin=enable -port set property unit=0 portlist=129 admin=enable -port set property unit=0 portlist=130 admin=enable +init start stage low-level +init set port-map port=0 eth-macro=0 lane=0 max-speed=100g active=true +init set port-map port=1 eth-macro=1 lane=0 max-speed=100g active=true +init set port-map port=2 eth-macro=5 lane=0 max-speed=100g active=true +init set port-map port=3 eth-macro=4 lane=0 max-speed=100g active=true +init set port-map port=4 eth-macro=9 lane=0 max-speed=100g active=true +init set port-map port=5 eth-macro=8 lane=0 max-speed=100g active=true +init set port-map port=6 eth-macro=13 lane=0 max-speed=100g active=true +init set port-map port=7 eth-macro=12 lane=0 max-speed=100g active=true +init set port-map port=8 eth-macro=17 lane=0 max-speed=100g active=true +init set port-map port=9 eth-macro=16 lane=0 max-speed=100g active=true +init set port-map port=10 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map port=11 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map port=12 eth-macro=25 lane=0 max-speed=100g active=true +init set port-map port=13 eth-macro=24 lane=0 max-speed=100g active=true +init set port-map port=14 eth-macro=29 lane=0 max-speed=100g active=true +init set port-map port=15 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map port=16 eth-macro=33 lane=0 max-speed=100g active=true +init set port-map port=17 eth-macro=32 lane=0 max-speed=100g active=true +init set port-map port=18 eth-macro=37 lane=0 max-speed=100g active=true +init set port-map port=19 eth-macro=36 lane=0 max-speed=100g active=true +init set port-map port=20 eth-macro=41 lane=0 max-speed=100g active=true +init set port-map port=21 eth-macro=40 lane=0 max-speed=100g active=true +init set port-map port=22 eth-macro=45 lane=0 max-speed=100g active=true +init set port-map port=23 eth-macro=44 lane=0 max-speed=100g active=true +init set port-map port=24 eth-macro=49 lane=0 max-speed=100g active=true +init set port-map port=25 eth-macro=48 lane=0 max-speed=100g active=true +init set port-map port=26 eth-macro=53 lane=0 max-speed=100g active=true +init set port-map port=27 eth-macro=52 lane=0 max-speed=100g active=true +init set port-map port=28 eth-macro=57 lane=0 max-speed=100g active=true +init set port-map port=29 eth-macro=56 lane=0 max-speed=100g active=true +init set port-map port=30 eth-macro=61 lane=0 max-speed=100g active=true +init set port-map port=31 eth-macro=60 lane=0 max-speed=100g active=true +init set port-map port=32 eth-macro=3 lane=0 max-speed=100g active=true +init set port-map port=33 eth-macro=2 lane=0 max-speed=100g active=true +init set port-map port=34 eth-macro=7 lane=0 max-speed=100g active=true +init set port-map port=35 eth-macro=6 lane=0 max-speed=100g active=true +init set port-map port=36 eth-macro=11 lane=0 max-speed=100g active=true +init set port-map port=37 eth-macro=10 lane=0 max-speed=100g active=true +init set port-map port=38 eth-macro=15 lane=0 max-speed=100g active=true +init set port-map port=39 eth-macro=14 lane=0 max-speed=100g active=true +init set port-map port=40 eth-macro=19 lane=0 max-speed=100g active=true +init set port-map port=41 eth-macro=18 lane=0 max-speed=100g active=true +init set port-map port=42 eth-macro=23 lane=0 max-speed=100g active=true +init set port-map port=43 eth-macro=22 lane=0 max-speed=100g active=true +init set port-map port=44 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map port=45 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map port=46 eth-macro=31 lane=0 max-speed=100g active=true +init set port-map port=47 eth-macro=30 lane=0 max-speed=100g active=true +init set port-map port=48 eth-macro=35 lane=0 max-speed=100g active=true +init set port-map port=49 eth-macro=34 lane=0 max-speed=100g active=true +init set port-map port=50 eth-macro=39 lane=0 max-speed=100g active=true +init set port-map port=51 eth-macro=38 lane=0 max-speed=100g active=true +init set port-map port=52 eth-macro=43 lane=0 max-speed=100g active=true +init set port-map port=53 eth-macro=42 lane=0 max-speed=100g active=true +init set port-map port=54 eth-macro=47 lane=0 max-speed=100g active=true +init set port-map port=55 eth-macro=46 lane=0 max-speed=100g active=true +init set port-map port=56 eth-macro=51 lane=0 max-speed=100g active=true +init set port-map port=57 eth-macro=50 lane=0 max-speed=100g active=true +init set port-map port=58 eth-macro=55 lane=0 max-speed=100g active=true +init set port-map port=59 eth-macro=54 lane=0 max-speed=100g active=true +init set port-map port=60 eth-macro=59 lane=0 max-speed=100g active=true +init set port-map port=61 eth-macro=58 lane=0 max-speed=100g active=true +init set port-map port=62 eth-macro=62 lane=0 max-speed=100g active=true +init set port-map port=63 eth-macro=63 lane=0 max-speed=100g active=true +init set port-map port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true +init set port-map port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true + +init start stage task-rsrc +init start stage module +init start stage task + +phy set lane-swap portlist=0 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap portlist=1 lane-cnt=4 property=tx data=0x2.1.3.0 +phy set lane-swap portlist=2 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=3 lane-cnt=4 property=tx data=0x2.3.0.1 +phy set lane-swap portlist=4 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=5 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=6 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=7 lane-cnt=4 property=tx data=0x1.0.2.3 +phy set lane-swap portlist=8 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=9 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=10 lane-cnt=4 property=tx data=0x0.3.2.1 +phy set lane-swap portlist=11 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=12 lane-cnt=4 property=tx data=0x3.2.0.1 +phy set lane-swap portlist=13 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=14 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=15 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=16 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=17 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=18 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=19 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=20 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=21 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=22 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=23 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=24 lane-cnt=4 property=tx data=0x0.3.2.1 +phy set lane-swap portlist=25 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=26 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=27 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=28 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=29 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=30 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=31 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=32 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=33 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=34 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=35 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=36 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=37 lane-cnt=4 property=tx data=0x3.1.0.2 +phy set lane-swap portlist=38 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=39 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=40 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=41 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=42 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=43 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=44 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=45 lane-cnt=4 property=tx data=0x3.2.1.0 +phy set lane-swap portlist=46 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=47 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=54 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=55 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=56 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=57 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=58 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=59 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=60 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=61 lane-cnt=4 property=tx data=0x0.1.2.3 +phy set lane-swap portlist=62 lane-cnt=4 property=tx data=0x1.0.2.3 +phy set lane-swap portlist=63 lane-cnt=4 property=tx data=0x3.1.0.2 +phy set lane-swap portlist=129 lane-cnt=1 property=tx data=0x1 +phy set lane-swap portlist=130 lane-cnt=1 property=tx data=0x0 +phy set lane-swap portlist=0 lane-cnt=4 property=rx data=0x2.0.3.1 +phy set lane-swap portlist=1 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=2 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=3 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=4 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=5 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=6 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=7 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=8 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=9 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=10 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=11 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=12 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=13 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=14 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=15 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=16 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=17 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=18 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=19 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=20 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=21 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=22 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=23 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=24 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=25 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=26 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=27 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=28 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=29 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=30 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=31 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=32 lane-cnt=4 property=rx data=0x0.2.1.3 +phy set lane-swap portlist=33 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=34 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=35 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=36 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=37 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=38 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=39 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=40 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=41 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=42 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=43 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=44 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=45 lane-cnt=4 property=rx data=0x3.2.1.0 +phy set lane-swap portlist=46 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=47 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=54 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=55 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=56 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=57 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=58 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=59 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=60 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=61 lane-cnt=4 property=rx data=0x0.1.2.3 +phy set lane-swap portlist=62 lane-cnt=4 property=rx data=0x1.3.0.2 +phy set lane-swap portlist=63 lane-cnt=4 property=rx data=0x3.1.2.0 +phy set lane-swap portlist=129 lane-cnt=1 property=rx data=0x1 +phy set lane-swap portlist=130 lane-cnt=1 property=rx data=0x0 + +phy set polarity-rev portlist=0 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=1 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=2 lane-cnt=4 property=tx data=0x1.0.0.1 +phy set polarity-rev portlist=3 lane-cnt=4 property=tx data=0x1.1.1.1 +phy set polarity-rev portlist=4 lane-cnt=4 property=tx data=0x0.1.0.1 +phy set polarity-rev portlist=5 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=6 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=7 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=8 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=9 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=10 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=11 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=12 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=13 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=14 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=15 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=16 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=17 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=18 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=19 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=20 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=21 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=22 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=23 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=24 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=25 lane-cnt=4 property=tx data=0x1.0.0.1 +phy set polarity-rev portlist=26 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=27 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=28 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=29 lane-cnt=4 property=tx data=0x0.1.0.0 +phy set polarity-rev portlist=30 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=31 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=32 lane-cnt=4 property=tx data=0x0.1.1.1 +phy set polarity-rev portlist=33 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=34 lane-cnt=4 property=tx data=0x0.1.1.1 +phy set polarity-rev portlist=35 lane-cnt=4 property=tx data=0x1.0.0.0 +phy set polarity-rev portlist=36 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=37 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=38 lane-cnt=4 property=tx data=0x0.1.1.0 +phy set polarity-rev portlist=39 lane-cnt=4 property=tx data=0x1.0.1.0 +phy set polarity-rev portlist=40 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=41 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=42 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=43 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=44 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=45 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=46 lane-cnt=4 property=tx data=0x0.0.0.1 +phy set polarity-rev portlist=47 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=54 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=55 lane-cnt=4 property=tx data=0x0.0.1.1 +phy set polarity-rev portlist=56 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=57 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=58 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=59 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=60 lane-cnt=4 property=tx data=0x0.1.0.1 +phy set polarity-rev portlist=61 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=62 lane-cnt=4 property=tx data=0x0.0.0.0 +phy set polarity-rev portlist=63 lane-cnt=4 property=tx data=0x0.0.1.0 +phy set polarity-rev portlist=129 lane-cnt=1 property=tx data=0x0 +phy set polarity-rev portlist=130 lane-cnt=1 property=tx data=0x0 + +phy set polarity-rev portlist=0 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=1 lane-cnt=4 property=rx data=0x1.0.0.0 +phy set polarity-rev portlist=2 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=3 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=4 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=5 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=6 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=7 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=8 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=9 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=10 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=11 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=12 lane-cnt=4 property=rx data=0x1.0.0.0 +phy set polarity-rev portlist=13 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=14 lane-cnt=4 property=rx data=0x0.0.0.0 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data=0x0.0.0.1 +phy set polarity-rev portlist=29 lane-cnt=4 property=rx data=0x1.0.1.0 +phy set polarity-rev portlist=30 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=31 lane-cnt=4 property=rx data=0x1.1.0.0 +phy set polarity-rev portlist=32 lane-cnt=4 property=rx data=0x0.1.1.1 +phy set polarity-rev portlist=33 lane-cnt=4 property=rx data=0x1.1.1.0 +phy set polarity-rev portlist=34 lane-cnt=4 property=rx data=0x0.0.1.1 +phy set polarity-rev portlist=35 lane-cnt=4 property=rx data=0x0.0.1.0 +phy set polarity-rev portlist=36 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=37 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=38 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=39 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=40 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=41 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=42 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=43 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=44 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=45 lane-cnt=4 property=rx data=0x0.1.0.1 +phy set polarity-rev portlist=46 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=47 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=54 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=55 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=56 lane-cnt=4 property=rx data=0x0.1.0.0 +phy set polarity-rev portlist=57 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=58 lane-cnt=4 property=rx data=0x0.1.0.0 +phy set polarity-rev portlist=59 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=60 lane-cnt=4 property=rx data=0x0.0.0.1 +phy set polarity-rev portlist=61 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=62 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=63 lane-cnt=4 property=rx data=0x0.0.0.0 +phy set polarity-rev portlist=129 lane-cnt=1 property=rx data=0x0 +phy set polarity-rev portlist=130 lane-cnt=1 property=rx data=0x0 + +phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x19.19.18.19 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=1 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=1 lane-cnt=4 property=c0 data=0x19.18.19.19 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c1 data=0x08.08.09.09 +phy set pre-emphasis portlist=2 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=2 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c1 data=0x08.08.09.08 +phy set pre-emphasis portlist=3 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=3 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x06.07.07.08 +phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x03.02.02.02 +phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x19.19.18.19 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=5 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=5 lane-cnt=4 property=c0 data=0x19.19.18.18 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c1 data=0x06.06.06.07 +phy set pre-emphasis portlist=6 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=6 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=7 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=7 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=9 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=9 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=10 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=10 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=11 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=11 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=13 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=13 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c1 data=0x04.05.04.05 +phy set pre-emphasis portlist=14 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=14 lane-cnt=4 property=c0 data=0x18.17.18.17 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c1 data=0x06.05.06.06 +phy set pre-emphasis portlist=15 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=15 lane-cnt=4 property=c0 data=0x16.17.16.16 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x05.06.06.06 +phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x17.18.18.16 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c1 data=0x04.04.04.04 +phy set pre-emphasis portlist=17 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=17 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=18 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=18 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=19 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=19 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=21 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=21 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=22 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=22 lane-cnt=4 property=c0 data=0x17.17.18.17 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=23 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=23 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=25 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=25 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c1 data=0x08.08.07.07 +phy set pre-emphasis portlist=26 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=26 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=27 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=27 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=29 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=29 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c1 data=0x08.09.09.09 +phy set pre-emphasis portlist=30 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=30 lane-cnt=4 property=c0 data=0x18.19.19.19 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=31 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=31 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c1 data=0x08.09.09.09 +phy set pre-emphasis portlist=33 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=33 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c1 data=0x08.07.08.08 +phy set pre-emphasis portlist=34 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=34 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c1 data=0x08.08.07.08 +phy set pre-emphasis portlist=35 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=35 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x01.02.02.02 +phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x19.18.18.18 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c1 data=0x06.06.06.07 +phy set pre-emphasis portlist=37 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=37 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c1 data=0x06.06.05.06 +phy set pre-emphasis portlist=38 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=38 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c1 data=0x06.07.06.06 +phy set pre-emphasis portlist=39 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=39 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c1 data=0x05.06.05.05 +phy set pre-emphasis portlist=41 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=41 lane-cnt=4 property=c0 data=0x16.17.18.18 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=42 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=42 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c1 data=0x06.05.05.05 +phy set pre-emphasis portlist=43 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=43 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x17.17.17.17 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c1 data=0x05.05.04.05 +phy set pre-emphasis portlist=45 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=45 lane-cnt=4 property=c0 data=0x17.17.18.17 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c1 data=0x05.05.06.06 +phy set pre-emphasis portlist=46 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=46 lane-cnt=4 property=c0 data=0x17.17.16.16 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c1 data=0x05.05.06.06 +phy set pre-emphasis portlist=47 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=47 lane-cnt=4 property=c0 data=0x17.17.16.16 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x05.05.05.05 +phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x16.16.16.16 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x06.06.05.05 +phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x16.17.17.17 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=54 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=54 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis portlist=55 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=55 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=56 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=56 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis portlist=57 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=57 lane-cnt=4 property=c0 data=0x18.18.18.18 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=58 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=58 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c1 data=0x08.08.08.08 +phy set pre-emphasis portlist=59 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=59 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=60 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=60 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=61 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=61 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=62 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=62 lane-cnt=4 property=c0 data=0x19.19.19.19 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c2 data=0x00.00.00.00 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c1 data=0x09.09.09.09 +phy set pre-emphasis portlist=63 lane-cnt=4 property=cn1 data=0x02.02.02.02 +phy set pre-emphasis portlist=63 lane-cnt=4 property=c0 data=0x19.19.19.19 + +phy set pre-emphasis portlist=129 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis portlist=129 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis portlist=129 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis portlist=129 lane-cnt=1 property=c1 data=0x03 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c2 data=0x01 +phy set pre-emphasis portlist=130 lane-cnt=1 property=cn1 data=0x01 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c0 data=0x02 +phy set pre-emphasis portlist=130 lane-cnt=1 property=c1 data=0x03 + +phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=54 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=55 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=56 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=57 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=58 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=59 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=60 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=61 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=62 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=63 devad=0x1E addr=0x2 data=0x8000 +phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000 +phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000 + +port set property portlist=0-63 speed=100g +port set property portlist=129-130 speed=10g +port set property portlist=0-63 medium-type=sr4 +port set property portlist=129-130 medium-type=kr +port set property portlist=0-63 fec=disable +port set adver portlist=129-130 speed-10g-kr +port set property portlist=129-130 an=enable + +port set property portlist=0-63,129-130 admin=enable diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 index 434226afca7..42eef17c362 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/INGRASYS-S9230-64X/qos.json.j2 @@ -1,153 +1,136 @@ -{ - "TC_TO_PRIORITY_GROUP_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "MAP_PFC_PRIORITY_TO_QUEUE": { - "AZURE": { - "3": "3", - "4": "4" - } - }, - "TC_TO_QUEUE_MAP": { - "AZURE": { - "0": "1", - "1": "0", - "3": "3", - "4": "4" - } - }, - "DSCP_TO_TC_MAP": { - "AZURE": { - "0":"1", - "1":"0", - "2":"0", - "3":"3", - "4":"4", - "5":"0", - "6":"0", - "7":"0", - "8":"1", - "9":"0", - "10":"0", - "11":"0", - "12":"0", - "13":"0", - "14":"0", - "15":"0", - "16":"0", - "17":"0", - "18":"0", - "19":"0", - "20":"0", - "21":"0", - "22":"0", - "23":"0", - "24":"0", - "25":"0", - "26":"0", - "27":"0", - "28":"0", - "29":"0", - "30":"0", - "31":"0", - "32":"0", - "33":"0", - "34":"0", - "35":"0", - "36":"0", - "37":"0", - "38":"0", - "39":"0", - "40":"0", - "41":"0", - "42":"0", - "43":"0", - "44":"0", - "45":"0", - "46":"0", - "47":"0", - "48":"0", - "49":"0", - "50":"0", - "51":"0", - "52":"0", - "53":"0", - "54":"0", - "55":"0", - "56":"0", - "57":"0", - "58":"0", - "59":"0", - "60":"0", - "61":"0", - "62":"0", - "63":"0" - } - }, - "SCHEDULER": { - "scheduler.0" : { - "type":"DWRR", - "weight": "25" - }, - "scheduler.1" : { - "type":"DWRR", - "weight": "30" - }, - "scheduler.2" : { - "type":"DWRR", - "weight": "20" - } - }, - "PORT_QOS_MAP": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252": { - "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", - "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", - "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", - "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", - "pfc_enable": "3,4" - } - }, - "WRED_PROFILE": { - "AZURE_LOSSY" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - }, - "AZURE_LOSSLESS" : { - "wred_green_enable":"true", - "wred_yellow_enable":"true", - "wred_red_enable":"true", - "ecn":"ecn_all", - "red_max_threshold":"516096", - "red_min_threshold":"516096", - "yellow_max_threshold":"516096", - "yellow_min_threshold":"516096", - "green_max_threshold": "184128", - "green_min_threshold": "184128" - } - }, - "QUEUE": { - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|3-4" : { - "scheduler" : "[SCHEDULER|scheduler.0]", - "wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|0" : { - "scheduler" : "[SCHEDULER|scheduler.1]" - }, - "Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|1" : { - "scheduler" : "[SCHEDULER|scheduler.2]" - } - } -} +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "3": "3", + "4": "4" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "1", + "1": "0", + "3": "3", + "4": "4" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"1", + "1":"0", + "2":"0", + "3":"3", + "4":"4", + "5":"0", + "6":"0", + "7":"0", + "8":"1", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "SCHEDULER": { + "scheduler.0" : { + "type":"DWRR", + "weight": "25" + }, + "scheduler.1" : { + "type":"DWRR", + "weight": "30" + }, + "scheduler.2" : { + "type":"DWRR", + "weight": "20" + } + }, + "PORT_QOS_MAP": { + }, + "WRED_PROFILE": { + "AZURE_LOSSY" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + }, + "AZURE_LOSSLESS" : { + "wred_green_enable":"true", + "wred_yellow_enable":"true", + "wred_red_enable":"true", + "ecn":"ecn_all", + "red_max_threshold":"516096", + "red_min_threshold":"516096", + "yellow_max_threshold":"516096", + "yellow_min_threshold":"516096", + "green_max_threshold": "184128", + "green_min_threshold": "184128" + } + }, + "QUEUE": { + } +} diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps index fc640e0d78f..717d3303f17 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/led_proc_init.nps @@ -1,7 +1,7 @@ #unit NPS_CFG_TYPE_XXX param0 param1 value #---- ---------------- ------ ------ ----- 0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 -0 NPS_CFG_TYPE_LED_CFG 0 0 2 +0 NPS_CFG_TYPE_LED_CFG 0 0 6 0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 diff --git a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py index 70e5ebff403..2f7a5395bb4 100644 --- a/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py +++ b/device/ingrasys/x86_64-ingrasys_s9230_64x-r0/plugins/sfputil.py @@ -291,3 +291,5 @@ def reset(self, port_num): return True + def get_transceiver_change_event(self, timeout=0): + raise NotImplementedError diff --git a/platform/nephos/sai.mk b/platform/nephos/sai.mk index 9bb04931ef9..aa9004ccc00 100644 --- a/platform/nephos/sai.mk +++ b/platform/nephos/sai.mk @@ -1,9 +1,12 @@ -NEPHOS_SAI = libsainps_2.0.3_sai_1.3.0_3147dc_amd64.deb -$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_2.0.3_sai_1.3.0_3147dc_amd64.deb" +SDK_VERSION = 2.0.5 +SAI_VERSION = 1.3.0 +SAI_COMMIT_ID = f32310 +NEPHOS_SAI = libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb +$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb" -NEPHOS_SAI_DEV = libsainps-dev_2.0.3_sai_1.3.0_3147dc_amd64.deb +NEPHOS_SAI_DEV = libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb $(eval $(call add_derived_package,$(NEPHOS_SAI),$(NEPHOS_SAI_DEV))) -$(NEPHOS_SAI_DEV)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps-dev_2.0.3_sai_1.3.0_3147dc_amd64.deb" +$(NEPHOS_SAI_DEV)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb" SONIC_ONLINE_DEBS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) $(NEPHOS_SAI_DEV)_DEPENDS += $(NEPHOS_SAI) diff --git a/platform/nephos/sdk.mk b/platform/nephos/sdk.mk index ce574874524..abc1178575c 100644 --- a/platform/nephos/sdk.mk +++ b/platform/nephos/sdk.mk @@ -1,4 +1,7 @@ -NEPHOS_NPS_KERNEL = nps-modules-3.16.0-5_2.0.3_3147dc_amd64.deb -$(NEPHOS_NPS_KERNEL)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/nps-modules-3.16.0-5_2.0.3_3147dc_amd64.deb" +SDK_VERSION = 2.0.5 +LINUX_VER = 3.16.0-5 +SDK_COMMIT_ID = 674332 +NEPHOS_NPS_KERNEL = nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb +$(NEPHOS_NPS_KERNEL)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb" SONIC_ONLINE_DEBS += $(NEPHOS_NPS_KERNEL) diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c index 4fd1b91e26d..f5159c8f166 100644 --- a/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/modules/x86-64-accton-as7116-54x-fan.c @@ -109,7 +109,17 @@ enum sysfs_fan_attributes { FAN2_REAR_FAULT, FAN3_REAR_FAULT, FAN4_REAR_FAULT, - FAN5_REAR_FAULT + FAN5_REAR_FAULT, + FAN1_INPUT, /* FAN1_FRONT_SPEED_RPM, */ + FAN2_INPUT, /* FAN2_FRONT_SPEED_RPM, */ + FAN3_INPUT, /* FAN3_FRONT_SPEED_RPM, */ + FAN4_INPUT, /* FAN4_FRONT_SPEED_RPM, */ + FAN5_INPUT, /* FAN5_FRONT_SPEED_RPM, */ + FAN6_INPUT, /* FAN1_REAR_SPEED_RPM, */ + FAN7_INPUT, /* FAN2_REAR_SPEED_RPM, */ + FAN8_INPUT, /* FAN3_REAR_SPEED_RPM, */ + FAN9_INPUT, /* FAN4_REAR_SPEED_RPM, */ + FAN10_INPUT, /* FAN5_REAR_SPEED_RPM */ }; /* Define attributes @@ -138,6 +148,10 @@ enum sysfs_fan_attributes { #define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr +#define DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(index) \ + static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_INPUT) +#define DECLARE_FAN_INPUT_ATTR(index) &sensor_dev_attr_fan##index##_input.dev_attr.attr + /* 6 fan fault attributes in this platform */ DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1); DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2); @@ -165,6 +179,19 @@ DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5); /* 1 fan duty cycle attribute in this platform */ DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); +/* fan input attributes in this platform */ +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(1); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(2); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(3); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(4); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(5); + +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(6); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(7); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(8); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(9); +DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(10); + static struct attribute *as7116_54x_fan_attributes[] = { /* fan related attributes */ DECLARE_FAN_FAULT_ATTR(1), @@ -188,6 +215,16 @@ static struct attribute *as7116_54x_fan_attributes[] = { DECLARE_FAN_DIRECTION_ATTR(4), DECLARE_FAN_DIRECTION_ATTR(5), DECLARE_FAN_DUTY_CYCLE_ATTR(), + DECLARE_FAN_INPUT_ATTR(1), + DECLARE_FAN_INPUT_ATTR(2), + DECLARE_FAN_INPUT_ATTR(3), + DECLARE_FAN_INPUT_ATTR(4), + DECLARE_FAN_INPUT_ATTR(5), + DECLARE_FAN_INPUT_ATTR(6), + DECLARE_FAN_INPUT_ATTR(7), + DECLARE_FAN_INPUT_ATTR(8), + DECLARE_FAN_INPUT_ATTR(9), + DECLARE_FAN_INPUT_ATTR(10), NULL }; @@ -340,6 +377,19 @@ static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG], attr->index - FAN1_DIRECTION)); break; + case FAN1_INPUT: + case FAN2_INPUT: + case FAN3_INPUT: + case FAN4_INPUT: + case FAN5_INPUT: + case FAN6_INPUT: + case FAN7_INPUT: + case FAN8_INPUT: + case FAN9_INPUT: + case FAN10_INPUT: + ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index + - FAN1_INPUT + FAN1_FRONT_SPEED_RPM])); + break; default: break; } diff --git a/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py index 17c56f7beb5..26a8a3cc8f8 100755 --- a/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py +++ b/platform/nephos/sonic-platform-modules-accton/as7116-54x/utils/accton_as7116_util.py @@ -251,7 +251,15 @@ def device_install(): if status: print output if FORCE == 0: - return status + return status + + if i <= 47: + status, output =log_os_system("echo as7116_54x_sfp"+str(i+1)+" 0x51 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1) + if status: + print output + if FORCE == 0: + return status + return def device_uninstall(): diff --git a/platform/nephos/sonic-platform-modules-ingrasys b/platform/nephos/sonic-platform-modules-ingrasys index 7181a00e42c..b75c4f9aac5 160000 --- a/platform/nephos/sonic-platform-modules-ingrasys +++ b/platform/nephos/sonic-platform-modules-ingrasys @@ -1 +1 @@ -Subproject commit 7181a00e42c292472e1327b9890bdcfac810e407 +Subproject commit b75c4f9aac53a72e576f5234c8a2610498306105 From a1e6c2ce5e54e4da3d5936ce0ee39ebc75865a50 Mon Sep 17 00:00:00 2001 From: Peter5 Lin Date: Wed, 5 Dec 2018 02:13:11 +0800 Subject: [PATCH 29/30] Add Pegatron project to branch 201807 (#2299) * Add Porsche project * Upgrade kernel to 3.16.57-2 --- .../x86_64-pegatron_porsche-r0/default_sku | 1 + .../x86_64-pegatron_porsche-r0/installer.conf | 3 + .../plugins/eeprom.py | 21 + .../plugins/psuutil.py | 92 ++ .../plugins/sfputil.py | 238 +++ .../porsche/port_config.ini | 55 + .../porsche/sai.profile | 2 + .../porsche/tau-porsche.dsh | 497 ++++++ .../tau-porsche.cfg | 23 + platform/nephos/one-image.mk | 5 +- platform/nephos/platform-modules-pegatron.mk | 13 + platform/nephos/rules.mk | 1 + .../sonic-platform-modules-pegatron/LICENSE | 16 + .../sonic-platform-modules-pegatron/README.md | 1 + .../common/modules/pegatron_hwmon_mcu.c | 1374 +++++++++++++++++ .../debian/changelog | 5 + .../debian/compat | 1 + .../debian/control | 12 + .../debian/rules | 88 ++ .../porsche/modules/Makefile | 1 + .../porsche/modules/pegatron_hwmon_mcu.c | 1 + .../porsche/modules/pegatron_porsche_cpld.c | 1132 ++++++++++++++ .../porsche/modules/pegatron_porsche_sfp.c | 431 ++++++ .../porsche/scripts/sensors | 7 + .../service/porsche-platform-init.service | 13 + .../porsche/utils/pegatron_porsche_util.py | 209 +++ .../porsche/utils/porsche_sensors.py | 141 ++ 27 files changed, 4381 insertions(+), 2 deletions(-) create mode 100644 device/pegatron/x86_64-pegatron_porsche-r0/default_sku create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/installer.conf create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh create mode 100755 device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg create mode 100755 platform/nephos/platform-modules-pegatron.mk create mode 100644 platform/nephos/sonic-platform-modules-pegatron/LICENSE create mode 100644 platform/nephos/sonic-platform-modules-pegatron/README.md create mode 100644 platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c create mode 100644 platform/nephos/sonic-platform-modules-pegatron/debian/changelog create mode 100644 platform/nephos/sonic-platform-modules-pegatron/debian/compat create mode 100755 platform/nephos/sonic-platform-modules-pegatron/debian/control create mode 100755 platform/nephos/sonic-platform-modules-pegatron/debian/rules create mode 100644 platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile create mode 120000 platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c create mode 100644 platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c create mode 100644 platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c create mode 100755 platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors create mode 100644 platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service create mode 100755 platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py create mode 100755 platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/default_sku b/device/pegatron/x86_64-pegatron_porsche-r0/default_sku new file mode 100644 index 00000000000..6b47d90d1cf --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/default_sku @@ -0,0 +1 @@ +porsche t1 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf b/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf new file mode 100755 index 00000000000..14404194ef5 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x2f8 +CONSOLE_DEV=1 +CONSOLE_SPEED=115200 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py new file mode 100755 index 00000000000..6964c6bade4 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/4-0054/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py new file mode 100755 index 00000000000..a23a7b7fe73 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/psuutil.py @@ -0,0 +1,92 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + + +import os.path + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + SYSFS_PSU_DIR = "/sys/bus/i2c/devices/7-0075" + + def __init__(self): + PsuBase.__init__(self) + + + # Get sysfs attribute + def get_attr_value(self, attr_path): + + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + + fd.close() + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + attr_file = 'psu_'+str(index)+'_status' + attr_path = self.SYSFS_PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU status + if (attr_value == 1): + status = 1 + + return status + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + attr_file = 'psu_'+str(index)+'_present' + attr_path = self.SYSFS_PSU_DIR +'/' + attr_file + + attr_value = self.get_attr_value(attr_path) + + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + # Check for PSU presence + if (attr_value == 0): + status = 1 + + return status + diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py new file mode 100755 index 00000000000..28909f00110 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/plugins/sfputil.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python + +try: + import os + import re + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + + +class SfpUtil(SfpUtilBase): + """Platform specific sfputil class""" + + port_start = 0 + port_end = 53 + ports_in_block = 54 + cplda_sfp_num = 24 + cpldb_sfp_num = 12 + cpldc_sfp_num = 18 + + port_to_eeprom_mapping = {} + port_to_i2c_mapping = {} + sfp_ports = range(0, ports_in_block) + qsfp_ports = range(ports_in_block - 6, ports_in_block) + + + def __init__(self): + for x in range(self.port_start, self.port_end + 1): + if x < self.cpldb_sfp_num: + self.port_to_i2c_mapping.update({x:7}) + elif x < self.cplda_sfp_num + self.cpldb_sfp_num: + self.port_to_i2c_mapping.update({x:6}) + else: + self.port_to_i2c_mapping.update({x:8}) + + for x in range(self.port_start, self.port_end+1): + eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp'+str(x+1)+'_eeprom' + port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) + self.port_to_eeprom_mapping[x] = port_eeprom_path + SfpUtilBase.__init__(self) + + + def get_presence(self, port_num): + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num < self.cpldb_sfp_num: + presence_path = '/sys/bus/i2c/devices/7-0075/sfp'+str(port_num+1)+'_present' + elif port_num < self.cpldb_sfp_num + self.cplda_sfp_num: + presence_path = '/sys/bus/i2c/devices/6-0074/sfp'+str(port_num+1)+'_present' + else: + presence_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_present' + + try: + file = open(presence_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + value = int(file.readline().rstrip()) + + file.close() + if value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if port_num not in self.qsfp_ports: + return False + + lowpower_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_lowpower' + + try: + file = open(lowpower_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + value = int(file.readline().rstrip()) + + file.close() + if value == 1: + return True + + return False + + def set_low_power_mode(self, port_num, lpmode): + if port_num not in self.qsfp_ports: + return False + + lowpower_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_lowpower' + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + value = 1 + else: + value = 0 + + try: + file = open(lowpower_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(value)) + file.close() + + return True + + def reset(self, port_num): + if port_num not in self.qsfp_ports: + return False + reset_path = '/sys/bus/i2c/devices/8-0076/sfp'+str(port_num+1)+'_reset' + + try: + file = open(reset_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(2)) + file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + try: + file = open(reset_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + file.seek(0) + file.write(str(1)) + file.close() + + return True + + def read_porttab_mappings(self, porttabfile): + logical = [] + logical_to_bcm = {} + logical_to_physical = {} + physical_to_logical = {} + last_fp_port_index = 0 + last_portname = "" + first = 1 + port_pos_in_file = 0 + parse_fmt_port_config_ini = False + + try: + f = open(porttabfile) + except: + raise + + parse_fmt_port_config_ini = (os.path.basename(porttabfile) == "port_config.ini") + + # Read the porttab file and generate dicts + # with mapping for future reference. + # XXX: move the porttab + # parsing stuff to a separate module, or reuse + # if something already exists + for line in f: + line.strip() + if re.search("^#", line) is not None: + continue + + # Parsing logic for 'port_config.ini' file + if (parse_fmt_port_config_ini): + # bcm_port is not explicitly listed in port_config.ini format + # Currently we assume ports are listed in numerical order according to bcm_port + # so we use the port's position in the file (zero-based) as bcm_port + portname = line.split()[0] + + bcm_port = str(port_pos_in_file) + + if len(line.split()) >= 4: + fp_port_index = int(line.split()[3]) + else: + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))/4 + else: # Parsing logic for older 'portmap.ini' file + (portname, bcm_port) = line.split("=")[1].split(",")[:2] + + fp_port_index = portname.split("Ethernet").pop() + fp_port_index = int(fp_port_index.split("s").pop(0))/4 + + if ((len(self.sfp_ports) > 0) and (fp_port_index not in self.sfp_ports)): + continue + + if first == 1: + # Initialize last_[physical|logical]_port + # to the first valid port + last_fp_port_index = fp_port_index + last_portname = portname + first = 0 + + logical.append(portname) + + logical_to_bcm[portname] = "xe" + bcm_port + logical_to_physical[portname] = [fp_port_index] + if physical_to_logical.get(fp_port_index) is None: + physical_to_logical[fp_port_index] = [portname] + else: + physical_to_logical[fp_port_index].append( + portname) + + if (fp_port_index - last_fp_port_index) > 1: + # last port was a gang port + for p in range(last_fp_port_index+1, fp_port_index): + logical_to_physical[last_portname].append(p) + if physical_to_logical.get(p) is None: + physical_to_logical[p] = [last_portname] + else: + physical_to_logical[p].append(last_portname) + + last_fp_port_index = fp_port_index + last_portname = portname + + port_pos_in_file += 1 + + self.logical = logical + self.logical_to_bcm = logical_to_bcm + self.logical_to_physical = logical_to_physical + self.physical_to_logical = physical_to_logical + + """ + print "logical: " + self.logical + print "logical to bcm: " + self.logical_to_bcm + print "logical to physical: " + self.logical_to_physical + print "physical to logical: " + self.physical_to_logical + """ + + + diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini new file mode 100755 index 00000000000..15fc6037594 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/port_config.ini @@ -0,0 +1,55 @@ +#name lanes alias index speed +Ethernet0 8 Ethernet1/1 0 10000 +Ethernet1 9 Ethernet2/1 1 10000 +Ethernet2 10 Ethernet3/1 2 10000 +Ethernet3 11 Ethernet4/1 3 10000 +Ethernet4 12 Ethernet5/1 4 10000 +Ethernet5 13 Ethernet6/1 5 10000 +Ethernet6 14 Ethernet7/1 6 10000 +Ethernet7 15 Ethernet8/1 7 10000 +Ethernet8 16 Ethernet9/1 8 10000 +Ethernet9 17 Ethernet10/1 9 10000 +Ethernet10 18 Ethernet11/1 10 10000 +Ethernet11 19 Ethernet12/1 11 10000 +Ethernet12 20 Ethernet13/1 12 10000 +Ethernet13 21 Ethernet14/1 13 10000 +Ethernet14 22 Ethernet15/1 14 10000 +Ethernet15 23 Ethernet16/1 15 10000 +Ethernet16 32 Ethernet17/1 16 10000 +Ethernet17 33 Ethernet18/1 17 10000 +Ethernet18 34 Ethernet19/1 18 10000 +Ethernet19 35 Ethernet20/1 19 10000 +Ethernet20 40 Ethernet21/1 20 10000 +Ethernet21 41 Ethernet22/1 21 10000 +Ethernet22 42 Ethernet23/1 22 10000 +Ethernet23 43 Ethernet24/1 23 10000 +Ethernet24 48 Ethernet25/1 24 10000 +Ethernet25 49 Ethernet26/1 25 10000 +Ethernet26 50 Ethernet27/1 26 10000 +Ethernet27 51 Ethernet28/1 27 10000 +Ethernet28 56 Ethernet29/1 28 10000 +Ethernet29 57 Ethernet30/1 29 10000 +Ethernet30 58 Ethernet31/1 30 10000 +Ethernet31 59 Ethernet32/1 31 10000 +Ethernet32 64 Ethernet33/1 32 10000 +Ethernet33 65 Ethernet34/1 33 10000 +Ethernet34 66 Ethernet35/1 34 10000 +Ethernet35 67 Ethernet36/1 35 10000 +Ethernet36 68 Ethernet37/1 36 10000 +Ethernet37 69 Ethernet38/1 37 10000 +Ethernet38 70 Ethernet39/1 38 10000 +Ethernet39 71 Ethernet40/1 39 10000 +Ethernet40 72 Ethernet41/1 40 10000 +Ethernet41 73 Ethernet42/1 41 10000 +Ethernet42 74 Ethernet43/1 42 10000 +Ethernet43 75 Ethernet44/1 43 10000 +Ethernet44 76 Ethernet45/1 44 10000 +Ethernet45 77 Ethernet46/1 45 10000 +Ethernet46 78 Ethernet47/1 46 10000 +Ethernet47 79 Ethernet48/1 47 10000 +Ethernet48 80,81,82,83 Ethernet49/1 48 100000 +Ethernet49 84,85,86,87 Ethernet50/1 49 100000 +Ethernet50 104,105,106,107 Ethernet51/1 50 100000 +Ethernet51 108,109,110,111 Ethernet52/1 51 100000 +Ethernet52 112,113,114,115 Ethernet53/1 52 100000 +Ethernet53 116,117,118,119 Ethernet54/1 53 100000 diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile new file mode 100755 index 00000000000..f19a366b1ca --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/tau-porsche.cfg +SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/tau-porsche.dsh diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh new file mode 100755 index 00000000000..b370fe83b83 --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/porsche/tau-porsche.dsh @@ -0,0 +1,497 @@ +init start stage unit=0 low-level +init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=10g active=true +init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=10g active=true +init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=10g active=true +init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=10g active=true +init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=10g active=true +init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=10g active=true +init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=10g active=true +init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=10g active=true +init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=10g active=true +init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=10g active=true +init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=10g active=true +init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=10g active=true +init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=10g active=true +init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=10g active=true +init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=10g active=true +init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=10g active=true +init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=10g active=true +init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=10g active=true +init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=10g active=true +init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=10g active=true +init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=10g active=true +init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=10g active=true +init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=10g active=true +init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=10g active=true +init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=10g active=true +init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=10g active=true +init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=10g active=true +init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=10g active=true +init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=10g active=true +init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=10g active=true +init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=10g active=true +init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=10g active=true +init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=10g active=true +init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=10g active=true +init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=10g active=true +init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=10g active=true +init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=10g active=true +init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=10g active=true +init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=10g active=true +init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=10g active=true +init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=10g active=true +init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=10g active=true +init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=10g active=true +init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=10g active=true +init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=10g active=true +init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=10g active=true +init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=10g active=true +init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=10g active=true +init set port-map unit=0 port=48 eth-macro=20 lane=0 max-speed=100g active=true +init set port-map unit=0 port=49 eth-macro=21 lane=0 max-speed=100g active=true +init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true +init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true +init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true +init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true init-done=true +init start stage unit=0 task-rsrc +init start stage unit=0 module +init start stage unit=0 task +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=tx data=0x00 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=tx data=0x01 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=tx data=0x02 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=tx data=0x03 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=tx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=tx data=0x01.02.03.00 +phy set lane-swap unit=0 portlist=0 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=1 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=2 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=3 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=4 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=5 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=6 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=7 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=8 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=9 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=10 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=11 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=12 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=13 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=14 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=15 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=16 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=17 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=18 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=19 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=20 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=21 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=22 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=23 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=24 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=25 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=26 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=27 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=28 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=29 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=30 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=31 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=32 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=33 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=34 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=35 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=36 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=37 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=38 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=39 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=40 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=41 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=42 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=43 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=44 lane-cnt=1 property=rx data=0x02 +phy set lane-swap unit=0 portlist=45 lane-cnt=1 property=rx data=0x01 +phy set lane-swap unit=0 portlist=46 lane-cnt=1 property=rx data=0x00 +phy set lane-swap unit=0 portlist=47 lane-cnt=1 property=rx data=0x03 +phy set lane-swap unit=0 portlist=48 lane-cnt=4 property=rx data=0x03.00.01.02 +phy set lane-swap unit=0 portlist=49 lane-cnt=4 property=rx data=0x03.00.01.02 +phy set lane-swap unit=0 portlist=50 lane-cnt=4 property=rx data=0x03.01.02.00 +phy set lane-swap unit=0 portlist=51 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=52 lane-cnt=4 property=rx data=0x03.02.01.00 +phy set lane-swap unit=0 portlist=53 lane-cnt=4 property=rx data=0x00.01.02.03 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=27 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=28 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=29 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=30 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=31 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=32 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=33 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=34 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=35 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=36 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=37 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=38 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=39 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=40 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=tx data=0x00 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=tx data=0x01 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=tx data=0x00.01.00.00 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=tx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=tx data=0x01.00.01.01 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=tx data=0x01.01.01.01 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=tx data=0x01.00.00.00 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 property=tx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=0 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=1 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=2 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=3 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=4 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=5 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=6 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=7 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=8 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=9 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=10 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=11 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=12 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=13 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=14 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=15 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=16 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=17 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=18 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=19 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=20 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=21 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=22 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=23 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=24 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=25 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=26 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 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data=0x00 +phy set polarity-rev unit=0 portlist=41 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=42 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=43 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=44 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=45 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=46 lane-cnt=1 property=rx data=0x01 +phy set polarity-rev unit=0 portlist=47 lane-cnt=1 property=rx data=0x00 +phy set polarity-rev unit=0 portlist=48 lane-cnt=4 property=rx data=0x00.01.00.00 +phy set polarity-rev unit=0 portlist=49 lane-cnt=4 property=rx data=0x00.00.01.00 +phy set polarity-rev unit=0 portlist=50 lane-cnt=4 property=rx data=0x00.00.01.01 +phy set polarity-rev unit=0 portlist=51 lane-cnt=4 property=rx data=0x00.01.00.01 +phy set polarity-rev unit=0 portlist=52 lane-cnt=4 property=rx data=0x00.01.00.01 +phy set polarity-rev unit=0 portlist=53 lane-cnt=4 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data=0x02 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=30 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c0 data=0x1D +phy set pre-emphasis unit=0 portlist=31 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=32 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=33 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=34 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=35 lane-cnt=1 property=c1 data=0x05 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=36 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=37 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=38 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=39 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=40 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=41 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=42 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=43 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=44 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=45 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=46 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c2 data=0x02 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=cn1 data=0x00 +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c0 data=0x1C +phy set pre-emphasis unit=0 portlist=47 lane-cnt=1 property=c1 data=0x06 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c0 data=0x1C.1C.1C.1C +phy set pre-emphasis unit=0 portlist=48 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=49 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=50 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=51 lane-cnt=4 property=c1 data=0x06.06.06.06 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c0 data=0x1B.1B.1B.1B +phy set pre-emphasis unit=0 portlist=52 lane-cnt=4 property=c1 data=0x07.07.07.07 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c2 data=0x02.02.02.02 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=cn1 data=0x00.00.00.00 +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c0 data=0x1A.1A.1A.1A +phy set pre-emphasis unit=0 portlist=53 lane-cnt=4 property=c1 data=0x07.07.07.07 +port set property unit=0 portlist=0-47 speed=10g +port set property unit=0 portlist=0-47 medium-type=sr +port set property unit=0 portlist=48-53 speed=100g +port set property unit=0 portlist=48-53 medium-type=sr4 +port set property unit=0 portlist=0-53 fec=disable +port set property unit=0 portlist=0-53 an=disable +port set property unit=0 portlist=0-53 admin=enable \ No newline at end of file diff --git a/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg b/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg new file mode 100755 index 00000000000..bbd7c8f80ff --- /dev/null +++ b/device/pegatron/x86_64-pegatron_porsche-r0/tau-porsche.cfg @@ -0,0 +1,23 @@ +#This configuration file is for customer init value feature. Please refer to mtk_cfg.h/mtk_cfg.c for detail. +#1. The lines beginning with # are comment lines. The lines beginning with number are the setting lines. +#2. There are five parameters which can be set. +# 1) the first is unit. +# 2) the second is NPS_CFG_TYPE_XXX. Refer to NPS_CFG_TYPE_T. +# 3) the 3-5 are {param0, param1, value} pairs. Refer to NPS_CFG_VALUE_T. Support HEX format. +# 4) the (unit, NPS_CFG_TYPE_XXX, param0, param1) group is the key to get the correspingding value. +# There should be no same (unit, NPS_CFG_TYPE_XXX, param0, param1) group. +#3. User must follow correct format to apply the setting. Please refer to below commentted example(#0 NPS_CFG_TYPE_L2_ADDR_MODE 0 0 1); +#4. Usage under the linux shell: +# 1) ./image-path/image-name -c cfg-path/NPS_Ari_EVB_24.cfg : mamually specify directory path if they are not in current work dirctory. +# 2) ./image-name -c NPS_Ari_EVB_24.cfg : the image and the NPS_Ari_EVB_24.cfg are in the current work directory. + +#unit NPS_CFG_TYPE_XXX param0 param1 value +#---- ---------------- ------ ------ ----- +0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1 +0 NPS_CFG_TYPE_LED_CFG 0 0 3 +0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1 +0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1 +0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1 +0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152 +0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768 + diff --git a/platform/nephos/one-image.mk b/platform/nephos/one-image.mk index aa5cc1ff432..bd9e2e85188 100644 --- a/platform/nephos/one-image.mk +++ b/platform/nephos/one-image.mk @@ -5,7 +5,8 @@ $(SONIC_ONE_IMAGE)_MACHINE = nephos $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_INSTALLS += $(NEPHOS_NPS_KERNEL) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9130_32X_PLATFORM_MODULE) \ - $(INGRASYS_S9230_64X_PLATFORM_MODULE) \ - $(ACCTON_AS7116_54X_PLATFORM_MODULE) + $(INGRASYS_S9230_64X_PLATFORM_MODULE) \ + $(ACCTON_AS7116_54X_PLATFORM_MODULE) \ + $(PEGATRON_PORSCHE_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/nephos/platform-modules-pegatron.mk b/platform/nephos/platform-modules-pegatron.mk new file mode 100755 index 00000000000..9a411763cec --- /dev/null +++ b/platform/nephos/platform-modules-pegatron.mk @@ -0,0 +1,13 @@ +# Pegatron Platform modules + +PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION = 0.1 + +export PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION + +PEGATRON_PORSCHE_PLATFORM_MODULE = sonic-platform-pegatron-porsche_$(PEGATRON_PORSCHE_PLATFORM_MODULE_VERSION)_amd64.deb +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-pegatron +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(PEGATRON_PORSCHE_PLATFORM_MODULE)_PLATFORM = x86_64-pegatron_porsche-r0 +SONIC_DPKG_DEBS += $(PEGATRON_PORSCHE_PLATFORM_MODULE) + +$(eval $(call add_extra_package,$(PEGATRON_PORSCHE_PLATFORM_MODULE))) diff --git a/platform/nephos/rules.mk b/platform/nephos/rules.mk index bf77ad0e6ed..1950c6777cf 100644 --- a/platform/nephos/rules.mk +++ b/platform/nephos/rules.mk @@ -2,6 +2,7 @@ include $(PLATFORM_PATH)/sdk.mk include $(PLATFORM_PATH)/sai.mk include $(PLATFORM_PATH)/platform-modules-ingrasys.mk include $(PLATFORM_PATH)/platform-modules-accton.mk +include $(PLATFORM_PATH)/platform-modules-pegatron.mk include $(PLATFORM_PATH)/docker-orchagent-nephos.mk include $(PLATFORM_PATH)/docker-syncd-nephos.mk include $(PLATFORM_PATH)/docker-syncd-nephos-rpc.mk diff --git a/platform/nephos/sonic-platform-modules-pegatron/LICENSE b/platform/nephos/sonic-platform-modules-pegatron/LICENSE new file mode 100644 index 00000000000..a23cc2b232c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/LICENSE @@ -0,0 +1,16 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 Pegatron Corporation. + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/nephos/sonic-platform-modules-pegatron/README.md b/platform/nephos/sonic-platform-modules-pegatron/README.md new file mode 100644 index 00000000000..32444b4b891 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/README.md @@ -0,0 +1 @@ +platform drivers of Pegatron products for the SONiC project diff --git a/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c b/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c new file mode 100644 index 00000000000..76cbd884470 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/common/modules/pegatron_hwmon_mcu.c @@ -0,0 +1,1374 @@ +/* + * A MCU driver connect to hwmon + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef pega_DEBUG +/*#define pega_DEBUG*/ +#ifdef pega_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define FW_UPGRADE_COMMAND 0xA5 +#define FAN_DISABLE_COMMAND 0x20 +#define FAN_ENABLE_COMMAND 0x21 +#define FAN_LED_SETTO_MANUAL_COMMAND 0x30 +#define FAN_LED_SETTO_AUTO_COMMAND 0x31 +#define FAN_LED_GREENON_COMMAND 0x40 +#define FAN_LED_GREENOFF_COMMAND 0x41 +#define FAN_LED_AMBERON_COMMAND 0x50 +#define FAN_LED_AMBEROFF_COMMAND 0x51 +#define SMART_FAN_ENABLE_BIT 0 +#define SMART_FAN_SETTING_ENABLE_BIT 0 +#define SA56004X_REMOTE_TEMP_ALERT_BIT 4 +#define I2C_FANBOARD_TIMEOUT_BIT 0 +#define ALERT_MODE_BIT 0 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +enum chips +{ + mercedes3 = 0, + cadillac, + porsche, +}; + +enum fan_alert +{ + FAN_OUTER_RPM_OVER_ALERT_BIT = 0, + FAN_OUTER_RPM_UNDER_ALERT_BIT, + FAN_INNER_RPM_OVER_ALERT_BIT, + FAN_INNER_RPM_UNDER_ALERT_BIT, + FAN_CONNECT_ALERT_BIT, + FAN_DISCONNECT_ALERT_BIT, +}; + +enum fan_status +{ + FAN_ALERT_BIT = 2, + FAN_LED_AMBER_BIT, + FAN_LED_GREEN_BIT, + FAN_LED_AUTO_BIT, + FAN_ENABLE_BIT, + FAN_PRESENT_BIT, +}; + +enum hwmon_mcu_register +{ + MB_FW_UG_REG = 0, + FB_FW_UG_REG, + MB_HW_VER_REG, + FB_HW_SKUVER_REG, + MB_FW_VER_REG, + FB_FW_VER_REG, + + FAN_PWM_REG = 16, + + SF_ENABLE_REG, + SF_SETTING_ENABLE_REG, + SF_DEVICE_REG, + SF_UPDATE_REG, + SF_TEMP_MAX_REG, + SF_TEMP_MID_REG, + SF_TEMP_MIN_REG, + SF_PWM_MAX_REG, + SF_PWM_MID_REG, + SF_PWM_MIN_REG, + + FAN1_INNER_RPM_REG = 32, + FAN2_INNER_RPM_REG, + FAN3_INNER_RPM_REG, + FAN4_INNER_RPM_REG, + FAN5_INNER_RPM_REG, + + FAN1_OUTER_RPM_REG = 48, + FAN2_OUTER_RPM_REG, + FAN3_OUTER_RPM_REG, + FAN4_OUTER_RPM_REG, + FAN5_OUTER_RPM_REG, + + FAN1_STATUS_REG = 64, + FAN2_STATUS_REG, + FAN3_STATUS_REG, + FAN4_STATUS_REG, + FAN5_STATUS_REG, + + ADC_UNDER_VOL_ALERT_REG = 80, + ADC_OVER_VOL_ALERT_REG, + TS_OVER_TEMP_ALERT_REG, + + FAN1_ALERT_REG, + FAN2_ALERT_REG, + FAN3_ALERT_REG, + FAN4_ALERT_REG, + FAN5_ALERT_REG, + + I2C_BUS_ALERT_REG, + ALERT_MODE_REG, + + MONITOR_ADC_VOLTAGE_REG = 96, + + LM_0X49_TEMP_REG = 112, + LM_0X48_TEMP_REG, + SA56004X_LOCAL_TEMP_REG, + SA56004X_REMOTE_TEMP_REG, + +}; + +static struct mutex pega_hwmon_mcu_lock; + +static int pega_hwmon_mcu_read(struct i2c_client *client, u8 reg) +{ + int data = -EPERM; + + mutex_lock(&pega_hwmon_mcu_lock); + + data = i2c_smbus_read_word_data(client, reg); + + mutex_unlock(&pega_hwmon_mcu_lock); + + return data; +} + +static int pega_hwmon_mcu_write(struct i2c_client *client, u8 reg, u8 val) +{ + int ret = -EIO; + + mutex_lock(&pega_hwmon_mcu_lock); + + ret = i2c_smbus_write_byte_data(client, reg, val); + + mutex_unlock(&pega_hwmon_mcu_lock); + + return ret; +} + +static ssize_t mainBoardUpgrade(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = MB_FW_UG_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + if(val) + pega_hwmon_mcu_write(client, reg, FW_UPGRADE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, 0xff); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, FW_UPGRADE_COMMAND)); + + return count; +} + +static ssize_t fanBoardUpgrade(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_FW_UG_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + if(val) + pega_hwmon_mcu_write(client, reg, FW_UPGRADE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, 0xff); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, FW_UPGRADE_COMMAND)); + + return count; +} + +static ssize_t get_MB_HW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = MB_HW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + data &= 0x1f; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_FB_HW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_HW_SKUVER_REG; + + data = pega_hwmon_mcu_read(client, reg); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + data = (data >> 5) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_FB_boardId(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FB_HW_SKUVER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x1f; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t get_MB_FW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, major_ver = 0, minor_ver = 0; + u8 reg = MB_FW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + major_ver = (data >> 4) & 0xf; + minor_ver = data & 0xf; + + return sprintf(buf, "%d.%d\n", major_ver, minor_ver); +} + +static ssize_t get_FB_FW_version(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, major_ver = 0, minor_ver = 0; + u8 reg = FB_FW_VER_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + major_ver = (data >> 4) & 0xf; + minor_ver = data & 0xf; + + return sprintf(buf, "%d.%d\n", major_ver, minor_ver); +} + +static ssize_t get_fan_PWM(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FAN_PWM_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_fan_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = FAN_PWM_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = SF_ENABLE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SMART_FAN_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_smartFan_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_ENABLE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + if(val) + SET_BIT(data, SMART_FAN_ENABLE_BIT); + else + CLEAR_BIT(data, SMART_FAN_ENABLE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_smartFan_setting_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = SF_SETTING_ENABLE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SMART_FAN_SETTING_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_smartFan_setting_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_SETTING_ENABLE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + if(val) + SET_BIT(data, SMART_FAN_SETTING_ENABLE_BIT); + else + CLEAR_BIT(data, SMART_FAN_SETTING_ENABLE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_smartFan_device(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_DEVICE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%x\n", data); +} + +static ssize_t set_smartFan_device(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_DEVICE_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_update(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_UPDATE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_update(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_UPDATE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_max_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MAX_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_max_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MAX_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_mid_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_mid_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_min_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_min_temp(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_TEMP_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_max_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MAX_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_max_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MAX_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_mid_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_mid_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_smartFan_min_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MIN_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_smartFan_min_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MIN_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, val)); + + pega_hwmon_mcu_write(client, reg, val); + + return count; +} + +static ssize_t get_fan_inner_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0; + u8 reg = FAN1_INNER_RPM_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_fan_outer_rpm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0; + u8 reg = FAN1_OUTER_RPM_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} + +static ssize_t get_fan_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_PRESENT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_ENABLE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_ENABLE_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_DISABLE_COMMAND); + + return count; +} + +static ssize_t get_fan_led_auto(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_AUTO_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_auto(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_SETTO_AUTO_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_SETTO_MANUAL_COMMAND); + + return count; +} + +static ssize_t get_fan_led_green(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_GREEN_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_green(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_GREENON_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_GREENOFF_COMMAND); + + return count; +} + +static ssize_t get_fan_led_amber(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_LED_AMBER_BIT, val); + + return sprintf(buf, "%d\n", val); +} + + +static ssize_t set_fan_led_amber(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = SF_PWM_MID_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + pega_hwmon_mcu_write(client, reg, FAN_LED_AMBERON_COMMAND); + else + pega_hwmon_mcu_write(client, reg, FAN_LED_AMBEROFF_COMMAND); + + return count; +} + +static ssize_t get_fan_status_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_STATUS_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_adc_under_vol_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ADC_UNDER_VOL_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_adc_over_vol_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ADC_OVER_VOL_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_temp_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = TS_OVER_TEMP_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SA56004X_REMOTE_TEMP_ALERT_BIT + attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_outerRPMOver_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_OUTER_RPM_OVER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_outerRPMUnder_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_OUTER_RPM_UNDER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_innerRPMOver_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_INNER_RPM_OVER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_innerRPMUnder_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_INNER_RPM_UNDER_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_connect_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_CONNECT_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_fan_disconnect_alert(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = FAN1_ALERT_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, FAN_DISCONNECT_ALERT_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_i2c_timeout(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = I2C_BUS_ALERT_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, I2C_FANBOARD_TIMEOUT_BIT + attr->index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_alert_mode(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0; + u8 reg = ALERT_MODE_REG; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, ALERT_MODE_BIT, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t set_alert_mode(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = ALERT_MODE_REG; + long val = 0; + + if (kstrtol(buf, 10, &val)) + { + return -EINVAL; + } + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, val: %x\r\n", __func__, client->addr, reg, val)); + + if(val) + SET_BIT(data, ALERT_MODE_BIT); + else + CLEAR_BIT(data, ALERT_MODE_BIT); + pega_hwmon_mcu_write(client, reg, data); + + return count; +} + +static ssize_t get_adc_vol(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u16 data = 0, reg = MONITOR_ADC_VOLTAGE_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d.%02d\n", data/1000, (data/10)%12); +} + +static ssize_t get_hwmon_temp(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0; + u8 reg = LM_0X49_TEMP_REG + attr->index; + + data = pega_hwmon_mcu_read(client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%d\n", data); +} +#define SET_FAN_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(fan##_num##_inner_rpm, S_IRUGO, get_fan_inner_rpm, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outer_rpm, S_IRUGO, get_fan_outer_rpm, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_present, S_IRUGO, get_fan_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_enable, S_IRUGO | S_IWUSR, get_fan_enable, set_fan_enable, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_auto, S_IRUGO | S_IWUSR, get_fan_led_auto, set_fan_led_auto, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_green, S_IRUGO | S_IWUSR, get_fan_led_green, set_fan_led_green, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_led_amber, S_IRUGO | S_IWUSR, get_fan_led_amber, set_fan_led_amber, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_status_alert, S_IRUGO, get_fan_status_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outerRPMOver_alert, S_IRUGO, get_fan_outerRPMOver_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_outerRPMUnder_alert, S_IRUGO, get_fan_outerRPMUnder_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_innerRPMOver_alert, S_IRUGO, get_fan_innerRPMOver_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_innerRPMUnder_alert, S_IRUGO, get_fan_innerRPMUnder_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_connect_alert, S_IRUGO, get_fan_connect_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(fan##_num##_disconnect_alert, S_IRUGO, get_fan_disconnect_alert, NULL, _num-1) + +SET_FAN_ATTR(1);SET_FAN_ATTR(2);SET_FAN_ATTR(3);SET_FAN_ATTR(4);SET_FAN_ATTR(5); + +#define SET_ADC_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(ADC##_num##_under_alert, S_IRUGO, get_adc_under_vol_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(ADC##_num##_over_alert, S_IRUGO, get_adc_over_vol_alert, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(ADC##_num##_vol, S_IRUGO, get_adc_vol, NULL, 8-_num) + +SET_ADC_ATTR(1);SET_ADC_ATTR(2);SET_ADC_ATTR(3);SET_ADC_ATTR(4);SET_ADC_ATTR(5);SET_ADC_ATTR(6);SET_ADC_ATTR(7);SET_ADC_ATTR(8); + +static SENSOR_DEVICE_ATTR(mb_fw_upgrade, S_IWUSR, NULL, mainBoardUpgrade, 0); +static SENSOR_DEVICE_ATTR(fb_fw_upgrade, S_IWUSR, NULL, fanBoardUpgrade, 0); +static SENSOR_DEVICE_ATTR(mb_hw_version, S_IRUGO, get_MB_HW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_hw_version, S_IRUGO, get_FB_HW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_board_id, S_IRUGO, get_FB_boardId, NULL, 0); +static SENSOR_DEVICE_ATTR(mb_fw_version, S_IRUGO, get_MB_FW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fb_fw_version, S_IRUGO, get_FB_FW_version, NULL, 0); +static SENSOR_DEVICE_ATTR(fan_pwm, S_IRUGO | S_IWUSR, get_fan_PWM, set_fan_pwm, 0); + +static SENSOR_DEVICE_ATTR(smartFan_enable, S_IRUGO | S_IWUSR, get_smartFan_enable, set_smartFan_enable, 0); +static SENSOR_DEVICE_ATTR(smartFan_setting_enable, S_IRUGO | S_IWUSR, get_smartFan_setting_enable, set_smartFan_setting_enable, 0); +static SENSOR_DEVICE_ATTR(smartFan_device, S_IRUGO | S_IWUSR, get_smartFan_device, set_smartFan_device, 0); +static SENSOR_DEVICE_ATTR(smartFan_update, S_IRUGO | S_IWUSR, get_smartFan_update, set_smartFan_update, 0); +static SENSOR_DEVICE_ATTR(smartFan_max_temp, S_IRUGO | S_IWUSR, get_smartFan_max_temp, set_smartFan_max_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_mid_temp, S_IRUGO | S_IWUSR, get_smartFan_mid_temp, set_smartFan_mid_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_min_temp, S_IRUGO | S_IWUSR, get_smartFan_min_temp, set_smartFan_min_temp, 0); +static SENSOR_DEVICE_ATTR(smartFan_max_pwm, S_IRUGO | S_IWUSR, get_smartFan_max_pwm, set_smartFan_max_pwm, 0); +static SENSOR_DEVICE_ATTR(smartFan_mid_pwm, S_IRUGO | S_IWUSR, get_smartFan_mid_pwm, set_smartFan_mid_pwm, 0); +static SENSOR_DEVICE_ATTR(smartFan_min_pwm, S_IRUGO | S_IWUSR, get_smartFan_min_pwm, set_smartFan_min_pwm, 0); + +static SENSOR_DEVICE_ATTR(lm75_49_temp_alert, S_IRUGO, get_temp_alert, NULL, 3); +static SENSOR_DEVICE_ATTR(lm75_48_temp_alert, S_IRUGO, get_temp_alert, NULL, 2); +static SENSOR_DEVICE_ATTR(SA56004X_Ltemp_alert, S_IRUGO, get_temp_alert, NULL, 1); +static SENSOR_DEVICE_ATTR(SA56004X_Rtemp_alert, S_IRUGO, get_temp_alert, NULL, 0); + +static SENSOR_DEVICE_ATTR(i2c_fb_timeout, S_IRUGO, get_i2c_timeout, NULL, 0); +static SENSOR_DEVICE_ATTR(i2c_remote_timeout, S_IRUGO, get_i2c_timeout, NULL, 1); +static SENSOR_DEVICE_ATTR(i2c_local_timeout, S_IRUGO, get_i2c_timeout, NULL, 2); +static SENSOR_DEVICE_ATTR(i2c_lm75_48_timeout, S_IRUGO, get_i2c_timeout, NULL, 3); +static SENSOR_DEVICE_ATTR(i2c_lm75_49_timeout, S_IRUGO, get_i2c_timeout, NULL, 4); +static SENSOR_DEVICE_ATTR(alert_mode, S_IRUGO | S_IWUSR, get_alert_mode, set_alert_mode, 0); + +static SENSOR_DEVICE_ATTR(lm75_49_temp, S_IRUGO, get_hwmon_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(lm75_48_temp, S_IRUGO, get_hwmon_temp, NULL, 1); +static SENSOR_DEVICE_ATTR(SA56004_local_temp, S_IRUGO, get_hwmon_temp, NULL, 2); +static SENSOR_DEVICE_ATTR(SA56004_remote_temp, S_IRUGO, get_hwmon_temp, NULL, 3); + +static struct attribute *pega_hwmon_mcu_attributes[] = { + &sensor_dev_attr_mb_fw_upgrade.dev_attr.attr, + &sensor_dev_attr_fb_fw_upgrade.dev_attr.attr, + &sensor_dev_attr_mb_hw_version.dev_attr.attr, + &sensor_dev_attr_fb_hw_version.dev_attr.attr, + &sensor_dev_attr_fb_board_id.dev_attr.attr, + &sensor_dev_attr_mb_fw_version.dev_attr.attr, + &sensor_dev_attr_fb_fw_version.dev_attr.attr, + &sensor_dev_attr_fan_pwm.dev_attr.attr, + + &sensor_dev_attr_smartFan_enable.dev_attr.attr, + &sensor_dev_attr_smartFan_setting_enable.dev_attr.attr, + &sensor_dev_attr_smartFan_device.dev_attr.attr, + &sensor_dev_attr_smartFan_update.dev_attr.attr, + &sensor_dev_attr_smartFan_max_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_mid_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_min_temp.dev_attr.attr, + &sensor_dev_attr_smartFan_max_pwm.dev_attr.attr, + &sensor_dev_attr_smartFan_mid_pwm.dev_attr.attr, + &sensor_dev_attr_smartFan_min_pwm.dev_attr.attr, + + &sensor_dev_attr_fan1_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_inner_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_inner_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_outer_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_outer_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_present.dev_attr.attr, + &sensor_dev_attr_fan2_present.dev_attr.attr, + &sensor_dev_attr_fan3_present.dev_attr.attr, + &sensor_dev_attr_fan4_present.dev_attr.attr, + &sensor_dev_attr_fan5_present.dev_attr.attr, + + &sensor_dev_attr_fan1_enable.dev_attr.attr, + &sensor_dev_attr_fan2_enable.dev_attr.attr, + &sensor_dev_attr_fan3_enable.dev_attr.attr, + &sensor_dev_attr_fan4_enable.dev_attr.attr, + &sensor_dev_attr_fan5_enable.dev_attr.attr, + + &sensor_dev_attr_fan1_led_auto.dev_attr.attr, + &sensor_dev_attr_fan2_led_auto.dev_attr.attr, + &sensor_dev_attr_fan3_led_auto.dev_attr.attr, + &sensor_dev_attr_fan4_led_auto.dev_attr.attr, + &sensor_dev_attr_fan5_led_auto.dev_attr.attr, + + &sensor_dev_attr_fan1_led_green.dev_attr.attr, + &sensor_dev_attr_fan2_led_green.dev_attr.attr, + &sensor_dev_attr_fan3_led_green.dev_attr.attr, + &sensor_dev_attr_fan4_led_green.dev_attr.attr, + &sensor_dev_attr_fan5_led_green.dev_attr.attr, + + &sensor_dev_attr_fan1_led_amber.dev_attr.attr, + &sensor_dev_attr_fan2_led_amber.dev_attr.attr, + &sensor_dev_attr_fan3_led_amber.dev_attr.attr, + &sensor_dev_attr_fan4_led_amber.dev_attr.attr, + &sensor_dev_attr_fan5_led_amber.dev_attr.attr, + + &sensor_dev_attr_fan1_status_alert.dev_attr.attr, + &sensor_dev_attr_fan2_status_alert.dev_attr.attr, + &sensor_dev_attr_fan3_status_alert.dev_attr.attr, + &sensor_dev_attr_fan4_status_alert.dev_attr.attr, + &sensor_dev_attr_fan5_status_alert.dev_attr.attr, + + &sensor_dev_attr_ADC1_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC2_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC3_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC4_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC5_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC6_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC7_under_alert.dev_attr.attr, + &sensor_dev_attr_ADC8_under_alert.dev_attr.attr, + + &sensor_dev_attr_ADC1_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC2_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC3_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC4_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC5_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC6_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC7_over_alert.dev_attr.attr, + &sensor_dev_attr_ADC8_over_alert.dev_attr.attr, + + &sensor_dev_attr_lm75_48_temp_alert.dev_attr.attr, + &sensor_dev_attr_lm75_49_temp_alert.dev_attr.attr, + &sensor_dev_attr_SA56004X_Ltemp_alert.dev_attr.attr, + &sensor_dev_attr_SA56004X_Rtemp_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan2_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan3_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan4_outerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan5_outerRPMOver_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan2_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan3_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan4_outerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan5_outerRPMUnder_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan2_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan3_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan4_innerRPMOver_alert.dev_attr.attr, + &sensor_dev_attr_fan5_innerRPMOver_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan2_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan3_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan4_innerRPMUnder_alert.dev_attr.attr, + &sensor_dev_attr_fan5_innerRPMUnder_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan2_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan3_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan4_connect_alert.dev_attr.attr, + &sensor_dev_attr_fan5_connect_alert.dev_attr.attr, + + &sensor_dev_attr_fan1_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan2_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan3_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan4_disconnect_alert.dev_attr.attr, + &sensor_dev_attr_fan5_disconnect_alert.dev_attr.attr, + + &sensor_dev_attr_i2c_fb_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_remote_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_local_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_lm75_48_timeout.dev_attr.attr, + &sensor_dev_attr_i2c_lm75_49_timeout.dev_attr.attr, + &sensor_dev_attr_alert_mode.dev_attr.attr, + + &sensor_dev_attr_ADC1_vol.dev_attr.attr, + &sensor_dev_attr_ADC2_vol.dev_attr.attr, + &sensor_dev_attr_ADC3_vol.dev_attr.attr, + &sensor_dev_attr_ADC4_vol.dev_attr.attr, + &sensor_dev_attr_ADC5_vol.dev_attr.attr, + &sensor_dev_attr_ADC6_vol.dev_attr.attr, + &sensor_dev_attr_ADC7_vol.dev_attr.attr, + &sensor_dev_attr_ADC8_vol.dev_attr.attr, + + &sensor_dev_attr_lm75_49_temp.dev_attr.attr, + &sensor_dev_attr_lm75_48_temp.dev_attr.attr, + &sensor_dev_attr_SA56004_local_temp.dev_attr.attr, + &sensor_dev_attr_SA56004_remote_temp.dev_attr.attr, + + NULL +}; + +static const struct attribute_group pega_hwmon_mcu_group = { .attrs = pega_hwmon_mcu_attributes}; + +static int pega_hwmon_mcu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + status = sysfs_create_group(&client->dev.kobj, &pega_hwmon_mcu_group); + + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + + return 0; + +exit: + return status; +} + +static int pega_hwmon_mcu_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &pega_hwmon_mcu_group); + return 0; +} + +static const struct i2c_device_id pega_hwmon_mcu_id[] = { + { "porsche_hwmon_mcu", porsche }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pega_hwmon_mcu_id); + +static struct i2c_driver pega_hwmon_mcu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "pegatron_hwmon_mcu", + }, + .probe = pega_hwmon_mcu_probe, + .remove = pega_hwmon_mcu_remove, + .id_table = pega_hwmon_mcu_id, +}; + +static int __init pega_hwmon_mcu_init(void) +{ + mutex_init(&pega_hwmon_mcu_lock); + + return i2c_add_driver(&pega_hwmon_mcu_driver); +} + +static void __exit pega_hwmon_mcu_exit(void) +{ + i2c_del_driver(&pega_hwmon_mcu_driver); +} + +MODULE_AUTHOR("Peter5 Lin "); +MODULE_DESCRIPTION("pega_hwmon_mcu driver"); +MODULE_LICENSE("GPL"); + +module_init(pega_hwmon_mcu_init); +module_exit(pega_hwmon_mcu_exit); \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/changelog b/platform/nephos/sonic-platform-modules-pegatron/debian/changelog new file mode 100644 index 00000000000..39ecd34d960 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/changelog @@ -0,0 +1,5 @@ +sonic-pegatron-platform-modules (0.1) unstable; urgency=low + + * Initial release + + -- Pegatron Mon, 12 Mar 2018 15:22:37 +0800 diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/compat b/platform/nephos/sonic-platform-modules-pegatron/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/control b/platform/nephos/sonic-platform-modules-pegatron/debian/control new file mode 100755 index 00000000000..aa87c251f9c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/control @@ -0,0 +1,12 @@ +Source: sonic-pegatron-platform-modules +Section: main +Priority: extra +Maintainer: Pegatron +Build-Depends: debhelper (>= 8.0.0), bzip2 +Standards-Version: 3.9.3 + +Package: sonic-platform-pegatron-porsche +Architecture: amd64 +Depends: linux-image-3.16.0-6-amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/nephos/sonic-platform-modules-pegatron/debian/rules b/platform/nephos/sonic-platform-modules-pegatron/debian/rules new file mode 100755 index 00000000000..472ec939a47 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/debian/rules @@ -0,0 +1,88 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON ?= python2 + +PACKAGE_PRE_NAME := sonic-platform-pegatron +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= porsche +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +SCRIPTS_DIR := scripts +CONF_DIR := conf + +%: + dh $@ --with systemd,python2,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + +build: + #make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC) + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + #$(PYTHON) $${mod}/setup.py build; \ + done) + +binary: binary-arch binary-indep + # Nothing to do + +binary-arch: + # Nothing to do + +#install: build + #dh_testdir + #dh_testroot + #dh_clean -k + #dh_installdirs + +binary-indep: + dh_testdir + dh_installdirs + + # Custom package commands + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/usr/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SCRIPTS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/bin/; \ + #$(PYTHON) $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + done) + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile new file mode 100644 index 00000000000..60e882a586d --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/Makefile @@ -0,0 +1 @@ +obj-m:=pegatron_porsche_cpld.o pegatron_hwmon_mcu.o pegatron_porsche_sfp.o diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c new file mode 120000 index 00000000000..1357104478a --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_hwmon_mcu.c @@ -0,0 +1 @@ +../../common/modules/pegatron_hwmon_mcu.c \ No newline at end of file diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c new file mode 100644 index 00000000000..154a68dcb83 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_cpld.c @@ -0,0 +1,1132 @@ +/* + * A CPLD driver for the porsche + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef pegatron_porsche_DEBUG +/*#define pegatron_porsche_DEBUG*/ +#ifdef pegatron_porsche_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define CPLD_SFP_MAX_GROUP 3 +#define SFP_PORT_MAX_NUM 54 +#define SFP_EEPROM_SIZE 256 +#define QSFP_FIRST_PORT 48 +#define CPLDA_SFP_NUM 24 +#define CPLDB_SFP_NUM 12 +#define CPLDC_SFP_NUM 18 +#define CPLDA_ADDRESS 0x74 +#define CPLDB_ADDRESS 0x75 +#define CPLDC_ADDRESS 0x76 +#define CPLD_VERSION_REG 0x0 +#define SYNC_CONTROL_REG 0x1 +#define CPLD_SYS_PWR_LED_REG 0xD +#define CPLD_LOC_FAN_LED_REG 0xE +#define CPLD_EEPROM_WRITE_REG 0x12 +#define CPLD_PSU_REG 0x15 +#define SFP_13_36_SCL_BASE 0x4 +#define SFP_1_12_SCL_BASE 0x2 +#define SFP_37_54_SCL_BASE 0x5 +#define SFP_13_36_STATUS_BASE 0x8 +#define SFP_1_12_STATUS_BASE 0x5 +#define SFP_37_54_STATUS_BASE 0x9 +#define QSFP_PRESENT_ADDRESS 0xF +#define QSFP_RESET_ADDRESS_BASE 0x10 +#define QSFP_MODSELN_ADDRESS 0x17 +#define QSFP_LOW_POWER_ADDRESS 0x18 +#define CPLD_SERIAL_LED_BIT 2 +#define CPLD_EEPROM_WRITE_BIT 2 +#define SFP_PRESENT_BASE 0 +#define SFP_RXLOSS_BASE 1 +#define SFP_TXFAULT_BASE 2 +#define SFP_TXDISABLE_BASE 3 +#define CPLD_PSU_PWOK_BASE 0 +#define CPLD_PSU_PRESENT_BASE 2 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +static LIST_HEAD(cpld_client_list); +static struct mutex list_lock; +/* Addresses scanned for pegatron_porsche_cpld + */ +static const unsigned short normal_i2c[] = { CPLDA_ADDRESS, CPLDB_ADDRESS, CPLDC_ADDRESS, I2C_CLIENT_END }; + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +int pegatron_porsche_cpld_read(unsigned short addr, u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int data = -EPERM; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == addr) { + data = i2c_smbus_read_byte_data(cpld_node->client, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, addr, reg, data)); + break; + } + } + + mutex_unlock(&list_lock); + + return data; +} +EXPORT_SYMBOL(pegatron_porsche_cpld_read); + +int pegatron_porsche_cpld_write(unsigned short addr, u8 reg, u8 val) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == addr) { + ret = i2c_smbus_write_byte_data(cpld_node->client, reg, val); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, addr, reg, val)); + break; + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(pegatron_porsche_cpld_write); + +static ssize_t read_cpld_HWversion(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_VERSION_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%02x\n", (data >> 5) & 0x7); +} + +static ssize_t read_cpld_SWversion(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_VERSION_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + + return sprintf(buf, "%02x\n", (data & 0x1f)); +} + +static ssize_t show_allled_ctrl(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x3; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_allled_ctrl(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = val | (data & 0xfc); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_serial_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = SYNC_CONTROL_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, CPLD_SERIAL_LED_BIT, val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_serial_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = SYNC_CONTROL_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, CPLD_SERIAL_LED_BIT); + else + CLEAR_BIT(data, CPLD_SERIAL_LED_BIT); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_sys_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> 5) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_sys_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 5) | (data & 0x1f); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t show_pwr_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> 2) & 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_pwr_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_SYS_PWR_LED_REG; + long val = 0; + + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 2) | (data & 0xe3); + + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t show_loc_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data>>4) & 0x3; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_loc_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = (val << 4) | (data & 0xf); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_fan_led(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data &= 0x7; + + return sprintf(buf, "%02x\n", data); +} + +static ssize_t set_fan_led(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_LOC_FAN_LED_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + data = val | (data & 0xf8); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t show_eeprom_write_enable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = CPLD_EEPROM_WRITE_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, reg, val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_eeprom_write_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = CPLD_EEPROM_WRITE_REG; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, CPLD_EEPROM_WRITE_BIT); + else + CLEAR_BIT(data, CPLD_EEPROM_WRITE_BIT); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t read_psu_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = CPLD_PSU_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (CPLD_PSU_PRESENT_BASE + attr->index), val); + + return sprintf(buf, "%02x\n", val); +} + +static ssize_t read_psu_status(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val=0, reg = CPLD_PSU_REG; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (CPLD_PSU_PWOK_BASE + attr->index), val); + + return sprintf(buf, "%02x\n", val); +} + +#define GET_SFP_STATUS_ADDRESS(idx, reg) \ + if(idx < CPLDB_SFP_NUM) \ + reg = SFP_1_12_STATUS_BASE + (idx / 2); \ + else if(idx < CPLDA_SFP_NUM + CPLDB_SFP_NUM) \ + reg = SFP_13_36_STATUS_BASE + ((idx-CPLDB_SFP_NUM) / 2); \ + else \ + reg = SFP_37_54_STATUS_BASE + ((idx-CPLDB_SFP_NUM-CPLDA_SFP_NUM) / 2) + +static ssize_t get_sfp_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_PRESENT_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_sfp_tx_disable(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} +static ssize_t set_sfp_tx_disable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = pegatron_porsche_cpld_read(client->addr, reg); + + if(val) + SET_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2)); + else + CLEAR_BIT(data, SFP_TXDISABLE_BASE + 4*(attr->index % 2)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} +static ssize_t get_sfp_rx_loss(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_RXLOSS_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n", val); +} +static ssize_t get_sfp_tx_fault(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = 0, data = 0, val = 0; + + GET_SFP_STATUS_ADDRESS(attr->index, reg); + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, SFP_TXFAULT_BASE + 4*(attr->index % 2), val); + + return sprintf(buf, "%d\n",val); +} + +static ssize_t get_qsfp_present(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_PRESENT_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t get_qsfp_reset(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = (QSFP_RESET_ADDRESS_BASE + attr->index % QSFP_FIRST_PORT / 4), data =0; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (data >> ((attr->index % QSFP_FIRST_PORT % 4)*2)) & 0x3; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t set_qsfp_reset(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 reg = (QSFP_RESET_ADDRESS_BASE + attr->index % QSFP_FIRST_PORT / 4), data = 0; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + data = (val & 0x3) << ((attr->index % QSFP_FIRST_PORT % 4)*2); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t get_qsfp_lowpower(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_LOW_POWER_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_qsfp_lowpower(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = QSFP_LOW_POWER_ADDRESS; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, (attr->index % QSFP_FIRST_PORT)); + else + CLEAR_BIT(data, (attr->index % QSFP_FIRST_PORT)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static ssize_t get_qsfp_modeseln(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, val = 0, reg = QSFP_MODSELN_ADDRESS; + + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + GET_BIT(data, (attr->index % QSFP_FIRST_PORT), val); + return sprintf(buf, "%02x\n", val); +} + +static ssize_t set_qsfp_modeseln(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + u8 data = 0, reg = QSFP_MODSELN_ADDRESS; + long val = 0; + + if (kstrtol(buf, 16, &val)) + { + return -EINVAL; + } + data = pegatron_porsche_cpld_read(client->addr, reg); + DBG(printk(KERN_ALERT "%s - addr: 0x%x, reg: %x, data: %x\r\n", __func__, client->addr, reg, data)); + if(val) + SET_BIT(data, (attr->index % QSFP_FIRST_PORT)); + else + CLEAR_BIT(data, (attr->index % QSFP_FIRST_PORT)); + + pegatron_porsche_cpld_write(client->addr, reg, data); + + return count; +} + +static SENSOR_DEVICE_ATTR(cpld_hw_version, S_IRUGO, read_cpld_HWversion, NULL, 0); +static SENSOR_DEVICE_ATTR(cpld_sw_version, S_IRUGO, read_cpld_SWversion, NULL, 0); +static SENSOR_DEVICE_ATTR(cpld_allled_ctrl, S_IRUGO | S_IWUSR, show_allled_ctrl, set_allled_ctrl, 0); +static SENSOR_DEVICE_ATTR(serial_led_enable, S_IRUGO | S_IWUSR, show_serial_led, set_serial_led, 0); +static SENSOR_DEVICE_ATTR(sys_led, S_IRUGO | S_IWUSR, show_sys_led, set_sys_led, 0); +static SENSOR_DEVICE_ATTR(pwr_led, S_IRUGO | S_IWUSR, show_pwr_led, set_pwr_led, 0); +static SENSOR_DEVICE_ATTR(loc_led, S_IRUGO | S_IWUSR, show_loc_led, set_loc_led, 0); +static SENSOR_DEVICE_ATTR(fan_led, S_IRUGO | S_IWUSR, show_fan_led, set_fan_led, 0); +static SENSOR_DEVICE_ATTR(eeprom_write_enable, S_IRUGO | S_IWUSR, show_eeprom_write_enable, set_eeprom_write_enable, 0); +static SENSOR_DEVICE_ATTR(psu_1_present, S_IRUGO, read_psu_present, NULL, 1); +static SENSOR_DEVICE_ATTR(psu_2_present, S_IRUGO, read_psu_present, NULL, 0); +static SENSOR_DEVICE_ATTR(psu_1_status, S_IRUGO, read_psu_status, NULL, 1); +static SENSOR_DEVICE_ATTR(psu_2_status, S_IRUGO, read_psu_status, NULL, 0); + +#define SET_SFP_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(sfp##_num##_present, S_IRUGO, get_sfp_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_tx_disable, S_IRUGO | S_IWUSR, get_sfp_tx_disable, set_sfp_tx_disable, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_rx_loss, S_IRUGO, get_sfp_rx_loss, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_tx_fault, S_IRUGO, get_sfp_tx_fault, NULL, _num-1) + +#define SET_QSFP_ATTR(_num) \ + static SENSOR_DEVICE_ATTR(sfp##_num##_present, S_IRUGO, get_qsfp_present, NULL, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_reset, S_IRUGO | S_IWUSR, get_qsfp_reset, set_qsfp_reset, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_lowpower, S_IRUGO | S_IWUSR, get_qsfp_lowpower, set_qsfp_lowpower, _num-1); \ + static SENSOR_DEVICE_ATTR(sfp##_num##_modeseln, S_IRUGO | S_IWUSR, get_qsfp_modeseln, set_qsfp_modeseln, _num-1) + +SET_SFP_ATTR(1);SET_SFP_ATTR(2);SET_SFP_ATTR(3);SET_SFP_ATTR(4);SET_SFP_ATTR(5);SET_SFP_ATTR(6);SET_SFP_ATTR(7);SET_SFP_ATTR(8);SET_SFP_ATTR(9); +SET_SFP_ATTR(10);SET_SFP_ATTR(11);SET_SFP_ATTR(12);SET_SFP_ATTR(13);SET_SFP_ATTR(14);SET_SFP_ATTR(15);SET_SFP_ATTR(16);SET_SFP_ATTR(17);SET_SFP_ATTR(18); +SET_SFP_ATTR(19);SET_SFP_ATTR(20);SET_SFP_ATTR(21);SET_SFP_ATTR(22);SET_SFP_ATTR(23);SET_SFP_ATTR(24);SET_SFP_ATTR(25);SET_SFP_ATTR(26);SET_SFP_ATTR(27); +SET_SFP_ATTR(28);SET_SFP_ATTR(29);SET_SFP_ATTR(30);SET_SFP_ATTR(31);SET_SFP_ATTR(32);SET_SFP_ATTR(33);SET_SFP_ATTR(34);SET_SFP_ATTR(35);SET_SFP_ATTR(36); +SET_SFP_ATTR(37);SET_SFP_ATTR(38);SET_SFP_ATTR(39);SET_SFP_ATTR(40);SET_SFP_ATTR(41);SET_SFP_ATTR(42);SET_SFP_ATTR(43);SET_SFP_ATTR(44);SET_SFP_ATTR(45); +SET_SFP_ATTR(46);SET_SFP_ATTR(47);SET_SFP_ATTR(48); +SET_QSFP_ATTR(49);SET_QSFP_ATTR(50);SET_QSFP_ATTR(51);SET_QSFP_ATTR(52);SET_QSFP_ATTR(53);SET_QSFP_ATTR(54); + +static struct attribute *pegatron_porsche_cpldA_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + + &sensor_dev_attr_sfp13_present.dev_attr.attr, + &sensor_dev_attr_sfp13_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp13_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp13_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp14_present.dev_attr.attr, + &sensor_dev_attr_sfp14_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp14_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp14_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp15_present.dev_attr.attr, + &sensor_dev_attr_sfp15_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp15_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp15_tx_fault.dev_attr.attr, + + + &sensor_dev_attr_sfp16_present.dev_attr.attr, + &sensor_dev_attr_sfp16_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp16_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp16_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp17_present.dev_attr.attr, + &sensor_dev_attr_sfp17_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp17_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp17_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp18_present.dev_attr.attr, + &sensor_dev_attr_sfp18_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp18_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp18_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp19_present.dev_attr.attr, + &sensor_dev_attr_sfp19_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp19_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp19_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp20_present.dev_attr.attr, + &sensor_dev_attr_sfp20_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp20_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp20_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp21_present.dev_attr.attr, + &sensor_dev_attr_sfp21_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp21_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp21_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp22_present.dev_attr.attr, + &sensor_dev_attr_sfp22_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp22_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp22_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp23_present.dev_attr.attr, + &sensor_dev_attr_sfp23_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp23_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp23_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp24_present.dev_attr.attr, + &sensor_dev_attr_sfp24_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp24_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp24_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp25_present.dev_attr.attr, + &sensor_dev_attr_sfp25_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp25_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp25_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp26_present.dev_attr.attr, + &sensor_dev_attr_sfp26_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp26_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp26_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp27_present.dev_attr.attr, + &sensor_dev_attr_sfp27_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp27_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp27_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp28_present.dev_attr.attr, + &sensor_dev_attr_sfp28_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp28_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp28_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp29_present.dev_attr.attr, + &sensor_dev_attr_sfp29_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp29_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp29_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp30_present.dev_attr.attr, + &sensor_dev_attr_sfp30_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp30_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp30_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp31_present.dev_attr.attr, + &sensor_dev_attr_sfp31_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp31_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp31_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp32_present.dev_attr.attr, + &sensor_dev_attr_sfp32_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp32_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp32_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp33_present.dev_attr.attr, + &sensor_dev_attr_sfp33_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp33_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp33_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp34_present.dev_attr.attr, + &sensor_dev_attr_sfp34_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp34_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp34_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp35_present.dev_attr.attr, + &sensor_dev_attr_sfp35_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp35_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp35_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp36_present.dev_attr.attr, + &sensor_dev_attr_sfp36_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp36_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp36_tx_fault.dev_attr.attr, + + NULL +}; + +static struct attribute *pegatron_porsche_cpldB_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + &sensor_dev_attr_cpld_allled_ctrl.dev_attr.attr, + &sensor_dev_attr_serial_led_enable.dev_attr.attr, + &sensor_dev_attr_sys_led.dev_attr.attr, + &sensor_dev_attr_pwr_led.dev_attr.attr, + &sensor_dev_attr_loc_led.dev_attr.attr, + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_eeprom_write_enable.dev_attr.attr, + &sensor_dev_attr_psu_1_present.dev_attr.attr, + &sensor_dev_attr_psu_2_present.dev_attr.attr, + &sensor_dev_attr_psu_1_status.dev_attr.attr, + &sensor_dev_attr_psu_2_status.dev_attr.attr, + + &sensor_dev_attr_sfp1_present.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp1_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp2_present.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp2_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp3_present.dev_attr.attr, + &sensor_dev_attr_sfp3_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp3_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp3_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp4_present.dev_attr.attr, + &sensor_dev_attr_sfp4_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp4_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp4_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp5_present.dev_attr.attr, + &sensor_dev_attr_sfp5_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp5_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp5_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp6_present.dev_attr.attr, + &sensor_dev_attr_sfp6_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp6_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp6_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp7_present.dev_attr.attr, + &sensor_dev_attr_sfp7_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp7_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp7_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp8_present.dev_attr.attr, + &sensor_dev_attr_sfp8_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp8_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp8_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp9_present.dev_attr.attr, + &sensor_dev_attr_sfp9_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp9_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp9_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp10_present.dev_attr.attr, + &sensor_dev_attr_sfp10_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp10_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp10_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp11_present.dev_attr.attr, + &sensor_dev_attr_sfp11_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp11_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp11_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp12_present.dev_attr.attr, + &sensor_dev_attr_sfp12_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp12_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp12_tx_fault.dev_attr.attr, + NULL +}; + +static struct attribute *pegatron_porsche_cpldC_attributes[] = { + &sensor_dev_attr_cpld_hw_version.dev_attr.attr, + &sensor_dev_attr_cpld_sw_version.dev_attr.attr, + + &sensor_dev_attr_sfp37_present.dev_attr.attr, + &sensor_dev_attr_sfp37_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp37_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp37_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp38_present.dev_attr.attr, + &sensor_dev_attr_sfp38_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp38_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp38_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp39_present.dev_attr.attr, + &sensor_dev_attr_sfp39_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp39_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp39_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp40_present.dev_attr.attr, + &sensor_dev_attr_sfp40_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp40_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp40_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp41_present.dev_attr.attr, + &sensor_dev_attr_sfp41_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp41_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp41_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp42_present.dev_attr.attr, + &sensor_dev_attr_sfp42_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp42_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp42_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp43_present.dev_attr.attr, + &sensor_dev_attr_sfp43_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp43_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp43_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp44_present.dev_attr.attr, + &sensor_dev_attr_sfp44_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp44_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp44_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp45_present.dev_attr.attr, + &sensor_dev_attr_sfp45_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp45_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp45_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp46_present.dev_attr.attr, + &sensor_dev_attr_sfp46_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp46_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp46_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp47_present.dev_attr.attr, + &sensor_dev_attr_sfp47_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp47_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp47_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp48_present.dev_attr.attr, + &sensor_dev_attr_sfp48_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp48_rx_loss.dev_attr.attr, + &sensor_dev_attr_sfp48_tx_fault.dev_attr.attr, + + &sensor_dev_attr_sfp49_present.dev_attr.attr, + &sensor_dev_attr_sfp49_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp49_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp49_reset.dev_attr.attr, + + &sensor_dev_attr_sfp50_present.dev_attr.attr, + &sensor_dev_attr_sfp50_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp50_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp50_reset.dev_attr.attr, + + &sensor_dev_attr_sfp51_present.dev_attr.attr, + &sensor_dev_attr_sfp51_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp51_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp51_reset.dev_attr.attr, + + &sensor_dev_attr_sfp52_present.dev_attr.attr, + &sensor_dev_attr_sfp52_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp52_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp52_reset.dev_attr.attr, + + &sensor_dev_attr_sfp53_present.dev_attr.attr, + &sensor_dev_attr_sfp53_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp53_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp53_reset.dev_attr.attr, + + &sensor_dev_attr_sfp54_present.dev_attr.attr, + &sensor_dev_attr_sfp54_lowpower.dev_attr.attr, + &sensor_dev_attr_sfp54_modeseln.dev_attr.attr, + &sensor_dev_attr_sfp54_reset.dev_attr.attr, + NULL +}; + +static const struct attribute_group pegatron_porsche_cpldA_group = { .attrs = pegatron_porsche_cpldA_attributes}; +static const struct attribute_group pegatron_porsche_cpldB_group = { .attrs = pegatron_porsche_cpldB_attributes}; +static const struct attribute_group pegatron_porsche_cpldC_group = { .attrs = pegatron_porsche_cpldC_attributes}; + +static void pegatron_porsche_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + + if (!node) { + dev_dbg(&client->dev, "Can't allocate cpld_client_node (0x%x)\n", client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +static void pegatron_porsche_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + + mutex_unlock(&list_lock); +} + +static int pegatron_porsche_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + /* Register sysfs hooks */ + switch(client->addr) + { + case CPLDA_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldA_group); + break; + case CPLDB_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldB_group); + break; + case CPLDC_ADDRESS: + status = sysfs_create_group(&client->dev.kobj, &pegatron_porsche_cpldC_group); + break; + default: + dev_dbg(&client->dev, "i2c_check_CPLD failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + break; + } + + if (status) { + goto exit; + } + + dev_info(&client->dev, "chip found\n"); + pegatron_porsche_cpld_add_client(client); + + return 0; + +exit: + return status; +} + +static int pegatron_porsche_cpld_remove(struct i2c_client *client) +{ + switch(client->addr) + { + case CPLDA_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldA_group); + break; + case CPLDB_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldB_group); + break; + case CPLDC_ADDRESS: + sysfs_remove_group(&client->dev.kobj, &pegatron_porsche_cpldC_group); + break; + default: + dev_dbg(&client->dev, "i2c_remove_CPLD failed (0x%x)\n", client->addr); + break; + } + + + pegatron_porsche_cpld_remove_client(client); + return 0; +} + +static const struct i2c_device_id pegatron_porsche_cpld_id[] = { + { "porsche_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pegatron_porsche_cpld_id); + +static struct i2c_driver pegatron_porsche_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "pegatron_porsche_cpld", + }, + .probe = pegatron_porsche_cpld_probe, + .remove = pegatron_porsche_cpld_remove, + .id_table = pegatron_porsche_cpld_id, + .address_list = normal_i2c, +}; + +static int __init pegatron_porsche_cpld_init(void) +{ + mutex_init(&list_lock); + + return i2c_add_driver(&pegatron_porsche_cpld_driver); +} + +static void __exit pegatron_porsche_cpld_exit(void) +{ + i2c_del_driver(&pegatron_porsche_cpld_driver); +} + +MODULE_AUTHOR("Peter5 Lin "); +MODULE_DESCRIPTION("pegatron_porsche_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(pegatron_porsche_cpld_init); +module_exit(pegatron_porsche_cpld_exit); diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c new file mode 100644 index 00000000000..5d5d64b15e1 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/modules/pegatron_porsche_sfp.c @@ -0,0 +1,431 @@ +/* + * A SFP driver for the porsche platform + * + * Copyright (C) 2018 Pegatron Corporation. + * Peter5_Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef PEGA_DEBUG +/*#define PEGA_DEBUG*/ +#ifdef PEGA_DEBUG +#define DBG(x) x +#else +#define DBG(x) +#endif /* DEBUG */ + +#define SFP_EEPROM_SIZE 256 +#define SFP_EEPROM_A0_ADDR 0x50 +#define SFP_EEPROM_A2_ADDR 0x51 +#define SFP_EEPROM_BUS_TYPE I2C_SMBUS_I2C_BLOCK_DATA +#define CPLDA_SFP_NUM 24 +#define CPLDB_SFP_NUM 12 +#define CPLDC_SFP_NUM 18 +#define CPLDA_ADDRESS 0x74 +#define CPLDB_ADDRESS 0x75 +#define CPLDC_ADDRESS 0x76 +#define SFP_13_36_SCL_BASE 0x4 +#define SFP_1_12_SCL_BASE 0x2 +#define SFP_37_54_SCL_BASE 0x5 +#define QSFP_I2C_ENABLE_BASE 0x17 +#define GET_BIT(data, bit, value) value = (data >> bit) & 0x1 +#define SET_BIT(data, bit) data |= (1 << bit) +#define CLEAR_BIT(data, bit) data &= ~(1 << bit) + +enum cpld_croups { cpld_group_a, cpld_group_b, cpld_group_c}; + +static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_ADDR, SFP_EEPROM_A2_ADDR, I2C_CLIENT_END }; +static char *SFP_CPLD_GROUPA_MAPPING[CPLDA_SFP_NUM][16]={0}; +static char *SFP_CPLD_GROUPB_MAPPING[CPLDB_SFP_NUM][16]={0}; +static char *SFP_CPLD_GROUPC_MAPPING[CPLDC_SFP_NUM][16]={0}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned io_limit = 128; +module_param(io_limit, uint, 0); +MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned write_timeout = 25; +module_param(write_timeout, uint, 0); +MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); + + +struct porsche_sfp_data { + struct mutex lock; + struct bin_attribute bin; + int use_smbus; + kernel_ulong_t driver_data; + + struct i2c_client *client; +}; + +extern int pegatron_porsche_cpld_read(unsigned short cpld_addr, u8 reg); +extern int pegatron_porsche_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t porsche_sfp_eeprom_read(struct porsche_sfp_data *data, char *buf, + unsigned offset, size_t count) +{ + struct i2c_msg msg[2]; + u8 msgbuf[2]; + struct i2c_client *client = data->client; + unsigned long timeout, read_time; + int status; + + memset(msg, 0, sizeof(msg)); + + if (count > io_limit) + count = io_limit; + + /* Smaller eeproms can work given some SMBus extension calls */ + if (count > I2C_SMBUS_BLOCK_MAX) + count = I2C_SMBUS_BLOCK_MAX; + + /* + * Reads fail if the previous write didn't complete yet. We may + * loop a few times until this one succeeds, waiting at least + * long enough for one entire page write to work. + */ + timeout = jiffies + msecs_to_jiffies(write_timeout); + do { + read_time = jiffies; + switch (data->use_smbus) { + case I2C_SMBUS_I2C_BLOCK_DATA: + status = i2c_smbus_read_i2c_block_data(client, offset, + count, buf); + break; + case I2C_SMBUS_WORD_DATA: + status = i2c_smbus_read_word_data(client, offset); + if (status >= 0) { + buf[0] = status & 0xff; + if (count == 2) + buf[1] = status >> 8; + status = count; + } + break; + case I2C_SMBUS_BYTE_DATA: + status = i2c_smbus_read_byte_data(client, offset); + if (status >= 0) { + buf[0] = status; + status = count; + } + break; + default: + status = i2c_transfer(client->adapter, msg, 2); + if (status == 2) + status = count; + } + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", + count, offset, status, jiffies); + + if (status == count) + return count; + + /* REVISIT: at HZ=100, this is sloooow */ + msleep(1); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +static ssize_t porsche_sfp_read(struct porsche_sfp_data *data, + char *buf, loff_t off, size_t count) +{ + ssize_t retval = 0; + + if (unlikely(!count)) + return count; + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&data->lock); + + while (count) { + ssize_t status; + + status = porsche_sfp_eeprom_read(data, buf, off, count); + if (status <= 0) { + if (retval == 0) + retval = status; + break; + } + buf += status; + off += status; + count -= status; + retval += status; + } + + mutex_unlock(&data->lock); + + return retval; +} + +static ssize_t +porsche_sfp_bin_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, size_t count) +{ + int i; + u8 cpldData = 0; + struct porsche_sfp_data *data; + + /*SFP 1-12*/ + for(i=0; iattr.name, SFP_CPLD_GROUPB_MAPPING[i])) + { + pegatron_porsche_cpld_write(CPLDB_ADDRESS, SFP_1_12_SCL_BASE, i+1); + goto check_done; + } + } + /*SFP 13-36*/ + for(i=0; iattr.name, SFP_CPLD_GROUPA_MAPPING[i])) + { + pegatron_porsche_cpld_write(CPLDA_ADDRESS, SFP_13_36_SCL_BASE, i+1); + goto check_done; + } + } + + /*SFP 37-54*/ + for(i=0; iattr.name, SFP_CPLD_GROUPC_MAPPING[i])) + { + /* Enable QSFP i2c function */ + if(i >= 12) + { + cpldData = 0xff; + cpldData = pegatron_porsche_cpld_read(CPLDC_ADDRESS, QSFP_I2C_ENABLE_BASE); + CLEAR_BIT(cpldData, i-12); + pegatron_porsche_cpld_write(CPLDC_ADDRESS, QSFP_I2C_ENABLE_BASE, cpldData); + } + pegatron_porsche_cpld_write(CPLDC_ADDRESS, SFP_37_54_SCL_BASE, i+1); + goto check_done; + } + } + +check_done: + data = dev_get_drvdata(container_of(kobj, struct device, kobj)); + + return porsche_sfp_read(data, buf, off, count); +} + +#define SFP_EEPROM_ATTR(_num) \ + static struct bin_attribute sfp##_num##_eeprom_attr = { \ + .attr = { \ + .name = __stringify(sfp##_num##_eeprom), \ + .mode = S_IRUGO\ + }, \ + .size = SFP_EEPROM_SIZE, \ + .read = porsche_sfp_bin_read, \ + } + +SFP_EEPROM_ATTR(1);SFP_EEPROM_ATTR(2);SFP_EEPROM_ATTR(3);SFP_EEPROM_ATTR(4);SFP_EEPROM_ATTR(5);SFP_EEPROM_ATTR(6);SFP_EEPROM_ATTR(7);SFP_EEPROM_ATTR(8);SFP_EEPROM_ATTR(9); +SFP_EEPROM_ATTR(10);SFP_EEPROM_ATTR(11);SFP_EEPROM_ATTR(12);SFP_EEPROM_ATTR(13);SFP_EEPROM_ATTR(14);SFP_EEPROM_ATTR(15);SFP_EEPROM_ATTR(16);SFP_EEPROM_ATTR(17);SFP_EEPROM_ATTR(18); +SFP_EEPROM_ATTR(19);SFP_EEPROM_ATTR(20);SFP_EEPROM_ATTR(21);SFP_EEPROM_ATTR(22);SFP_EEPROM_ATTR(23);SFP_EEPROM_ATTR(24);SFP_EEPROM_ATTR(25);SFP_EEPROM_ATTR(26);SFP_EEPROM_ATTR(27); +SFP_EEPROM_ATTR(28);SFP_EEPROM_ATTR(29);SFP_EEPROM_ATTR(30);SFP_EEPROM_ATTR(31);SFP_EEPROM_ATTR(32);SFP_EEPROM_ATTR(33);SFP_EEPROM_ATTR(34);SFP_EEPROM_ATTR(35);SFP_EEPROM_ATTR(36); +SFP_EEPROM_ATTR(37);SFP_EEPROM_ATTR(38);SFP_EEPROM_ATTR(39);SFP_EEPROM_ATTR(40);SFP_EEPROM_ATTR(41);SFP_EEPROM_ATTR(42);SFP_EEPROM_ATTR(43);SFP_EEPROM_ATTR(44);SFP_EEPROM_ATTR(45); +SFP_EEPROM_ATTR(46);SFP_EEPROM_ATTR(47);SFP_EEPROM_ATTR(48);SFP_EEPROM_ATTR(49);SFP_EEPROM_ATTR(50);SFP_EEPROM_ATTR(51);SFP_EEPROM_ATTR(52);SFP_EEPROM_ATTR(53);SFP_EEPROM_ATTR(54); + +static struct bin_attribute *porsche_cpldA_sfp_epprom_attributes[] = { + &sfp13_eeprom_attr, &sfp14_eeprom_attr, &sfp15_eeprom_attr, &sfp16_eeprom_attr, &sfp17_eeprom_attr, &sfp18_eeprom_attr, &sfp19_eeprom_attr, &sfp20_eeprom_attr, + &sfp21_eeprom_attr, &sfp22_eeprom_attr, &sfp23_eeprom_attr, &sfp24_eeprom_attr, &sfp25_eeprom_attr, &sfp26_eeprom_attr, &sfp27_eeprom_attr, &sfp28_eeprom_attr, + &sfp29_eeprom_attr, &sfp30_eeprom_attr, &sfp31_eeprom_attr, &sfp32_eeprom_attr, &sfp33_eeprom_attr, &sfp34_eeprom_attr, &sfp35_eeprom_attr, &sfp36_eeprom_attr, + NULL +}; + +static struct bin_attribute *porsche_cpldB_sfp_epprom_attributes[] = { + &sfp1_eeprom_attr, &sfp2_eeprom_attr, &sfp3_eeprom_attr, &sfp4_eeprom_attr, &sfp5_eeprom_attr, &sfp6_eeprom_attr, &sfp7_eeprom_attr, &sfp8_eeprom_attr, + &sfp9_eeprom_attr, &sfp10_eeprom_attr, &sfp11_eeprom_attr, &sfp12_eeprom_attr, + NULL +}; + +static struct bin_attribute *porsche_cpldC_sfp_epprom_attributes[] = { + &sfp37_eeprom_attr, &sfp38_eeprom_attr, &sfp39_eeprom_attr, &sfp40_eeprom_attr, &sfp41_eeprom_attr, &sfp42_eeprom_attr, &sfp43_eeprom_attr, &sfp44_eeprom_attr, + &sfp45_eeprom_attr, &sfp46_eeprom_attr, &sfp47_eeprom_attr, &sfp48_eeprom_attr, &sfp49_eeprom_attr, &sfp50_eeprom_attr, &sfp51_eeprom_attr, &sfp52_eeprom_attr, + &sfp53_eeprom_attr, &sfp54_eeprom_attr, + NULL +}; + +static const struct attribute_group porsche_sfpA_group = { .bin_attrs = porsche_cpldA_sfp_epprom_attributes}; +static const struct attribute_group porsche_sfpB_group = { .bin_attrs = porsche_cpldB_sfp_epprom_attributes}; +static const struct attribute_group porsche_sfpC_group = { .bin_attrs = porsche_cpldC_sfp_epprom_attributes}; + +static int porsche_sfp_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +{ + int use_smbus = SFP_EEPROM_BUS_TYPE; + struct porsche_sfp_data *data; + int err, i; + unsigned num_addresses; + kernel_ulong_t magic; + + data = kzalloc(sizeof(struct porsche_sfp_data) , GFP_KERNEL); + if (!data) + return -ENOMEM; + + mutex_init(&data->lock); + data->use_smbus = use_smbus; + /* + * Export the EEPROM bytes through sysfs, since that's convenient. + * By default, only root should see the data (maybe passwords etc) + */ + + data->client = client; + data->driver_data = dev_id->driver_data; + + sysfs_bin_attr_init(&data->bin); + + switch(dev_id->driver_data) + { + case cpld_group_a: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpA_group); + if (err) + goto err_clients; + break; + case cpld_group_b: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpB_group); + if (err) + goto err_clients; + break; + case cpld_group_c: + err = sysfs_create_group(&client->dev.kobj, &porsche_sfpC_group); + if (err) + goto err_clients; + break; + default: + printk(KERN_ALERT "i2c_check_CPLD failed\n"); + err = -EIO; + break; + } + + i2c_set_clientdata(client, data); + + return 0; + +err_clients: + kfree(data); + return err; +} + +static int porsche_sfp_device_remove(struct i2c_client *client) +{ + struct porsche_sfp_data *data; + int i; + + data = i2c_get_clientdata(client); + + switch(data->driver_data) + { + case cpld_group_a: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpA_group); + break; + case cpld_group_b: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpB_group); + break; + case cpld_group_c: + sysfs_remove_group(&client->dev.kobj, &porsche_sfpC_group); + break; + default: + dev_dbg(&client->dev, "i2c_remove_CPLD failed (0x%x)\n", client->addr); + break; + } + + + return 0; +} + +static const struct i2c_device_id porsche_sfp_id[] = { + { "porsche_sfpA", cpld_group_a }, + { "porsche_sfpB", cpld_group_b }, + { "porsche_sfpC", cpld_group_c }, + {} +}; +MODULE_DEVICE_TABLE(i2c, porsche_sfp_id); + +static struct i2c_driver porsche_sfp_driver = { + .driver = { + .name = "pegatron_porsche_sfp", + }, + .probe = porsche_sfp_device_probe, + .remove = porsche_sfp_device_remove, + .id_table = porsche_sfp_id, + .address_list = normal_i2c, +}; + +static int __init porsche_sfp_init(void) +{ + int i; + + /*SFP 1-12*/ + for(i=0; i"); +MODULE_DESCRIPTION("porsche_cpld_mux driver"); +MODULE_LICENSE("GPL"); + +module_init(porsche_sfp_init); +module_exit(porsche_sfp_exit); + diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors b/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors new file mode 100755 index 00000000000..7f9426a0c5e --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/scripts/sensors @@ -0,0 +1,7 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" + +#To probe sensors not part of lm-sensors +if [ -r /usr/local/bin/porsche_sensors.py ]; then + python /usr/local/bin/porsche_sensors.py get_sensors +fi diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service b/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service new file mode 100644 index 00000000000..8e6f4344715 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/service/porsche-platform-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Pegastron porsche Platform initialization service +After=local-fs.target +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/pegatron_porsche_util.py install +ExecStop=/usr/local/bin/pegatron_porsche_util.py uninstall +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py new file mode 100755 index 00000000000..16662081d0c --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/pegatron_porsche_util.py @@ -0,0 +1,209 @@ +#!/usr/bin/env python +# +# Copyright (C) 2018 Pegatron, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +import sys, getopt +import logging +import os +import commands +import threading + +DEBUG = False + +SFP_MAX_NUM = 48 +CPLDA_SFP_NUM = 24 +CPLDB_SFP_NUM = 12 +CPLDC_SFP_NUM = 18 + +kernel_module = ['i2c_dev', 'i2c-mux-pca954x force_deselect_on_exit=1', 'at24', 'pegatron_porsche_cpld', 'pegatron_hwmon_mcu', 'pegatron_porsche_sfp'] +moduleID = ['pca9544', 'pca9544', '24c02', 'porsche_hwmon_mcu', 'porsche_cpld', 'porsche_cpld', 'porsche_cpld', 'porsche_sfpA', 'porsche_sfpB', 'porsche_sfpC'] +i2c_check_node = ['i2c-0', 'i2c-1'] +device_address = ['0x72', '0x73', '0x54', '0x70', '0x74', '0x75', '0x76', '0x50', '0x50', '0x50'] +device_node= ['i2c-2', 'i2c-6', 'i2c-4', 'i2c-5', 'i2c-6', 'i2c-7', 'i2c-8', 'i2c-6', 'i2c-7', 'i2c-8'] + +i2c_prefix = '/sys/bus/i2c/devices/' +cpld_bus = ['6-0074', '7-0075', '8-0076'] +led_nodes = ['sys_led', 'pwr_led', 'loc_led', 'fan_led', "cpld_allled_ctrl", "serial_led_enable"] + +def dbg_print(string): + if DEBUG == True: + print string + return + +def do_cmd(cmd, show): + logging.info('Run :' + cmd) + status, output = commands.getstatusoutput(cmd) + dbg_print(cmd + "with result:" + str(status)) + dbg_print("output:" + output) + if status: + logging.info('Failed :' + cmd) + if show: + print('Failed :' + cmd) + return status, output + +def check_device_position(num): + for i in range(0, len(i2c_check_node)): + status, output = do_cmd("echo " + moduleID[num] + " " + device_address[num] + " > " + i2c_prefix + i2c_check_node[i] + "/new_device", 0) + status, output = do_cmd("ls " + i2c_prefix + device_node[num], 0) + device_node[num] = i2c_check_node[i] + + if status: + status, output = do_cmd("echo " + device_address[num] + " > " + i2c_prefix + i2c_check_node[i] + "/delete_device", 0) + else: + return + + return + +def install_device(): + for i in range(0, len(moduleID)): + if moduleID[i] == "pca9544": + check_device_position(i) + else: + status, output = do_cmd("echo " + moduleID[i] + " " + device_address[i] + " > " + i2c_prefix + device_node[i] + "/new_device", 1) + + return + +def check_driver(): + for i in range(0, len(kernel_module)): + status, output = do_cmd("lsmod | grep " + kernel_module[i], 0) + if status: + status, output = do_cmd("modprobe " + kernel_module[i], 1) + + return + +def do_install(): + status, output = do_cmd("depmod -a", 1) + + check_driver() + install_device() + + return + +def do_uninstall(): + for i in range(0, len(kernel_module)): + status, output = do_cmd("modprobe -r " + kernel_module[i], 1) + + for i in range(0, len(moduleID)): + status, output = do_cmd("echo " + device_address[i] + " > " + i2c_prefix + i2c_check_node[i] + "/delete_device", 0) + + return + +led_command = {'sys_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'pwr_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'loc_led': {'on':'0', 'off':'1', 'blink':'2'}, + 'fan_led': {'green':'0', 'amber':'1', 'off':'2', 'blink_green':'3', 'blink_amber':'4'}, + 'cpld_allled_ctrl': {'off':'0', 'mix':'1', 'amber':'2', 'normal':'3'}, + 'serial_led_enable': {'disable':'0', 'enable':'1'}} + +def set_led(args): + """ + Usage: %(scriptName)s set led object command + + object: + sys_led : set SYS led [command: off|green|amber|blink_green|blink_amber] + pwr_led : set PWR led [command: off|green|amber|blink_green|blink_amber] + loc_led : set LOCATOR led [command: off|on|blink] + fan_led : set FAN led [command: off|green|amber|blink_green|blink_amber] + """ + if args[0] not in led_command: + print set_led.__doc__ + sys.exit(0) + + for i in range(0,len(led_nodes)): + if args[0] == led_nodes[i]: + node = i2c_prefix + cpld_bus[1] + '/'+ led_nodes[i] + + command = led_command[args[0]] + data = command[args[1]] + + status, output = do_cmd("echo "+ str(data) + " > "+ node, 1) + + return + +def set_device(args): + """ + Usage: %(scriptName)s command object + + command: + led : set status led sys_led|pwr_led|loc_led|mst_led|fan_led|digit_led + """ + + if args[0] == 'led': + set_led(args[1:]) + return + else: + print set_device.__doc__ + + return + +device_init = {'led': [['led', 'sys_led', 'green'], ['led', 'pwr_led', 'green'], ['led', 'fan_led', 'green'], ['led', 'cpld_allled_ctrl', 'normal'], ['led', 'serial_led_enable', 'enable']]} + +def pega_init(): + #set led + for i in range(0,len(device_init['led'])): + set_device(device_init['led'][i]) + + #set tx_disable + for x in range(0, SFP_MAX_NUM-1): + if x < CPLDB_SFP_NUM: + bus = cpld_bus[1] + elif x < CPLDB_SFP_NUM + CPLDA_SFP_NUM: + bus = cpld_bus[0] + else: + bus = cpld_bus[2] + + nodes = i2c_prefix + bus + '/sfp' + str(x+1) + '_tx_disable' + dbg_print("SFP_TX_DISABLE NODES: " + nodes) + status, output = do_cmd("echo 0 > "+ nodes, 1) + + return + +def main(): + """ + Usage: %(scriptName)s command object + + command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + set : change board setting [led] + debug : debug info [on/off] + """ + + if len(sys.argv)<2: + print main.__doc__ + + for arg in sys.argv[1:]: + if arg == 'install': + do_install() + pega_init() + elif arg == 'uninstall': + do_uninstall() + elif arg == 'set': + if len(sys.argv[2:])<1: + print main.__doc__ + else: + set_device(sys.argv[2:]) + return + elif arg == 'debug': + if sys.argv[2] == 'on': + DEBUG = True + else: + DEBUG = False + else: + print main.__doc__ + +if __name__ == "__main__": + main() diff --git a/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py new file mode 100755 index 00000000000..40e23ef01b7 --- /dev/null +++ b/platform/nephos/sonic-platform-modules-pegatron/porsche/utils/porsche_sensors.py @@ -0,0 +1,141 @@ +#!/usr/bin/python + +import os +import sys +import logging + +FAN_NUM = 5 +sensors_path = '/sys/bus/i2c/devices/5-0070/' +sensors_nodes = {'fan_rpm': ['_inner_rpm', '_outer_rpm'], + 'fan_vol': ['ADC8_vol', 'ADC7_vol','ADC6_vol', 'ADC5_vol','ADC4_vol', 'ADC3_vol'], + 'temp':['lm75_49_temp', 'lm75_48_temp', 'SA56004_local_temp','SA56004_remote_temp']} +sensors_type = {'fan_rpm': ['Inner RPM', 'Outer RPM'], + 'fan_vol': ['P0.2', 'P0.6','P0.1', 'P1.5','P0.7', 'P1.6'], + 'temp':['lm75_49_temp', 'lm75_48_temp', 'SA56004_local_temp','SA56004_remote_temp']} + +# Get sysfs attribute +def get_attr_value(attr_path): + retval = 'ERR' + if (not os.path.isfile(attr_path)): + return retval + + try: + with open(attr_path, 'r') as fd: + retval = fd.read() + except Exception as error: + logging.error("Unable to open ", attr_path, " file !") + + retval = retval.rstrip('\r\n') + fd.close() + return retval + +def get_fan_status(number): + attr_value = get_attr_value(sensors_path + "fan" + str(number+1) + "_present") + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + + if(attr_value == 0): + string = "Connect" + else: + string = "Disconnect" + return string + +def get_fan_alert(number): + attr_value = get_attr_value(sensors_path + "fan" + str(number+1) + "_status_alert") + if (attr_value != 'ERR'): + attr_value = int(attr_value, 16) + + if(attr_value == 0): + string = "Normal" + else: + string = "Abnormal" + return string + +def get_fan_inner_rpm(number): + return get_attr_value(sensors_path + "fan" + str(number+1) + "_inner_rpm") + +def get_fan_outer_rpm(number): + return get_attr_value(sensors_path + "fan" + str(number+1) + "_outer_rpm") + +def get_fan(): + for i in range(0,FAN_NUM): + print " " + #status + string = get_fan_status(i) + print "FAN " + str(i+1) + ":" + ' ' + string + if string=='Disconnect': + continue + + #alert + string = get_fan_alert(i) + print " Status:"+ ' ' + string + + #inner rpm + string = get_fan_inner_rpm(i) + print " Inner RPM:"+ string.rjust(10) + ' RPM' + + #outer rpm + string = get_fan_outer_rpm(i) + print " Outer RPM:"+ string.rjust(10) + ' RPM' + + return + +def get_hwmon(): + print " " + string = get_attr_value(sensors_path + "lm75_48_temp") + print "Sensor A: " + string + " C" + + string = get_attr_value(sensors_path + "lm75_49_temp") + print "Sensor B: " + string + " C" + + return + +def get_voltage(): + print " " + nodes = sensors_nodes['fan_vol'] + types = sensors_type['fan_vol'] + for i in range(0,len(nodes)): + string = get_attr_value(sensors_path + nodes[i]) + print types[i] + ': ' + string + " V" + + return + +def init_fan(): + return + +def main(): + """ + Usage: %(scriptName)s command object + + command: + install : install drivers and generate related sysfs nodes + clean : uninstall drivers and remove related sysfs nodes + show : show all systen status + set : change board setting with fan|led|sfp + """ + + if len(sys.argv)<2: + print main.__doc__ + + for arg in sys.argv[1:]: + if arg == 'fan_init': + init_fan() + elif arg == 'get_sensors': + ver = get_attr_value(sensors_path + "fb_hw_version") + print 'HW Version: ' + ver + ver = get_attr_value(sensors_path + "fb_fw_version") + print 'SW Version: ' + ver + get_fan() + get_hwmon() + get_voltage() + elif arg == 'fan_set': + if len(sys.argv[1:])<1: + print main.__doc__ + else: + set_fan(sys.argv[1:]) + return + else: + print main.__doc__ + +if __name__ == "__main__": + main() From 6bf252f45f6066e48dd81aa5013a70a114fc7da1 Mon Sep 17 00:00:00 2001 From: shawnli-van <43871303+shawnli-van@users.noreply.github.com> Date: Thu, 27 Dec 2018 20:58:30 -0800 Subject: [PATCH 30/30] [devices]: Fix arista-convertfs for aligning flash via sfdisk in Jessie (#2402) The sfdisk in Jessie use unit Cylinder by default. To perform 1M aligning partition, 2048 sector unit is desirable instead. --- files/initramfs-tools/arista-convertfs.j2 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/files/initramfs-tools/arista-convertfs.j2 b/files/initramfs-tools/arista-convertfs.j2 index ffe5797ab72..91633d8f5e6 100644 --- a/files/initramfs-tools/arista-convertfs.j2 +++ b/files/initramfs-tools/arista-convertfs.j2 @@ -172,7 +172,7 @@ umount "$root_mnt" if [ $(echo -n "$root_dev" | tail -c 1) == "1" ]; then # Create a new partition table (content in flash_dev will be deleted) err_msg="Error: repartitioning $flash_dev failed" - cmd="echo '2048' | sfdisk $flash_dev || (sleep 3; blockdev --rereadpt $flash_dev && fdisk -l $flash_dev | grep -q ${root_dev}.*Linux)" + cmd="echo '2048' | sfdisk -u S --force $flash_dev || (sleep 3; blockdev --rereadpt $flash_dev && fdisk -l $flash_dev | grep -q ${root_dev}.*Linux)" run_cmd "$cmd" "$err_msg" fi