Update History
-
v5.3.0 / 27-Jan-2023
+
v5.3.1 / 09-Nov-2023
Main Changes
Maintenance release
@@ -51,6 +52,48 @@
Contents
+Protect DMA intitialization function
+
+
+Block Fast Role Swap detection when Power Delivery is not activated
+
+
+Add management of DRP low power
+
+
+
+
Known Limitations
+
Outstanding bugs list : None
+
Requirements not met or planned in a forthcoming release : None
+
+
+IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6
+Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31
+STM32CubeIDE V1.8.0
+
+
Supported Devices and boards
+
All STM32G4xx devices embedding USBPD IP
+
Backward compatibility
+
No compatibility break with previous version
+
Dependencies
+
This software release is compatible with USB-C Power Delivery Core Stack Library v4.1.0 or higher
+
+
+
+
v5.3.0 / 27-Jan-2023
+
+
Main Changes
+
Maintenance release
+
Contents
+
Fixed bugs list
+
+
+
+
+
+
Align function name to official FRS BSP service
@@ -82,29 +125,29 @@ Contents
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31
STM32CubeIDE V1.8.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v4.1.0 or higher
v5.2.0 / 13-December-2021
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
Fixed bugs list
@@ -124,29 +167,29 @@ Contents
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31
STM32CubeIDE V1.7.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v4.0.0 or higher
v5.1.0 / 06-Jul-2021
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
Fixed bugs list
@@ -169,29 +212,29 @@ Contents
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.50.6
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.31
STM32CubeIDE V1.7.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v4.0.0
v5.0.0 / 26-Nov-2020
-
Main Changes
-
Maintenance release
-
Contents
+
Main Changes
+
Maintenance release
+
Contents
Fixed bugs list
@@ -214,28 +257,28 @@ Contents
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27
STM32CubeIDE V1.4.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v3.3.0
v4.1.0 / 17-Sep-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27
STM32CubeIDE V1.2.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v3.2.0
V4.0.1 / 6-June-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27
STM32CubeIDE V1.2.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
-
Dependencies
+
Backward compatibility
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v3.0.0
V4.0.0 / 26-Mar-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27
STM32CubeIDE V1.2.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
Implementation of CR Ticket 81963 and Ticket 81964 leads to some interface changes between USBPD Core and USBPD Device driver modules. In order to use this version of USBPD Device driver module, please ensure version of USBPD Core module is v3.0.0 or higher.
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v3.0.0
v3.1.0 / 04-Feb-2020
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.27
STM32CubeIDE v1.2.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v2.9.0
V3.0.0 / 20-Dec-2019
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list :
Identified issue on LeCroy test 4.10.2 regarding remaining VBUS voltage when externally powered. TC 4.10.2 OK requires either a Resistor value change on G4 EVAL board (MB1397) or an update in BSP drivers => [EVAL-G4] UCPD VBUS value when 5V external supply connected
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.26
STM32CubeIDE v1.2.0
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
Application needs to provide new interface to manage introduction of dynamic voltage (USBPD_PWR_IF_GetVBUSStatus function).
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v2.9.0
V2.8.0 / 06-May-2019
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25
System Workbench STM32 (SW4STM32) toolchain V2.7.2
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
This software release is compatible with USB-C Power Delivery Core Stack Library v2.6.0
V2.7.0 / 25-Mar-2019
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25
System Workbench STM32 (SW4STM32) toolchain V2.7.2
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
NA
V2.6.0 / 23-Jan-2019
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25
System Workbench STM32 (SW4STM32) toolchain V2.7.2
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
NA
V2.5.0 / 10-Dec-2018
-
Main Changes
-
Maintenance release
+
Main Changes
+
Maintenance release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25
System Workbench STM32 (SW4STM32) toolchain V2.7.2
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
NA
V2.4.0 / 15-Nov-2018
-
Main Changes
+
Main Changes
Initial release
@@ -647,20 +690,20 @@ Initial release
-
Known Limitations
+
Known Limitations
Outstanding bugs list : None
Requirements not met or planned in a forthcoming release : None
-
+
IAR Embedded Workbench for ARM (EWARM) toolchain V8.20.2
Keil Microcontroller Development Kit (MDK-ARM) toolchain V5.25
System Workbench STM32 (SW4STM32) toolchain V2.7.2
-
Supported Devices and boards
+
Supported Devices and boards
All STM32G4xx devices embedding USBPD IP
-
Backward compatibility
+
Backward compatibility
No compatibility break with previous version
-
Dependencies
+
Dependencies
NA
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
index 901480db0..e7200c02a 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_devices_conf_template.h
@@ -52,10 +52,10 @@ extern "C" {
usbpd_hw.c
-------------------------------------------------------------------------------*/
-/* defined used to configure function : USBPD_HW_GetUSPDInstance */
+/* Define used to configure function : USBPD_HW_GetUSPDInstance */
#define UCPD_INSTANCE0 UCPD1
-/* defined used to configure function : USBPD_HW_Init_DMARxInstance,USBPD_HW_DeInit_DMARxInstance */
+/* Define used to configure function : USBPD_HW_Init_DMARxInstance,USBPD_HW_DeInit_DMARxInstance */
#define UCPDDMA_INSTANCE0_CLOCKENABLE_RX \
do \
{ \
@@ -71,7 +71,7 @@ extern "C" {
#define UCPDDMA_INSTANCE0_CHANNEL_RX DMA1_Channel5
-/* defined used to configure function : USBPD_HW_Init_DMATxInstance, USBPD_HW_DeInit_DMATxInstance */
+/* Define used to configure function : USBPD_HW_Init_DMATxInstance, USBPD_HW_DeInit_DMATxInstance */
#define UCPDDMA_INSTANCE0_CLOCKENABLE_TX \
do \
{ \
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
index c88610000..73ab9fe35 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/inc/usbpd_hw.h
@@ -16,8 +16,13 @@
******************************************************************************
*/
-#ifndef USBPD_HW_H
-#define USBPD_HW_H
+#ifndef __USBPD_HW_H_
+#define __USBPD_HW_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Includes ------------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Variable containing ADC conversions results */
@@ -30,5 +35,9 @@ DMA_Channel_TypeDef *USBPD_HW_Init_DMATxInstance(uint8_t PortNum);
void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum);
uint32_t USBPD_HW_GetRpResistorValue(uint8_t Portnum);
void USBPD_HW_SetFRSSignalling(uint8_t Portnum, uint8_t cc);
-#endif /* USBPD_BSP_HW_H */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBPD_HW_H_ */
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
index 3fa97c265..9fba1debe 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_cad_hw_if.c
@@ -112,11 +112,11 @@ typedef struct
uint32_t CAD_tDebounceAcc_flag : 1;
uint32_t CAD_ErrorRecoveryflag : 1;
uint32_t CAD_ResistorUpdateflag : 1;
- USBPD_CAD_STATE cstate : 5; /* current state */
+ USBPD_CAD_STATE cstate : 5; /* Current state */
uint32_t CAD_Accessory_SRC : 1;
uint32_t CAD_Accessory_SNK : 1;
uint32_t reserved : 1;
- USBPD_CAD_STATE pstate : 5; /* previous state */
+ USBPD_CAD_STATE pstate : 5; /* Previous state */
#if defined(USBPDCORE_VPD)
uint32_t CAD_VPD_SRC : 1;
uint32_t CAD_VPD_SNK : 1;
@@ -136,8 +136,8 @@ typedef struct
*/
/* Private define ------------------------------------------------------------*/
-#define CAD_TPDDEBOUCE_THRESHOLD 12u /**< tPDDebounce threshold between 10 to 20ms */
-#define CAD_TCCDEBOUCE_THRESHOLD 120u /**< tCCDebounce threshold between 100 to 200ms */
+#define CAD_TPDDEBOUNCE_THRESHOLD 12u /**< tPDDebounce threshold between 10 to 20ms */
+#define CAD_TCCDEBOUNCE_THRESHOLD 120u /**< tCCDebounce threshold between 100 to 200ms */
#define CAD_TSRCDISCONNECT_THRESHOLD 2u /**< tSRCDisconnect detach threshold between 0 to 20ms */
#define CAD_INFINITE_TIME 0xFFFFFFFFu /**< infinite time to wait a new interrupt event */
#define CAD_TERROR_RECOVERY_TIME 26u /**< tErrorRecovery min 25ms */
@@ -160,7 +160,7 @@ typedef struct
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
-/* handle to manage the detection state machine */
+/* Handle to manage the detection state machine */
static CAD_HW_HandleTypeDef CAD_HW_Handles[USBPD_PORT_COUNT];
/* Private function prototypes -----------------------------------------------*/
@@ -175,7 +175,7 @@ static void CAD_Check_HW_SRC(uint8_t PortNum);
static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX);
static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX);
static uint32_t ManageStateDetached_SNK(uint8_t PortNum);
-static void CAD_Check_HW_SNK(uint8_t PortNum);
+static void CAD_Check_HW_SNK(uint8_t PortNum);
#endif /* _DRP || _SNK */
#if defined(_DRP)
@@ -228,10 +228,10 @@ void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum,
*/
/**
- * @brief function to initialize the cable detection state machine
- * @param PortNum port
+ * @brief Function to initialize the cable detection state machine
+ * @param PortNum Port number
* @param pSettings Pointer on PD settings based on @ref USBPD_SettingsTypeDef
- * @param pParams Pointer on PD params based on @ref USBPD_ParamsTypeDef
+ * @param pParams Pointer on PD parameters based on @ref USBPD_ParamsTypeDef
* @param WakeUp Wake-up callback function used for waking up CAD
* @retval None
*/
@@ -245,14 +245,16 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
Ports[PortNum].params->RpResistor = Ports[PortNum].settings->CAD_DefaultResistor;
Ports[PortNum].params->SNKExposedRP_AtAttach = vRd_Undefined;
+ /* Reset handle */
memset(_handle, 0, sizeof(CAD_HW_HandleTypeDef));
+ /* Register CAD wake up callback */
Ports[PortNum].USBPD_CAD_WakeUp = WakeUp;
/* Initialize the USBPD_IP */
Ports[PortNum].husbpd = USBPD_HW_GetUSPDInstance(PortNum);
- /* Initialize usbpd */
+ /* Initialize UCPD */
LL_UCPD_StructInit(&settings);
(void)LL_UCPD_Init(Ports[PortNum].husbpd, &settings);
LL_UCPD_SetRxOrderSet(Ports[PortNum].husbpd,
@@ -267,6 +269,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
LL_UCPD_WakeUpEnable(Ports[PortNum].husbpd);
#endif /* _LOW_POWER */
+ /* Disable dead battery */
LL_PWR_DisableUCPDDeadBattery(); /* PWR->CR3 |= (1 << 14); */
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); /* GPIOB enable RCC->AHB2ENR |= 2; */
@@ -317,6 +320,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
#if defined(_DRP)
if (Ports[PortNum].settings->CAD_RoleToggle == USBPD_TRUE)
{
+ /* Set current state machine to DRP state machine */
_handle->CAD_PtrStateMachine = CAD_StateMachine_DRP;
_handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport;
#if defined(USBPDCORE_VPD)
@@ -327,8 +331,10 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
#endif /* _DRP */
{
#if defined(_SRC)
+ /* If default role is source */
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole)
{
+ /* Set current state machine to SRC state machine */
_handle->CAD_PtrStateMachine = CAD_StateMachine_SRC;
_handle->CAD_Accessory_SRC = Ports[PortNum].settings->CAD_AccesorySupport;
#if defined(USBPDCORE_VPD)
@@ -339,6 +345,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
#endif /* _SRC */
{
#if defined(_SNK)
+ /* Set current state machine to SNK state machine */
_handle->CAD_PtrStateMachine = CAD_StateMachine_SNK;
_handle->CAD_Accessory_SNK = Ports[PortNum].settings->CAD_AccesorySupport;
#if defined(USBPDCORE_VPD)
@@ -349,8 +356,10 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
}
#else /* USBPDCORE_LIB_NO_PD */
#if defined(_SRC)
+ /* If default role is source */
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].settings->PE_DefaultRole)
{
+ /* Set current state machine to SRC state machine */
_handle->CAD_PtrStateMachine = CAD_StateMachine_SRC;
#if defined(USBPDCORE_VPD)
_handle->CAD_VPD_SRC = Ports[PortNum].settings->CAD_VPDSupport;
@@ -360,6 +369,7 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
#endif /* _SRC */
{
#if defined(_SNK)
+ /* Set current state machine to SNK state machine */
_handle->CAD_PtrStateMachine = CAD_StateMachine_SNK;
#if defined(USBPDCORE_VPD)
_handle->CAD_VPD_SNK = Ports[PortNum].settings->CAD_VPDSupport;
@@ -370,22 +380,23 @@ void CAD_Init(uint8_t PortNum, USBPD_SettingsTypeDef *pSettings, USBPD_ParamsTyp
}
/**
- * @brief function to force CAD state machine into error recovery state
+ * @brief Function to force CAD state machine into error recovery state
* @param PortNum Index of current used port
* @retval None
*/
void CAD_Enter_ErrorRecovery(uint8_t PortNum)
{
- /* remove the ucpd resistor */
+ /* Remove the ucpd resistor */
USBPDM1_EnterErrorRecovery(PortNum);
- /* set the error recovery flag to allow the stack to switch into errorRecovery Flag */
+ /* Set the error recovery flag to allow the stack to switch into errorRecovery Flag */
CAD_HW_Handles[PortNum].CAD_ErrorRecoveryflag = USBPD_TRUE;
+ /* Wake up CAD task */
Ports[PortNum].USBPD_CAD_WakeUp();
}
#if defined(USBPDCORE_DRP) || defined(USBPDCORE_SRC)
/**
- * @brief function to force the value of the RP resistor
+ * @brief Function to force the value of the RP resistor
* @note Must be called only if you want change the settings value
* @param PortNum Index of current used port
* @param RpValue RP value to set in devices based on @ref CAD_RP_Source_Current_Adv_Typedef
@@ -393,11 +404,12 @@ void CAD_Enter_ErrorRecovery(uint8_t PortNum)
*/
uint32_t CAD_SRC_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef RpValue)
{
- /* update the information about the default resistor value presented in detach mode */
+ /* Update the information about the default resistor value presented in detach mode */
Ports[PortNum].params->RpResistor = RpValue;
- /* inform state machine about a resistor update */
+ /* Inform state machine about a resistor update */
CAD_HW_Handles[PortNum].CAD_ResistorUpdateflag = USBPD_TRUE;
+ /* Wake up CAD task */
Ports[PortNum].USBPD_CAD_WakeUp();
return 0;
}
@@ -411,14 +423,14 @@ uint32_t CAD_Set_ResistorRp(uint8_t PortNum, CAD_RP_Source_Current_Adv_Typedef R
/**
- * @brief CAD State machine
+ * @brief CAD State machine for sink role
* @param PortNum Port
* @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
* @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
* @retval Timeout value
*/
#if defined(_SNK)
-/* function to handle SNK and SNK + ACCESSORY OPTION */
+/* Function to handle SNK and SNK + ACCESSORY OPTION */
uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -428,7 +440,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
BSP_USBPD_PWR_VCCSetState(PortNum, 1);
#endif /* USBPDM1_VCC_FEATURE_ENABLED */
- /*Check CAD STATE*/
+ /* Check CAD STATE */
switch (_handle->cstate)
{
case USBPD_CAD_STATE_DETACHED:
@@ -502,8 +514,8 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
{
case LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRA : /* Audio accessory */
{
- /* check if the device is still connected after the debouce timing */
- if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUCE_THRESHOLD)
+ /* Check if the device is still connected after the debounce timing */
+ if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD)
{
_handle->cstate = USBPD_CAD_STATE_AUDIO_ACCESSORY;
*pEvent = USBPD_CAD_EVENT_ACCESSORY;
@@ -514,7 +526,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
case LL_UCPD_SRC_CC1_VRD | LL_UCPD_SRC_CC2_VRA: /* VPD CC1 */
case LL_UCPD_SRC_CC1_VRA | LL_UCPD_SRC_CC2_VRD: /* VPD CC2 */
{
- if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUCE_THRESHOLD)
+ if (HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TCCDEBOUNCE_THRESHOLD)
{
_handle->cstate = USBPD_CAD_STATE_POWERED_ACCESSORY;
*pEvent = USPPD_CAD_EVENT_VPD;
@@ -536,7 +548,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
#endif /* USBPDCORE_VPD */
default :
{
- if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TCCDEBOUCE_THRESHOLD)
+ if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TCCDEBOUNCE_THRESHOLD)
{
/* Get the time of this event */
_handle->CAD_tToggle_start = HAL_GetTick();
@@ -551,7 +563,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
case USBPD_CAD_STATE_AUDIO_ACCESSORY:
{
- /* check if the device is still connected after the debouce timing */
+ /* Check if the device is still connected after the debounce timing */
if ((LL_UCPD_SRC_CC1_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1))
&& (LL_UCPD_SRC_CC2_VRA != (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2)))
{
@@ -559,11 +571,11 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
{
_handle->CAD_tDebounce_start = HAL_GetTick();
_handle->CAD_tDebounce_flag = USBPD_TRUE;
- _timing = CAD_TCCDEBOUCE_THRESHOLD + 49U;
+ _timing = CAD_TCCDEBOUNCE_THRESHOLD + 49U;
}
else
{
- if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > (CAD_TCCDEBOUCE_THRESHOLD + 50U))
+ if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > (CAD_TCCDEBOUNCE_THRESHOLD + 50U))
{
_handle->CAD_tToggle_start = HAL_GetTick();
_handle->CAD_tDebounce_flag = USBPD_FALSE;
@@ -589,7 +601,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
uint32_t cc;
cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
- /* if SRC.Open detected on the monitored PIN switch to Unattached.SNK */
+ /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */
if (((CC1 == _handle->cc) && (LL_UCPD_SRC_CC1_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC1))) ||
((CC2 == _handle->cc) && (LL_UCPD_SRC_CC2_OPEN == (cc & UCPD_SR_TYPEC_VSTATE_CC2))))
{
@@ -610,12 +622,12 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
USBPDM1_AssertRd(PortNum);
Ports[PortNum].params->PE_VPDStatus = VPD_NONE;
}
- /* if the port is PD but doesn't enter Alternate mode within tAMETimeout switch to Unsupported.Accessory */
+ /* If the port is PD but doesn't enter Alternate mode within tAMETimeout switch to Unsupported.Accessory */
else if (VPD_FAILED_ENTER_ALTERNATE == Ports[PortNum].params->CAD_VPDStatus)
{
_handle->cstate = USBPD_CAD_STATE_UNSUPPORTED_ACCESSORY;
}
- /* if Powered USB DEvice confirmed transition to CTUnattached.SNK */
+ /* If Powered USB DEvice confirmed transition to CTUnattached.SNK */
else if (VPD_DETECTED == Ports[PortNum].params->CAD_VPDStatus)
{
_handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED;
@@ -629,7 +641,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
uint32_t cc;
cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
- /* if SRC.Open detected on the monitored PIN switch to Unattached.SNK */
+ /* If SRC.Open detected on the monitored PIN switch to Unattached.SNK */
if ((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) ||
(LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2)))
{
@@ -645,7 +657,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
{
if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */
{
- /* the charger/SRC has been plug */
+ /* The charger/SRC has been plug */
_handle->cstate = USBPD_CAD_STATE_CTVPD_ATTACHED;
}
else
@@ -653,7 +665,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
uint32_t cc;
cc = Ports[PortNum].husbpd->SR & (UCPD_SR_TYPEC_VSTATE_CC1 | UCPD_SR_TYPEC_VSTATE_CC2);
- /* if VBUS is VSafe0V and CC low for tVPDDetach = 10/20ms */
+ /* If VBUS is VSafe0V and CC low for tVPDDetach = 10/20ms */
if (((LL_UCPD_SRC_CC1_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC1)) ||
(LL_UCPD_SRC_CC2_OPEN == (cc | UCPD_SR_TYPEC_VSTATE_CC2))) &&
(USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V)))
@@ -683,10 +695,10 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
case USBPD_CAD_STATE_CTVPD_ATTACHED:
{
- /* if VBUS removed */
+ /* If VBUS removed */
if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_SNKDETACH))
{
- /* the charger/SRC has been unplug */
+ /* The charger/SRC has been unplug */
_handle->cstate = USBPD_CAD_STATE_CTVPD_UNATTACHED;
}
break;
@@ -707,7 +719,7 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
case USBPD_CAD_STATE_ATTACHED:
case USBPD_CAD_STATE_ERRORRECOVERY :
case USBPD_CAD_STATE_ERRORRECOVERY_EXIT:
- /* nothing to do, the VCC must stay high */
+ /* Nothing to do, the VCC must stay high */
break;
default :
BSP_USBPD_PWR_VCCSetState(PortNum, 0);
@@ -720,7 +732,13 @@ uint32_t CAD_StateMachine_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
#endif /* _SNK */
#if defined(_SRC)
-/* function to handle SRC */
+/**
+ * @brief CAD State machine for source role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -813,7 +831,13 @@ uint32_t CAD_StateMachine_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
#endif /* _SRC */
#if defined(_DRP)
-/* function to handle DRP */
+/**
+ * @brief CAD State machine for dual role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -921,14 +945,22 @@ uint32_t CAD_StateMachine_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_T
#endif /* _DRP */
#if !defined(USBPDCORE_LIB_NO_PD)
+/**
+ * @brief Main CAD State machine
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
uint32_t _timing = CAD_DEFAULT_TIME;
- /* set by default event to none */
+ /* Set by default event to none */
*pEvent = USBPD_CAD_EVENT_NONE;
+ /* If a swap is on going, return default timing */
if (USBPD_TRUE == Ports[PortNum].params->PE_SwapOngoing)
{
return _timing;
@@ -949,16 +981,20 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
case USBPD_CAD_STATE_RESET:
{
#if !defined(_LOW_POWER) && !defined(USBPDM1_VCC_FEATURE_ENABLED)
+ /* Enable TypeCEvents Interrupts */
LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
#elif defined(_LOW_POWER)
+ /* If port role is source */
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
{
+ /* Enable TypeCEvents Interrupts */
LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
}
#endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */
+ /* Enable IRQ */
UCPD_INSTANCE0_ENABLEIRQ;
#if defined(_DRP) || defined(_ACCESSORY_SNK)
_handle->CAD_tToggle_start = HAL_GetTick();
@@ -973,13 +1009,13 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
/* Enter recovery = Switch to SRC with no resistor */
USBPDM1_EnterErrorRecovery(PortNum);
- /* forward detach event to DPM */
+ /* Forward detach event to DPM */
Ports[PortNum].CCx = CCNONE;
*pCCXX = CCNONE;
_handle->cc = CCNONE;
*pEvent = USBPD_CAD_EVENT_DETACHED;
- /* start tErrorRecovery timeout */
+ /* Start tErrorRecovery timeout */
_handle->CAD_tDebounce_start = HAL_GetTick();
_timing = CAD_TERROR_RECOVERY_TIME;
_handle->cstate = USBPD_CAD_STATE_ERRORRECOVERY_EXIT;
@@ -990,7 +1026,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
{
if ((HAL_GetTick() - _handle->CAD_tDebounce_start) > CAD_TERROR_RECOVERY_TIME)
{
- /* reconfigure the port
+ /* Reconfigure the port
port source to src
port snk to snk
port drp to src */
@@ -1009,7 +1045,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
USBPDM1_AssertRd(PortNum);
}
#endif /* _SNK || _DRP */
- /* switch to state detach */
+ /* Switch to state detach */
#if defined(_DRP) || defined(_ACCESSORY_SNK)
_handle->CAD_tToggle_start = HAL_GetTick();
#endif /* _DRP || _ACCESSORY_SNK */
@@ -1020,7 +1056,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
default:
{
- /* call the state machine corresponding to the port SNK or SRC or DRP */
+ /* Call the state machine corresponding to the port SNK or SRC or DRP */
_timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX);
break;
}
@@ -1051,12 +1087,19 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
#else
/* USBPDCORE_LIB_NO_PD */
+/**
+ * @brief Main CAD State machine
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
uint32_t _timing = CAD_DEFAULT_TIME;
- /* set by default event to none */
+ /* Set by default event to none */
*pEvent = USBPD_CAD_EVENT_NONE;
switch (_handle->cstate)
@@ -1064,16 +1107,20 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
case USBPD_CAD_STATE_RESET:
{
#ifndef _LOW_POWER
+ /* Enable TypeCEvents Interrupts */
LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
#else
+ /* If port role is source */
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
{
+ /* Enable TypeCEvents Interrupts */
LL_UCPD_EnableIT_TypeCEventCC2(Ports[PortNum].husbpd);
LL_UCPD_EnableIT_TypeCEventCC1(Ports[PortNum].husbpd);
}
#endif /* !_LOW_POWER */
+ /* Enable IRQ */
UCPD_INSTANCE0_ENABLEIRQ;
#if defined(_DRP) || defined(_ACCESSORY_SNK)
_handle->CAD_tToggle_start = HAL_GetTick();
@@ -1084,7 +1131,7 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
default:
{
- /* call the state machine corresponding to the port SNK or SRC or DRP */
+ /* Call the state machine corresponding to the port SNK or SRC or DRP */
_timing = _handle->CAD_PtrStateMachine(PortNum, pEvent, pCCXX);
break;
}
@@ -1122,16 +1169,16 @@ uint32_t CAD_StateMachine(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeD
* @{
*/
+#if defined(_DRP) || defined(_SNK)
/**
* @brief Check CCx HW condition
- * @param PortNum port
+ * @param PortNum Port
* @retval none
*/
-#if defined(_DRP) || defined(_SNK)
void CAD_Check_HW_SNK(uint8_t PortNum)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
- /* done to prevent code optimization issue with GCC */
+ /* Done to prevent code optimization issue with GCC */
uint32_t CC1_value;
uint32_t CC2_value;
@@ -1189,6 +1236,11 @@ void CAD_Check_HW_SNK(uint8_t PortNum)
#endif /* _DRP || _SNK */
#if defined(_DRP) || defined(_SRC)
+/**
+ * @brief Check CCx HW condition
+ * @param PortNum Port
+ * @retval none
+ */
void CAD_Check_HW_SRC(uint8_t PortNum)
{
#if !defined(_RTOS)
@@ -1196,7 +1248,7 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
uint32_t CC2_value_temp;
#endif /* !_RTOS */
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
- /* done to prevent code optimization issue with GCC */
+ /* Done to prevent code optimization issue with GCC */
uint32_t CC1_value;
uint32_t CC2_value;
@@ -1213,9 +1265,25 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
| 1: Sink | | |xx vRa|vRdUSB| vRd1.5 |vRd3.0|
-----------------------------------------------------------------------------
*/
+#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED)
+ /* Enable type C state machine */
+ CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+
+ for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++)
+ {
+ __DSB();
+ };
+
+ /* Read the CC line */
+ CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos;
+ CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos;
+ /* Disable the C state machine */
+ SET_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+#else
CC1_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC1) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos;
CC2_value = (Ports[PortNum].husbpd->SR & UCPD_SR_TYPEC_VSTATE_CC2) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos;
+#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */
#if !defined(_RTOS)
/* Workaround linked to issue with Ellisys test TD.PC.E5
@@ -1251,6 +1319,11 @@ void CAD_Check_HW_SRC(uint8_t PortNum)
#endif /* _DRP || _SRC */
#if defined(_DRP) || defined(_SNK)
+/**
+ * @brief Manage the detached state for sink role
+ * @param PortNum Port
+ * @retval Timeout value
+ */
static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1261,7 +1334,7 @@ static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
if (_handle->CurrentHWcondition == HW_Detachment)
{
#if defined(_LOW_POWER)
- /* value returned by a SRC or a SINK */
+ /* Value returned by a SRC or a SINK */
_timing = CAD_DETACH_POLLING; /* 100ms in the sink cases */
#elif defined(USBPDM1_VCC_FEATURE_ENABLED)
_timing = CAD_DEFAULT_TIME;
@@ -1312,6 +1385,11 @@ static uint32_t ManageStateDetached_SNK(uint8_t PortNum)
#endif /* _DRP || _SNK */
#if defined(_SRC) || defined(_DRP)
+/**
+ * @brief Manage the detached state for source role
+ * @param PortNum Port
+ * @retval Timeout value
+ */
static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1319,11 +1397,11 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
if (_handle->CAD_ResistorUpdateflag == USBPD_TRUE)
{
- /* update the resistor value */
+ /* Update the resistor value */
USBPDM1_AssertRp(PortNum);
_handle->CAD_ResistorUpdateflag = USBPD_FALSE;
- /* let time to internal state machine update */
+ /* Let time to internal state machine update */
HAL_Delay(1);
}
@@ -1331,8 +1409,8 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
/* Change the status on the basis of the HW event given by CAD_Check_HW() */
if (_handle->CurrentHWcondition == HW_Detachment)
{
-#ifdef _LOW_POWER
- /* value returned for a SRC */
+#if defined(_LOW_POWER)
+ /* Value returned for a SRC */
_timing = CAD_DETACH_POLLING;
#else
_timing = CAD_INFINITE_TIME;
@@ -1358,6 +1436,11 @@ static uint32_t ManageStateDetached_SRC(uint8_t PortNum)
#endif /* _SRC || _DRP */
#if defined(_DRP)
+/**
+ * @brief Manage the detached state for dual role
+ * @param PortNum Port
+ * @retval Timeout value
+ */
static uint32_t ManageStateDetached_DRP(uint8_t PortNum)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1407,10 +1490,17 @@ static uint32_t ManageStateDetached_DRP(uint8_t PortNum)
#endif /* _DRP */
#if defined(_DRP) || defined(_SRC)
+/**
+ * @brief Manage the attached wait state for source role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
- uint32_t _timing = 2;
+ uint32_t _timing = CAD_DEFAULT_TIME;
/* Evaluate elapsed time in Attach_Wait state */
uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
@@ -1420,13 +1510,13 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
{
if (USBPD_FALSE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_BELOWVSAFE0V))
{
- /* reset the timing because VBUS threshold not yet reach */
+ /* Reset the timing because VBUS threshold not yet reach */
_handle->CAD_tDebounce_start = HAL_GetTick();
- return CAD_TCCDEBOUCE_THRESHOLD;
+ return CAD_TCCDEBOUNCE_THRESHOLD;
}
/* Check tCCDebounce */
- if (CAD_tDebounce > CAD_TCCDEBOUCE_THRESHOLD)
+ if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD)
{
switch (_handle->CurrentHWcondition)
{
@@ -1468,16 +1558,16 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
_handle->cstate = USBPD_CAD_STATE_DETACH_SRC;
#endif /* _ACCESSORY_SRC */
break;
- } /* end of switch */
+ } /* End of switch */
*pCCXX = _handle->cc;
- _timing = 2;
+ _timing = CAD_DEFAULT_TIME;
}
- /* reset the flag for CAD_tDebounce */
+ /* Reset the flag for CAD_tDebounce */
_handle->CAD_tDebounce_flag = USBPD_FALSE;
}
else /* CAD_HW_Condition[PortNum] = HW_Detachment */
{
- /* start counting of CAD_tDebounce */
+ /* Start counting of CAD_tDebounce */
if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
{
_handle->CAD_tDebounce_start = HAL_GetTick();
@@ -1486,7 +1576,7 @@ static uint32_t ManageStateAttachedWait_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pE
}
else /* CAD_tDebounce already running */
{
- /* evaluate CAD_tDebounce */
+ /* Evaluate CAD_tDebounce */
CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD)
{
@@ -1517,13 +1607,13 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
case HW_PwrCable_Sink_Attachment:
case HW_Attachment :
_handle->cstate = USBPD_CAD_STATE_ATTACHED_WAIT;
- _handle->CAD_tDebounce_start = HAL_GetTick() - 5u; /* this is only to check cable presence */
+ _handle->CAD_tDebounce_start = HAL_GetTick() - 5u; /* This is only to check cable presence */
BSP_USBPD_PWR_VBUSInit(PortNum);
- _timing = 2;
+ _timing = CAD_DEFAULT_TIME;
break;
case HW_PwrCable_NoSink_Attachment:
default :
- /* nothing to do still the same status */
+ /* Nothing to do still the same status */
#if defined(_DRP)
if (USBPD_TRUE == Ports[PortNum].settings->CAD_RoleToggle)
{
@@ -1534,7 +1624,7 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
_timing = 0;
}
#else
- _timing = 2;
+ _timing = CAD_DEFAULT_TIME;
#endif /* _DRP */
break;
}
@@ -1543,6 +1633,13 @@ static uint32_t ManageStateEMC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_
#endif /* _DRP || _SRC */
#if defined(_DRP)
+/**
+ * @brief Manage the attached state for dual role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
@@ -1563,6 +1660,13 @@ static uint32_t ManageStateAttached_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
#endif /* _DRP */
#if defined(_DRP) || (defined(_ACCESSORY) && defined(_SNK))
+/**
+ * @brief Manage the attached wait state for dual role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
@@ -1574,8 +1678,24 @@ static uint32_t ManageStateAttachedWait_DRP(uint8_t PortNum, USBPD_CAD_EVENT *pE
#endif /* _DRP || (_ACCESSORY && _SNK) */
#if defined(_SRC) || defined(_DRP)
+/**
+ * @brief Manage the attached state for source role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
+#if defined(_LOW_POWER) || defined(USBPDM1_VCC_FEATURE_ENABLED)
+ /* Enable type C state machine */
+ CLEAR_BIT(Ports[PortNum].husbpd->CR, UCPD_CR_CC1TCDIS | UCPD_CR_CC2TCDIS);
+
+ for (int32_t index = 0; index < CAD_DELAY_READ_CC_STATUS; index++)
+ {
+ __DSB();
+ };
+#endif /* _LOW_POWER || USBPDM1_VCC_FEATURE_ENABLED */
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
uint32_t _timing = CAD_DEFAULT_TIME;
@@ -1586,7 +1706,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
/* Check if CC lines is opened or switch to debug accessory */
if (comp != ccx)
{
- /* start counting of CAD_tDebounce */
+ /* Start counting of CAD_tDebounce */
if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
{
_handle->CAD_tDebounce_flag = USBPD_TRUE;
@@ -1595,7 +1715,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
}
else /* CAD_tDebounce already running */
{
- /* evaluate CAD_tDebounce */
+ /* Evaluate CAD_tDebounce */
uint32_t CAD_tDebounce = HAL_GetTick() - _handle->CAD_tDebounce_start;
if (CAD_tDebounce > CAD_TSRCDISCONNECT_THRESHOLD)
{
@@ -1607,7 +1727,7 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
}
#endif /* _DRP */
_handle->CAD_tDebounce_flag = USBPD_FALSE;
- /* move inside state DETACH to avoid wrong VCONN level*/
+ /* Move inside state DETACH to avoid wrong VCONN level*/
_handle->cstate = USBPD_CAD_STATE_DETACH_SRC;
*pEvent = USBPD_CAD_EVENT_DETACHED;
*pCCXX = CCNONE;
@@ -1619,7 +1739,11 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
{
/* Reset tPDDebounce flag*/
_handle->CAD_tDebounce_flag = USBPD_FALSE;
+#if defined(_LOW_POWER)
+ _timing = CAD_VBUS_POLLING_TIME;
+#else
_timing = CAD_INFINITE_TIME;
+#endif /* _LOW_POWER */
}
return _timing;
@@ -1627,6 +1751,13 @@ static uint32_t ManageStateAttached_SRC(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
#endif /* _SRC || _DRP */
#if defined(_SNK) || defined(_DRP)
+/**
+ * @brief Manage the attached wait state for sink role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1636,11 +1767,12 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
CAD_Check_HW_SNK(PortNum);
if (_handle->CurrentHWcondition == HW_Attachment)
{
- if (CAD_tDebounce > CAD_TCCDEBOUCE_THRESHOLD)
+ if (CAD_tDebounce > CAD_TCCDEBOUNCE_THRESHOLD)
{
if (USBPD_TRUE == USBPD_PWR_IF_GetVBUSStatus(PortNum, USBPD_PWR_VSAFE5V)) /* Check if Vbus is on */
{
HW_SignalAttachement(PortNum, _handle->cc);
+ /* Go to attached state */
_handle->cstate = USBPD_CAD_STATE_ATTACHED;
*pEvent = USBPD_CAD_EVENT_ATTACHED;
*pCCXX = _handle->cc;
@@ -1650,17 +1782,17 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
}
else
{
- /* start counting of CAD_tDebounce */
+ /* Start counting of CAD_tDebounce */
if (USBPD_FALSE == _handle->CAD_tDebounce_flag)
{
_handle->CAD_tDebounce_start = HAL_GetTick();
_handle->CAD_tDebounce_flag = USBPD_TRUE;
- _timing = CAD_TPDDEBOUCE_THRESHOLD;
+ _timing = CAD_TPDDEBOUNCE_THRESHOLD;
}
else /* CAD_tDebounce already running */
{
- /* evaluate CAD_tDebounce */
- if ((HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TPDDEBOUCE_THRESHOLD))
+ /* Evaluate CAD_tDebounce */
+ if ((HAL_GetTick() - _handle->CAD_tDebounce_start > CAD_TPDDEBOUNCE_THRESHOLD))
{
_handle->CAD_tDebounce_flag = USBPD_FALSE;
_handle->cstate = USBPD_CAD_STATE_DETACHED;
@@ -1677,6 +1809,13 @@ static uint32_t ManageStateAttachedWait_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pE
return _timing;
}
+/**
+ * @brief Manage the attached state for sink role
+ * @param PortNum Port
+ * @param pEvent Pointer on CAD event based on @ref USBPD_CAD_EVENT
+ * @param pCCXX Pointer on CC Pin based on @ref CCxPin_TypeDef
+ * @retval Timeout value
+ */
static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent, CCxPin_TypeDef *pCCXX)
{
CAD_HW_HandleTypeDef *_handle = &CAD_HW_Handles[PortNum];
@@ -1732,9 +1871,16 @@ static uint32_t ManageStateAttached_SNK(uint8_t PortNum, USBPD_CAD_EVENT *pEvent
#endif /* _SNK || _DRP */
#if defined(TCPP0203_SUPPORT)
+/**
+ * @brief VBUS detect callback
+ * @param PortNum Port
+ * @param VBUSConnectionStatus VBUS connection status, based on @ref USBPD_PWR_VBUSConnectionStatusTypeDef
+ * @retval None
+ */
void CAD_HW_IF_VBUSDetectCallback(uint32_t PortNum,
USBPD_PWR_VBUSConnectionStatusTypeDef VBUSConnectionStatus)
{
+ /* If VBUS is connected */
if (VBUSConnectionStatus == VBUS_CONNECTED)
{
#if defined(_TRACE)
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
index 1b5d81942..8b4769fb7 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_hw.c
@@ -31,6 +31,7 @@ UCPD_TypeDef *USBPD_HW_GetUSPDInstance(uint8_t PortNum)
return UCPD_INSTANCE0;
}
+#if !defined(USBPDCORE_LIB_NO_PD)
DMA_Channel_TypeDef *USBPD_HW_Init_DMARxInstance(uint8_t PortNum)
{
LL_DMA_InitTypeDef DMA_InitStruct;
@@ -92,6 +93,7 @@ void USBPD_HW_DeInit_DMATxInstance(uint8_t PortNum)
{
(void)PortNum;
}
+#endif /* !USBPDCORE_LIB_NO_PD */
uint32_t USBPD_HW_GetRpResistorValue(uint8_t PortNum)
{
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
index b6f00a133..16827a253 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy.c
@@ -117,7 +117,7 @@ USBPD_StatusTypeDef USBPD_PHY_Init(uint8_t PortNum, const USBPD_PHY_Callbacks *p
{
(void)PowerRole;
- /* set all callbacks */
+ /* Set all callbacks */
Ports[PortNum].cbs.USBPD_HW_IF_TxCompleted = pCallbacks->USBPD_PHY_TxCompleted;
Ports[PortNum].cbs.USBPD_HW_IF_BistCompleted = pCallbacks->USBPD_PHY_BistCompleted;
Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication = pCallbacks->USBPD_PHY_ResetIndication;
@@ -165,8 +165,8 @@ uint16_t USBPD_PHY_GetMinGOODCRCTimerValue(uint8_t PortNum)
void USBPD_PHY_Reset(uint8_t PortNum)
{
(void)PortNum;
- /* reset PHY layer */
- /* reset HW_IF layer */
+ /* Reset PHY layer */
+ /* Reset HW_IF layer */
}
/**
@@ -322,13 +322,13 @@ void PHY_Rx_Completed(uint8_t PortNum, uint32_t MsgType)
_msgtype = tab_sop_value[MsgType];
- /* check if the message must be forwarded to usbpd stack */
+ /* Check if the message must be forwarded to usbpd stack */
switch (_msgtype)
{
case USBPD_SOPTYPE_CABLE_RESET :
if (0x1Eu == (PHY_Ports[PortNum].SupportedSOP & 0x1Eu))
{
- /* nothing to do the message will be discarded and the port partner retry the send */
+ /* Nothing to do the message will be discarded and the port partner retry the send */
Ports[PortNum].cbs.USBPD_HW_IF_RX_ResetIndication(PortNum, USBPD_SOPTYPE_CABLE_RESET);
}
break;
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
index 18d83c206..909b08fa3 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_phy_hw_if.c
@@ -49,6 +49,7 @@ void USBPD_HW_IF_GlobalHwInit(void)
/* PWR register access (for disabling dead battery feature) */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
+
}
#if !defined(USBPDCORE_LIB_NO_PD)
@@ -146,6 +147,11 @@ void USBPD_HW_IF_Send_BIST_Pattern(uint8_t PortNum)
}
#endif /* !USBPDCORE_LIB_NO_PD */
+/**
+ * @brief Assert Rp resistors
+ * @param PortNum Port
+ * @retval None
+ */
void USBPDM1_AssertRp(uint8_t PortNum)
{
switch (Ports[PortNum].params->RpResistor)
@@ -178,13 +184,22 @@ void USBPDM1_AssertRp(uint8_t PortNum)
BSP_USBPD_PWR_SetRole(PortNum, POWER_ROLE_SOURCE);
#endif /* TCPP0203_SUPPORT */
}
-
+/**
+ * @brief De-assert Rp resistors
+ * @param PortNum Port
+ * @retval None
+ */
void USBPDM1_DeAssertRp(uint8_t PortNum)
{
- /* not needed on STM32G4xx, so nothing to do, keep only for compatibility */
+ /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */
UNUSED(PortNum);
}
+/**
+ * @brief Assert Rd resistors
+ * @param PortNum Port
+ * @retval None
+ */
void USBPDM1_AssertRd(uint8_t PortNum)
{
LL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd);
@@ -214,34 +229,55 @@ void USBPDM1_AssertRd(uint8_t PortNum)
#endif /* TCPP0203_SUPPORT */
}
+/**
+ * @brief Assert Rd resistors
+ * @param PortNum Port
+ * @retval none
+ */
void USBPDM1_DeAssertRd(uint8_t PortNum)
{
- /* not needed on STM32G4xx, so nothing to do, keep only for compatibility */
+ /* Not needed on STM32G4xx, so nothing to do, keep only for compatibility */
UNUSED(PortNum);
}
+/**
+ * @brief Enter error recovery
+ * @param PortNum Port
+ * @retval None
+ */
void USBPDM1_EnterErrorRecovery(uint8_t PortNum)
{
LL_UCPD_SetSRCRole(Ports[PortNum].husbpd);
LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_NONE);
LL_UCPD_RxDisable(Ports[PortNum].husbpd);
-#if defined(USBPD_REV30_SUPPORT)
+#if !defined(USBPDCORE_LIB_NO_PD)
if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
{
- /* Set GPIO to disallow the FRSTX handling */
+ /* Set GPIO to disallow the FRS RX handling */
LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd);
}
-#endif /* USBPD_REV30_SUPPORT */
+#endif /* USBPDCORE_LIB_NO_PD */
}
+/**
+ * @brief Set the correct CC pin on the comparator
+ * @param PortNum Port
+ * @param cc CC pin based on @ref CCxPin_TypeDef
+ * @retval None
+ */
void USBPDM1_Set_CC(uint8_t PortNum, CCxPin_TypeDef cc)
{
- /* Set the correct pin on the comparator*/
+ /* Set the correct pin on the comparator */
Ports[PortNum].CCx = cc;
LL_UCPD_SetCCPin(Ports[PortNum].husbpd, (cc == CC1) ? LL_UCPD_CCPIN_CC1 : LL_UCPD_CCPIN_CC2);
}
+/**
+ * @brief Enable RX interrupt
+ * @param PortNum Port
+ * @retval None
+ */
void USBPDM1_RX_EnableInterrupt(uint8_t PortNum)
{
/* Enable the RX interrupt process */
@@ -251,11 +287,21 @@ void USBPDM1_RX_EnableInterrupt(uint8_t PortNum)
LL_UCPD_RxDMAEnable(Ports[PortNum].husbpd);
}
+/**
+ * @brief Enable RX
+ * @param PortNum Port
+ * @retval None
+ */
void USBPD_HW_IF_EnableRX(uint8_t PortNum)
{
LL_UCPD_RxEnable(Ports[PortNum].husbpd);
}
+/**
+ * @brief Disable RX
+ * @param PortNum Port
+ * @retval None
+ */
void USBPD_HW_IF_DisableRX(uint8_t PortNum)
{
LL_UCPD_RxDisable(Ports[PortNum].husbpd);
@@ -287,7 +333,7 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
_temp = (uint32_t)&Ports[PortNum].husbpd->TXDR;
Ports[PortNum].hdmatx->CPAR = _temp;
- /* disabled non Rd line set CC line enable */
+ /* Disabled non Rd line set CC line enable */
#define INTERRUPT_MASK UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | \
UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | \
UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE
@@ -308,15 +354,14 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
(void)BSP_USBPD_PWR_VCONNInit(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
#endif /* _VCONN_SUPPORT */
-#if defined(USBPD_REV30_SUPPORT)
if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
{
- /* Set GPIO to allow the FRSTX handling */
+ /* Set GPIO to allow the FRS TX handling */
USBPD_HW_SetFRSSignalling(PortNum, (Ports[PortNum].CCx == CC1) ? 1u : 2u);
+ /* Enable FRS RX */
LL_UCPD_FRSDetectionEnable(Ports[PortNum].husbpd);
Ports[PortNum].husbpd->IMR |= UCPD_IMR_FRSEVTIE;
}
-#endif /* USBPD_REV30_SUPPORT */
/* Disable the Resistor on Vconn PIN */
if (Ports[PortNum].CCx == CC1)
@@ -339,7 +384,7 @@ void HW_SignalAttachement(uint8_t PortNum, CCxPin_TypeDef cc)
void HW_SignalDetachment(uint8_t PortNum)
{
#if !defined(USBPDCORE_LIB_NO_PD)
- /* stop DMA RX/TX */
+ /* Stop DMA RX/TX */
LL_UCPD_RxDMADisable(Ports[PortNum].husbpd);
LL_UCPD_TxDMADisable(Ports[PortNum].husbpd);
LL_UCPD_RxDisable(Ports[PortNum].husbpd);
@@ -348,11 +393,13 @@ void HW_SignalDetachment(uint8_t PortNum)
/* Enable only detection interrupt */
WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE);
#elif defined(_LOW_POWER)
+#if !defined(_DRP)
if (USBPD_PORTPOWERROLE_SRC == Ports[PortNum].params->PE_PowerRole)
{
/* Enable detection interrupt */
WRITE_REG(Ports[PortNum].husbpd->IMR, UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE);
}
+#endif /* !_DRP */
#endif /* !_LOW_POWER && !USBPDM1_VCC_FEATURE_ENABLED */
USBPD_HW_DeInit_DMATxInstance(PortNum);
@@ -370,13 +417,11 @@ void HW_SignalDetachment(uint8_t PortNum)
(void)BSP_USBPD_PWR_VBUSDeInit(PortNum);
}
-#if defined(USBPD_REV30_SUPPORT)
if (Ports[PortNum].settings->PE_PD3_Support.d.PE_FastRoleSwapSupport == USBPD_TRUE)
{
- /* Set GPIO to disallow the FRSTX handling */
+ /* Set GPIO to disallow the FRS RX handling */
LL_UCPD_FRSDetectionDisable(Ports[PortNum].husbpd);
}
-#endif /* USBPD_REV30_SUPPORT */
#endif /* !USBPDCORE_LIB_NO_PD */
Ports[PortNum].CCx = CCNONE;
@@ -386,18 +431,33 @@ void HW_SignalDetachment(uint8_t PortNum)
#endif /* !USBPDCORE_LIB_NO_PD */
}
+/**
+ * @brief Set resistors to SinkTxNG
+ * @param PortNum Port
+ * @retval None
+ */
void USBPD_HW_IF_SetResistor_SinkTxNG(uint8_t PortNum)
{
- /* set the resistor SinkTxNG 1.5A5V */
+ /* Set the resistor SinkTxNG 1.5A5V */
LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_1_5A);
}
+/**
+ * @brief Set resistors to SinkTxOk
+ * @param PortNum Port
+ * @retval None
+ */
void USBPD_HW_IF_SetResistor_SinkTxOK(uint8_t PortNum)
{
- /* set the resistor SinkTxNG 3.0A5V */
+ /* Set the resistor SinkTxNG 3.0A5V */
LL_UCPD_SetRpResistor(Ports[PortNum].husbpd, LL_UCPD_RESISTOR_3_0A);
}
+/**
+ * @brief Check if resistors are set to SinkTxOk
+ * @param PortNum Port
+ * @retval USBPD_TRUE if resistor is set to SinkTxOk, else USBPD_FALSE
+ */
uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum)
{
#if defined(_LOW_POWER)
@@ -438,6 +498,11 @@ uint8_t USBPD_HW_IF_IsResistor_SinkTxOk(uint8_t PortNum)
return USBPD_FALSE;
}
+/**
+ * @brief Signal a Fast Role Swap
+ * @param PortNum Port
+ * @retval None
+ */
void USBPD_HW_IF_FastRoleSwapSignalling(uint8_t PortNum)
{
LL_UCPD_SignalFRSTX(Ports[PortNum].husbpd);
diff --git a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
index d82d852ad..70ce6fdb0 100644
--- a/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
+++ b/Middlewares/ST/STM32_USBPD_Library/Devices/STM32G4XX/src/usbpd_timersserver.c
@@ -55,11 +55,19 @@ void USBPD_TIM_Init(void)
/* Counter mode: select up-counting mode */
LL_TIM_SetCounterMode(TIMX, LL_TIM_COUNTERMODE_UP);
+#if defined(TIMX_CLK_FREQ)
+ /* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */
+ LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(TIMX_CLK_FREQ, 1000000u));
+
+ /* Set the auto-reload value to have a counter frequency of 100Hz */
+ LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(TIMX_CLK_FREQ, LL_TIM_GetPrescaler(TIMX), 100u));
+#else
/* Set the pre-scaler value to have TIMx counter clock equal to 1 MHz */
LL_TIM_SetPrescaler(TIMX, __LL_TIM_CALC_PSC(SystemCoreClock, 1000000u));
/* Set the auto-reload value to have a counter frequency of 100Hz */
LL_TIM_SetAutoReload(TIMX, __LL_TIM_CALC_ARR(SystemCoreClock, LL_TIM_GetPrescaler(TIMX), 100u));
+#endif /* TIMX_CLK_FREQ */
/*********************************/
/* Output waveform configuration */
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Boost_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_CurrentMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_HW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7deb2d6b9..9fe16443d 100644
--- a/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/Digital_Power/Buck_VoltageMode_SW/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
index be490e7da..dbc0cfa01 100644
--- a/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Demonstrations/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 6a9b33079..81f30b683 100644
--- a/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_Buck_VoltageMode_HW_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
index 290477a7c..600d3261d 100644
--- a/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/B-G474E-DPOW1/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART3_UART_Init(void);
/* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -240,10 +243,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Boost/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Buck_Sync_Rect/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_Dual_Buck/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index dceb786ff..6120bb75d 100644
--- a/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Examples_MIX/HRTIM/HRTIM_PFC_TransitionMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -85,13 +85,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -108,7 +110,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c5c095d93..660471448 100644
--- a/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c5c095d93..660471448 100644
--- a/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/B-G474E-DPOW1/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Demonstrations/Led_Jumper/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
index 0169aab90..399ba0f86 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431KBTX_SRAM.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 2c6638409..58357b134 100644
--- a/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Templates/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld b/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
index 030ba6b88..b56b1e4db 100644
--- a/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431KB/Templates_LL/STM32CubeIDE/STM32G431KBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
index 751ca19a7..ba4c98f70 100644
--- a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
@@ -39,13 +39,16 @@
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
@@ -239,10 +242,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3ecb55b60..ca7ba76e8 100644
--- a/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
index 12c5470bc..54ce32a9c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G431RBTX_SRAM.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
index 683e35125..bbaeff980 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G431RBTX_sram.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_SLEEP/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STANDBY/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
index f1551f7a0..002a5951c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_LPUART1_UART_Init(void);
/* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -235,10 +238,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 63af15f45..9b74597d6 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index fb4cbf778..1535cba0a 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -105,13 +105,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -119,7 +121,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -128,7 +130,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -138,7 +140,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -163,13 +165,11 @@ SECTIONS
_edata = .; /* define a global symbol at data end */
} >RAM AT> ROM
-.ROarraySection :
-{
- *(.ROarraySection*)
-
- }
-
- >RAM1
+
+ .ROarraySection (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ *(.ROarraySection*)
+ } >RAM1
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
deleted file mode 100644
index 861dedcad..000000000
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
+++ /dev/null
@@ -1,7 +0,0 @@
-[ProjectFiles]
-HeaderPath=
-[Others]
-Define=
-HALModule=
-[Groups]
-Doc=../readme.txt;
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
deleted file mode 100644
index d8ee410aa..000000000
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
+++ /dev/null
@@ -1,24 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g431xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedIarFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Src\main.c;Src\stm32g4xx_it.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;readme.txt;;;
-HeaderPath=..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\Drivers\CMSIS\Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G431xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousGenFiles]
-HeaderPath=..\Inc
-HeaderFiles=stm32g4xx_it.h;stm32_assert.h;main.h;
-SourcePath=..\Src
-SourceFiles=stm32g4xx_it.c;main.c;
-
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
index 6bc20ec64..3885cd9c4 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -16,87 +15,53 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
-#ifdef __cplusplus
-extern "C" {
-#endif
-
/* Includes ------------------------------------------------------------------*/
-#include "stm32g4xx_ll_rcc.h"
#include "stm32g4xx_ll_bus.h"
-#include "stm32g4xx_ll_crs.h"
+#include "stm32g4xx_ll_rcc.h"
#include "stm32g4xx_ll_system.h"
-#include "stm32g4xx_ll_exti.h"
-#include "stm32g4xx_ll_cortex.h"
#include "stm32g4xx_ll_utils.h"
#include "stm32g4xx_ll_pwr.h"
-#include "stm32g4xx_ll_dma.h"
#include "stm32g4xx_ll_gpio.h"
-
+#include "stm32g4xx_ll_exti.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/**
+ * @brief LED2
+ */
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
+#define LED2_PIN LL_GPIO_PIN_5
+#define LED2_GPIO_PORT GPIOA
+#define LED2_GPIO_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA)
-/* USER CODE BEGIN EFP */
+/**
+ * @brief Key push-button
+ */
+#define USER_BUTTON_PIN LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)
+#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
+#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_IS_ACTIVE_FLAG() LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_SYSCFG_SET_EXTI() do {\
+ LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);\
+ } while(0)
+#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment UserKey_Callback*/
-void UserButton_Callback(void);
-
-/* USER CODE END EFP */
-
-/* Private defines -----------------------------------------------------------*/
-#define LED2_Pin LL_GPIO_PIN_5
-#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
-#ifndef NVIC_PRIORITYGROUP_0
-#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
- 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
- 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
- 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
- 1 bit for subpriority */
-#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
- 0 bit for subpriority */
-#endif
-
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-#ifdef __cplusplus
-}
-#endif
+void UserButton_Callback(void);
#endif /* __MAIN_H */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
index 584b7e5b7..787cbd1b8 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -16,37 +15,23 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G4xx_IT_H
#define __STM32G4xx_IT_H
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/* Exported functions ------------------------------------------------------- */
-/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
@@ -56,11 +41,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
-void EXTI15_10_IRQHandler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
+void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
index 250413b00..7b16b5902 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -19,214 +18,173 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
+
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
+/** @addtogroup STM32G4xx_LL_Examples
+ * @{
+ */
-/* USER CODE END Includes */
+/** @addtogroup EXTI_ToggleLedOnIT
+ * @{
+ */
/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
/* Private variables ---------------------------------------------------------*/
-
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-/* USER CODE BEGIN PFP */
-/* USER CODE END PFP */
+void SystemClock_Config(void);
+void Configure_EXTI(void);
+void LED_Init(void);
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
+/* Private functions ---------------------------------------------------------*/
/**
- * @brief The application entry point.
- * @retval int
+ * @brief Main program
+ * @param None
+ * @retval None
*/
int main(void)
{
- /* USER CODE BEGIN 1 */
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ /* Enable SYSCFG and PWR Clock. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
- /* System interrupt init*/
- NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-
- /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
- */
- LL_PWR_DisableUCPDDeadBattery();
-
- /* USER CODE BEGIN Init */
+ /* Configure the system clock to 170 MHz */
+ SystemClock_Config();
- /* USER CODE END Init */
+ /* Initialize LED2 */
+ LED_Init();
+
+ /* Configure the EXTI Line on User Button */
+ Configure_EXTI();
- /* Configure the system clock */
- SystemClock_Config();
+ /* Infinite loop */
+ while (1)
+ {
+ }
+}
- /* USER CODE BEGIN SysInit */
+/**
+ * @brief This function configures EXTI Line as Push-Button
+ * @note Peripheral configuration is minimal configuration from reset values.
+ * @param None
+ * @retval None
+ */
+void Configure_EXTI()
+{
+ /* -1- GPIO Config */
+ /* Enable GPIO Clock (to be able to program the configuration registers) */
+ USER_BUTTON_GPIO_CLK_ENABLE();
+ LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
+ LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
- /* USER CODE END SysInit */
+ /**/
+ LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- /* USER CODE BEGIN 2 */
+ /**/
+ LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
- /* USER CODE END 2 */
+ /**/
+
+ /* Configure IO */
+ LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
+ LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_NO);
+
+ /* -2- Connect External Line to the GPIO*/
+ USER_BUTTON_SYSCFG_SET_EXTI();
+
+ /*-3- Enable a falling trigger EXTI line 13 Interrupt */
+ USER_BUTTON_EXTI_LINE_ENABLE();
+ USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
+
+ /*-4- Configure NVIC for EXTI10_15_IRQn */
+ NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ NVIC_EnableIRQ(EXTI15_10_IRQn);
+}
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1)
- {
- /* USER CODE END WHILE */
+/**
+ * @brief Initialize LED2.
+ * @param None
+ * @retval None
+ */
+void LED_Init(void)
+{
+ /* Enable the LED2 Clock */
+ LED2_GPIO_CLK_ENABLE();
- /* USER CODE BEGIN 3 */
- }
- /* USER CODE END 3 */
+ /* Configure IO in output push-pull mode to drive external LED2 */
+ LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
}
/**
- * @brief System Clock Configuration
+ * @brief System Clock Configuration
+ * The system Clock is configured as follows :
+ * System Clock source = PLL (HSI)
+ * SYSCLK(Hz) = 170000000
+ * HCLK(Hz) = 170000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 1
+ * APB2 Prescaler = 1
+ * PLL_M = 4
+ * PLL_N = 85
+ * PLL_P = 2
+ * PLL_Q = 2
+ * PLL_R = 2
+ * Flash Latency(WS) = 8
+ * @param None
* @retval None
*/
void SystemClock_Config(void)
{
+ /* Flash Latency configuration */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
- while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4)
- {
- }
+
+ /* Enable boost mode to be able to reach 170MHz */
LL_PWR_EnableRange1BoostMode();
+
+ /* HSI configuration and activation */
LL_RCC_HSI_Enable();
- /* Wait till HSI is ready */
while(LL_RCC_HSI_IsReady() != 1)
{
- }
+ };
- LL_RCC_HSI_SetCalibTrimming(64);
+ /* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2);
- LL_RCC_PLL_EnableDomain_SYS();
LL_RCC_PLL_Enable();
- /* Wait till PLL is ready */
+ LL_RCC_PLL_EnableDomain_SYS();
while(LL_RCC_PLL_IsReady() != 1)
{
- }
+ };
- LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+ /* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
- /* Wait till System clock is ready */
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
- }
-
- /* Insure 1us transition state at intermediate medium speed clock*/
- for (__IO uint32_t i = (170 >> 1); i !=0; i--);
+ };
- /* Set AHB prescaler*/
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+ /* Insure 1s transition state at intermediate medium speed clock based on DWT */
+ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+ DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+ while(DWT->CYCCNT < 100);
+ /* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+ /* Set systick to 1ms in using frequency set to 170MHz */
+ /* This frequency can be calculated through LL RCC macro */
+ /* ex: __LL_RCC_CALC_PLLCLK_FREQ(__LL_RCC_CALC_HSI_FREQ(),
+ LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2)*/
LL_Init1msTick(170000000);
+ /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(170000000);
}
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-/* USER CODE BEGIN MX_GPIO_Init_1 */
-/* USER CODE END MX_GPIO_Init_1 */
-
- /* GPIO Ports Clock Enable */
- LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
- LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
-
- /**/
- LL_GPIO_ResetOutputPin(LED2_GPIO_Port, LED2_Pin);
-
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
-
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
- /**/
- LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
- /**/
- LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
-
- /**/
- LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
-
- /**/
- GPIO_InitStruct.Pin = LED2_Pin;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
-
- /* EXTI interrupt init*/
- NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI4_IRQn);
- NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI15_10_IRQn);
-
-/* USER CODE BEGIN MX_GPIO_Init_2 */
-/* USER CODE END MX_GPIO_Init_2 */
-}
-
-/* USER CODE BEGIN 4 */
-
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
@@ -237,24 +195,11 @@ static void MX_GPIO_Init(void)
*/
void UserButton_Callback(void)
{
- LL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
-}
-
-/* USER CODE END 4 */
-
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void)
-{
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
-
- /* USER CODE END Error_Handler_Debug */
+ LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
}
#ifdef USE_FULL_ASSERT
+
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
@@ -264,9 +209,22 @@ void Error_Handler(void)
*/
void assert_failed(uint8_t *file, uint32_t line)
{
- /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
- tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
- /* USER CODE END 6 */
+ ex: printf("Wrong parameters value: file %s on line %d", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
}
-#endif /* USE_FULL_ASSERT */
+#endif
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
index efc1d9372..42d6bf6ce 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -18,230 +17,155 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
-#include "main.h"
#include "stm32g4xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
+/** @addtogroup STM32G4xx_LL_Examples
+ * @{
+ */
-/* USER CODE END TD */
+/** @addtogroup EXTI_ToggleLedOnIT
+ * @{
+ */
+/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
+/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
-/* Cortex-M4 Processor Interruption and Exception Handlers */
+/* Cortex-M4 Processor Exceptions Handlers */
/******************************************************************************/
+
/**
- * @brief This function handles Non maskable interrupt.
+ * @brief This function handles NMI exception.
+ * @param None
+ * @retval None
*/
void NMI_Handler(void)
{
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
- /* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
- * @brief This function handles Hard fault interrupt.
+ * @brief This function handles Hard Fault exception.
+ * @param None
+ * @retval None
*/
void HardFault_Handler(void)
{
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
+ /* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- /* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
- * @brief This function handles Memory management fault.
+ * @brief This function handles Memory Manage exception.
+ * @param None
+ * @retval None
*/
void MemManage_Handler(void)
{
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
+ /* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- /* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
- * @brief This function handles Prefetch fault, memory access fault.
+ * @brief This function handles Bus Fault exception.
+ * @param None
+ * @retval None
*/
void BusFault_Handler(void)
{
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
+ /* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- /* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
- * @brief This function handles Undefined instruction or illegal state.
+ * @brief This function handles Usage Fault exception.
+ * @param None
+ * @retval None
*/
void UsageFault_Handler(void)
{
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
+ /* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- /* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
- * @brief This function handles System service call via SWI instruction.
+ * @brief This function handles SVCall exception.
+ * @param None
+ * @retval None
*/
void SVC_Handler(void)
{
- /* USER CODE BEGIN SVCall_IRQn 0 */
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
}
/**
- * @brief This function handles Debug monitor.
+ * @brief This function handles Debug Monitor exception.
+ * @param None
+ * @retval None
*/
void DebugMon_Handler(void)
{
- /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
}
/**
- * @brief This function handles Pendable request for system service.
+ * @brief This function handles PendSVC exception.
+ * @param None
+ * @retval None
*/
void PendSV_Handler(void)
{
- /* USER CODE BEGIN PendSV_IRQn 0 */
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
}
/**
- * @brief This function handles System tick timer.
+ * @brief This function handles SysTick Handler.
+ * @param None
+ * @retval None
*/
void SysTick_Handler(void)
{
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
-
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
-/* STM32G4xx Peripheral Interrupt Handlers */
-/* Add here the Interrupt Handlers for the used peripherals. */
-/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32g4xx.s). */
+/* STM32G4xx Peripherals Interrupt Handlers */
+/* Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the */
+/* available peripheral interrupt handler's name please refer to the startup */
+/* file (startup_stm32g4xx.s). */
/******************************************************************************/
/**
- * @brief This function handles EXTI line4 interrupt.
+ * @brief This function handles external line 4_15 interrupt request.
+ * @param None
+ * @retval None
*/
-void EXTI4_IRQHandler(void)
+void USER_BUTTON_IRQHANDLER(void)
{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
+ /* Manage Flags */
+ if(USER_BUTTON_EXTI_IS_ACTIVE_FLAG() != RESET)
{
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
- /* USER CODE BEGIN LL_EXTI_LINE_4 */
-
- /* USER CODE END LL_EXTI_LINE_4 */
- }
- /* USER CODE BEGIN EXTI4_IRQn 1 */
+ USER_BUTTON_EXTI_CLEAR_FLAG();
- /* USER CODE END EXTI4_IRQn 1 */
+ /* Manage code in main.c.*/
+ UserButton_Callback();
+ }
}
/**
- * @brief This function handles EXTI line[15:10] interrupts.
+ * @}
*/
-void EXTI15_10_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI15_10_IRQn 0 */
-
- /* USER CODE END EXTI15_10_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_13) != RESET)
- {
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_13);
- /* USER CODE BEGIN LL_EXTI_LINE_13 */
-
- /* Manage code in main.c */
- UserButton_Callback();
- /* USER CODE END LL_EXTI_LINE_13 */
- }
- /* USER CODE BEGIN EXTI15_10_IRQn 1 */
- /* USER CODE END EXTI15_10_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
+/**
+ * @}
+ */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
index dbef7a3dd..b05cf48f3 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
@@ -21,9 +21,8 @@
@par Example Description
-This example describes how to configure the EXTI
-and use GPIOs to toggle the user LEDs available on the board when
-a user button is pressed. This example is based on the
+How to configure the EXTI and use GPIOs to toggle the user LEDs
+available on the board when a user button is pressed. It is based on the
STM32G4xx LL API. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
index e63e61a02..b2f1ce951 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
@@ -14,10 +14,9 @@ Mcu.Name=STM32G431R(6-8-B)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC13
Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32G431RBTx
@@ -26,7 +25,6 @@ MxDb.Version=DB.6.0.100
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -40,14 +38,11 @@ PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=LED2
PA5.Locked=true
PA5.Signal=GPIO_Output
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=USER_BUTTON
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
PC13.Locked=true
PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
@@ -56,6 +51,8 @@ ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32G431RBTx
+ProjectManager.Example=EXTI_ToggleLedOnIT_Init
+ProjectManager.ExampleSource=CubeFw
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@@ -123,12 +120,8 @@ RCC.VCOInputFreq_Value=4000000
RCC.VCOOutputFreq_Value=340000000
SH.GPXTI13.0=GPIO_EXTI13
SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT_Init
-ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
index 077a66c0d..956e62de2 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
@@ -73,11 +73,11 @@ void UserButton_Callback(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
+#define USER_BUTTON_Pin LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_Port GPIOC
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define LED2_Pin LL_GPIO_PIN_5
#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
#ifndef NVIC_PRIORITYGROUP_0
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
4 bits for subpriority */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
index 3e928ec44..6e2054929 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
@@ -56,7 +56,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
void EXTI15_10_IRQHandler(void);
/* USER CODE BEGIN EFP */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
index 3c80b077d..f30e63e54 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
@@ -178,31 +178,15 @@ static void MX_GPIO_Init(void)
/**/
LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
/**/
EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
EXTI_InitStruct.LineCommand = ENABLE;
EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
LL_EXTI_Init(&EXTI_InitStruct);
/**/
- LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
- /**/
- LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
- /**/
- LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
+ LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_NO);
/**/
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
@@ -216,8 +200,6 @@ static void MX_GPIO_Init(void)
LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
/* EXTI interrupt init*/
- NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI4_IRQn);
NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(EXTI15_10_IRQn);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
index 1209a6406..9c59bf31d 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
@@ -200,26 +200,6 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32g4xx.s). */
/******************************************************************************/
-/**
- * @brief This function handles EXTI line4 interrupt.
- */
-void EXTI4_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
- {
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
- /* USER CODE BEGIN LL_EXTI_LINE_4 */
-
- /* USER CODE END LL_EXTI_LINE_4 */
- }
- /* USER CODE BEGIN EXTI4_IRQn 1 */
-
- /* USER CODE END EXTI4_IRQn 1 */
-}
-
/**
* @brief This function handles EXTI line[15:10] interrupts.
*/
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 63af15f45..9b74597d6 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/FMAC/FMAC_IIR_Polling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 99c7d8f04..c426043bd 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 2f8de97f8..7af24599c 100644
--- a/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Templates/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld b/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
index 3778b7393..22c97ffcc 100644
--- a/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
+++ b/Projects/NUCLEO-G431RB/Templates_LL/STM32CubeIDE/STM32G431RBTX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
index 751ca19a7..ba4c98f70 100644
--- a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/Core/Src/main.c
@@ -39,13 +39,16 @@
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
@@ -239,10 +242,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 5ec6a0abb..71168834b 100644
--- a/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Demonstrations/Adafruit_LCD_1_8_SD_Joystick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_ProcessStack/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/Cortex/CORTEXM_SysTick/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/DMA/DMA_MUXSYNC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 5c85c88f3..bb6d93bdb 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_ArbitraryWaveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_MultiplePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_PWMMaster/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/HRTIM/HRTIM_Basic_SinglePWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_AdvComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_TwoBoards_RestartComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/I2C/I2C_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/IWDG/IWDG_WindowMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPRUN/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_LPSLEEP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComDMA_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComIT_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/SPI/SPI_FullDuplex_ComPolling_Slave/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Combined/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_DMABurst/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
index c13c95510..45a7defb6 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_Encoder/Src/main.c
@@ -316,6 +316,10 @@ static void MX_GPIO_Init(void)
*/
static void Emulate_Forward_Direction(TIM_HandleTypeDef* htim)
{
+ /*## -1- Make sure channels are not started ############################## */
+ HAL_TIM_OC_Stop(htim, TIM_CHANNEL_1);
+ HAL_TIM_OC_Stop(htim, TIM_CHANNEL_2);
+
/*## -1- Re-Configure the Pulse ########################################## */
sEmulConfigOC.Pulse = PULSE1_VALUE;
if(HAL_TIM_OC_ConfigChannel(htim, &sEmulConfigOC, TIM_CHANNEL_1) != HAL_OK)
@@ -351,6 +355,10 @@ static void Emulate_Forward_Direction(TIM_HandleTypeDef* htim)
*/
static void Emulate_Backward_Direction(TIM_HandleTypeDef* htim)
{
+ /*## -1- Make sure channels are not started ############################## */
+ HAL_TIM_OC_Stop(htim, TIM_CHANNEL_1);
+ HAL_TIM_OC_Stop(htim, TIM_CHANNEL_2);
+
/*## -1- Re-Configure the Pulse ########################################## */
sEmulConfigOC.Pulse = PULSE2_VALUE;
if(HAL_TIM_OC_ConfigChannel(htim, &sEmulConfigOC, TIM_CHANNEL_1) != HAL_OK)
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_OCToggle/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
index f1551f7a0..002a5951c 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_LPUART1_UART_Init(void);
/* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -235,10 +238,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index d9440a7b9..c0267c6a3 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_ReceptionToIdle_CircularDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComDMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_TwoBoards_ComPolling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/USART/USART_SlaveMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
index c0fdb3c55..964812b6d 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -105,13 +105,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -119,7 +121,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -128,7 +130,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -138,7 +140,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -164,12 +166,11 @@ SECTIONS
} >RAM AT> ROM
-.ROarraySection :
-{
- *(.ROarraySection*)
-
- }
- >RAM1
+ .ROarraySection (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ *(.ROarraySection*)
+ } >RAM1
+
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_CalculateAndCheck/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/CRS/CRS_Synchronization_Polling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
deleted file mode 100644
index 861dedcad..000000000
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.extSettings
+++ /dev/null
@@ -1,7 +0,0 @@
-[ProjectFiles]
-HeaderPath=
-[Others]
-Define=
-HALModule=
-[Groups]
-Doc=../readme.txt;
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
deleted file mode 100644
index 8db7e3e3f..000000000
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/.mxproject
+++ /dev/null
@@ -1,24 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedIarFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;..\\Src\system_stm32g4xx.c;..\readme.txt;;;
-HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Src\main.c;Src\stm32g4xx_it.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_pwr.c;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Src\system_stm32g4xx.c;readme.txt;;;
-HeaderPath=..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\Drivers\CMSIS\Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32G474xx;USE_FULL_LL_DRIVER;HSE_VALUE:24000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
-
-[PreviousGenFiles]
-HeaderPath=..\Inc
-HeaderFiles=stm32g4xx_it.h;stm32_assert.h;main.h;
-SourcePath=..\Src
-SourceFiles=stm32g4xx_it.c;main.c;
-
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
index 6bc20ec64..3885cd9c4 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
@@ -16,87 +15,53 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
-#ifdef __cplusplus
-extern "C" {
-#endif
-
/* Includes ------------------------------------------------------------------*/
-#include "stm32g4xx_ll_rcc.h"
#include "stm32g4xx_ll_bus.h"
-#include "stm32g4xx_ll_crs.h"
+#include "stm32g4xx_ll_rcc.h"
#include "stm32g4xx_ll_system.h"
-#include "stm32g4xx_ll_exti.h"
-#include "stm32g4xx_ll_cortex.h"
#include "stm32g4xx_ll_utils.h"
#include "stm32g4xx_ll_pwr.h"
-#include "stm32g4xx_ll_dma.h"
#include "stm32g4xx_ll_gpio.h"
-
+#include "stm32g4xx_ll_exti.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
-/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/**
+ * @brief LED2
+ */
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
+#define LED2_PIN LL_GPIO_PIN_5
+#define LED2_GPIO_PORT GPIOA
+#define LED2_GPIO_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA)
-/* USER CODE BEGIN EFP */
+/**
+ * @brief Key push-button
+ */
+#define USER_BUTTON_PIN LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE() LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC)
+#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
+#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_IS_ACTIVE_FLAG() LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE)
+#define USER_BUTTON_SYSCFG_SET_EXTI() do {\
+ LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);\
+ } while(0)
+#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment UserKey_Callback*/
-void UserButton_Callback(void);
-
-/* USER CODE END EFP */
-
-/* Private defines -----------------------------------------------------------*/
-#define LED2_Pin LL_GPIO_PIN_5
-#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
-#ifndef NVIC_PRIORITYGROUP_0
-#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
- 4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
- 3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
- 2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
- 1 bit for subpriority */
-#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
- 0 bit for subpriority */
-#endif
-
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-#ifdef __cplusplus
-}
-#endif
+void UserButton_Callback(void);
#endif /* __MAIN_H */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
index 584b7e5b7..787cbd1b8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32g4xx_it.h
@@ -16,37 +15,23 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G4xx_IT_H
#define __STM32G4xx_IT_H
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
/* Exported types ------------------------------------------------------------*/
-/* USER CODE BEGIN ET */
-
-/* USER CODE END ET */
-
/* Exported constants --------------------------------------------------------*/
-/* USER CODE BEGIN EC */
-
-/* USER CODE END EC */
-
/* Exported macro ------------------------------------------------------------*/
-/* USER CODE BEGIN EM */
-
-/* USER CODE END EM */
+/* Exported functions ------------------------------------------------------- */
-/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
@@ -56,11 +41,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
-void EXTI15_10_IRQHandler(void);
-/* USER CODE BEGIN EFP */
-
-/* USER CODE END EFP */
+void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
index 250413b00..7b16b5902 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
@@ -19,214 +18,173 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
+
/* Includes ------------------------------------------------------------------*/
#include "main.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
+/** @addtogroup STM32G4xx_LL_Examples
+ * @{
+ */
-/* USER CODE END Includes */
+/** @addtogroup EXTI_ToggleLedOnIT
+ * @{
+ */
/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
/* Private variables ---------------------------------------------------------*/
-
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-/* USER CODE BEGIN PFP */
-/* USER CODE END PFP */
+void SystemClock_Config(void);
+void Configure_EXTI(void);
+void LED_Init(void);
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
+/* Private functions ---------------------------------------------------------*/
/**
- * @brief The application entry point.
- * @retval int
+ * @brief Main program
+ * @param None
+ * @retval None
*/
int main(void)
{
- /* USER CODE BEGIN 1 */
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ /* Enable SYSCFG and PWR Clock. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
- /* System interrupt init*/
- NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
-
- /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
- */
- LL_PWR_DisableUCPDDeadBattery();
-
- /* USER CODE BEGIN Init */
+ /* Configure the system clock to 170 MHz */
+ SystemClock_Config();
- /* USER CODE END Init */
+ /* Initialize LED2 */
+ LED_Init();
+
+ /* Configure the EXTI Line on User Button */
+ Configure_EXTI();
- /* Configure the system clock */
- SystemClock_Config();
+ /* Infinite loop */
+ while (1)
+ {
+ }
+}
- /* USER CODE BEGIN SysInit */
+/**
+ * @brief This function configures EXTI Line as Push-Button
+ * @note Peripheral configuration is minimal configuration from reset values.
+ * @param None
+ * @retval None
+ */
+void Configure_EXTI()
+{
+ /* -1- GPIO Config */
+ /* Enable GPIO Clock (to be able to program the configuration registers) */
+ USER_BUTTON_GPIO_CLK_ENABLE();
+ LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
+ LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
- /* USER CODE END SysInit */
+ /**/
+ LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- /* USER CODE BEGIN 2 */
+ /**/
+ LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
- /* USER CODE END 2 */
+ /**/
+
+ /* Configure IO */
+ LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
+ LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_NO);
+
+ /* -2- Connect External Line to the GPIO*/
+ USER_BUTTON_SYSCFG_SET_EXTI();
+
+ /*-3- Enable a falling trigger EXTI line 13 Interrupt */
+ USER_BUTTON_EXTI_LINE_ENABLE();
+ USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
+
+ /*-4- Configure NVIC for EXTI10_15_IRQn */
+ NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ NVIC_EnableIRQ(EXTI15_10_IRQn);
+}
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1)
- {
- /* USER CODE END WHILE */
+/**
+ * @brief Initialize LED2.
+ * @param None
+ * @retval None
+ */
+void LED_Init(void)
+{
+ /* Enable the LED2 Clock */
+ LED2_GPIO_CLK_ENABLE();
- /* USER CODE BEGIN 3 */
- }
- /* USER CODE END 3 */
+ /* Configure IO in output push-pull mode to drive external LED2 */
+ LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
}
/**
- * @brief System Clock Configuration
+ * @brief System Clock Configuration
+ * The system Clock is configured as follows :
+ * System Clock source = PLL (HSI)
+ * SYSCLK(Hz) = 170000000
+ * HCLK(Hz) = 170000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 1
+ * APB2 Prescaler = 1
+ * PLL_M = 4
+ * PLL_N = 85
+ * PLL_P = 2
+ * PLL_Q = 2
+ * PLL_R = 2
+ * Flash Latency(WS) = 8
+ * @param None
* @retval None
*/
void SystemClock_Config(void)
{
+ /* Flash Latency configuration */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_4);
- while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4)
- {
- }
+
+ /* Enable boost mode to be able to reach 170MHz */
LL_PWR_EnableRange1BoostMode();
+
+ /* HSI configuration and activation */
LL_RCC_HSI_Enable();
- /* Wait till HSI is ready */
while(LL_RCC_HSI_IsReady() != 1)
{
- }
+ };
- LL_RCC_HSI_SetCalibTrimming(64);
+ /* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2);
- LL_RCC_PLL_EnableDomain_SYS();
LL_RCC_PLL_Enable();
- /* Wait till PLL is ready */
+ LL_RCC_PLL_EnableDomain_SYS();
while(LL_RCC_PLL_IsReady() != 1)
{
- }
+ };
- LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
+ /* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
- /* Wait till System clock is ready */
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
- }
-
- /* Insure 1us transition state at intermediate medium speed clock*/
- for (__IO uint32_t i = (170 >> 1); i !=0; i--);
+ };
- /* Set AHB prescaler*/
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+ /* Insure 1s transition state at intermediate medium speed clock based on DWT */
+ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+ DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+ while(DWT->CYCCNT < 100);
+ /* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+ /* Set systick to 1ms in using frequency set to 170MHz */
+ /* This frequency can be calculated through LL RCC macro */
+ /* ex: __LL_RCC_CALC_PLLCLK_FREQ(__LL_RCC_CALC_HSI_FREQ(),
+ LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2)*/
LL_Init1msTick(170000000);
+ /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(170000000);
}
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-/* USER CODE BEGIN MX_GPIO_Init_1 */
-/* USER CODE END MX_GPIO_Init_1 */
-
- /* GPIO Ports Clock Enable */
- LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
- LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
-
- /**/
- LL_GPIO_ResetOutputPin(LED2_GPIO_Port, LED2_Pin);
-
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
-
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
- /**/
- LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
- /**/
- LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
-
- /**/
- LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
-
- /**/
- GPIO_InitStruct.Pin = LED2_Pin;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
-
- /* EXTI interrupt init*/
- NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI4_IRQn);
- NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI15_10_IRQn);
-
-/* USER CODE BEGIN MX_GPIO_Init_2 */
-/* USER CODE END MX_GPIO_Init_2 */
-}
-
-/* USER CODE BEGIN 4 */
-
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
@@ -237,24 +195,11 @@ static void MX_GPIO_Init(void)
*/
void UserButton_Callback(void)
{
- LL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
-}
-
-/* USER CODE END 4 */
-
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void)
-{
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
-
- /* USER CODE END Error_Handler_Debug */
+ LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
}
#ifdef USE_FULL_ASSERT
+
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
@@ -264,9 +209,22 @@ void Error_Handler(void)
*/
void assert_failed(uint8_t *file, uint32_t line)
{
- /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
- tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
- /* USER CODE END 6 */
+ ex: printf("Wrong parameters value: file %s on line %d", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
}
-#endif /* USE_FULL_ASSERT */
+#endif
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
index efc1d9372..42d6bf6ce 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -1,4 +1,3 @@
-/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32g4xx_it.c
@@ -18,230 +17,155 @@
*
******************************************************************************
*/
-/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
-#include "main.h"
#include "stm32g4xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
+/** @addtogroup STM32G4xx_LL_Examples
+ * @{
+ */
-/* USER CODE END TD */
+/** @addtogroup EXTI_ToggleLedOnIT
+ * @{
+ */
+/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
+/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
-/* Cortex-M4 Processor Interruption and Exception Handlers */
+/* Cortex-M4 Processor Exceptions Handlers */
/******************************************************************************/
+
/**
- * @brief This function handles Non maskable interrupt.
+ * @brief This function handles NMI exception.
+ * @param None
+ * @retval None
*/
void NMI_Handler(void)
{
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
- /* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
- * @brief This function handles Hard fault interrupt.
+ * @brief This function handles Hard Fault exception.
+ * @param None
+ * @retval None
*/
void HardFault_Handler(void)
{
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
+ /* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- /* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
- * @brief This function handles Memory management fault.
+ * @brief This function handles Memory Manage exception.
+ * @param None
+ * @retval None
*/
void MemManage_Handler(void)
{
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
+ /* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- /* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
- * @brief This function handles Prefetch fault, memory access fault.
+ * @brief This function handles Bus Fault exception.
+ * @param None
+ * @retval None
*/
void BusFault_Handler(void)
{
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
+ /* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- /* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
- * @brief This function handles Undefined instruction or illegal state.
+ * @brief This function handles Usage Fault exception.
+ * @param None
+ * @retval None
*/
void UsageFault_Handler(void)
{
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
+ /* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
- /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- /* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
- * @brief This function handles System service call via SWI instruction.
+ * @brief This function handles SVCall exception.
+ * @param None
+ * @retval None
*/
void SVC_Handler(void)
{
- /* USER CODE BEGIN SVCall_IRQn 0 */
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
}
/**
- * @brief This function handles Debug monitor.
+ * @brief This function handles Debug Monitor exception.
+ * @param None
+ * @retval None
*/
void DebugMon_Handler(void)
{
- /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
}
/**
- * @brief This function handles Pendable request for system service.
+ * @brief This function handles PendSVC exception.
+ * @param None
+ * @retval None
*/
void PendSV_Handler(void)
{
- /* USER CODE BEGIN PendSV_IRQn 0 */
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
}
/**
- * @brief This function handles System tick timer.
+ * @brief This function handles SysTick Handler.
+ * @param None
+ * @retval None
*/
void SysTick_Handler(void)
{
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
-
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
-/* STM32G4xx Peripheral Interrupt Handlers */
-/* Add here the Interrupt Handlers for the used peripherals. */
-/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32g4xx.s). */
+/* STM32G4xx Peripherals Interrupt Handlers */
+/* Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the */
+/* available peripheral interrupt handler's name please refer to the startup */
+/* file (startup_stm32g4xx.s). */
/******************************************************************************/
/**
- * @brief This function handles EXTI line4 interrupt.
+ * @brief This function handles external line 4_15 interrupt request.
+ * @param None
+ * @retval None
*/
-void EXTI4_IRQHandler(void)
+void USER_BUTTON_IRQHANDLER(void)
{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
+ /* Manage Flags */
+ if(USER_BUTTON_EXTI_IS_ACTIVE_FLAG() != RESET)
{
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
- /* USER CODE BEGIN LL_EXTI_LINE_4 */
-
- /* USER CODE END LL_EXTI_LINE_4 */
- }
- /* USER CODE BEGIN EXTI4_IRQn 1 */
+ USER_BUTTON_EXTI_CLEAR_FLAG();
- /* USER CODE END EXTI4_IRQn 1 */
+ /* Manage code in main.c.*/
+ UserButton_Callback();
+ }
}
/**
- * @brief This function handles EXTI line[15:10] interrupts.
+ * @}
*/
-void EXTI15_10_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI15_10_IRQn 0 */
-
- /* USER CODE END EXTI15_10_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_13) != RESET)
- {
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_13);
- /* USER CODE BEGIN LL_EXTI_LINE_13 */
-
- /* Manage code in main.c */
- UserButton_Callback();
- /* USER CODE END LL_EXTI_LINE_13 */
- }
- /* USER CODE BEGIN EXTI15_10_IRQn 1 */
- /* USER CODE END EXTI15_10_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
+/**
+ * @}
+ */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
index 908d4296b..0d3ff46bd 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT/readme.txt
@@ -21,9 +21,8 @@
@par Example Description
-This example describes how to configure the EXTI
-and use GPIOs to toggle the user LEDs available on the board when
-a user button is pressed. This example is based on the
+How to configure the EXTI and use GPIOs to toggle the user LEDs
+available on the board when a user button is pressed. It is based on the
STM32G4xx LL API. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
index 726f029af..a44cc0a41 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/EXTI_ToggleLedOnIT_Init.ioc
@@ -14,10 +14,9 @@ Mcu.Name=STM32G474R(B-C-E)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC13
Mcu.Pin1=PA5
-Mcu.Pin2=PC4
-Mcu.Pin3=VP_SYS_VS_Systick
-Mcu.Pin4=VP_SYS_VS_DBSignals
-Mcu.PinsNb=5
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.PinsNb=4
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32G474RETx
@@ -26,7 +25,6 @@ MxDb.Version=DB.6.0.100
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
-NVIC.EXTI4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -40,14 +38,11 @@ PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=LED2
PA5.Locked=true
PA5.Signal=GPIO_Output
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=USER_BUTTON
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
PC13.Locked=true
PC13.Signal=GPXTI13
-PC4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
-PC4.GPIO_Label=USER_BUTTON
-PC4.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
-PC4.GPIO_PuPd=GPIO_PULLUP
-PC4.Locked=true
-PC4.Signal=GPXTI4
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
@@ -56,6 +51,8 @@ ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32G474RETx
+ProjectManager.Example=EXTI_ToggleLedOnIT_Init
+ProjectManager.ExampleSource=CubeFw
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@@ -128,12 +125,8 @@ RCC.VCOInputFreq_Value=4000000
RCC.VCOOutputFreq_Value=340000000
SH.GPXTI13.0=GPIO_EXTI13
SH.GPXTI13.ConfNb=1
-SH.GPXTI4.0=GPIO_EXTI4
-SH.GPXTI4.ConfNb=1
VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom
-ProjectManager.Example=EXTI_ToggleLedOnIT_Init
-ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
index 077a66c0d..956e62de2 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
@@ -73,11 +73,11 @@ void UserButton_Callback(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
+#define USER_BUTTON_Pin LL_GPIO_PIN_13
+#define USER_BUTTON_GPIO_Port GPIOC
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define LED2_Pin LL_GPIO_PIN_5
#define LED2_GPIO_Port GPIOA
-#define USER_BUTTON_Pin LL_GPIO_PIN_4
-#define USER_BUTTON_GPIO_Port GPIOC
-#define USER_BUTTON_EXTI_IRQn EXTI4_IRQn
#ifndef NVIC_PRIORITYGROUP_0
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
4 bits for subpriority */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
index 3e928ec44..6e2054929 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32g4xx_it.h
@@ -56,7 +56,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void EXTI4_IRQHandler(void);
void EXTI15_10_IRQHandler(void);
/* USER CODE BEGIN EFP */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
index 3c80b077d..f30e63e54 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
@@ -178,31 +178,15 @@ static void MX_GPIO_Init(void)
/**/
LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
- /**/
- LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE4);
-
/**/
EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
EXTI_InitStruct.LineCommand = ENABLE;
EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
- EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
- LL_EXTI_Init(&EXTI_InitStruct);
-
- /**/
- EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_4;
- EXTI_InitStruct.LineCommand = ENABLE;
- EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
LL_EXTI_Init(&EXTI_InitStruct);
/**/
- LL_GPIO_SetPinPull(GPIOC, LL_GPIO_PIN_13, LL_GPIO_PULL_NO);
-
- /**/
- LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_UP);
-
- /**/
- LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_13, LL_GPIO_MODE_INPUT);
+ LL_GPIO_SetPinPull(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_PULL_NO);
/**/
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_Port, USER_BUTTON_Pin, LL_GPIO_MODE_INPUT);
@@ -216,8 +200,6 @@ static void MX_GPIO_Init(void)
LL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
/* EXTI interrupt init*/
- NVIC_SetPriority(EXTI4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(EXTI4_IRQn);
NVIC_SetPriority(EXTI15_10_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(EXTI15_10_IRQn);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
index 1209a6406..9c59bf31d 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32g4xx_it.c
@@ -200,26 +200,6 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32g4xx.s). */
/******************************************************************************/
-/**
- * @brief This function handles EXTI line4 interrupt.
- */
-void EXTI4_IRQHandler(void)
-{
- /* USER CODE BEGIN EXTI4_IRQn 0 */
-
- /* USER CODE END EXTI4_IRQn 0 */
- if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_4) != RESET)
- {
- LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_4);
- /* USER CODE BEGIN LL_EXTI_LINE_4 */
-
- /* USER CODE END LL_EXTI_LINE_4 */
- }
- /* USER CODE BEGIN EXTI4_IRQn 1 */
-
- /* USER CODE END EXTI4_IRQn 1 */
-}
-
/**
* @brief This function handles EXTI line[15:10] interrupts.
*/
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Arbitrary_Waveform/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Multiple_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_PWM_Master/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_Basic_Single_PWM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 85f910adb..fecc36da1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/HRTIM/HRTIM_CBC_Deadtime/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/LPUART/LPUART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RNG/RNG_GenerateRandomNumbers_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 70a633b9d..da82944c1 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ExitStandbyWithWakeUpTimer_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_ProgrammingTheWakeUpTimer/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_Tamper_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/RTC/RTC_TimeStamp_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_OneBoard_HalfDuplex_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Master_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/SPI/SPI_TwoBoards_FullDuplex_DMA_Slave_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_BreakAndDeadtime_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OnePulse_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_OutputCompare_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/TIM/TIM_PWMOutput_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Continuous_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Rx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_TxRx_DMA_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_IT_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_Communication_Tx_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_HardwareFlowControl/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_DMA/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_SyncCommunication_FullDuplex_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop1/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/USART/USART_WakeUpFromStop_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ConfigureSystemClock/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/UTILS/UTILS_ReadDeviceInfo/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_LL/WWDG/WWDG_RefreshUntilUserEvent_Init/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
index ddc630a65..cf287fcda 100644
--- a/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Examples_MIX/UART/UART_HyperTerminal_TxPolling_RxIT/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/NUCLEO-G474RE/Templates_LL/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 822b22aaa..3078fcde4 100644
--- a/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Applications/OpenBootloader/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ModePrivilege/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_ProcessStack/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/CORTEX/CORTEXM_SysTick/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_Adaptive_FIR_AN5305/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_DMAToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_ITToPolling/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/FMAC/FMAC_IIR_PollingToDMA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_EXTI/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PWM_LSE/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/LPTIM/LPTIM_Timeout/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_CurrentConsumption/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_SHUTDOWN/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP0/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/PWR/PWR_STOP1_RTC/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_CRS_Synchronization_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
index b5571c2c7..cf1134eb2 100644
--- a/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/RCC/RCC_ClockConfig/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_EncoderIndex_PulseOnCompare/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_AnalogWatchdog_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_ContinuousConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_GroupsRegularInjected_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_Oversampling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/ADC/ADC_SingleConversion_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_IT_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/COMP/COMP_CompareGpioVsVrefInt_OutputGpio_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/CORDIC/CORDIC_CosSin/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/CORTEX/CORTEX_MPU/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateConstantSignal_TriggerSW_LP_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DAC/DAC_GenerateWaveform_TriggerHW_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/LPTIM/LPTIM_PulseCounter_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_Follower/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStandbyMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/PWR/PWR_EnterStopMode/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_OutputSystemClockOnMCO/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSEasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RCC/RCC_UseHSI_PLLasSystemClock/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
index 73bced99d..d980ad9e3 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm/Src/main.c
@@ -58,8 +58,8 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Buffers used for displaying Time and Date */
-uint8_t aShowTime[] = "hh:ms:ss";
-uint8_t aShowDate[] = "dd/mm/aaaa";
+uint8_t aShowTime[16] = "hh:ms:ss";
+uint8_t aShowDate[16] = "dd/mm/aaaa";
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/RTC/RTC_Alarm_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_LL/TIM/TIM_InputCapture_Init/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
index d0dfaba39..6dfa39172 100644
--- a/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Examples_MIX/PWR/PWR_STOP1/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld b/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
index 774193e6c..14e47ddc9 100644
--- a/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
+++ b/Projects/NUCLEO-G491RE/Templates_LL/STM32CubeIDE/STM32G491RETX_FLASH.ld
@@ -78,13 +78,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -92,7 +94,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -101,7 +103,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -111,7 +113,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/Release_Notes.html b/Projects/Release_Notes.html
index 5c6d3d392..b04a14808 100644
--- a/Projects/Release_Notes.html
+++ b/Projects/Release_Notes.html
@@ -47,9 +47,50 @@
Purpose
Update History
-
V1.5.2 / 15-DEC-2023
+
V1.6.0 / 05-June-2024
Main Changes
+
+Add new projects for STM32G474E-EVAL1 board (64 in total)
+Fix printf() API implementation to be compliant with IAR 9.x.
+
+
Known Limitations
+
+The following STM32CubeIDE project include only Debug configuration :
+
+STM32G474E-EVAL/Demonstrations/Demo
+
+
+
+
+Development Toolchains :
+
+
+
+
+
+IAR Embedded Workbench for ARM (EWARM)toolchain
+V8.50.9
+
+
+RealView Microcontroller DevelopmentKit (MDK-ARM) toolchain
+V5.38
+
+
+STM32CubeIDE toolchain (gcc9_2020_q2_update)
+V1.14.0
+
+
+
+
+
+
+
V1.5.2 / 15-DEC-2023
+
+
Main Changes
Patch Release
Fix PWR_STANDBY_RTC examples in order to execute correctly entering/exiting Standby mode.
@@ -270,14 +311,14 @@ Projects
-Known Limitations
+Known Limitations
The following STM32CubeIDE project include only Debug configuration :
STM32G474E-EVAL/Demonstrations/Demo
-
+
Development Toolchains :
@@ -306,7 +347,7 @@
-Known Limitations
-Development Toolchains and Compilers
+Known Limitations
+Development Toolchains and Compilers
Development Toolchains :
@@ -381,7 +422,7 @@ Development Toolchains and Compi
V1.5.0 / 10-November-2021
-
Main Changes
+
Main Changes
Maintenance release
Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx/91xx devices.
@@ -630,8 +671,8 @@ Projects
-
Known Limitations
-
Development Toolchains and Compilers
+
Known Limitations
+
Development Toolchains and Compilers
Development Toolchains :
@@ -732,7 +773,7 @@ Other compatibilities
V1.4.0 / 28-January-2021
-
Main Changes
+
Main Changes
Maintenance release
Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx/91xx devices.
@@ -1018,8 +1059,8 @@ Projects
-
Known Limitations
-
Development Toolchains and Compilers
+
Known Limitations
+
Development Toolchains and Compilers
Development Toolchains :
@@ -1116,7 +1157,7 @@ Other compatibilities
V1.2.0 / 14-February-2020
-
Main Changes
+
Main Changes
Maintenance release
Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices.
@@ -1387,8 +1428,8 @@ Projects
-
Known Limitations
-
Development Toolchains and Compilers
+
Known Limitations
+
Development Toolchains and Compilers
Development Toolchains :
@@ -1478,7 +1519,7 @@ Other compatibilities
V1.1.0 / 28-June-2019
-
Main Changes
+
Main Changes
Maintenance release
Maintenance release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices and introducing Discovery Kit B-G474E-DPOW1.
@@ -1725,8 +1766,8 @@ Projects
-
Known Limitations
-
Development Toolchains and Compilers
+
Known Limitations
+
Development Toolchains and Compilers
Development Toolchains :
@@ -1816,7 +1857,7 @@ Other compatibilities
V1.0.1 / 29-May-2019
-
Main Changes
+
Main Changes
Patch Release
HRTIM/BasicPWM project released in V1.0.0 is now split in 4 different projects on NUCLEO-G474RE (using HAL and Low-layer interfaces):
@@ -1860,7 +1901,7 @@ Projects
V1.0.0 / 12-April-2019
-
Main Changes
+
Main Changes
First release
First Official release of STM32CubeG4 (STM32Cube for STM32G4 Series) Firmware projects supporting STM32G431xx/31xx/71xx/73xx/74xx devices and introducing NUCLEO-G431KB, NUCLEO-G431RB, NUCLEO-G474RE and STM32G474E-EVAL boards.
Contents
@@ -2049,12 +2090,12 @@
Projects
-
Known Limitations
+
Known Limitations
STM32G474E-EVAL : Project Template in HAL is not yet ported on Keil and SW4STM32 toolchains
USB Device : Warning in compilation of Keil and SW4STM32 Toolchains ("__ALIGN_END" is redefined in the usbd_def.h)
-
Development Toolchains and Compilers
+
Development Toolchains and Compilers
Development Toolchains :
diff --git a/Projects/STM32CubeProjectsList.html b/Projects/STM32CubeProjectsList.html
index f86e5230e..902940fa2 100644
--- a/Projects/STM32CubeProjectsList.html
+++ b/Projects/STM32CubeProjectsList.html
@@ -1,9 +1,8 @@
-Projects Overview
+
-
-
-
+
+ Projects Overview
+
+
+
STM32CubeG4 Firmware Examples for STM32G4xx Series
- Copyright 2019 STMicroelectronics
+ Copyright 2021 STMicroelectronics
-
+
- The
-STM32CubeG4 Firmware package comes with a rich set of examples running
-on STMicroelectronics boards, organized by board and provided with
-preconfigured projects for the main supported toolchains.
+ The STM32CubeG4 Firmware package comes with a rich set of examples running on STMicroelectronics boards, organized by board and provided with preconfigured projects for the main supported toolchains.
-
+
The examples are classified depending on the STM32Cube level they apply to, and are named as follows:
- Examples
-uses only the HAL and BSP drivers (Middleware not used), having as
-objective to demonstrate the product/peripherals features and usage.
-The examples are organized per peripheral (a folder for each
-peripheral, ex. TIM) and offers different complexity level from basic
-usage of a given peripheral (ex. PWM generation using timer) till
-integration of several peripherals(use DAC for signals generation with
-synchronization from TIM6 and DMA). Board resources usage is reduced to
-the strict minimum.
- Examples_LL
-uses only the LL drivers (HAL and Middleware not used), offering
-optimum implementation of typical use cases of the peripheral features
-and configuration procedures. The examples are organized per peripheral
-(a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo
-board.
- Examples_MIX uses only
-HAL, BSP and LL drivers (Middleware are not used), having as objective
-to demonstrate how to use both HAL and LL APIs in the same application,
-to combine the advantages of both APIs (HAL offers high level and
-functionalities oriented APIs, with high portability level and hide
-product or IPs complexity to end user. While LL offers low level APIs
-at registers level with better optimization). The examples are
-organized per peripheral (a folder for each peripheral, ex. TIM) and
-runs exclusively on Nucleo board.
- Applications
-intends to demonstrate the product performance and how to use the
-different Middleware stacks available. The Applications are organized
-per Middleware (a folder for each Middleware, ex. USB Host) or product
-feature that need high level firmware bricks (ex. Audio). Integration
-Applications that use several Middleware stacks are provided as well.
+ Examples uses only the HAL and BSP drivers (Middleware not used), having as objective to demonstrate the product/peripherals features and usage. The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and offers different complexity level from basic usage of a given peripheral (ex. PWM generation using timer) till integration of several peripherals(use DAC for signals generation with synchronization from TIM6 and DMA). Board resources usage is reduced to the strict minimum.
+ Examples_LL uses only the LL drivers (HAL and Middleware not used), offering optimum implementation of typical use cases of the peripheral features and configuration procedures. The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo board.
+ Examples_MIX uses only HAL, BSP and LL drivers (Middleware are not used), having as objective to demonstrate how to use both HAL and LL APIs in the same application, to combine the advantages of both APIs (HAL offers high level and functionalities oriented APIs, with high portability level and hide product or IPs complexity to end user. While LL offers low level APIs at registers level with better optimization). The examples are organized per peripheral (a folder for each peripheral, ex. TIM) and runs exclusively on Nucleo board.
+ Applications intends to demonstrate the product performance and how to use the different Middleware stacks available. The Applications are organized per Middleware (a folder for each Middleware, ex. USB Host) or product feature that need high level firmware bricks (ex. Audio). Integration Applications that use several Middleware stacks are provided as well.
Demonstrations aims to integrate and run the maximum of peripherals and Middleware stacks to showcase the product features and performance.
A Template project is provided to allow user to quickly build any firmware application on a given board.
- The examples are located under STM32Cube_FW_STM32CubeG4_VX.Y.Z\Projects\, and all of them have the same structure:
+ The examples are located under STM32Cube_FW_G4_VX.Y.Z\Projects\, and all of them have the same structure:
\Inc folder that contains all header files.
\Src folder for the sources code.
- \EWARM and \MDK-ARM folders contain the preconfigured project for each toolchain.
- readme.txt describing the example behavior and the environment required to run the example.
+ \EWARM, \MDK-ARM and \STM32CubeIDE folders contain the preconfigured project for each toolchain.
+ A readme describing the example behavior and the environment required to run the example.
To run the example, you have to do the following:
@@ -83,29 +55,21 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
Open the example using your preferred toolchain.
Rebuild all files and load the image into target memory.
- Run the example by following the readme.txt instructions.
+ Run the example by following the readme instructions.
- Note :
-refer to section "Development Toolchains and Compilers" and "Supported
-Devices and EVAL boards" of the Firmware package release notes to know
-about the SW/HW environment used for the Firmware development and
-validation. The correct operation of the provided examples is not
-guaranteed on some environments, for example when using different
-compiler or board versions.
+ Note : refer to section "Development Toolchains and Compilers" and "Supported Devices and EVAL, Nucleo and Discovery boards" of the Firmware package release notes to know about the SW/HW environment used for the Firmware development and validation. The correct operation of the provided examples is not guaranteed on some environments, for example when using different compiler or board versions.
- The
-provided examples can be tailored to run on any compatible hardware;
-user simply need to update the BSP drivers for his board, if it has the
-same hardware functions (LED, LCD display, pushbuttons...etc.). The BSP
-is based on a modular architecture that allows it to be ported easily
-to any hardware by just implementing the low level routines.
+ The provided examples can be tailored to run on any compatible hardware; user simply need to update the BSP drivers for his board, if it has the same hardware functions (LED, LCD display, pushbuttons...etc.). The BSP is based on a modular architecture that allows it to be ported easily to any hardware by just implementing the low level routines.
- The table below contains the list of examples provided within STM32CubeG4 Firmware package.
+
+
The table below contains the list of examples provided within STM32Cube_FW_G4 Firmware package.
+ In this table, the label
CubeMX means the projects have been created using
STM32CubeMX , the STM32Cube initialization code generator. Those projects can be opened with this tools to modify the projects itself. The others projects are manually created to demonstrate the product features.
+
-
+
UM2492 : Getting started with STM32CubeG4 for STM32G4xx Series.
UM2570 : Description of STM32G4 HAL and low-layer drivers
@@ -114,13 +78,14 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
UM1721 : Developing Applications on STM32Cube with FatFs.
UM1722 : Developing Applications on STM32Cube with RTOS.
-
-
-
+
+
+
Level
Module Name
Project Name
Description
+ STM32G474E-EVAL1
STM32G474E-EVAL
NUCLEO-G491RE
NUCLEO-G474RE
@@ -128,23 +93,25 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
NUCLEO-G431KB
B-G474E-DPOW1
-
- Templates
- -
- Starter project
-
+
+ Templates
+ -
+ Starter project
+
This project provides a reference template based on the STM32Cube HAL API that can be used
to build any firmware application.
- X
- X
- X
- X
- X
- X
+ X
+ X
+ X
+ X
+ X
+ X
+ X
-
- Total number of templates: 6
+
+ Total number of templates: 7
+ 1
1
1
1
@@ -152,22 +119,24 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
1
1
-
- Templates_LL
- -
- Starter project
-
+
+ Templates_LL
+ -
+ Starter project
+
This projects provides a reference template through the LL API that can be used to build any firmware application.
- X
- X
- X
- X
- X
- X
+ X
+ X
+ X
+ X
+ X
+ X
+ X
-
- Total number of templates_ll: 6
+
+ Total number of templates_ll: 7
+ 1
1
1
1
@@ -175,529 +144,568 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
1
1
-
- Examples
- -
- BSP
-
+
+ Examples
+ -
+ BSP
+
This example provides a short description of how to use the BSP to interface with
-the EVAL board
+the EVAL1 board
At the beginning of the main program the HAL_Init() function is called to reset
all the peripherals, initialize the Flash interface and the systick.
- X
+ X
+ X
-
-
-
-
- X
+ X
-
- ADC
- ADC_ContinuousConversion_TriggerSW
- This example provides a short description of how to use the ADC peripheral to
+
+ ADC
+ ADC_ContinuousConversion_TriggerSW
+ This example provides a short description of how to use the ADC peripheral to
perform conversions in continuous mode.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- ADC_GainCompensation
- Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
+
+ ADC_GainCompensation
+ Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
without need of data post computing.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- ADC_GroupsRegularInjected
- Use ADC to perform conversions using the two ADC groups: regular group
+
+ ADC_GroupsRegularInjected
+ Use ADC to perform conversions using the two ADC groups: regular group
for ADC conversion on main stream and injected group for ADC conversions
limited on specific events (conversions injected within main conversions
stream).
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- ADC_OffsetCompensation
- Use ADC Offset compensation feature to translate directly conversion result from
+
+ ADC_OffsetCompensation
+ Use ADC Offset compensation feature to translate directly conversion result from
the ADC range to an application specific range without need of post computing.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- COMP
- COMP_CompareGpioVsDacInt_OutputGpio
-
+
+ COMP
+ COMP_CompareGpioVsDacInt_OutputGpio
+
This example shows how to configure the COMP peripheral to compare the external
voltage applied on a specific pin with a sawtooth signal generated by a DAC.
- CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ -
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- COMP_CompareGpioVsVrefInt_IT
-
+
+ COMP_CompareGpioVsVrefInt_IT
+
How to configure the COMP peripheral to compare the external
voltage applied on a specific pin with the Internal Voltage Reference.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- COMP_CompareGpioVsVrefInt_OutputGpio
-
+
+ COMP_CompareGpioVsVrefInt_OutputGpio
+
This example shows how to configure the COMP peripheral to compare the external
voltage applied on a specific pin with an internal reference.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- COMP_OutputBlanking
-
+
+ COMP_OutputBlanking
+
How to use the comparator-peripheral output blanking feature. The purpose of the
output blanking feature in motor control is to prevent tripping of the current
regulation upon short current spikes at the beginning of the PWM period.
- CubeMx
-
- CubeMx
+ CubeMx
-
+ CubeMx
-
- CubeMx
+ -
+ CubeMx
-
- CORDIC
- CORDIC_SinCos_DMA_Perf
-
+
+ CORDIC
+ CORDIC_SinCos_DMA_Perf
+
How to use the CORDIC peripheral to calculate sines and cosines array in DMA mode.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CORDIC_Sin_DMA
-
+
+ CORDIC_Sin_DMA
+
How to use the CORDIC peripheral to calculate array of sines in DMA mode.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- CORTEX
- CORTEXM_MPU
-
+
+ CORTEX
+ CORTEXM_MPU
+
Presentation of the MPU feature. This example configures a memory area as
privileged read-only, and attempts to perform read and write operations in
different modes.
-
- CubeMx
+ -
+ CubeMx
-
-
-
- CubeMx
+ CubeMx
-
- CORTEXM_ModePrivilege
-
+
+ CORTEXM_ModePrivilege
+
How to modify the Thread mode privilege access and stack. Thread mode is entered
on reset or when returning from an exception.
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
- CORTEXM_ProcessStack
-
+
+ CORTEXM_ProcessStack
+
How to modify the Thread mode stack. Thread mode is entered on reset, and can be
entered as a result of an exception return.
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
- CORTEXM_SysTick
-
+
+ CORTEXM_SysTick
+
How to use the default SysTick configuration with a 1 ms timebase to toggle LEDs.
-
- CubeMx
-
+ CubeMx
-
-
- CubeMx
+ -
+ CubeMx
-
- CRC
- CRC_Bytes_Stream_7bit_CRC
-
+
+ CRC
+ CRC_Bytes_Stream_7bit_CRC
+
How to configure the CRC using the HAL API. The CRC (cyclic
redundancy check) calculation unit computes 7-bit CRC codes derived from buffers
of 8-bit data (bytes). The user-defined generating polynomial is manually set
to 0x65, that is, X^7 + X^6 + X^5 + X^2 + 1, as used in the Train Communication
Network, IEC 60870-5[17].
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CRC_Data_Reversing_16bit_CRC
-
+
+ CRC_Data_Reversing_16bit_CRC
+
How to configure the CRC using the HAL API. The CRC (cyclic
redundancy check) calculation unit computes a 16-bit CRC code derived from a
buffer of 8-bit data (bytes). Input and output data reversal features are
enabled. The user-defined generating polynomial is manually set to 0x1021,
that is, X^16 + X^12 + X^5 + 1 which is the CRC-CCITT generating polynomial.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CRC_Example
-
+
+ CRC_Example
+
How to configure the CRC using the HAL API. The CRC (cyclic
redundancy check) calculation unit computes the CRC code of a given buffer of
32-bit data words, using a fixed generator polynomial (0x4C11DB7).
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CRC_UserDefinedPolynomial
-
+
+ CRC_UserDefinedPolynomial
+
How to configure the CRC using the HAL API. The CRC (cyclic
redundancy check) calculation unit computes the 8-bit CRC code for a given
buffer of 32-bit data words, based on a user-defined generating polynomial.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CRYP
- CRYP_DMA
-
+
+ CRYP
+ CRYP_DMA
+
How to use the AES peripheral to encrypt and decrypt data using AES 128
Algorithm with ECB chaining mode in DMA mode.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- Cortex
- CORTEXM_MPU
-
+
+ Cortex
+ CORTEXM_MPU
+
Presentation of the MPU feature. This example configures a memory area as
privileged read-only, and attempts to perform read and write operations in
different modes.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CORTEXM_ModePrivilege
-
+
+ CORTEXM_ModePrivilege
+
How to modify the Thread mode privilege access and stack. Thread mode is entered
on reset or when returning from an exception.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CORTEXM_ProcessStack
-
+
+ CORTEXM_ProcessStack
+
How to modify the Thread mode stack. Thread mode is entered on reset, and can be
entered as a result of an exception return.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CORTEXM_SysTick
-
+
+ CORTEXM_SysTick
+
How to use the default SysTick configuration with a 1 ms timebase to toggle LEDs.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- DAC
- DAC_DMADoubleDataMode
- Use DAC DMA double data mode to save AHB bandwidth and to be able to output 2 different
+
+ DAC
+ DAC_DMADoubleDataMode
+ Use DAC DMA double data mode to save AHB bandwidth and to be able to output 2 different
250kHz sine wave sampled at 15MSps by 2 different DAC converters.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- DAC_DualConversion
- Use DAC dual channel mode to generate signal on both DAC channels at the same time.
+
+ DAC_DualConversion
+ Use DAC dual channel mode to generate signal on both DAC channels at the same time.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- DAC_DualConversionFromDMA
- Use DAC dual channel mode with DMA to generate signal on both DAC channels at the same time.
+
+ DAC_DualConversionFromDMA
+ Use DAC dual channel mode with DMA to generate signal on both DAC channels at the same time.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
- CubeMx
+ CubeMx
-
- DAC_SignalsGeneration2
- Use the DAC peripheral to generate several signals using the DMA
+
+ DAC_SignalsGeneration2
+ Use the DAC peripheral to generate several signals using the DMA
controller and the DAC internal wave generator.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- DMA
- DMA_FLASHToRAM
-
+
+ DMA
+ DMA_FLASHToRAM
+
How to use a DMA to transfer a word data buffer from Flash memory to embedded
SRAM through the HAL API.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- DMA_MUXSYNC
-
+
+ DMA_MUXSYNC
+
How to use the DMA with the DMAMUX to synchronize a transfer with the LPTIM1
output signal. USART1 is used in DMA synchronized mode to send a countdown from
10 to 00, with a period of 2 seconds.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- FDCAN
- FDCAN_Classic_Frame_Networking
-
+
+ FDCAN
+ FDCAN_Classic_Frame_Networking
+
How to configure the FDCAN peripheral to send and receive Classic CAN frames.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FDCAN_Com_IT
-
+
+ FDCAN_Com_IT
+
How to achieve Interrupt Process Communication between two FDCAN units.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- FDCAN_Com_polling
-
+
+ FDCAN_Com_polling
+
How to achieve Polling Process Communication between two FDCAN units.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- FDCAN_Loopback
-
+
+ FDCAN_Loopback
+
How to configure the FDCAN to operate in loopback mode.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FLASH
- FLASH_DualBoot
-
+
+ FLASH
+ FLASH_DualBoot
+
This example guides you through the different configuration steps by mean of HAL API
-how to program bank1 and bank2 of the STM32G4xx internal Flash memory mounted on STM32G474E-EVAL Rev B
+how to program bank1 and bank2 of the STM32G4xx internal Flash memory mounted on STM32G474E-EVAL1 Rev B
and swap between both of them.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
-
-
-
- FLASH_EraseProgram
-
+
+ FLASH_EraseProgram
+
How to configure and use the FLASH HAL API to erase and program the internal
Flash memory.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- FLASH_FastProgram
-
+
+ FLASH_FastProgram
+
How to configure and use the FLASH HAL API to erase and fast program the
internal Flash memory.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- FLASH_WriteProtection
-
+
+ FLASH_WriteProtection
+
How to configure and use the FLASH HAL API to enable and disable the write
protection of the internal Flash memory.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- FMAC
- FMAC_Adaptive_FIR_AN5305
-
+
+ FMAC
+ FMAC_Adaptive_FIR_AN5305
+
How to use the FMAC peripheral to implement an adaptive FIR filter in DMA mode.
-
- CubeMx
- CubeMx
-
+ CubeMx
+ CubeMx
-
- CubeMx
+ -
+ CubeMx
-
- FMAC_Buck_VoltageMode_HW_AN5305
-
+
+ FMAC_Buck_VoltageMode_HW_AN5305
+
How to use the FMAC peripheral to implement a 3p3z controller.
-
@@ -705,359 +713,387 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
-
- CubeMx
+ -
+ CubeMx
-
- FMAC_FIR_DMAToIT
-
+
+ FMAC_FIR_DMAToIT
+
How to use the FMAC peripheral to perform a FIR filter from DMA mode to IT mode.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- FMAC_FIR_PollingToIT
-
+
+ FMAC_FIR_PollingToIT
+
How to use the FMAC peripheral to perform a FIR filter from polling mode to IT mode.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- FMAC_IIR_ITToPolling
-
+
+ FMAC_IIR_ITToPolling
+
How to use the FMAC peripheral to perform an IIR filter from IT mode to polling mode.
-
- CubeMx
- CubeMx
- CubeMx
-
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ -
+ CubeMx
-
- FMAC_IIR_PollingToDMA
-
+
+ FMAC_IIR_PollingToDMA
+
How to use the FMAC peripheral to perform an IIR filter from polling mode to DMA mode.
-
- CubeMx
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- FMC
- FMC_SRAM
-
+
+ FMC
+ FMC_SRAM
+
This example describes how to configure the FMC controller to access the SRAM
memory.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- GPIO
- GPIO_EXTI
-
+
+ GPIO
+ GPIO_EXTI
+
How to configure external interrupt lines.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- GPIO_IOToggle
-
+
+ GPIO_IOToggle
+
How to configure and use GPIOs through the HAL API.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- HAL
- HAL_TimeBase_TIM
-
+
+ HAL
+ HAL_TimeBase_TIM
+
How to customize HAL using a general-purpose timer as main source of time base
instead of Systick.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- HRTIM
- HRTIM_Basic_ArbitraryWaveform
- This example describes how to generate basic non-PWM waveforms with the
+
+ HRTIM
+ HRTIM_Basic_ArbitraryWaveform
+ This example describes how to generate basic non-PWM waveforms with the
HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_MultiplePWM
- This example describes how to generate basic PWM waveforms PWM on multiple outputs
+
+ HRTIM_Basic_MultiplePWM
+ This example describes how to generate basic PWM waveforms PWM on multiple outputs
with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_PWMMaster
- This example describes how to generate basic PWM waveforms with HRTIM timers
+
+ HRTIM_Basic_PWMMaster
+ This example describes how to generate basic PWM waveforms with HRTIM timers
other than the timing unit itself, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_SinglePWM
- This example describes how to check HRTIM outputs and to generate elementary
+
+ HRTIM_Basic_SinglePWM
+ This example describes how to check HRTIM outputs and to generate elementary
PWM waveforms with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- I2C
- I2C_TwoBoards_AdvComIT
-
+
+ I2C
+ I2C_TwoBoards_AdvComIT
+
How to handle I2C data buffer transmission/reception between two boards,
using an interrupt.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_ComDMA
-
+
+ I2C_TwoBoards_ComDMA
+
How to handle I2C data buffer transmission/reception between two boards,
via DMA.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_ComIT
-
+
+ I2C_TwoBoards_ComIT
+
How to handle I2C data buffer transmission/reception between two boards,
using an interrupt.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_ComPolling
-
+
+ I2C_TwoBoards_ComPolling
+
How to handle I2C data buffer transmission/reception between two boards,
in polling mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_RestartComIT
-
+
+ I2C_TwoBoards_RestartComIT
+
How to handle single I2C data buffer transmission/reception between two boards,
in interrupt mode and with restart condition.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_WakeUpFromStop
-
+
+ I2C_WakeUpFromStop
+
How to handle I2C data buffer transmission/reception between two boards,
using an interrupt when the device is in Stop mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- IWDG
- IWDG_Reset
-
+
+ IWDG
+ IWDG_Reset
+
How to handle the IWDG reload counter and simulate a software fault that generates
an MCU IWDG reset after a preset laps of time.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- IWDG_WindowMode
-
+
+ IWDG_WindowMode
+
How to periodically update the IWDG reload counter and simulate a software fault that generates
an MCU IWDG reset after a preset laps of time.
-
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- LPTIM
- LPTIM_PWMExternalClock
-
+
+ LPTIM
+ LPTIM_PWMExternalClock
+
How to configure and use, through the HAL LPTIM API, the LPTIM peripheral using an external counter clock,
to generate a PWM signal at the lowest power consumption.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- LPTIM_PWM_LSE
-
+
+ LPTIM_PWM_LSE
+
How to configure and use, through the HAL LPTIM API, the LPTIM peripheral using LSE
as counter clock, to generate a PWM signal, in a low-power mode.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- LPTIM_PulseCounter
-
+
+ LPTIM_PulseCounter
+
How to configure and use, through the LPTIM HAL API, the LPTIM peripheral
to count pulses.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- LPTIM_Timeout
-
+
+ LPTIM_Timeout
+
How to implement, through the HAL LPTIM API, a timeout with the LPTIMER peripheral, to wake up
the system from a low-power mode.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- OPAMP
- OPAMP_Calibration
-
+
+ OPAMP
+ OPAMP_Calibration
+
This example shows how to calibrate the OPAMP.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- OPAMP_InternalFollower
-
+
+ OPAMP_InternalFollower
+
This example provides a short description of how to configure the OPAMP in internal
follower mode (unity gain). The signal applied on OPAMP non-inverting input is
reproduced on OPAMP output.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- OPAMP_PGA
-
+
+ OPAMP_PGA
+
This example shows how to use the built-in PGA mode (OPAMP programmable gain).
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- OPAMP_PGA_ExternalBias
-
+
+ OPAMP_PGA_ExternalBias
+
This example is configuring OPAMP1 as follow:
- Inverting input: PA3 (pin 42 on connector CN6)
- Non inverting input: PA7 (pin 37 on connector CN6)
@@ -1091,16 +1127,17 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
PA2 (pin 43 on connector CN6)
- Connect sine wave and bias to the OPAMP inputs and make the bias vary to observe OPAMP behavior evolution.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- OPAMP_TimerControlMux
-
+
+ OPAMP_TimerControlMux
+
This mode allows upon a timer trigger to change OPAMP configuration from a primary
one to a secondary one. Possibilities are as follow:
@@ -1115,948 +1152,1034 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
- Primary configuration is follower with non inverting input on DAC4
generating a triangle wave.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- PWR
- PWR_CurrentConsumption
- How to configure the system to measure the current consumption in different
+
+ PWR
+ PWR_CurrentConsumption
+ How to configure the system to measure the current consumption in different
low-power modes.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- PWR_LPRUN
-
+
+ PWR_LPRUN
+
How to enter and exit the Low-power run mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- PWR_LPRUN_SRAM1
-
+
+ PWR_LPRUN_SRAM1
+
This example shows how to enter and exit the Low Power Run mode.
- CubeMx
+ CubeMx
+ CubeMx
-
-
- CubeMx
+ CubeMx
-
-
-
- PWR_LPSLEEP
-
+
+ PWR_LPSLEEP
+
How to enter the Low-power sleep mode and wake up from this mode by using
an interrupt.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- PWR_PVD
- How to configure the programmable voltage detector by using an external interrupt
+
+ PWR_PVD
+ How to configure the programmable voltage detector by using an external interrupt
line. External DC supply must be used to supply Vdd.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
-
-
-
- PWR_SHUTDOWN
-
+
+ PWR_SHUTDOWN
+
This example shows how to enter the system in SHUTDOWN mode and wake-up from this
mode using external RESET or WKUP pin.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- PWR_SLEEP
-
+
+ PWR_SLEEP
+
How to enter the Sleep mode and wake up from this mode by using an interrupt.
-
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
- PWR_STANDBY
-
+
+ PWR_STANDBY
+
How to enter the Standby mode and wake up from this mode by using an external
reset or the WKUP pin.
-
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
- PWR_STANDBY_RTC
-
+
+ PWR_STANDBY_RTC
+
How to enter the Standby mode and wake-up from this mode by using an external
reset or the RTC wakeup timer.
-
- CubeMx
- CubeMx
-
- CubeMx
+ CubeMx
+ CubeMx
+ -
+ CubeMx
-
-
- PWR_STOP0
-
+
+ PWR_STOP0
+
This example shows how to enter Stop 0 mode and wake up from this mode using
an interrupt.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- PWR_STOP0_RTC
-
+
+ PWR_STOP0_RTC
+
This example shows how to enter Stop 0 mode and wake up from this mode using
an interrupt from RTC Wake-up Timer.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
-
- PWR_STOP1
-
+
+ PWR_STOP1
+
This example shows how to enter Stop 1 mode and wake up from this mode using
an interrupt.
-
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
- PWR_STOP1_RTC
-
+
+ PWR_STOP1_RTC
+
This example shows how to enter Stop 1 mode and wake up from this mode using
an interrupt from RTC Wake-up Timer.
-
- CubeMx
- CubeMx
-
- CubeMx
+ CubeMx
+ CubeMx
+ -
+ CubeMx
-
-
- QSPI
- QSPI_ExecuteInPlace
-
+
+ QSPI
+ QSPI_ExecuteInPlace
+
This example describes how to execute a part of the code from the QSPI memory. To do this,
a section is created where the function is stored.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- QSPI_MemoryMapped
-
+
+ QSPI_MemoryMapped
+
This example describes how to erase part of the QSPI memory, write data in DMA mode
and access to QSPI memory in memory-mapped mode to check the data in a forever loop.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- QSPI_MemoryMappedDual
-
+
+ QSPI_MemoryMappedDual
+
This example describes how to use QSPI interface in memory mapped dual flash mode.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- QSPI_ReadWriteDual_DMA
-
+
+ QSPI_ReadWriteDual_DMA
+
This example describes how to use QSPI interface in dual flash mode.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- QSPI_ReadWrite_DMA
-
+
+ QSPI_ReadWrite_DMA
+
This example describes how to erase part of the QSPI memory, write data in DMA mode,
read data in DMA mode and compare the result in a forever loop.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- QSPI_ReadWrite_IT
-
+
+ QSPI_ReadWrite_IT
+
This example describes how to erase part of the QSPI memory, write data in IT mode,
read data in IT mode and compare the result in a forever loop.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- RCC
- RCC_CRS_Synchronization_IT
-
+
+ RCC
+ RCC_CRS_Synchronization_IT
+
Configuration of the clock recovery service (CRS) in Interrupt mode, using the RCC HAL API.
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
-
- RCC_CRS_Synchronization_Polling
-
+
+ RCC_CRS_Synchronization_Polling
+
Configuration of the clock recovery service (CRS) in Polling mode, using the RCC HAL API.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RCC_ClockConfig
-
+
+ RCC_ClockConfig
+
Configuration of the system clock (SYSCLK) and modification of the clock settings in Run mode, using the RCC HAL API.
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
-
- RNG
- RNG_MultiRNG
-
+
+ RNG
+ RNG_MultiRNG
+
Configuration of the RNG using the HAL API. This example uses the RNG to generate 32-bit long random numbers.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RNG_MultiRNG_IT
-
+
+ RNG_MultiRNG_IT
+
Configuration of the RNG using the HAL API. This example uses RNG interrupts to generate 32-bit long random numbers.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RTC
- RTC_Alarm
-
+
+ RTC
+ RTC_Alarm
+
Configuration and generation of an RTC alarm using the RTC HAL API.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RTC_Calendar
-
+
+ RTC_Calendar
+
Configuration of the calendar using the RTC HAL API.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RTC_LSI
-
+
+ RTC_LSI
+
Use of the LSI clock source autocalibration to get a precise RTC clock.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- SAI
- SAI_AudioPlay
-
+
+ SAI
+ SAI_AudioPlay
+
This example shows how to use the SAI HAL API to play an audio file using the DMA
circular mode and how to handle the buffer update.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- SMARTCARD
- SMARTCARD_T0_MFX
-
+
+ SMARTCARD
+ SMARTCARD_T0_MFX
+
This example describes a firmware smartcard Interface based on USART.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- SMBUS
- SMBUS_TSENSOR
-
+
+ SMBUS
+ SMBUS_TSENSOR
+
This example shows how to ensure SMBUS Data buffer transmission and reception with
IT. The communication is done with a SMBUS temperature sensor.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- SPI
- SPI_FullDuplex_ComDMA_Master
-
+
+ SPI
+ SPI_FullDuplex_ComDMA_Master
+
Data buffer transmission/reception between two boards via SPI using DMA.
-
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- SPI_FullDuplex_ComDMA_Slave
-
+
+ SPI_FullDuplex_ComDMA_Slave
+
Data buffer transmission/reception between two boards via SPI using DMA.
-
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- SPI_FullDuplex_ComIT_Master
-
+
+ SPI_FullDuplex_ComIT_Master
+
Data buffer transmission/reception between two boards via SPI using Interrupt mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI_FullDuplex_ComIT_Slave
-
+
+ SPI_FullDuplex_ComIT_Slave
+
Data buffer transmission/reception between two boards via SPI using Interrupt mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI_FullDuplex_ComPolling_Master
-
+
+ SPI_FullDuplex_ComPolling_Master
+
Data buffer transmission/reception between two boards via SPI using Polling mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI_FullDuplex_ComPolling_Slave
-
+
+ SPI_FullDuplex_ComPolling_Slave
+
Data buffer transmission/reception between two boards via SPI using Polling mode.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM
- TIM_CascadeSynchro
-
+
+ TIM
+ TIM_CascadeSynchro
+
This example shows how to synchronize TIM2 and Timers (TIM3 and TIM4) in cascade mode.
- CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- TIM_Combined
-
+
+ TIM_Combined
+
This example shows how to configure the TIM1 peripheral to generate 3 PWM combined
signals with TIM1 Channel5.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- TIM_ComplementarySignals
-
+
+ TIM_ComplementarySignals
+
This example shows how to configure the TIM1 peripheral to generate three
complementary TIM1 signals, to insert a defined dead time value, to use the break
feature and to lock the desired parameters.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- TIM_DMA
-
+
+ TIM_DMA
+
Use of the DMA with TIMER Update request
to transfer data from memory to TIMER Capture Compare Register 3 (TIMx_CCR3).
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- TIM_DMABurst
-
+
+ TIM_DMABurst
+
How to update the TIMER channel 1 period and duty cycle using the TIMER DMA burst feature.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- TIM_Dithering
-
+
+ TIM_Dithering
+
This example shows how to configure the TIM3 peripheral in PWM mode with dithering.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- TIM_Encoder
-
+
+ TIM_Encoder
+
This example shows how to configure the TIM1 peripheral in encoder mode to
determinate the rotation direction.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- TIM_EncoderIndex_PulseOnCompare
-
+
+ TIM_EncoderIndex_PulseOnCompare
+
This example shows how to configure the TIM3 peripheral in encoder mode with index
and generate a pulse on a certain value of encoder interface counter with pulse on compare.
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
-
- TIM_InputCapture
-
+
+ TIM_InputCapture
+
How to use the TIM peripheral to measure an external signal frequency.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- TIM_OCToggle
-
+
+ TIM_OCToggle
+
Configuration of the TIM peripheral to generate four different
signals at four different frequencies.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- TIM_OnePulse
-
+
+ TIM_OnePulse
+
This example shows how to use the TIMER peripheral to generate a single pulse when
a rising edge of an external signal is received on the TIMER Input pin.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- TIM_PWMInput
-
+
+ TIM_PWMInput
+
How to use the TIM peripheral to measure the frequency and
duty cycle of an external signal.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- TIM_PWMOutput
-
+
+ TIM_PWMOutput
+
This example shows how to configure the TIM peripheral in PWM (Pulse Width Modulation)
mode.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
- UART
- LPUART_TwoBoards_ComIT
-
+
+ UART
+ LPUART_TwoBoards_ComIT
+
LPUART transmission (transmit/receive) in Interrupt mode
between two boards.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- LPUART_WakeUpFromStop
-
+
+ LPUART_WakeUpFromStop
+
Configuration of an LPUART to wake up the MCU from Stop mode
when a given stimulus is received.
- CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- UART_HyperTerminal_DMA
-
+
+ UART_HyperTerminal_DMA
+
UART transmission (transmit/receive) in DMA mode
between a board and an HyperTerminal PC application.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- UART_HyperTerminal_IT
-
+
+ UART_HyperTerminal_IT
+
UART transmission (transmit/receive) in Interrupt mode between a board and
an HyperTerminal PC application.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- UART_Printf
-
+
+ UART_Printf
+
Re-routing of the C library printf function to the UART.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
+ CubeMx
-
- UART_TwoBoards_ComDMA
-
+
+ UART_ReceptionToIdle_CircularDMA
+
+How to use the HAL UART API for reception to IDLE event in circular DMA mode.
+
+ -
+ -
+ -
+ CubeMx
+ CubeMx
+ -
+ -
+
+
+ UART_TwoBoards_ComDMA
+
UART transmission (transmit/receive) in DMA mode
between two boards.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- UART_TwoBoards_ComIT
-
+
+ UART_TwoBoards_ComIT
+
UART transmission (transmit/receive) in Interrupt mode
between two boards.
-
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- UART_TwoBoards_ComPolling
-
+
+ UART_TwoBoards_ComPolling
+
UART transmission (transmit/receive) in Polling mode
between two boards.
-
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- UART_WakeUpFromStopUsingFIFO
-
+
+ UART_WakeUpFromStopUsingFIFO
+
This example shows how to use UART HAL API to wake up the MCU from STOP mode
using the UART FIFO level.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- USART
- USART_SlaveMode
-
+
+ USART
+ USART_SlaveMode
+
This example describes an USART-SPI communication (transmit/receive) between two
boards where the USART is configured as a slave.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- WWDG
- WWDG_Example
-
+
+ WWDG
+ WWDG_Example
+
Configuration of the HAL API to periodically update the WWDG counter and simulate a software fault that
generates an MCU WWDG reset when a predefined time period has elapsed.
- CubeMx
+ CubeMx
+ CubeMx
-
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
- Total number of examples: 312
+
+ Total number of examples: 364
+ 50
72
34
- 92
- 77
+ 93
+ 78
21
16
-
- Examples_LL
- ADC
- ADC_AnalogWatchdog_Init
-
+
+ Examples_LL
+ ADC
+ ADC_AnalogWatchdog_Init
+
How to use an ADC peripheral with an ADC analog watchdog to monitor a channel
and detect when the corresponding conversion data is outside the window
thresholds.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- ADC_ContinuousConversion_TriggerSW_Init
-
+
+ ADC_ContinuousConversion_TriggerSW_Init
+
How to use an ADC peripheral to perform continuous ADC conversions on a
channel, from a software start.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- ADC_GroupsRegularInjected_Init
-
+
+ ADC_GroupsRegularInjected_Init
+
How to use an ADC peripheral with both ADC groups (regular and injected)
in their intended use cases.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- ADC_Oversampling_Init
-
+
+ ADC_Oversampling_Init
+
How to use an ADC peripheral with ADC oversampling.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- ADC_SingleConversion_TriggerSW_IT_Init
-
+
+ ADC_SingleConversion_TriggerSW_IT_Init
+
How to use an ADC peripheral to perform a single ADC conversion on a channel,
at each software start. This example uses the interrupt programming model
(for polling or DMA programming models, please refer to other examples).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- ADC_SingleConversion_TriggerSW_Init
-
+
+ ADC_SingleConversion_TriggerSW_Init
+
How to use an ADC peripheral to perform a single ADC conversion on a channel
at each software start. This example uses the polling programming model (for
interrupt or DMA programming models, please refer to other examples).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- COMP
- COMP_CompareGpioVsVrefInt_IT
-
+
+ COMP
+ COMP_CompareGpioVsVrefInt_IT
+
How to use a comparator peripheral to compare a voltage level applied on a GPIO
pin to the internal voltage reference (VREFINT), in interrupt mode. This example
is based on the STM32G4xx COMP LL API. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- COMP_CompareGpioVsVrefInt_IT_Init
-
+
+ COMP_CompareGpioVsVrefInt_IT_Init
+
How to use a comparator peripheral to compare a voltage level applied on a GPIO
pin to the the internal voltage reference (VREFINT), in interrupt mode. This example
is based on the STM32G4xx COMP LL API. The peripheral initialization
uses the LL initialization function to demonstrate LL init usage.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- COMP_CompareGpioVsVrefInt_OutputGpio_Init
-
+
+ COMP_CompareGpioVsVrefInt_OutputGpio_Init
+
How to use a comparator peripheral to compare a voltage level applied on a GPIO
pin to the internal voltage reference (VREFINT). The comparator output is connected
to a GPIO. This example is based on the STM32G4xx COMP LL API.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CORDIC
- CORDIC_CosSin
-
+
+ CORDIC
+ CORDIC_CosSin
+
How to use the CORDIC peripheral to calculate cosine and sine.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CORTEX
- CORTEX_MPU
-
+
+ CORTEX
+ CORTEX_MPU
+
Presentation of the MPU feature. This example configures a memory area as
privileged read-only, and attempts to perform read and write operations in
different modes.
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- CRC
- CRC_CalculateAndCheck
-
+
+ CRC
+ CRC_CalculateAndCheck
+
How to configure the CRC calculation unit to compute a CRC code for a given data
buffer, based on a fixed generator polynomial (default value 0x4C11DB7). The
peripheral initialization is done using LL unitary service functions for
@@ -2064,14 +2187,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CRC_UserDefinedPolynomial
-
+
+ CRC_UserDefinedPolynomial
+
How to configure and use the CRC calculation unit to compute an 8-bit CRC code
for a given data buffer, based on a user-defined generating polynomial. The
peripheral initialization is done using LL unitary service functions for
@@ -2079,59 +2203,63 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CRS
- CRS_Synchronization_IT
-
+
+ CRS
+ CRS_Synchronization_IT
+
How to configure the clock recovery service in IT mode through the
STM32G4xx CRS LL API. The peripheral initialization uses LL unitary
service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- CRS_Synchronization_Polling
-
+
+ CRS_Synchronization_Polling
+
How to configure the clock recovery service in polling mode through the
STM32G4xx CRS LL API. The peripheral initialization uses LL unitary
service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- DAC
- DAC_GenerateConstantSignal_TriggerSW_Init
-
+
+ DAC
+ DAC_GenerateConstantSignal_TriggerSW_Init
+
How to use the DAC peripheral to generate a constant voltage signal. This
example is based on the STM32G4xx DAC LL API. The peripheral
initialization uses LL unitary service functions for optimization purposes
(performance and size).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- DAC_GenerateConstantSignal_TriggerSW_LP_Init
-
+
+ DAC_GenerateConstantSignal_TriggerSW_LP_Init
+
How to use the DAC peripheral to generate a constant voltage signal with the DAC
low-power feature sample-and-hold. To be effective, a capacitor must be
connected to the DAC channel output and the sample-and-hold timings must be
@@ -2140,62 +2268,65 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
LL unitary service functions for optimization purposes (performance and size).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- DAC_GenerateWaveform_TriggerHW_Init
-
+
+ DAC_GenerateWaveform_TriggerHW_Init
+
How to use the DAC peripheral to generate a voltage waveform from a digital data
stream transferred by DMA. This example is based on the STM32G4xx
DAC LL API. The peripheral initialization uses LL initialization
functions to demonstrate LL init usage.
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
-
- DMA
- DMA_CopyFromFlashToMemory_Init
-
+
+ DMA
+ DMA_CopyFromFlashToMemory_Init
+
How to use a DMA channel to transfer a word data buffer
from Flash memory to embedded SRAM. The peripheral initialization uses LL
initialization functions to demonstrate LL init usage.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- EXTI
- EXTI_ToggleLedOnIT
-
-This example describes how to configure the EXTI
-and use GPIOs to toggle the user LEDs available on the board when
-a user button is pressed. This example is based on the
+
+ EXTI
+ EXTI_ToggleLedOnIT
+
+How to configure the EXTI and use GPIOs to toggle the user LEDs
+available on the board when a user button is pressed. It is based on the
STM32G4xx LL API. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ X
+ X
-
-
-
- EXTI_ToggleLedOnIT_Init
-
+
+ EXTI_ToggleLedOnIT_Init
+
This example describes how to configure the EXTI and use
GPIOs to toggle the user LEDs available on the board when
a user button is pressed. This example is based on the
@@ -2204,189 +2335,203 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- FMAC
- FMAC_IIR_Polling
-
+
+ FMAC
+ FMAC_IIR_Polling
+
How to use the FMAC peripheral to achieve IIR filtering in polling mode.
-
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
- GPIO
- GPIO_InfiniteLedToggling
-
+
+ GPIO
+ GPIO_InfiniteLedToggling
+
How to configure and use GPIOs to toggle the on-board user LEDs
every 250 ms. This example is based on the STM32G4xx LL API. The peripheral
is initialized with LL unitary service functions to optimize
for performance and size.
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- GPIO_InfiniteLedToggling_Init
-
+
+ GPIO_InfiniteLedToggling_Init
+
How to configure and use GPIOs to toggle the on-board user LEDs
every 250 ms. This example is based on the STM32G4xx LL API. The peripheral
is initialized with LL initialization function to demonstrate LL init usage.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- HRTIM
- HRTIM_Basic_Arbitrary_Waveform
- This example describes how to generate basic non-PWM waveforms with the
+
+ HRTIM
+ HRTIM_Basic_Arbitrary_Waveform
+ This example describes how to generate basic non-PWM waveforms with the
HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_Multiple_PWM
- This example describes how to generate basic PWM waveforms PWM on multiple outputs
+
+ HRTIM_Basic_Multiple_PWM
+ This example describes how to generate basic PWM waveforms PWM on multiple outputs
with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_PWM_Master
- This example describes how to generate basic PWM waveforms with HRTIM timers
+
+ HRTIM_Basic_PWM_Master
+ This example describes how to generate basic PWM waveforms with HRTIM timers
other than the timing unit itself, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_Basic_Single_PWM
- This example describes how to check HRTIM outputs and to generate elementary
+
+ HRTIM_Basic_Single_PWM
+ This example describes how to check HRTIM outputs and to generate elementary
PWM waveforms with the HRTIM, as per HRTIM Cookbook basic examples (refer to AN4539 Application note).
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- HRTIM_CBC_Deadtime
- This example describes how to implement a cycle-by-cycle (CBC) current control
+
+ HRTIM_CBC_Deadtime
+ This example describes how to implement a cycle-by-cycle (CBC) current control
with complementary signals and dead time insertion.
-
-
- CubeMx
+ -
+ CubeMx
-
-
-
-
- I2C
- I2C_OneBoard_AdvCommunication_DMAAndIT_Init
-
+
+ I2C
+ I2C_OneBoard_AdvCommunication_DMAAndIT_Init
+
How to exchange data between an I2C master device in DMA mode and an I2C slave
device in interrupt mode. The peripheral is initialized with LL unitary service
functions to optimize for performance and size.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_OneBoard_Communication_DMAAndIT_Init
-
+
+ I2C_OneBoard_Communication_DMAAndIT_Init
+
How to transmit data bytes from an I2C master device using DMA mode
to an I2C slave device using interrupt mode. The peripheral is initialized with
LL unitary service functions to optimize for performance and size.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_OneBoard_Communication_IT
-
+
+ I2C_OneBoard_Communication_IT
+
How to handle the reception of one data byte from an I2C slave device
by an I2C master device. Both devices operate in interrupt mode. The peripheral is initialized
with LL unitary service functions to optimize for performance and size.
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- I2C_OneBoard_Communication_IT_Init
-
+
+ I2C_OneBoard_Communication_IT_Init
+
How to handle the reception of one data byte from an I2C slave device
by an I2C master device. Both devices operate in interrupt mode. The peripheral is initialized
with LL initialization function to demonstrate LL init usage.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_OneBoard_Communication_PollingAndIT_Init
-
+
+ I2C_OneBoard_Communication_PollingAndIT_Init
+
How to transmit data bytes from an I2C master device using polling mode
to an I2C slave device using interrupt mode. The peripheral is initialized
with LL unitary service functions to optimize for performance and size.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_MasterRx_SlaveTx_IT_Init
-
+
+ I2C_TwoBoards_MasterRx_SlaveTx_IT_Init
+
How to handle the reception of one data byte from an I2C slave device
by an I2C master device. Both devices operate in interrupt mode. The peripheral
is initialized with LL unitary service functions to optimize for performance
@@ -2394,42 +2539,45 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init
-
+
+ I2C_TwoBoards_MasterTx_SlaveRx_DMA_Init
+
How to transmit data bytes from an I2C master device using DMA mode
to an I2C slave device using DMA mode. The peripheral is initialized
with LL unitary service functions to optimize for performance and size.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_MasterTx_SlaveRx_Init
-
+
+ I2C_TwoBoards_MasterTx_SlaveRx_Init
+
How to transmit data bytes from an I2C master device using polling mode
to an I2C slave device using interrupt mode. The peripheral is initialized
with LL unitary service functions to optimize for performance and size.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- I2C_TwoBoards_WakeUpFromStop_IT_Init
-
+
+ I2C_TwoBoards_WakeUpFromStop_IT_Init
+
How to handle the reception of a data byte from an I2C slave device in
Stop 1 mode by an I2C master device, both using interrupt mode. The
peripheral is initialized with LL unitary service functions to optimize for
@@ -2437,46 +2585,49 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- LPTIM
- LPTIM_PulseCounter
-
+
+ LPTIM
+ LPTIM_PulseCounter
+
How to use the LPTIM peripheral in counter mode to generate a PWM output signal
and update its duty cycle. This example is based on the STM32G4xx
LPTIM LL API. The peripheral is initialized with LL unitary service
functions to optimize for performance and size.
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- LPTIM_PulseCounter_Init
-
+
+ LPTIM_PulseCounter_Init
+
How to use the LPTIM peripheral in counter mode to generate a PWM output signal
and update its duty cycle. This example is based on the STM32G4xx
LPTIM LL API. The peripheral is initialized with LL initialization
function to demonstrate LL init usage.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- LPUART
- LPUART_WakeUpFromStop
-
+
+ LPUART
+ LPUART_WakeUpFromStop
+
Configuration of GPIO and LPUART peripherals to allow characters
received on LPUART_RX pin to wake up the MCU from low-power mode. This example is based
on the LPUART LL API. The peripheral initialization uses LL unitary
@@ -2484,14 +2635,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- LPUART_WakeUpFromStop_Init
-
+
+ LPUART_WakeUpFromStop_Init
+
Configuration of GPIO and LPUART peripherals to allow characters
received on LPUART_RX pin to wake up the MCU from low-power mode. This example is based
on the LPUART LL API. The peripheral initialization uses LL
@@ -2499,30 +2651,32 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- OPAMP
- OPAMP_Follower
- How to use the OPAMP peripheral in follower mode. To test OPAMP in this example,
+
+ OPAMP
+ OPAMP_Follower
+ How to use the OPAMP peripheral in follower mode. To test OPAMP in this example,
a voltage waveform is generated by the DAC peripheral and can be connected to
OPAMP input. This example is based on the STM32G4xx OPAMP LL API. The
peripheral is initialized with LL unitary service functions to optimize for
performance and size.
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- OPAMP_PGA
-
+
+ OPAMP_PGA
+
How to use the OPAMP peripheral in PGA mode (programmable gain amplifier). To test
OPAMP, a voltage waveform is generated by the DAC and feeds the OPAMP input. This
example is based on the STM32G4xx OPAMP LL API. The peripheral
@@ -2530,188 +2684,201 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
performance and size.
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- PWR
- PWR_EnterStandbyMode
-
+
+ PWR
+ PWR_EnterStandbyMode
+
How to enter the Standby mode and wake up from this mode by using an external
reset or a wakeup pin.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- PWR_EnterStopMode
-
+
+ PWR_EnterStopMode
+
How to enter the Stop 1 mode.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RCC
- RCC_OutputSystemClockOnMCO
-
+
+ RCC
+ RCC_OutputSystemClockOnMCO
+
Configuration of MCO pin (PA8) to output the system clock.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RCC_UseHSEasSystemClock
-
+
+ RCC_UseHSEasSystemClock
+
Use of the RCC LL API to start the HSE and use it as system clock.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RCC_UseHSI_PLLasSystemClock
-
+
+ RCC_UseHSI_PLLasSystemClock
+
Modification of the PLL parameters in run time.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RNG
- RNG_GenerateRandomNumbers
-
+
+ RNG
+ RNG_GenerateRandomNumbers
+
Configuration of the RNG to generate 32-bit long random numbers. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- RNG_GenerateRandomNumbers_IT
-
-Configuration of the RNG to generate 32-bit long random numbers using
-interrupts. The peripheral initialization uses LL unitary service
+
+ RNG_GenerateRandomNumbers_IT
+
+Configuration of the RNG to generate 32-bit long random numbers using interrupts. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- RTC
- RTC_Alarm
-
+
+ RTC
+ RTC_Alarm
+
Configuration of the RTC LL API to configure and generate an alarm using the RTC peripheral. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
-
- X
- X
- X
+ -
+ X
+ X
+ X
-
-
-
- RTC_Alarm_Init
-
+
+ RTC_Alarm_Init
+
Configuration of the RTC LL API to configure and generate an alarm using the RTC peripheral. The peripheral
initialization uses the LL initialization function.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- RTC_ExitStandbyWithWakeUpTimer_Init
-
+
+ RTC_ExitStandbyWithWakeUpTimer_Init
+
Configuration of the RTC to wake up from Standby mode
using the RTC Wakeup timer. The peripheral initialization uses LL unitary service
functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- RTC_ProgrammingTheWakeUpTimer
-
+
+ RTC_ProgrammingTheWakeUpTimer
+
Configuration of the RTC to use the WUT. The peripheral
initialization uses LL unitary service functions for optimization purposes
(performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- RTC_Tamper_Init
-
+
+ RTC_Tamper_Init
+
Configuration of the Tamper using the RTC LL API. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- RTC_TimeStamp_Init
-
+
+ RTC_TimeStamp_Init
+
Configuration of the Timestamp using the RTC LL API. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI
- SPI_OneBoard_HalfDuplex_DMA
-
+
+ SPI
+ SPI_OneBoard_HalfDuplex_DMA
+
Configuration of GPIO and SPI peripherals to transmit
bytes from a SPI Master device to a SPI Slave device in DMA mode. This example
is based on the STM32G4xx SPI LL API. The peripheral initialization uses
@@ -2719,14 +2886,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- SPI_OneBoard_HalfDuplex_IT_Init
-
+
+ SPI_OneBoard_HalfDuplex_IT_Init
+
Configuration of GPIO and SPI peripherals to transmit bytes
from an SPI Master device to an SPI Slave device in Interrupt mode. This example
is based on the STM32G4xx SPI LL API. The peripheral initialization uses
@@ -2734,43 +2902,46 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI_TwoBoards_FullDuplex_DMA_Master_Init
-
+
+ SPI_TwoBoards_FullDuplex_DMA_Master_Init
+
Data buffer transmission and receptionvia SPI using DMA mode. This example is
based on the STM32G4xx SPI LL API. The peripheral initialization uses
LL unitary service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- SPI_TwoBoards_FullDuplex_DMA_Slave_Init
-
+
+ SPI_TwoBoards_FullDuplex_DMA_Slave_Init
+
Data buffer transmission and receptionvia SPI using DMA mode. This example is
based on the STM32G4xx SPI LL API. The peripheral initialization uses
LL unitary service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM
- TIM_BreakAndDeadtime_Init
-
+
+ TIM
+ TIM_BreakAndDeadtime_Init
+
Configuration of the TIM peripheral to
generate three center-aligned PWM and complementary PWM signals,
insert a defined deadtime value,
@@ -2779,14 +2950,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM_DMA_Init
-
+
+ TIM_DMA_Init
+
Use of the DMA with a timer update request
to transfer data from memory to Timer Capture Compare Register 3 (TIMx_CCR3). This
example is based on the STM32G4xx TIM LL API. The peripheral initialization
@@ -2794,14 +2966,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM_InputCapture_Init
-
+
+ TIM_InputCapture_Init
+
Use of the TIM peripheral to measure a periodic signal frequency
provided either by an external signal generator or by
another timer instance. This example is based on the STM32G4xx TIM
@@ -2809,15 +2982,16 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
for optimization purposes (performance and size).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- TIM_OnePulse_Init
-
+
+ TIM_OnePulse_Init
+
Configuration of a timer to generate a positive pulse in
Output Compare mode with a length of tPULSE and after a delay of tDELAY. This example
is based on the STM32G4xx TIM LL API. The peripheral initialization uses
@@ -2825,14 +2999,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM_OutputCompare_Init
-
+
+ TIM_OutputCompare_Init
+
Configuration of the TIM peripheral to generate an output
waveform in different output compare modes. This example is based on the
STM32G4xx TIM LL API. The peripheral initialization uses
@@ -2840,14 +3015,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- TIM_PWMOutput
-
+
+ TIM_PWMOutput
+
Use of a timer peripheral to generate a
PWM output signal and update the PWM duty cycle. This example is based on the
STM32G4xx TIM LL API. The peripheral initialization uses
@@ -2855,14 +3031,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- TIM_PWMOutput_Init
-
+
+ TIM_PWMOutput_Init
+
Use of a timer peripheral to generate a
PWM output signal and update the PWM duty cycle. This example is based on the
STM32G4xx TIM LL API. The peripheral initialization uses
@@ -2870,57 +3047,61 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART
- USART_Communication_Rx_IT
-
+
+ USART
+ USART_Communication_Rx_IT
+
Configuration of GPIO and USART peripherals to receive characters
from an HyperTerminal (PC) in Asynchronous mode using an interrupt. The peripheral initialization
uses LL unitary service functions for optimization purposes (performance and size).
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- USART_Communication_Rx_IT_Continuous_Init
-
+
+ USART_Communication_Rx_IT_Continuous_Init
+
This example shows how to configure GPIO and USART peripheral for continuously receiving characters
from HyperTerminal (PC) in Asynchronous mode using Interrupt mode. Peripheral initialization is
done using LL unitary services functions for optimization purpose (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART_Communication_Rx_IT_Init
-
+
+ USART_Communication_Rx_IT_Init
+
This example shows how to configure GPIO and USART peripheral for receiving characters
from HyperTerminal (PC) in Asynchronous mode using Interrupt mode. Peripheral initialization is done
using LL initialization function to demonstrate LL init usage.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART_Communication_TxRx_DMA_Init
-
+
+ USART_Communication_TxRx_DMA_Init
+
This example shows how to configure GPIO and USART peripheral
to send characters asynchronously to/from an HyperTerminal (PC) in
DMA mode. This example is based on STM32G4xx USART LL API. Peripheral
@@ -2929,14 +3110,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART_Communication_Tx_IT_Init
-
+
+ USART_Communication_Tx_IT_Init
+
This example shows how to configure GPIO and USART peripheral to send characters
asynchronously to HyperTerminal (PC) in Interrupt mode. This example is based on
STM32G4xx USART LL API. Peripheral initialization is done using LL unitary services
@@ -2944,14 +3126,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART_Communication_Tx_Init
-
+
+ USART_Communication_Tx_Init
+
This example shows how to configure GPIO and USART peripherals to send characters
asynchronously to an HyperTerminal (PC) in Polling mode. If the transfer could not
be completed within the allocated time, a timeout allows to exit from the sequence
@@ -2961,14 +3144,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- USART_HardwareFlowControl
-
+
+ USART_HardwareFlowControl
+
Configuration of GPIO and USART1 peripheral
to receive characters asynchronously from an HyperTerminal (PC) in Interrupt mode
with the Hardware Flow Control feature enabled. This example is based on STM32G4xx
@@ -2977,30 +3161,30 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- USART_SyncCommunication_FullDuplex_DMA
- Configuration
-of GPIO, USART, DMA and SPI peripherals to transmit bytes between a
-USART and an SPI (in slave mode) in DMA mode. This example is based on
-the STM32G4xx USART LL API. The peripheral initialization uses LL
-unitary service functions for optimization purposes (performance and
-size).
+
+ USART_SyncCommunication_FullDuplex_DMA
+
+Configuration of GPIO, USART, DMA and SPI peripherals to transmit
+bytes between a USART and an SPI (in slave mode) in DMA mode. This example is based on the STM32G4xx USART LL API. The peripheral
+initialization uses LL unitary service functions for optimization purposes (performance and size).
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- USART_SyncCommunication_FullDuplex_IT
-
+
+ USART_SyncCommunication_FullDuplex_IT
+
Configuration of GPIO, USART, DMA and SPI peripherals to transmit
bytes between a USART and an SPI (in slave mode) in Interrupt mode. This example is based on the STM32G4xx USART LL API
(the SPI uses the DMA to receive/transmit characters sent from/received by the USART). The peripheral
@@ -3008,14 +3192,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- USART_WakeUpFromStop1
-
+
+ USART_WakeUpFromStop1
+
Configuration of GPIO and USART peripherals
to receive characters on USART_RX pin and wake up the MCU from low-power mode. This example is based on
the STM32G4xx USART LL API. The peripheral initialization
@@ -3023,78 +3208,84 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- X
- X
+ -
+ X
+ X
-
-
-
- USART_WakeUpFromStop_Init
-
-Configuration of GPIO and USART1 peripherals to allow the characters
-received on USART_RX pin to wake up the MCU from low-power mode.
+
+ USART_WakeUpFromStop_Init
+
+Configuration of GPIO and USART1 peripherals to allow the characters received on USART_RX pin to wake up the MCU from low-power mode.
+
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- UTILS
- UTILS_ConfigureSystemClock
-
+
+ UTILS
+ UTILS_ConfigureSystemClock
+
Use of UTILS LL API to configure the system clock using PLL with HSI as source clock.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- UTILS_ReadDeviceInfo
-
+
+ UTILS_ReadDeviceInfo
+
This example reads the UID, Device ID and Revision ID and saves
them into a global information buffer.
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- WWDG
- WWDG_RefreshUntilUserEvent_Init
-
+
+ WWDG
+ WWDG_RefreshUntilUserEvent_Init
+
Configuration of the WWDG to periodically update the counter and
generate an MCU WWDG reset when a user button is pressed. The peripheral initialization
uses the LL unitary service functions for optimization purposes (performance and size).
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
+
Total number of examples_ll: 186
0
+ 0
29
81
76
0
0
-
- Examples_MIX
- ADC
- ADC_SingleConversion_TriggerSW_IT
-
+
+ Examples_MIX
+ ADC
+ ADC_SingleConversion_TriggerSW_IT
+
How to use the ADC to perform a single ADC channel conversion at each
software start. This example uses the interrupt programming model (for
polling and DMA programming models, please refer to other examples). It is
@@ -3102,31 +3293,33 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
for performance improvement.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- DMA
- DMA_FLASHToRAM
-
+
+ DMA
+ DMA_FLASHToRAM
+
How to use a DMA to transfer a word data buffer from Flash memory to embedded
SRAM through the STM32G4xx DMA HAL and LL API. The LL API is used for
performance improvement.
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- HRTIM
- HRTIM_Buck_Boost
- This example shows how to configure the HRTIM to control a non-inverting
+
+ HRTIM
+ HRTIM_Buck_Boost
+ This example shows how to configure the HRTIM to control a non-inverting
buck-boost converter timer.
-
@@ -3134,11 +3327,12 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
-
- CubeMx
+ -
+ CubeMx
-
- HRTIM_Buck_Sync_Rect
- This example shows how to configure the HRTIM to control a buck converter
+
+ HRTIM_Buck_Sync_Rect
+ This example shows how to configure the HRTIM to control a buck converter
with synchronous rectification.
-
@@ -3146,11 +3340,12 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
-
- CubeMx
+ -
+ CubeMx
-
- HRTIM_Dual_Buck
- This example shows how to configure the HRTIM to have 2 buck converters
+
+ HRTIM_Dual_Buck
+ This example shows how to configure the HRTIM to have 2 buck converters
controlled by a single timer unit.
-
@@ -3158,52 +3353,44 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
-
- CubeMx
-
-
-
- HRTIM_PFC_TransitionMode
-
- This example shows the usage of HRTIM1 on STM32G4 to control a boost PFC plant in transition mode.
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- CubeMx
-
-
-
- PWR
- PWR_STOP1
-
+ -
+ CubeMx
+
+
+ HRTIM_PFC_TransitionMode
+
+This example uses HRTIM to:
+- Generate a PWM as if it were controlling a PFC type converter in transition mode
+- Generate the OverCurrent and ZeroCurrentDetection events of such system.
+
+ -
+ -
+ -
+ -
+ -
+ -
+ CubeMx
+
+
+ PWR
+ PWR_STOP1
+
How to enter the STOP 1 mode and wake up from this mode by using external
reset or wakeup interrupt (all the RCC function calls use RCC LL API
for minimizing footprint and maximizing performance).
-
- CubeMx
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- UART
- UART_HyperTerminal_IT
-
+
+ UART
+ UART_HyperTerminal_IT
+
Use of a UART to transmit data (transmit/receive)
between a board and an HyperTerminal PC application in Interrupt mode. This example
describes how to use the USART peripheral through the STM32G4xx UART HAL
@@ -3211,14 +3398,15 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- UART_HyperTerminal_TxPolling_RxIT
-
+
+ UART_HyperTerminal_TxPolling_RxIT
+
Use of a UART to transmit data (transmit/receive)
between a board and an HyperTerminal PC application both in Polling and Interrupt
modes. This example describes how to use the USART peripheral through
@@ -3226,40 +3414,94 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
- CubeMx
- CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
+
Total number of examples_mix: 17
0
+ 0
3
5
5
0
- 4
-
+ 4
-
- Applications
- -
- OpenBootloader
-
+
+ Applications
+ -
+ OpenBootloader
+
This application exploits OpenBootloader Middleware to demonstrate how to develop an IAP application
and how use it.
- X
- X
+ -
+ X
+ X
+ -
+ -
+ -
+ -
+
+
+ Digital_Power
+ Boost_VoltageMode_HW
+
+This application runs a Boost converter to output a regulated voltage at 5VDC through two selectable embedded loads.
+
+ -
+ -
+ -
+ -
+ -
+ -
+ CubeMx
+
+
+ Buck_CurrentMode_HW
+
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+
+ -
+ -
+ -
+ -
+ -
+ -
+ CubeMx
+
+
+ Buck_CurrentMode_SW
+
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+
+ -
+ -
+ -
+ -
+ -
+ -
+ CubeMx
+
+
+ Buck_VoltageMode_HW
+
+This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
+
+ -
-
-
-
-
+ -
+ CubeMx
-
- Digital_Power
- Buck_VoltageMode_HW
-
+
+ Buck_VoltageMode_SW
+
This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
-
@@ -3267,400 +3509,313 @@ STM32CubeG4 Firmware Examples for STM32G4xx Series
-
-
-
- CubeMx
-
-
-
- Boost_VoltageMode_HW
-
- This application runs a Boost converter to output a regulated voltage at 5VDC through two selectable embedded loads.
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- CubeMx
-
-
-
-
- Buck_CurrentMode_HW
-
- This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- CubeMx
-
-
-
-
- Buck_CurrentMode_SW
-
- This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- CubeMx
-
-
-
-
- Buck_VoltageMode_SW
-
- This application runs a Buck converter to output a regulated voltage at 3.3Vdc through two selectable embedded loads.
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- -
-
-
- CubeMx
-
-
-
- FatFs
- FatFs_RAMDisk
-
+ -
+ CubeMx
+
+
+ FatFs
+ FatFs_RAMDisk
+
This application provides a description on how to use STM32Cube firmware with FatFs
middleware component as a generic FAT file system module, in order to develop an
application exploiting FatFs offered features with RAM disk (SDRAM) drive
configuration.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- FatFs_uSD_Standalone
-
+
+ FatFs_uSD_Standalone
+
How to use STM32Cube firmware with FatFs middleware component as a generic FAT
file system module. This example develops an application that exploits FatFs
features to configure a microSD drive.
- CubeMx
-
- CubeMx
- CubeMx
+ CubeMx
+ -
+ CubeMx
+ CubeMx
-
-
-
- FreeRTOS
- FreeRTOS_Mail
-
+
+ FreeRTOS
+ FreeRTOS_Mail
+
How to use mail queues with CMSIS RTOS API.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FreeRTOS_Mutexes
-
+
+ FreeRTOS_Mutexes
+
How to use mutexes with CMSIS RTOS API.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- FreeRTOS_Queues
-
+
+ FreeRTOS_Queues
+
How to use message queues with CMSIS RTOS API.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- FreeRTOS_Semaphore
-
+
+ FreeRTOS_Semaphore
+
How to use semaphores with CMSIS RTOS API.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FreeRTOS_SemaphoreFromISR
-
+
+ FreeRTOS_SemaphoreFromISR
+
How to use semaphore from ISR with CMSIS RTOS API.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FreeRTOS_Signal
-
+
+ FreeRTOS_Signal
+
How to perform thread signaling using CMSIS RTOS API.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FreeRTOS_SignalFromISR
-
+
+ FreeRTOS_SignalFromISR
+
This application shows the usage of CMSIS-OS Signal API from ISR context.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- FreeRTOS_ThreadCreation
-
-How to implement thread creation using CMSIS RTOS API.
+
+ FreeRTOS_ThreadCreation
+
+How to implement thread creation using CMSIS RTOS API.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
- CubeMx
+ CubeMx
-
-
- FreeRTOS_Timers
-
+
+ FreeRTOS_Timers
+
How to use timers of CMSIS RTOS API.
- CubeMx
- CubeMx
- CubeMx
- CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
+ CubeMx
-
-
-
- USB-PD
- USB-PD_Consumer_1port
-
+
+ USB-PD
+ USB-PD_Consumer_1port
+
How to create a simple type C Consumer.
- CubeMx
+ -
+ CubeMx
-
-
-
-
- CubeMx
+ CubeMx
-
- USB-PD_Provider_1port
-
+
+ USB-PD_Provider_1port
+
How to create a simple type C provider.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- USB_Device
- CDC_Standalone
-
+
+ USB_Device
+ CDC_Standalone
+
This application describes how to use USB device application based on the Device
Communication Class (CDC) following the PSTN sub-protocol on the STM32G4xx devices.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- DFU_Standalone
-
+
+ DFU_Standalone
+
Compliant implementation of the Device Firmware Upgrade (DFU)
capability to program the embedded Flash memory through the USB peripheral.
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- HID_Standalone
-
+
+ HID_Standalone
+
Use of the USB device application based on the Human Interface (HID).
- CubeMx
+ CubeMx
+ CubeMx
-
-
-
-
-
-
- MSC_Standalone
-
+
+ MSC_Standalone
+
This application shows how to use the USB device application based on the Mass Storage Class (MSC) on the STM32G4xx devices.
- CubeMx
+ -
+ CubeMx
-
-
-
-
-
-
- Total number of applications: 37
+
+ Total number of applications: 49
+ 12
18
4
4
4
1
- 6
-
+ 6
-
- Demonstrations
- -
- Adafruit_LCD_1_8_SD_Joystick
-
+
+ Demonstrations
+ -
+ Adafruit_LCD_1_8_SD_Joystick
+
This demonstration provides a short description of how to use the BSP drivers.
- -
- -
- X
- X
- -
- -
-
-
- Binary
-
-
- X
-
-
-
+ X
+ X
-
-
-
- Demo
-
+
+ Demo
+
This demonstration firmware is based on STM32Cube. It helps you to discover
STM32 Cortex-M devices that can be plugged on a STM32 Discovery board.
- X
+ -
+ X
-
-
-
-
- X
+ X
-
- Led_Jumper
-
+
+ Led_Jumper
+
This demonstration provides a short description of how to use the BSP drivers.
-
-
-
-
- X
+ -
+ X
-
-
- Total number of demonstrations: 6
- 2
+
+ Total number of demonstrations: 5
+ 0
+ 1
0
1
1
1
1
-
- Total number of projects: 565
- 94
+
+ Total number of projects: 635
+ 64
+ 93
72
- 185
- 165
+ 186
+ 166
25
- 24
+ 29
-
-
\ No newline at end of file
+
+
+
diff --git a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b536c903f..25a4e5f66 100644
--- a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_RAMDisk/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 6e7f01108..53f95e954 100644
--- a/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FatFs/FatFs_uSD_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 7643e1940..9d0348e32 100644
--- a/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/OpenBootloader/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b2750aca1..8c258dd5f 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Consumer_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
index b2750aca1..8c258dd5f 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB-PD/USB-PD_Provider_1port/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1bcb85978..0cccfacf0 100644
--- a/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Applications/USB_Device/MSC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -76,13 +76,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -90,7 +92,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -99,7 +101,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -109,7 +111,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 7afbb14dd..9342ef9f0 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Demo/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c b/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
index 1ba595276..4d98836c1 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Modules/calendar/app_calendar.c
@@ -435,7 +435,7 @@ static void Calendar_DateDisplay(uint8_t Year, uint8_t Month, uint8_t Day)
{
uint32_t mline = 0, mcolumn = 319, month = 0;
uint32_t monthlength = 0;
- char linedisplay[25];
+ char linedisplay[26];
uint32_t pXSize;
if (Month == 2)
diff --git a/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c b/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
index ca16e5d30..63be1a8a6 100644
--- a/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
+++ b/Projects/STM32G474E-EVAL/Demonstrations/Modules/ucpd/demo_application.c
@@ -360,7 +360,7 @@ static void Display_power(void)
{
uint32_t vsense = 0;
int32_t isense = 0;
- char pstr[26]={0};
+ char pstr[27]={0};
static uint8_t counter = 0;
counter++;
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 7afbb14dd..9342ef9f0 100644
--- a/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsDacInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_CompareGpioVsVrefInt_OutputGpio/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/COMP/COMP_OutputBlanking/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Data_Reversing_16bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRC/CRC_UserDefinedPolynomial/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
index 01eb212fc..9432493f0 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/STM32CubeIDE/STM32G484QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
index 89f3f8dc5..987477623 100644
--- a/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/CRYP/CRYP_DMA/Src/main.c
@@ -98,6 +98,16 @@ static void Display_DecryptedData(uint8_t mode, uint16_t keysize, uint32_t datal
extern void initialise_monitor_handles(void);
#endif
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
+#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -453,19 +463,32 @@ static void Display_EncryptedData(uint8_t mode, uint16_t keysize, uint32_t datal
}
#if (USE_VCP_CONNECTION == 1)
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USARTx.
- * @param ch: character to send
- * @param f: pointer to file (not used)
- * @retval The character transmitted
*/
-#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-int __io_putchar(int ch)
-#else
-int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+PUTCHAR_PROTOTYPE
{
/* Place your implementation of fputc here */
/* e.g. write a character to the EVAL_COM1 and Loop until the end of transmission */
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DMADoubleDataMode/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversion/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_DualConversionFromDMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DAC/DAC_SignalsGeneration2/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/DMA/DMA_FLASHToRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Classic_Frame_Networking/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 4dcbedc34..a3efc4267 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Com_polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FDCAN/FDCAN_Loopback/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
index aaffa7e88..5d1b706fc 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_DualBoot/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_EraseProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_FastProgram/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FLASH/FLASH_WriteProtection/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FMAC/FMAC_FIR_PollingToIT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/FMC/FMC_SRAM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/GPIO/GPIO_IOToggle/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/HAL/HAL_TimeBase_TIM/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/IWDG/IWDG_Reset/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/LPTIM/LPTIM_PWMExternalClock/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_Calibration/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_InternalFollower/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_PGA_ExternalBias/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/OPAMP/OPAMP_TimerControlMux/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_LPRUN_SRAM1/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_PVD/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/PWR/PWR_STOP0_RTC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
index 1dbfc70bc..c3e1ebc15 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ExecuteInPlace/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,8 +104,12 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } >FLASH
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
@@ -125,7 +129,7 @@ _qspi_init_base = LOADADDR(.qspi);
} >QSPI AT> FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -134,7 +138,7 @@ _qspi_init_base = LOADADDR(.qspi);
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -144,7 +148,7 @@ _qspi_init_base = LOADADDR(.qspi);
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMapped/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_MemoryMappedDual/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWriteDual_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/QSPI/QSPI_ReadWrite_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RCC/RCC_CRS_Synchronization_Polling/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RNG/RNG_MultiRNG_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Alarm/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_Calendar/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/RTC/RTC_LSI/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SAI/SAI_AudioPlay/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
index 449388d8b..ecf0fa347 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/SMARTCARD/SMARTCARD_T0_MFX/Src/main.c
@@ -76,13 +76,16 @@ static void MX_USART1_UART_Init(void);
static void MX_USART3_SMARTCARD_Init(void);
/* USER CODE BEGIN PFP */
#if defined(HAL_UART_MODULE_ENABLED)
-#ifdef __GNUC__
-/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
#endif /* HAL_UART_MODULE_ENABLED */
/* USER CODE END PFP */
@@ -727,11 +730,30 @@ void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc)
}
#if defined(HAL_UART_MODULE_ENABLED)
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the huart1.
- * @param ch: character to send
- * @param f: pointer to file (not used)
- * @retval The character transmitted
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/SMBUS/SMBUS_TSENSOR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_CascadeSynchro/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_ComplementarySignals/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_Dithering/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_InputCapture/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_OnePulse/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMInput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/TIM/TIM_PWMOutput/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/LPUART_WakeUpFromStop/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_HyperTerminal_IT/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
index 8052821e5..27e202c69 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_Printf/Src/main.c
@@ -51,13 +51,16 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART1_UART_Init(void);
/* USER CODE BEGIN PFP */
-#ifdef __GNUC__
-/* With GCC, small printf (option LD Linker->Libraries->Small printf
- set to 'Yes') calls __io_putchar() */
-#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
-#else
+#if defined(__ICCARM__)
+/* New definition from EWARM V9, compatible with EWARM8 */
+int iar_fputc(int ch);
+#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
+#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION)
+/* ARM Compiler 5/6*/
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
-#endif /* __GNUC__ */
+#elif defined(__GNUC__)
+#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
+#endif /* __ICCARM__ */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -236,10 +239,30 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
+/**
+ * @brief Retargets the C library __write function to the IAR function iar_fputc.
+ * @param file: file descriptor.
+ * @param ptr: pointer to the buffer where the data is stored.
+ * @param len: length of the data to write in bytes.
+ * @retval length of the written data in bytes.
+ */
+#if defined(__ICCARM__)
+size_t __write(int file, unsigned char const *ptr, size_t len)
+{
+ size_t idx;
+ unsigned char const *pdata = ptr;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ iar_fputc((int)*pdata);
+ pdata++;
+ }
+ return len;
+}
+#endif /* __ICCARM__ */
+
/**
* @brief Retargets the C library printf function to the USART.
- * @param None
- * @retval None
*/
PUTCHAR_PROTOTYPE
{
diff --git a/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
index c47796789..28a23f64b 100644
--- a/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/UART/UART_WakeUpFromStopUsingFIFO/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
index f39f51073..76966f58a 100644
--- a/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Examples/WWDG/WWDG_Example/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -102,13 +102,15 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -116,7 +118,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -125,7 +127,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -135,7 +137,7 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
index 67b4a1bc5..50f2d6cd8 100644
--- a/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Templates/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
index e745e1fee..2e6a15f00 100644
--- a/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
+++ b/Projects/STM32G474E-EVAL/Templates_LL/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -104,13 +104,15 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .ARM.extab : {
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >ROM
- .ARM : {
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
@@ -118,7 +120,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .preinit_array :
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -127,7 +129,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .init_array :
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +139,7 @@ SECTIONS
. = ALIGN(4);
} >ROM
- .fini_array :
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings
new file mode 100644
index 000000000..b0855ed61
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/app_freertos.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_msp.c;../Src/stm32g4xx_hal_timebase_tim.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd
new file mode 100644
index 000000000..376d37d66
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Mail
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp
new file mode 100644
index 000000000..8126e69d4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/FreeRTOS_Mail.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Mail
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Mail/Exe
+
+
+ ObjPath
+ FreeRTOS_Mail/Obj
+
+
+ ListPath
+ FreeRTOS_Mail/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Mail.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Mail.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww
new file mode 100644
index 000000000..09fd40032
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Mail.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc
new file mode 100644
index 000000000..58c3c6f11
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/FreeRTOS_Mail.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=0
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelayUntil,INCLUDE_vTaskDelay,INCLUDE_xTaskResumeFromISR,INCLUDE_xQueueGetMutexHolder,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_eTaskGetState,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=MailQueueProduc,-1,128,MailQueueProducer,Default,NULL,Dynamic,NULL,NULL;MailQueueConsum,-1,128,MailQueueConsumer,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=0
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Mail.ioc
+ProjectManager.ProjectName=FreeRTOS_Mail
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Mail
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..cedc02ed4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 0
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h
new file mode 100644
index 000000000..d86c9ecb7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..33223ce9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx
new file mode 100644
index 000000000..3b092bcd4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Mail
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx
new file mode 100644
index 000000000..025fd0c10
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/FreeRTOS_Mail.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Mail
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Mail\Exe\
+ FreeRTOS_Mail
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..10000a608
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project
new file mode 100644
index 000000000..6aeabf037
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Mail
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Mail.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Mail.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c
new file mode 100644
index 000000000..175f6d097
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c
new file mode 100644
index 000000000..910986003
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/main.c
@@ -0,0 +1,362 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef struct
+{ /* Mail object structure */
+ uint32_t var1; /* var1 is a uint32_t */
+ uint32_t var2; /* var2 is a uint32_t */
+ uint8_t var3; /* var3 is a uint8_t */
+} Amail_TypeDef;
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE
+#define MAIL_SIZE (uint32_t) 1
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MailQueueProducHandle;
+osThreadId MailQueueConsumHandle;
+/* USER CODE BEGIN PV */
+osMailQId mailId;
+
+uint32_t ProducerValue1 = 0, ProducerValue2 = 0;
+uint8_t ProducerValue3 = 0;
+__IO uint32_t ProducerErrors = 0;
+uint32_t ConsumerValue1 = 0, ConsumerValue2 = 0;
+uint8_t ConsumerValue3 = 0;
+__IO uint32_t ConsumerErrors = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MailQueueProducer(void const * argument);
+void MailQueueConsumer(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LED1 and LED3 */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED3);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+ /* Create the mail queue used by the two tasks to pass the struct Amail_TypeDef */
+ osMailQDef(mail, MAIL_SIZE, Amail_TypeDef); /* Define mail queue */
+
+ mailId = osMailCreate(osMailQ(mail), NULL); /* create mail queue */
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of MailQueueProduc */
+ osThreadDef(MailQueueProduc, MailQueueProducer, osPriorityBelowNormal, 0, 128);
+ MailQueueProducHandle = osThreadCreate(osThread(MailQueueProduc), NULL);
+
+ /* definition and creation of MailQueueConsum */
+ osThreadDef(MailQueueConsum, MailQueueConsumer, osPriorityBelowNormal, 0, 128);
+ MailQueueConsumHandle = osThreadCreate(osThread(MailQueueConsum), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MailQueueProducer */
+/**
+ * @brief Function implementing the MailQueueProduc thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_MailQueueProducer */
+void MailQueueProducer(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ Amail_TypeDef *pTMail;
+
+ for(;;)
+ {
+
+ pTMail = osMailAlloc(mailId, osWaitForever); /* Allocate memory */
+ pTMail->var1 = ProducerValue1; /* Set the mail content */
+ pTMail->var2 = ProducerValue2;
+ pTMail->var3 = ProducerValue3;
+
+ if(osMailPut(mailId, pTMail) != osOK) /* Send Mail */
+ {
+ ++ProducerErrors;
+
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Increment the variables we are going to post next time round. The
+ consumer will expect the numbers to follow in numerical order. */
+ ++ProducerValue1;
+ ProducerValue2 += 2;
+ ProducerValue3 += 3;
+
+ /* Toggle LED1 to indicate a correct number received */
+ BSP_LED_Toggle(LED1);
+
+ osDelay(250);
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MailQueueConsumer */
+/**
+* @brief Function implementing the MailQueueConsum thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MailQueueConsumer */
+void MailQueueConsumer(void const * argument)
+{
+ /* USER CODE BEGIN MailQueueConsumer */
+ osEvent event;
+ Amail_TypeDef *pRMail;
+
+ for(;;)
+ {
+ /* Get the message from the queue */
+ event = osMailGet(mailId, osWaitForever); /* wait for mail */
+
+ if(event.status == osEventMail)
+ {
+ pRMail = event.value.p;
+
+ if((pRMail->var1 != ConsumerValue1) || (pRMail->var2 != ConsumerValue2) || (pRMail->var3 != ConsumerValue3))
+ {
+ /* Catch-up. */
+ ConsumerValue1 = pRMail->var1;
+ ConsumerValue2 = pRMail->var2;
+ ConsumerValue3 = pRMail->var3;
+
+ ++ConsumerErrors;
+
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Calculate values we expect to remove from the mail queue next time
+ round. */
+ ++ConsumerValue1;
+ ConsumerValue2 += 2;
+ ConsumerValue3 += 3;
+ }
+
+ osMailFree(mailId, pRMail); /* free memory allocated for mail */
+ }
+ }
+ /* USER CODE END MailQueueConsumer */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..224d218c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..09af9948c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt
new file mode 100644
index 000000000..bd39a2fc4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mail/readme.txt
@@ -0,0 +1,93 @@
+/**
+ @page FreeRTOS_Mail FreeRTOS mail example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mail/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Mail example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use mail queues with CMSIS RTOS API.
+
+This application creates two threads that send and receive mail
+the mail to send/receive is a structure that holds three variables (var1 and var2 are uint32, var3 is a uint8)
+
+One thread acts as a producer and the other as the consumer.
+The consumer is a higher priority than the producer and is set to block on mail receiving.
+
+The Mail queue has space for one item. The producer allocates the mail and put it on the mail queue.
+As soon as the producer posts a mail on the queue the consumer will unblock, preempt the producer,
+get the mail and free it.
+
+Add the following variables to LiveWatch, the three producer values must respectively remain equals to the three consumer values all the time:
+ - ConsumerValue1 must remain equal to ProducerValue1
+ - ConsumerValue2 must remain equal to ProducerValue2
+ - ConsumerValue3 must remain equal to ProducerValue3
+
+LEDs can be used to monitor the application status:
+ - LED1 should toggle when the application runs successfully.
+ - LED3 is toggling when any error occurs.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Mail, Queues,
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Mail/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Mail/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Mail/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Mail/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Mail/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Mail/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Mail/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd
new file mode 100644
index 000000000..8d3bae234
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Mutexes
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp
new file mode 100644
index 000000000..1ed6ce328
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/FreeRTOS_Mutexes.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Mutexes
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Mutexes/Exe
+
+
+ ObjPath
+ FreeRTOS_Mutexes/Obj
+
+
+ ListPath
+ FreeRTOS_Mutexes/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Mutexes.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Mutexes.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww
new file mode 100644
index 000000000..a3327a905
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Mutexes.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc
new file mode 100644
index 000000000..7f6f6fd24
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/FreeRTOS_Mutexes.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,INCLUDE_xTaskResumeFromISR,Mutexes01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Mutexes01=osMutex
+FREERTOS.Tasks01=MutHigh,-1,128,MutexHighPriorityThreadr,Default,NULL,Dynamic,NULL,NULL;MutMedium,-2,128,MutexMediumPriorityThread,Default,NULL,Dynamic,NULL,NULL;MutLow,-3,128,MutexLowPriorityThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Mutexes.ioc
+ProjectManager.ProjectName=FreeRTOS_Mutexes
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Mutexes
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..ecfee31a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 0
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xQueueGetMutexHolder 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h
new file mode 100644
index 000000000..985c6a730
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS\FreeRTOS_Mutexes\Inc\main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..78e22f972
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx
new file mode 100644
index 000000000..25d6da58d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Mutexes
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 8
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 8
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 8
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 8
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 8
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 8
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 8
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 8
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 8
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx
new file mode 100644
index 000000000..d7110104a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/FreeRTOS_Mutexes.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Mutexes
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Mutexes\Exe\
+ FreeRTOS_Mutexes
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..7e21c5992
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project
new file mode 100644
index 000000000..7aaf9561a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Mutexes
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Mutexes.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Mutexes.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c
new file mode 100644
index 000000000..7a1f14077
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c
new file mode 100644
index 000000000..d6016f0b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/main.c
@@ -0,0 +1,463 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define mutexSHORT_DELAY ((uint32_t) 20)
+#define mutexNO_DELAY ((uint32_t) 0)
+#define mutexTWO_TICK_DELAY ((uint32_t) 2)
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MutHighHandle;
+osThreadId MutMediumHandle;
+osThreadId MutLowHandle;
+osMutexId osMutexHandle;
+/* USER CODE BEGIN PV */
+
+/* Variables used to detect and latch errors */
+__IO uint32_t HighPriorityThreadCycles = 0, MediumPriorityThreadCycles = 0, LowPriorityThreadCycles = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MutexHighPriorityThreadr(void const * argument);
+void MutexMediumPriorityThread(void const * argument);
+void MutexLowPriorityThread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED2);
+ BSP_LED_Init(LED4);
+ BSP_LED_Init(LED3);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* Create the mutex(es) */
+ /* definition and creation of osMutex */
+ osMutexDef(osMutex);
+ osMutexHandle = osMutexCreate(osMutex(osMutex));
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of MutHigh */
+ osThreadDef(MutHigh, MutexHighPriorityThreadr, osPriorityBelowNormal, 0, 128);
+ MutHighHandle = osThreadCreate(osThread(MutHigh), NULL);
+
+ /* definition and creation of MutMedium */
+ osThreadDef(MutMedium, MutexMediumPriorityThread, osPriorityLow, 0, 128);
+ MutMediumHandle = osThreadCreate(osThread(MutMedium), NULL);
+
+ /* definition and creation of MutLow */
+ osThreadDef(MutLow, MutexLowPriorityThread, osPriorityIdle, 0, 128);
+ MutLowHandle = osThreadCreate(osThread(MutLow), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MutexHighPriorityThreadr */
+/**
+ * @brief Function implementing the MutHigh thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_MutexHighPriorityThreadr */
+void MutexHighPriorityThreadr(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ /* Just to remove compiler warning */
+ (void) argument;
+ /* Infinite loop */
+ for (;;)
+ {
+ /* The first time through the mutex will be immediately available, on
+ subsequent times through the mutex will be held by the low priority thread
+ at this point and this Take will cause the low priority thread to inherit
+ the priority of this thread. In this case the block time must be
+ long enough to ensure the low priority thread will execute again before the
+ block time expires. If the block time does expire then the error
+ flag will be set here */
+ if (osMutexWait(osMutexHandle, mutexTWO_TICK_DELAY) != osOK)
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+
+ /* Ensure the other thread attempting to access the mutex
+ are able to execute to ensure they either block (where a block
+ time is specified) or return an error (where no block time is
+ specified) as the mutex is held by this task */
+ osDelay(mutexSHORT_DELAY);
+
+ /* We should now be able to release the mutex .
+ When the mutex is available again the medium priority thread
+ should be unblocked but not run because it has a lower priority
+ than this thread. The low priority thread should also not run
+ at this point as it too has a lower priority than this thread */
+ if (osMutexRelease(osMutexHandle) != osOK)
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+
+ /* Keep count of the number of cycles this thread has performed */
+ HighPriorityThreadCycles++;
+ BSP_LED_Toggle(LED1);
+
+ /* Suspend ourselves to the medium priority thread can execute */
+ osThreadSuspend(NULL);
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MutexMediumPriorityThread */
+/**
+* @brief Function implementing the MutMedium thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MutexMediumPriorityThread */
+void MutexMediumPriorityThread(void const * argument)
+{
+ /* USER CODE BEGIN MutexMediumPriorityThread */
+ /* Just to remove compiler warning */
+ (void) argument;
+
+ /* Infinite loop */
+ for (;;)
+ {
+ /* This thread will run while the high-priority thread is blocked, and the
+ high-priority thread will block only once it has the mutex - therefore
+ this call should block until the high-priority thread has given up the
+ mutex, and not actually execute past this call until the high-priority
+ thread is suspended */
+ if (osMutexWait(osMutexHandle, osWaitForever) == osOK)
+ {
+ if (osThreadGetState(MutHighHandle) != osThreadSuspended)
+ {
+ /* Did not expect to execute until the high priority thread was
+ suspended.
+ Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Give the mutex back before suspending ourselves to allow
+ the low priority thread to obtain the mutex */
+ if (osMutexRelease(osMutexHandle) != osOK)
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ osThreadSuspend(NULL);
+ }
+ }
+ else
+ {
+ /* We should not leave the osMutexWait() function
+ until the mutex was obtained.
+ Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+
+ /* The High and Medium priority threads should be in lock step */
+ if (HighPriorityThreadCycles != (MediumPriorityThreadCycles + 1))
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+
+ /* Keep count of the number of cycles this task has performed so a
+ stall can be detected */
+ MediumPriorityThreadCycles++;
+ BSP_LED_Toggle(LED2);
+ }
+ /* USER CODE END MutexMediumPriorityThread */
+}
+
+/* USER CODE BEGIN Header_MutexLowPriorityThread */
+/**
+* @brief Function implementing the MutLow thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_MutexLowPriorityThread */
+void MutexLowPriorityThread(void const * argument)
+{
+ /* USER CODE BEGIN MutexLowPriorityThread */
+ /* Just to remove compiler warning */
+ (void) argument;
+
+ /* Infinite loop */
+ for (;;)
+ {
+ /* Keep attempting to obtain the mutex. We should only obtain it when
+ the medium-priority thread has suspended itself, which in turn should only
+ happen when the high-priority thread is also suspended */
+ if (osMutexWait(osMutexHandle, mutexNO_DELAY) == osOK)
+ {
+ /* Is the high and medium-priority threads suspended? */
+ if ((osThreadGetState(MutHighHandle) != osThreadSuspended) || (osThreadGetState(MutMediumHandle) != osThreadSuspended))
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Keep count of the number of cycles this task has performed
+ so a stall can be detected */
+ LowPriorityThreadCycles++;
+ BSP_LED_Toggle(LED4);
+
+ /* We can resume the other tasks here even though they have a
+ higher priority than the this thread. When they execute they
+ will attempt to obtain the mutex but fail because the low-priority
+ thread is still the mutex holder. this thread will then inherit
+ the higher priority. The medium-priority thread will block indefinitely
+ when it attempts to obtain the mutex, the high-priority thread will only
+ block for a fixed period and an error will be latched if the
+ high-priority thread has not returned the mutex by the time this
+ fixed period has expired */
+ osThreadResume(MutMediumHandle);
+ osThreadResume(MutHighHandle);
+
+ /* The other two tasks should now have executed and no longer
+ be suspended */
+ if ((osThreadGetState(MutHighHandle) == osThreadSuspended) || (osThreadGetState(MutMediumHandle) == osThreadSuspended))
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+
+ /* Release the mutex, disinheriting the higher priority again */
+ if (osMutexRelease(osMutexHandle) != osOK)
+ {
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ }
+ }
+
+#if configUSE_PREEMPTION == 0
+ {
+ taskYIELD();
+ }
+#endif
+ }
+ /* USER CODE END MutexLowPriorityThread */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..6fa0f3219
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..4f4f0d049
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt
new file mode 100644
index 000000000..a1cd1c3ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Mutexes/readme.txt
@@ -0,0 +1,108 @@
+/**
+ @page FreeRTOS_Mutexes FreeRTOS Mutexes example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Mutexes/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Mutexes example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use mutexes with CMSIS RTOS API.
+
+This application creates three threads, with different priorities, that access the
+same mutex, as described below:
+
+MutexHighPriorityThread() has the highest priority so executes
+first and grabs the mutex and sleeps for a short period to let the lower
+priority threads execute. When it has completed its demo functionality
+it gives the mutex back before suspending itself.
+At that point, LED1 toggles.
+
+MutexMediumPriorityThread() attempts to access the mutex by performing
+a blocking 'wait'. This thread blocks when the mutex is already taken
+by the high priority thread. It does not unblock until the highest
+priority thread has released the mutex, and it does not actually run until
+the highest priority thread has suspended itself.
+When it eventually does obtain the mutex all it does is give the mutex back
+prior to also suspending itself.
+At this point both the high and medium priority threads are suspended and LED2 toggles.
+
+MutexLowPriorityThread() runs at the idle priority. It spins round
+a tight loop attempting to obtain the mutex with a non-blocking call. As
+the lowest priority thread it will not successfully obtain the mutex until
+both high and medium priority threads are suspended. Once it eventually
+does obtains the mutex, it first resumes both suspended threads (and LED4 toggles
+at that time) prior to giving the mutex back - resulting in the low priority
+thread temporarily inheriting the highest thread priority.
+
+In case of error, LED3 toggles.
+
+The following variables can be displayed on the debugger via LiveWatch:
+ - HighPriorityThreadCycles
+ - MediumPriorityThreadCycles
+ - LowPriorityThreadCycles
+ These variables must remain equals all the time. If not equal, it means a stall has occurred.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Mutexes
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Mutexes/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Mutexes/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Mutexes/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Mutexes/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Mutexes/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Mutexes/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Mutexes/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd
new file mode 100644
index 000000000..8fa52901f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Queues
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp
new file mode 100644
index 000000000..5690a30be
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/FreeRTOS_Queues.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Queues
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Queues/Exe
+
+
+ ObjPath
+ FreeRTOS_Queues/Obj
+
+
+ ListPath
+ FreeRTOS_Queues/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Queues.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Queues.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww
new file mode 100644
index 000000000..d9a015be4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Queues.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc
new file mode 100644
index 000000000..78c33e6b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/FreeRTOS_Queues.ioc
@@ -0,0 +1,184 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,INCLUDE_xTaskResumeFromISR,Queues01,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Queues01=osQueue,1,uint16_t,0,Dynamic,NULL,NULL
+FREERTOS.Tasks01=MessageQueuePro,-1,128,MessageQueueProducer,Default,NULL,Dynamic,NULL,NULL;MessageQueueCon,-1,128,MessageQueueConsumer,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Queues.ioc
+ProjectManager.ProjectName=FreeRTOS_Queues
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Queues
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..ecfee31a5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 0
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xQueueGetMutexHolder 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h
new file mode 100644
index 000000000..4f9bd6516
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..844885f98
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx
new file mode 100644
index 000000000..6c52a3fad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Queues
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 8
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 8
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 8
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 8
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 8
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 8
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 8
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 8
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 8
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx
new file mode 100644
index 000000000..8e54e264e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/FreeRTOS_Queues.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Queues
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Queues\Exe\
+ FreeRTOS_Queues
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..af895c095
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project
new file mode 100644
index 000000000..f1c16327d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Queues
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Queues.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Queues.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c
new file mode 100644
index 000000000..7e165d46d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c
new file mode 100644
index 000000000..32094236b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/main.c
@@ -0,0 +1,335 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId MessageQueueProHandle;
+osThreadId MessageQueueConHandle;
+osMessageQId osQueueHandle;
+/* USER CODE BEGIN PV */
+uint32_t ProducerValue = 0, ConsumerValue = 0;
+__IO uint32_t ProducerErrors = 0, ConsumerErrors = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void MessageQueueProducer(void const * argument);
+void MessageQueueConsumer(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED3);
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* Create the queue(s) */
+ /* definition and creation of osQueue */
+ osMessageQDef(osQueue, 1, uint16_t);
+ osQueueHandle = osMessageCreate(osMessageQ(osQueue), NULL);
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of MessageQueuePro */
+ osThreadDef(MessageQueuePro, MessageQueueProducer, osPriorityBelowNormal, 0, 128);
+ MessageQueueProHandle = osThreadCreate(osThread(MessageQueuePro), NULL);
+
+ /* definition and creation of MessageQueueCon */
+ osThreadDef(MessageQueueCon, MessageQueueConsumer, osPriorityBelowNormal, 0, 128);
+ MessageQueueConHandle = osThreadCreate(osThread(MessageQueueCon), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_MessageQueueProducer */
+/**
+ * @brief Function implementing the MessageQueuePro thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_MessageQueueProducer */
+void MessageQueueProducer(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ /* Infinite loop */
+ for (;;)
+ {
+ if (osMessagePut(osQueueHandle, ProducerValue, 100) != osOK)
+ {
+ ++ProducerErrors;
+
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Increment the variable we are going to post next time round. The
+ consumer will expect the numbers to follow in numerical order */
+ ++ProducerValue;
+
+ /* Toggle LED1 to indicate a correct number received */
+ BSP_LED_Toggle(LED1);
+ osDelay(1000);
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_MessageQueueConsumer */
+/**
+* @brief Function implementing the MessageQueueCon thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_MessageQueueConsumer */
+void MessageQueueConsumer(void const * argument)
+{
+ /* USER CODE BEGIN MessageQueueConsumer */
+ osEvent event;
+
+ for (;;)
+ {
+ /* Get the message from the queue */
+ event = osMessageGet(osQueueHandle, 100);
+
+ if (event.status == osEventMessage)
+ {
+ if (event.value.v != ConsumerValue)
+ {
+ /* Catch-up */
+ ConsumerValue = event.value.v;
+
+ ++ConsumerErrors;
+
+ /* Toggle LED3 to indicate error */
+ BSP_LED_Toggle(LED3);
+ }
+ else
+ {
+ /* Increment the value we expect to remove from the queue next time
+ round */
+ ++ConsumerValue;
+ }
+ }
+ }
+ /* USER CODE END MessageQueueConsumer */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..1e3848129
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..1ba48f7b3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt
new file mode 100644
index 000000000..11787a937
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Queues/readme.txt
@@ -0,0 +1,91 @@
+/**
+ @page FreeRTOS_Queues FreeRTOS Queues example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Queues/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Queues example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use message queues with CMSIS RTOS API.
+
+This application creates two threads that send and receive an incrementing number
+to/from a queue, as following:
+One thread acts as a producer and the other as the consumer. The consumer
+is a higher priority than the producer and is set to block on queue reads.
+The queue only has space for one item, as soon as the producer posts a
+message on the queue (every 1 second) the consumer will unblock, preempt
+the producer, and remove the item.
+
+Add the following variables to LiveWatch, these variables must remain equals all the time:
+ - ProducerValue
+ - ConsumerValue
+
+STM32G474E-EVAL1 Rev B's LEDs can be used to monitor the application status:
+ - LED1 should toggle as soon as the producer posts a
+ message on the queue (every 1 second).
+ - LED3 should toggle each time any error occurs.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Message, Queues
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Queues/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Queues/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Queues/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Queues/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Queues/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Queues/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Queues/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd
new file mode 100644
index 000000000..0ba16ca9f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Semaphore
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp
new file mode 100644
index 000000000..763a2ee8b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/FreeRTOS_Semaphore.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Semaphore
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Semaphore/Exe
+
+
+ ObjPath
+ FreeRTOS_Semaphore/Obj
+
+
+ ListPath
+ FreeRTOS_Semaphore/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Semaphore.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Semaphore.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww
new file mode 100644
index 000000000..7ab62b75c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Semaphore.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc
new file mode 100644
index 000000000..95fe7c650
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/FreeRTOS_Semaphore.ioc
@@ -0,0 +1,183 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.BinarySemaphores01=osSemaphore,Dynamic,NULL
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_xTaskResumeFromISR,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,BinarySemaphores01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelayUntil,INCLUDE_vTaskDelay,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=SEM_Thread1,-2,128,SemaphoreThread1,Default,(void *) osSemaphoreHandle,Dynamic,NULL,NULL;SEM_Thread2,-3,128,SemaphoreThread2,Default,(void *) osSemaphoreHandle,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=0
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Semaphore.ioc
+ProjectManager.ProjectName=FreeRTOS_Semaphore
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Semaphore
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..f56ec2c56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h
@@ -0,0 +1,145 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 0
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xQueueGetMutexHolder 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
new file mode 100644
index 000000000..cfec88d21
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..cc3b757ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx
new file mode 100644
index 000000000..fa72f901b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Semaphore
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 8
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 8
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 8
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 8
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 8
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 8
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 8
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 8
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 8
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx
new file mode 100644
index 000000000..1e83dc566
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/FreeRTOS_Semaphore.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Semaphore
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Semaphore\Exe\
+ FreeRTOS_Semaphore
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..20205ce1c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project
new file mode 100644
index 000000000..58ad6a713
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Semaphore
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Semaphore.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Semaphore.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c
new file mode 100644
index 000000000..060d7d61b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c
new file mode 100644
index 000000000..370a817d6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/main.c
@@ -0,0 +1,350 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId SEM_Thread1Handle;
+osThreadId SEM_Thread2Handle;
+osSemaphoreId osSemaphoreHandle;
+/* USER CODE BEGIN PV */
+__IO uint32_t OsStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void SemaphoreThread1(void const * argument);
+void SemaphoreThread2(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED2);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* Create the semaphores(s) */
+ /* definition and creation of osSemaphore */
+ osSemaphoreDef(osSemaphore);
+ osSemaphoreHandle = osSemaphoreCreate(osSemaphore(osSemaphore), 1);
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of SEM_Thread1 */
+ osThreadDef(SEM_Thread1, SemaphoreThread1, osPriorityLow, 0, 128);
+ SEM_Thread1Handle = osThreadCreate(osThread(SEM_Thread1), (void *) osSemaphoreHandle);
+
+ /* definition and creation of SEM_Thread2 */
+ osThreadDef(SEM_Thread2, SemaphoreThread2, osPriorityIdle, 0, 128);
+ SEM_Thread2Handle = osThreadCreate(osThread(SEM_Thread2), (void *) osSemaphoreHandle);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_SemaphoreThread1 */
+/**
+ * @brief Function implementing the SEM_Thread1 thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_SemaphoreThread1 */
+void SemaphoreThread1(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ uint32_t count = 0;
+ osSemaphoreId semaphore = (osSemaphoreId) argument;
+ /* Infinite loop */
+ for (;;)
+ {
+
+ if (semaphore != NULL)
+ {
+ OsStatus = osSemaphoreWait(semaphore , 100);
+ /* Try to obtain the semaphore */
+ if (OsStatus == osOK)
+ {
+ count = osKernelSysTick() + 5000;
+
+ /* Toggle LED1 every 200 ms for 5 seconds */
+ while (count > osKernelSysTick())
+ {
+ /* Toggle LED1 */
+ BSP_LED_Toggle(LED1);
+
+ /* Delay 200 ms */
+ osDelay(200);
+ }
+
+ /* Turn off LED1*/
+ BSP_LED_Off(LED1);
+ /* Release the semaphore */
+ OsStatus = osSemaphoreRelease(semaphore);
+
+ /* Suspend ourseleves to execute thread 2 (lower priority) */
+ OsStatus = osThreadSuspend(NULL);
+ }
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_SemaphoreThread2 */
+/**
+* @brief Function implementing the SEM_Thread2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_SemaphoreThread2 */
+void SemaphoreThread2(void const * argument)
+{
+ /* USER CODE BEGIN SemaphoreThread2 */
+ uint32_t count = 0;
+ osSemaphoreId semaphore = (osSemaphoreId) argument;
+ /* Infinite loop */
+ for (;;)
+ {
+ if (semaphore != NULL)
+ {
+ /* Try to obtain the semaphore */
+ if (osSemaphoreWait(semaphore , 0) == osOK)
+ {
+ /* Resume Thread 1 (higher priority)*/
+ OsStatus = osThreadResume(SEM_Thread1Handle);
+
+ count = osKernelSysTick() + 5000;
+
+ /* Toggle LED2 every 200 ms for 5 seconds*/
+ while (count > osKernelSysTick())
+ {
+ BSP_LED_Toggle(LED2);
+
+ osDelay(200);
+ }
+
+ /* Turn off LED2 */
+ BSP_LED_Off(LED2);
+
+ /* Release the semaphore to unblock Thread 1 (higher priority) */
+ OsStatus = osSemaphoreRelease(semaphore);
+ }
+ }
+ }
+ /* USER CODE END SemaphoreThread2 */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..d5f0aeafb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..41cd8aab7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt
new file mode 100644
index 000000000..2a45505b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Semaphore/readme.txt
@@ -0,0 +1,88 @@
+/**
+ @page FreeRTOS_Semaphore FreeRTOS Semaphore example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Semaphore/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Semaphore example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use semaphores with CMSIS RTOS API.
+
+This application creates two threads that toggle LEDs through a shared semaphore,
+as following:
+
+The first thread which have the higher priority obtains the semaphore and
+toggle the LED1 each 200 ms. After 5 seconds it releases the semaphore and
+suspends itself.
+
+The low priority thread can execute now, it obtains the semaphore and
+resume execution of the first thread, as it has the higher priority
+the first thread will try to obtain the semaphore but it fails because
+the semaphore is already taken by the low priority thread, which will
+toggle the LED2 each 200 ms for 5 seconds before releasing the semaphore
+to begin a new cycle
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Semaphore, Priorities
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Semaphore/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Semaphore/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Semaphore/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Semaphore/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Semaphore/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Semaphore/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Semaphore/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd
new file mode 100644
index 000000000..916f359b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_SemaphoreFromISR
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp
new file mode 100644
index 000000000..5698239e5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/FreeRTOS_SemaphoreFromISR.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_SemaphoreFromISR
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_SemaphoreFromISR/Exe
+
+
+ ObjPath
+ FreeRTOS_SemaphoreFromISR/Obj
+
+
+ ListPath
+ FreeRTOS_SemaphoreFromISR/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_SemaphoreFromISR.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_SemaphoreFromISR.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww
new file mode 100644
index 000000000..f8f3a27ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_SemaphoreFromISR.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc
new file mode 100644
index 000000000..24c4eef56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/FreeRTOS_SemaphoreFromISR.ioc
@@ -0,0 +1,185 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.BinarySemaphores01=osSemaphore,Dynamic,NULL
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=0
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=0
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,Timers01,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,BinarySemaphores01,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=SEM_Thread,0,128,SemaphoreTest,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.Timers01=LEDTimer,osTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=2048
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_SemaphoreFromISR.ioc
+ProjectManager.ProjectName=FreeRTOS_SemaphoreFromISR
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_SemaphoreFromISR
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..b048bdf61
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h
@@ -0,0 +1,142 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)2048)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 0
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
new file mode 100644
index 000000000..36c8df83e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b5f34ce05
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx
new file mode 100644
index 000000000..53a87d677
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_SemaphoreFromISR
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx
new file mode 100644
index 000000000..fd4489f56
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/FreeRTOS_SemaphoreFromISR.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_SemaphoreFromISR
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_SemaphoreFromISR\Exe\
+ FreeRTOS_SemaphoreFromISR
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..4b1c45819
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project
new file mode 100644
index 000000000..53bc3d90a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_SemaphoreFromISR
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_SemaphoreFromISR.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_SemaphoreFromISR.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c
new file mode 100644
index 000000000..2aebf0089
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
new file mode 100644
index 000000000..e36fcbdec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
@@ -0,0 +1,292 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId SEM_ThreadHandle;
+osSemaphoreId osSemaphoreHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void SemaphoreTest(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LED */
+ BSP_LED_Init(LED1);
+
+ /* Initialize buttons */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* Create the semaphores(s) */
+ /* definition and creation of osSemaphore */
+ osSemaphoreDef(osSemaphore);
+ osSemaphoreHandle = osSemaphoreCreate(osSemaphore(osSemaphore), 1);
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of SEM_Thread */
+ osThreadDef(SEM_Thread, SemaphoreTest, osPriorityNormal, 0, 128);
+ SEM_ThreadHandle = osThreadCreate(osThread(SEM_Thread), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief EXTI line detection callbacks
+ * @param GPIO_Pin: Specifies the pins connected EXTI line
+ * @retval None
+ */
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ osSemaphoreRelease(osSemaphoreHandle);
+}
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_SemaphoreTest */
+/**
+ * @brief Function implementing the SEM_Thread thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_SemaphoreTest */
+void SemaphoreTest(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ /* Infinite loop */
+ for (;;)
+ {
+
+ if (osSemaphoreHandle != NULL)
+ {
+ /* Try to obtain the semaphore */
+ if (osSemaphoreWait(osSemaphoreHandle , 0) == osOK)
+ {
+ BSP_LED_Toggle(LED1);
+
+ }
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..7d8c13525
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8bf229bf5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
@@ -0,0 +1,198 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles PPP interrupt request.
+ * @param None
+ * @retval None
+ */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/**
+ * @brief This function handles external lines 10 to 15 interrupt request.
+ * @param None
+ * @retval None
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
new file mode 100644
index 000000000..9e618c37e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
@@ -0,0 +1,79 @@
+/**
+ @page FreeRTOS_SemaphoreFromISR FreeRTOS semaphore from ISR example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SemaphoreFromISR/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS semaphore from ISR example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use semaphore from ISR with CMSIS RTOS API.
+
+This application creates a thread that toggle a LED through semaphore given from ISR.
+
+Each time the user pushes the User push-button of the STM32G474E-EVAL1 Rev B board the semaphore
+is given to the SemaphoreTest thread to toggle the LED1.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Semaphore, Priorities, ISR, Interrupt
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_SemaphoreFromISR/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings
new file mode 100644
index 000000000..1871b3caf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;../Src/stm32g4xx_hal_msp.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd
new file mode 100644
index 000000000..fac4846af
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Signal
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp
new file mode 100644
index 000000000..df09b95b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/FreeRTOS_Signal.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Signal
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Signal/Exe
+
+
+ ObjPath
+ FreeRTOS_Signal/Obj
+
+
+ ListPath
+ FreeRTOS_Signal/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Signal.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Signal.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww
new file mode 100644
index 000000000..045a94115
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Signal.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc
new file mode 100644
index 000000000..e58e2fa15
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/FreeRTOS_Signal.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,configMAX_PRIORITIES,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_xTaskResumeFromISR,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=THREAD1,0,128,LED_Thread1,Default,NULL,Dynamic,NULL,NULL;THREAD2,0,128,LED_Thread2,Default,NULL,Dynamic,NULL,NULL;SIGNAL_GEN,0,128,Signal_Gen_Thread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=8
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=5120
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Signal.ioc
+ProjectManager.ProjectName=FreeRTOS_Signal
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Signal
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..5f479eea5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 8 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)5120)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configENABLE_BACKWARD_COMPATIBILITY 0
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY ( 2 )
+#define configTIMER_QUEUE_LENGTH 10
+#define configTIMER_TASK_STACK_DEPTH 256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h
new file mode 100644
index 000000000..169f574ad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..905bb714e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx
new file mode 100644
index 000000000..7e01343b4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Signal
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 2
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+ 2
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 8
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 8
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 8
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 8
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 8
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 8
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 8
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 8
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 8
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx
new file mode 100644
index 000000000..5befb9a1b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/FreeRTOS_Signal.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Signal
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Signal\Exe\
+ FreeRTOS_Signal
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..020318e21
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project
new file mode 100644
index 000000000..566419de9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Signal
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Signal.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Signal.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c
new file mode 100644
index 000000000..480a99650
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c
new file mode 100644
index 000000000..b912045bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/main.c
@@ -0,0 +1,331 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_1 ( 1 << 1 )
+ #define BIT_2 ( 1 << 2 )
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId THREAD1Handle;
+osThreadId THREAD2Handle;
+osThreadId SIGNAL_GENHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void LED_Thread1(void const * argument);
+void LED_Thread2(void const * argument);
+void Signal_Gen_Thread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED2);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of THREAD1 */
+ osThreadDef(THREAD1, LED_Thread1, osPriorityNormal, 0, 128);
+ THREAD1Handle = osThreadCreate(osThread(THREAD1), NULL);
+
+ /* definition and creation of THREAD2 */
+ osThreadDef(THREAD2, LED_Thread2, osPriorityNormal, 0, 128);
+ THREAD2Handle = osThreadCreate(osThread(THREAD2), NULL);
+
+ /* definition and creation of SIGNAL_GEN */
+ osThreadDef(SIGNAL_GEN, Signal_Gen_Thread, osPriorityNormal, 0, 128);
+ SIGNAL_GENHandle = osThreadCreate(osThread(SIGNAL_GEN), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_LED_Thread1 */
+/**
+ * @brief Function implementing the THREAD1 thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_LED_Thread1 */
+void LED_Thread1(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ (void) argument;
+ osEvent event;
+ /* Infinite loop */
+ for(;;)
+ {
+ event = osSignalWait( BIT_0, osWaitForever);
+ if(event.value.signals == BIT_0)
+ {
+ BSP_LED_Toggle(LED1);
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_LED_Thread2 */
+/**
+* @brief Function implementing the THREAD2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_LED_Thread2 */
+void LED_Thread2(void const * argument)
+{
+ /* USER CODE BEGIN LED_Thread2 */
+ (void) argument;
+ osEvent event;
+ /* Infinite loop */
+ for(;;)
+ {
+ event = osSignalWait( BIT_1 | BIT_2, osWaitForever);
+ if(event.value.signals == (BIT_1 | BIT_2))
+ {
+ BSP_LED_Toggle(LED2);
+ }
+ }
+ /* USER CODE END LED_Thread2 */
+}
+
+/* USER CODE BEGIN Header_Signal_Gen_Thread */
+/**
+* @brief Function implementing the SIGNAL_GEN thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_Signal_Gen_Thread */
+void Signal_Gen_Thread(void const * argument)
+{
+ /* USER CODE BEGIN Signal_Gen_Thread */
+ (void) argument;
+ /* Infinite loop */
+ for(;;)
+ {
+ osSignalSet(THREAD1Handle, BIT_0 );
+ osDelay(500);
+ osSignalSet(THREAD2Handle, BIT_1 | BIT_2 );
+ osDelay(500);
+ }
+ /* USER CODE END Signal_Gen_Thread */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..18158788f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..bf3c7da24
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt
new file mode 100644
index 000000000..ad8653b49
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Signal/readme.txt
@@ -0,0 +1,92 @@
+/**
+ @page FreeRTOS_Signal FreeRTOS Signal example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Signal/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Signal example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to perform thread signaling using CMSIS RTOS API.
+
+This application creates three threads with the same priority.
+
+Thread1 calls osSignalWait to wait for a signal that sets bit0, then toggles LED1
+
+Thread2 calls osSignalWait to wait for a signal that sets bit1 and bit2, then toggles LED2
+
+Thread3 performs the following actions:
+ - calls osSetSignal to send a signal with bit0 to Thread1
+ - delay for 500ms
+ - calls osSetSignal to send a signal with bit1 and bit2 to Thread2
+ - delay for 500ms
+As a result, LEDs show the following behaviour:
+ - LED1 On, delay 500ms
+ - LED2 On, delay 500ms
+ - LED1 Off, delay 500ms
+ - LED2 off, delay 500ms
+ - loop-back
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Signal,
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Signal/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Signal/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Signal/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Signal/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Signal/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Signal/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Signal/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd
new file mode 100644
index 000000000..943eb95d9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_SignalFromISR
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp
new file mode 100644
index 000000000..bb3b1ca16
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/FreeRTOS_SignalFromISR.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_SignalFromISR
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_SignalFromISR/Exe
+
+
+ ObjPath
+ FreeRTOS_SignalFromISR/Obj
+
+
+ ListPath
+ FreeRTOS_SignalFromISR/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_SignalFromISR.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_SignalFromISR.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww
new file mode 100644
index 000000000..785648dc7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_SignalFromISR.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc
new file mode 100644
index 000000000..7e6e00188
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/FreeRTOS_SignalFromISR.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.FootprintOK=true
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=0
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,configENABLE_BACKWARD_COMPATIBILITY,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_vTaskCleanUpResources,FootprintOK,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskSuspend,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=LEDThread,0,128,ToggleLEDsThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=0
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_SignalFromISR.ioc
+ProjectManager.ProjectName=FreeRTOS_SignalFromISR
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_SignalFromISR
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..863dd1c77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configENABLE_BACKWARD_COMPATIBILITY 0
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY ( 2 )
+#define configTIMER_QUEUE_LENGTH 10
+#define configTIMER_TASK_STACK_DEPTH 256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
new file mode 100644
index 000000000..376441a9c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..857ab2b5a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx
new file mode 100644
index 000000000..c86b7a7e9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_SignalFromISR
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx
new file mode 100644
index 000000000..f2ac234d8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/FreeRTOS_SignalFromISR.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_SignalFromISR
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_SignalFromISR\Exe\
+ FreeRTOS_SignalFromISR
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..0ce62aa49
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project
new file mode 100644
index 000000000..3befa8270
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_SignalFromISR
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_SignalFromISR.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_SignalFromISR.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c
new file mode 100644
index 000000000..beb90d331
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
new file mode 100644
index 000000000..052510bdf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
@@ -0,0 +1,279 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_1 ( 1 << 1 )
+ #define BIT_2 ( 1 << 2 )
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId LEDThreadHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void ToggleLEDsThread(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+
+ /* Initialize buttons */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of LEDThread */
+ osThreadDef(LEDThread, ToggleLEDsThread, osPriorityNormal, 0, 128);
+ LEDThreadHandle = osThreadCreate(osThread(LEDThread), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ osSignalSet( LEDThreadHandle, BIT_1);
+}
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_ToggleLEDsThread */
+/**
+ * @brief Function implementing the LEDThread thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_ToggleLEDsThread */
+void ToggleLEDsThread(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ (void) argument;
+ osEvent event;
+ /* Infinite loop */
+ for(;;)
+ {
+ event = osSignalWait( BIT_1, osWaitForever);
+ if(event.value.signals == BIT_1)
+ {
+ BSP_LED_Toggle(LED1);
+ }
+ }
+ /* USER CODE END 5 */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..e88407e94
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..624eb470b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
@@ -0,0 +1,188 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles external lines 10 to 15 interrupt request.
+ * @param None
+ * @retval None
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
new file mode 100644
index 000000000..448ba907d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
@@ -0,0 +1,78 @@
+/**
+ @page FreeRTOS_SignalFromISR FreeRTOS Signal from ISR example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_SignalFromISR/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Signal from ISR example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+This application shows the usage of CMSIS-OS Signal API from ISR context.
+
+Initially all LED are off and a thread that waits for signals is created.
+Each time the user presses the User push-button, generating an interrupt, an osSignal is sent
+to the thread change the LED1 state from on to off and vice-versa.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Signal, ISR, Interrupt
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_SignalFromISR/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings
new file mode 100644
index 000000000..6936c2ab8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_msp.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd
new file mode 100644
index 000000000..26bba0396
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_ThreadCreation
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp
new file mode 100644
index 000000000..bbac50869
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/FreeRTOS_ThreadCreation.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_ThreadCreation
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_ThreadCreation/Exe
+
+
+ ObjPath
+ FreeRTOS_ThreadCreation/Obj
+
+
+ ListPath
+ FreeRTOS_ThreadCreation/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_ThreadCreation.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_ThreadCreation.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww
new file mode 100644
index 000000000..3d245f8f1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_ThreadCreation.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc
new file mode 100644
index 000000000..2f41f156b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/FreeRTOS_ThreadCreation.ioc
@@ -0,0 +1,182 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=1
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskDelayUntil,INCLUDE_eTaskGetState,INCLUDE_xQueueGetMutexHolder,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configUSE_TIMERS,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xTaskResumeFromISR,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=THREAD1,0,128,LED_Thread1,Default,NULL,Dynamic,NULL,NULL;THREAD2,0,128,LED_Thread2,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTOTAL_HEAP_SIZE=2048
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=0
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_ThreadCreation.ioc
+ProjectManager.ProjectName=FreeRTOS_ThreadCreation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_ThreadCreation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..55a057f66
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)2048)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xQueueGetMutexHolder 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
new file mode 100644
index 000000000..b5ed78bec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a2742f205
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx
new file mode 100644
index 000000000..197f960b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_ThreadCreation
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx
new file mode 100644
index 000000000..ee6b8b84e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/FreeRTOS_ThreadCreation.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_ThreadCreation
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_ThreadCreation\Exe\
+ FreeRTOS_ThreadCreation
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6f66310a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project
new file mode 100644
index 000000000..adecdcaa3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_ThreadCreation
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_ThreadCreation.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_ThreadCreation.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c
new file mode 100644
index 000000000..56cccc461
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
new file mode 100644
index 000000000..6976db8ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
@@ -0,0 +1,335 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId THREAD1Handle;
+osThreadId THREAD2Handle;
+/* USER CODE BEGIN PV */
+__IO uint32_t OsStatus = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void LED_Thread1(void const * argument);
+void LED_Thread2(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED3);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of THREAD1 */
+ osThreadDef(THREAD1, LED_Thread1, osPriorityNormal, 0, 128);
+ THREAD1Handle = osThreadCreate(osThread(THREAD1), NULL);
+
+ /* definition and creation of THREAD2 */
+ osThreadDef(THREAD2, LED_Thread2, osPriorityNormal, 0, 128);
+ THREAD2Handle = osThreadCreate(osThread(THREAD2), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_LED_Thread1 */
+/**
+ * @brief Function implementing the THREAD1 thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_LED_Thread1 */
+void LED_Thread1(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ uint32_t count = 0;
+ (void) argument;
+ /* Infinite loop */
+ for (;;)
+ {
+ count = osKernelSysTick() + 5000;
+
+ /* Toggle LED1 every 200 ms for 5 s */
+ while (count > osKernelSysTick())
+ {
+ BSP_LED_Toggle(LED1);
+
+ osDelay(200);
+ }
+
+ /* Turn off LED1 */
+ BSP_LED_Off(LED1);
+
+ /* Suspend Thread 1 */
+ OsStatus = osThreadSuspend(NULL);
+
+ count = osKernelSysTick() + 5000;
+
+ /* Toggle LED1 every 500 ms for 5 s */
+ while (count > osKernelSysTick())
+ {
+ BSP_LED_Toggle(LED1);
+
+ osDelay(500);
+ }
+
+ /* Resume Thread 2*/
+ OsStatus = osThreadResume(THREAD2Handle);
+ }
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN Header_LED_Thread2 */
+/**
+* @brief Function implementing the THREAD2 thread.
+* @param argument: Not used
+* @retval None
+*/
+/* USER CODE END Header_LED_Thread2 */
+void LED_Thread2(void const * argument)
+{
+ /* USER CODE BEGIN LED_Thread2 */
+ uint32_t count;
+ (void) argument;
+ /* Infinite loop */
+ for (;;)
+ {
+ count = osKernelSysTick() + 10000;
+
+ /* Toggle LED3 every 500 ms for 10 s */
+ while (count > osKernelSysTick())
+ {
+ BSP_LED_Toggle(LED3);
+
+ osDelay(500);
+ }
+
+ /* Turn off LED3 */
+ BSP_LED_Off(LED3);
+
+ /* Resume Thread 1 */
+ OsStatus = osThreadResume(THREAD1Handle);
+
+ /* Suspend Thread 2 */
+ OsStatus = osThreadSuspend(NULL);
+ }
+ /* USER CODE END LED_Thread2 */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..61839c5ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..3c2ba723f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
new file mode 100644
index 000000000..6aca980bc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
@@ -0,0 +1,84 @@
+/**
+ @page FreeRTOS_ThreadCreation FreeRTOS Thread Creation example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_ThreadCreation/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS Thread Creation example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to implement thread creation using CMSIS RTOS API.
+
+This application creates two threads with the same priority, which execute in
+a periodic cycle of 15 seconds.
+
+In the first 5 seconds, the thread 1 toggles LED1 each 200 ms and the
+thread 2 toggles LED3 each 500 ms.
+In the following 5 seconds, the thread 1 suspends itself and the thread 2
+continue toggling LED3.
+In the last 5 seconds, the thread 2 resumes execution of thread 1 then
+suspends itself, the thread 1 toggles the LED1 each 500 ms.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_ThreadCreation/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings
new file mode 100644
index 000000000..aad097324
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;I2C;EXTI;SPI
+[Groups]
+Application/User=../Src/main.c;../Src/stm32g4xx_it.c;../Src/stm32g4xx_hal_timebase_tim.c;../Src/stm32g4xx_hal_msp.c;../Src/app_freertos.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd
new file mode 100644
index 000000000..f9a2ccad5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ FreeRTOS_Timers
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp
new file mode 100644
index 000000000..fe1a5feca
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/FreeRTOS_Timers.ewp
@@ -0,0 +1,1195 @@
+
+
+ 3
+
+ FreeRTOS_Timers
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ FreeRTOS_Timers/Exe
+
+
+ ObjPath
+ FreeRTOS_Timers/Obj
+
+
+ ListPath
+ FreeRTOS_Timers/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+ $PROJ_DIR$\..\Inc
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ FreeRTOS_Timers.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ FreeRTOS_Timers.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+ $PROJ_DIR$/../Src/app_freertos.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ FreeRTOS
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww
new file mode 100644
index 000000000..a7052ef20
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\FreeRTOS_Timers.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc
new file mode 100644
index 000000000..3ffa96380
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/FreeRTOS_Timers.ioc
@@ -0,0 +1,188 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+FREERTOS.HEAP_NUMBER=4
+FREERTOS.INCLUDE_eTaskGetState=1
+FREERTOS.INCLUDE_pcTaskGetTaskName=0
+FREERTOS.INCLUDE_uxTaskGetStackHighWaterMark=0
+FREERTOS.INCLUDE_uxTaskPriorityGet=1
+FREERTOS.INCLUDE_vTaskCleanUpResources=0
+FREERTOS.INCLUDE_vTaskDelay=1
+FREERTOS.INCLUDE_vTaskDelayUntil=1
+FREERTOS.INCLUDE_vTaskDelete=1
+FREERTOS.INCLUDE_vTaskPrioritySet=1
+FREERTOS.INCLUDE_vTaskSuspend=1
+FREERTOS.INCLUDE_xEventGroupSetBitFromISR=0
+FREERTOS.INCLUDE_xQueueGetMutexHolder=1
+FREERTOS.INCLUDE_xSemaphoreGetMutexHolder=0
+FREERTOS.INCLUDE_xTaskAbortDelay=0
+FREERTOS.INCLUDE_xTaskGetCurrentTaskHandle=0
+FREERTOS.INCLUDE_xTaskGetHandle=0
+FREERTOS.INCLUDE_xTaskGetSchedulerState=1
+FREERTOS.INCLUDE_xTaskResumeFromISR=1
+FREERTOS.INCLUDE_xTimerPendFunctionCall=0
+FREERTOS.IPParameters=Tasks01,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configTOTAL_HEAP_SIZE,configUSE_TRACE_FACILITY,configLIBRARY_LOWEST_INTERRUPT_PRIORITY,configIDLE_SHOULD_YIELD,configUSE_TIMERS,INCLUDE_vTaskDelayUntil,INCLUDE_xQueueGetMutexHolder,INCLUDE_eTaskGetState,INCLUDE_xTaskResumeFromISR,Timers01,configUSE_PREEMPTION,MEMORY_ALLOCATION,configTICK_RATE_HZ,configMAX_PRIORITIES,configMINIMAL_STACK_SIZE,configMAX_TASK_NAME_LEN,configUSE_MUTEXES,configQUEUE_REGISTRY_SIZE,configUSE_APPLICATION_TASK_TAG,HEAP_NUMBER,configUSE_IDLE_HOOK,configUSE_TICK_HOOK,configUSE_MALLOC_FAILED_HOOK,configUSE_DAEMON_TASK_STARTUP_HOOK,configCHECK_FOR_STACK_OVERFLOW,configGENERATE_RUN_TIME_STATS,configUSE_STATS_FORMATTING_FUNCTIONS,configUSE_CO_ROUTINES,configMAX_CO_ROUTINE_PRIORITIES,configTIMER_TASK_PRIORITY,configTIMER_QUEUE_LENGTH,configTIMER_TASK_STACK_DEPTH,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_vTaskDelete,INCLUDE_vTaskCleanUpResources,INCLUDE_vTaskSuspend,INCLUDE_vTaskDelay,INCLUDE_xTaskGetSchedulerState,INCLUDE_xSemaphoreGetMutexHolder,INCLUDE_pcTaskGetTaskName,INCLUDE_uxTaskGetStackHighWaterMark,INCLUDE_xTaskGetCurrentTaskHandle,INCLUDE_xEventGroupSetBitFromISR,INCLUDE_xTimerPendFunctionCall,configENABLE_BACKWARD_COMPATIBILITY,configUSE_TICKLESS_IDLE,configUSE_TASK_NOTIFICATIONS,INCLUDE_xTaskAbortDelay,INCLUDE_xTaskGetHandle,configRECORD_STACK_HIGH_ADDRESS,configUSE_NEWLIB_REENTRANT,copyHeapFile,configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
+FREERTOS.MEMORY_ALLOCATION=0
+FREERTOS.Tasks01=LEDThread,0,128,ToggleLEDsThread,Default,NULL,Dynamic,NULL,NULL
+FREERTOS.Timers01=LEDTimer,osTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL
+FREERTOS.configCHECK_FOR_STACK_OVERFLOW=0
+FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
+FREERTOS.configGENERATE_RUN_TIME_STATS=0
+FREERTOS.configIDLE_SHOULD_YIELD=1
+FREERTOS.configLIBRARY_LOWEST_INTERRUPT_PRIORITY=15
+FREERTOS.configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY=5
+FREERTOS.configMAX_CO_ROUTINE_PRIORITIES=2
+FREERTOS.configMAX_PRIORITIES=7
+FREERTOS.configMAX_TASK_NAME_LEN=16
+FREERTOS.configMINIMAL_STACK_SIZE=128
+FREERTOS.configQUEUE_REGISTRY_SIZE=8
+FREERTOS.configRECORD_STACK_HIGH_ADDRESS=0
+FREERTOS.configTICK_RATE_HZ=1000
+FREERTOS.configTIMER_QUEUE_LENGTH=10
+FREERTOS.configTIMER_TASK_PRIORITY=2
+FREERTOS.configTIMER_TASK_STACK_DEPTH=256
+FREERTOS.configTOTAL_HEAP_SIZE=3072
+FREERTOS.configUSE_APPLICATION_TASK_TAG=0
+FREERTOS.configUSE_COUNTING_SEMAPHORES=1
+FREERTOS.configUSE_CO_ROUTINES=0
+FREERTOS.configUSE_DAEMON_TASK_STARTUP_HOOK=0
+FREERTOS.configUSE_IDLE_HOOK=0
+FREERTOS.configUSE_MALLOC_FAILED_HOOK=0
+FREERTOS.configUSE_MUTEXES=1
+FREERTOS.configUSE_NEWLIB_REENTRANT=0
+FREERTOS.configUSE_PREEMPTION=1
+FREERTOS.configUSE_RECURSIVE_MUTEXES=1
+FREERTOS.configUSE_STATS_FORMATTING_FUNCTIONS=0
+FREERTOS.configUSE_TASK_NOTIFICATIONS=1
+FREERTOS.configUSE_TICKLESS_IDLE=0
+FREERTOS.configUSE_TICK_HOOK=0
+FREERTOS.configUSE_TIMERS=1
+FREERTOS.configUSE_TRACE_FACILITY=1
+FREERTOS.copyHeapFile=1
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=FREERTOS
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin1=VP_SYS_VS_tim6
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
+NVIC.SavedPendsvIrqHandlerGenerated=true
+NVIC.SavedSvcallIrqHandlerGenerated=true
+NVIC.SavedSystickIrqHandlerGenerated=true
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
+NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true\:true
+NVIC.TimeBase=TIM6_DAC_IRQn
+NVIC.TimeBaseIP=TIM6
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=FreeRTOS_Timers.ioc
+ProjectManager.ProjectName=FreeRTOS_Timers
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
+VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_tim6.Mode=TIM6
+VP_SYS_VS_tim6.Signal=SYS_VS_tim6
+board=custom
+rtos.0.ip=FREERTOS
+ProjectManager.Example=FreeRTOS_Timers
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h
new file mode 100644
index 000000000..09def5b9c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+ #include
+ extern uint32_t SystemCoreClock;
+#endif
+#define configENABLE_FPU 0
+#define configENABLE_MPU 0
+
+#define configUSE_PREEMPTION 1
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCPU_CLOCK_HZ ( SystemCoreClock )
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES ( 7 )
+#define configMINIMAL_STACK_SIZE ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE ((size_t)3072)
+#define configMAX_TASK_NAME_LEN ( 16 )
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_16_BIT_TICKS 0
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+ if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY ( 2 )
+#define configTIMER_QUEUE_LENGTH 10
+#define configTIMER_TASK_STACK_DEPTH 256
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 0
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xQueueGetMutexHolder 1
+#define INCLUDE_eTaskGetState 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h
new file mode 100644
index 000000000..a4ea249f3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/Inc/main.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the main.c
+ * file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..814578526
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..fb00b4cdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
@@ -0,0 +1,65 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx
new file mode 100644
index 000000000..5382b4d0b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvoptx
@@ -0,0 +1,773 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ FreeRTOS_Timers
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_timebase_tim.c
+ stm32g4xx_hal_timebase_tim.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Src/app_freertos.c
+ app_freertos.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/FreeRTOS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+ croutine.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+ event_groups.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+ list.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+ queue.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+ stream_buffer.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+ tasks.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+ timers.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+ heap_4.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+ port.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx
new file mode 100644
index 000000000..72f0ea403
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/FreeRTOS_Timers.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ FreeRTOS_Timers
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ FreeRTOS_Timers\Exe\
+ FreeRTOS_Timers
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/include;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..//Inc
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_timebase_tim.c
+ 1
+ ../Src/stm32g4xx_hal_timebase_tim.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+ app_freertos.c
+ 1
+ ../Src/app_freertos.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/FreeRTOS
+
+
+ croutine.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ event_groups.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ list.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ queue.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ stream_buffer.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ tasks.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ timers.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ cmsis_os.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ heap_4.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ port.c
+ 1
+ ../../../../../../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..7a89eacda
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.cproject
@@ -0,0 +1,177 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project
new file mode 100644
index 000000000..3adecef54
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/.project
@@ -0,0 +1,250 @@
+
+
+ FreeRTOS_Timers
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ FreeRTOS_Timers.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/FreeRTOS_Timers.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/app_freertos.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/app_freertos.c
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_hal_timebase_tim.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_timebase_tim.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Middlewares/FreeRTOS/cmsis_os.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
+
+
+ Middlewares/FreeRTOS/croutine.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
+
+
+ Middlewares/FreeRTOS/event_groups.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
+
+
+ Middlewares/FreeRTOS/heap_4.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
+
+
+ Middlewares/FreeRTOS/list.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/list.c
+
+
+ Middlewares/FreeRTOS/port.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+
+
+ Middlewares/FreeRTOS/queue.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/queue.c
+
+
+ Middlewares/FreeRTOS/stream_buffer.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
+
+
+ Middlewares/FreeRTOS/tasks.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
+
+
+ Middlewares/FreeRTOS/timers.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/Third_Party/FreeRTOS/Source/timers.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c
new file mode 100644
index 000000000..d4bee9578
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/app_freertos.c
@@ -0,0 +1,60 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/Src/freertos.c
+ * @author MCD Application Team
+ * @brief Code for freertos applications
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+
+/* USER CODE END FunctionPrototypes */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c
new file mode 100644
index 000000000..3573c0e28
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/main.c
@@ -0,0 +1,290 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS\FreeRTOS_Timers\Src\main.c
+ * @author MCD Application Team
+ * @brief Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+osThreadId LEDThreadHandle;
+osTimerId LEDTimerHandle;
+/* USER CODE BEGIN PV */
+__IO uint32_t TimeCounter = 0;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+void ToggleLEDsThread(void const * argument);
+void osTimerCallback(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Initialize LEDs */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED2);
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* USER CODE BEGIN RTOS_MUTEX */
+ /* add mutexes, ... */
+ /* USER CODE END RTOS_MUTEX */
+
+ /* USER CODE BEGIN RTOS_SEMAPHORES */
+ /* add semaphores, ... */
+ /* USER CODE END RTOS_SEMAPHORES */
+
+ /* Create the timer(s) */
+ /* definition and creation of LEDTimer */
+ osTimerDef(LEDTimer, osTimerCallback);
+ LEDTimerHandle = osTimerCreate(osTimer(LEDTimer), osTimerPeriodic, NULL);
+
+ /* USER CODE BEGIN RTOS_TIMERS */
+ osTimerStart(LEDTimerHandle, 200);
+ /* USER CODE END RTOS_TIMERS */
+
+ /* USER CODE BEGIN RTOS_QUEUES */
+
+ /* USER CODE END RTOS_QUEUES */
+
+ /* Create the thread(s) */
+ /* definition and creation of LEDThread */
+ osThreadDef(LEDThread, ToggleLEDsThread, osPriorityNormal, 0, 128);
+ LEDThreadHandle = osThreadCreate(osThread(LEDThread), NULL);
+
+ /* USER CODE BEGIN RTOS_THREADS */
+ /* USER CODE END RTOS_THREADS */
+
+ /* Start scheduler */
+ osKernelStart();
+
+ /* We should never get here as control is now taken by the scheduler */
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_ToggleLEDsThread */
+/**
+ * @brief Function implementing the LEDThread thread.
+ * @param argument: Not used
+ * @retval None
+ */
+/* USER CODE END Header_ToggleLEDsThread */
+void ToggleLEDsThread(void const * argument)
+{
+ /* USER CODE BEGIN 5 */
+ (void) argument;
+ /* Infinite loop */
+ for(;;)
+ {
+ /* Toggle LED2 each 400ms */
+ BSP_LED_Toggle(LED2);
+
+ osDelay(400);
+ }
+ /* USER CODE END 5 */
+}
+
+/* osTimerCallback function */
+void osTimerCallback(void const * argument)
+{
+ /* USER CODE BEGIN osTimerCallback */
+ (void) argument;
+
+ /* Toggle LED1*/
+ BSP_LED_Toggle(LED1);
+ if (TimeCounter == 25)
+ {
+ TimeCounter = 0;
+ }
+ /* USER CODE END osTimerCallback */
+}
+
+/**
+ * @brief Period elapsed callback in non blocking mode
+ * @note This function is called when TIM6 interrupt took place, inside
+ * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+ * a global variable "uwTick" used as application time base.
+ * @param htim : TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ /* USER CODE BEGIN Callback 0 */
+
+ /* USER CODE END Callback 0 */
+ if (htim->Instance == TIM6) {
+ HAL_IncTick();
+ }
+ /* USER CODE BEGIN Callback 1 */
+
+ /* USER CODE END Callback 1 */
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {}
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..0d7a570c9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,89 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+ /* PendSV_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c
new file mode 100644
index 000000000..7ec7b52a6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c
@@ -0,0 +1,148 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g0xx_hal_timebase_tim.c
+ * @author MCD Application Team
+ * @brief HAL time base based on the hardware TIM.
+ *
+ * This file overrides the native HAL time base functions (defined as weak)
+ * the TIM time base:
+ * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
+ * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+ *
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ This file must be copied to the application folder and modified as follows:
+ (#) Rename it to 'stm32g0xx_hal_timebase_tim.c'
+ (#) Add this file and the TIM HAL driver files to your project and make sure
+ HAL_TIM_MODULE_ENABLED is defined in stm32l4xx_hal_conf.h
+
+ [..]
+ (@) The application needs to ensure that the time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+#include "stm32g4xx_hal_tim.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief This function configures the TIM6 as a time base source.
+ * The time source is configured to have 1ms time base with a dedicated
+ * Tick interrupt priority.
+ * @note This function is called automatically at the beginning of program after
+ * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+ * @param TickPriority: Tick interrupt priority.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ RCC_ClkInitTypeDef clkconfig;
+ uint32_t uwTimclock = 0;
+ uint32_t uwPrescalerValue = 0;
+ uint32_t pFLatency;
+ HAL_StatusTypeDef status;
+
+ /* Enable TIM6 clock */
+ __HAL_RCC_TIM6_CLK_ENABLE();
+
+ /* Get clock configuration */
+ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+ /* Compute TIM6 clock */
+ uwTimclock = HAL_RCC_GetPCLK1Freq();
+
+ /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+
+ /* Initialize TIM6 */
+ htim6.Instance = TIM6;
+
+ /* Initialize TIMx peripheral as follow:
+
+ + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ htim6.Init.Period = (1000000U / 1000U) - 1U;
+ htim6.Init.Prescaler = uwPrescalerValue;
+ htim6.Init.ClockDivision = 0;
+ htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+
+ status = HAL_TIM_Base_Init(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Start the TIM time Base generation in interrupt mode */
+ status = HAL_TIM_Base_Start_IT(&htim6);
+ if (status == HAL_OK)
+ {
+ /* Enable the TIM6 global Interrupt */
+ HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ {
+ /* Configure the TIM IRQ priority */
+ HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ uwTickPrio = TickPriority;
+ }
+ else
+ {
+ status = HAL_ERROR;
+ }
+ }
+ }
+
+ /* Return function status */
+ return status;
+}
+
+/**
+ * @brief Suspend Tick increment.
+ * @note Disable the tick increment by disabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_SuspendTick(void)
+{
+ /* Disable TIM6 update Interrupt */
+ __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief Resume Tick increment.
+ * @note Enable the tick increment by Enabling TIM6 update interrupt.
+ * @param None
+ * @retval None
+ */
+void HAL_ResumeTick(void)
+{
+ /* Enable TIM6 Update interrupt */
+ __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..2b050f529
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
@@ -0,0 +1,180 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles TIM6 global interrupt, DAC1 and DAC3 channel underrun error interrupts.
+ */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+ /* USER CODE END TIM6_DAC_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim6);
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+ /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt
new file mode 100644
index 000000000..9ebc1702d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/FreeRTOS/FreeRTOS_Timers/readme.txt
@@ -0,0 +1,77 @@
+/**
+ @page FreeRTOS_Timers FreeRTOS timers example
+
+ @verbatim
+ ******************************************************************************
+ * @file FreeRTOS/FreeRTOS_Timers/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the FreeRTOS timers example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+How to use timers of CMSIS RTOS API.
+
+This application creates a thread that toggle LED2 every 400 ms, and a periodic
+timer that calls a callback function every 200 ms to toggle the LED1.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate
+ delay (in milliseconds) based on variable incremented in HAL time base ISR.
+ This implies that if HAL_Delay() is called from a peripheral ISR process, then
+ the HAL time base interrupt must have higher priority (numerically lower) than
+ the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the HAL time base interrupt priority you have to use HAL_NVIC_SetPriority()
+ function.
+
+@note The application needs to ensure that the HAL time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note The FreeRTOS heap size configTOTAL_HEAP_SIZE defined in FreeRTOSConfig.h is set accordingly to the
+ OS resources memory requirements of the application with +10% margin and rounded to the upper Kbyte boundary.
+
+For more details about FreeRTOS implementation on STM32Cube, please refer to UM1722 "Developing Applications
+on STM32Cube with RTOS".
+
+@par Keywords
+
+RTOS, FreeRTOS, Threading, Timer
+
+@par Directory contents
+ - FreeRTOS/FreeRTOS_Timers/Src/main.c Main program
+ - FreeRTOS/FreeRTOS_Timers/Src/app_FreeRTOS.c Code for freertos applications
+ - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_timebase_tim.c HAL timebase file
+ - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_it.c Interrupt handlers
+ - FreeRTOS/FreeRTOS_Timers/Src/stm32g4xx_hal_msp.c MSP Initialization file
+ - FreeRTOS/FreeRTOS_Timers/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - FreeRTOS/FreeRTOS_Timers/Inc/main.h Main program header file
+ - FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_hal_conf.h HAL Library Configuration file
+ - FreeRTOS/FreeRTOS_Timers/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - FreeRTOS/FreeRTOS_Timers/Inc/FreeRTOSConfig.h FreeRTOS Configuration file
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G474QETx devices.
+
+ - This application has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/LICENSE.md b/Projects/STM32G474E-EVAL1/Applications/LICENSE.md
new file mode 100644
index 000000000..1af523307
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/LICENSE.md
@@ -0,0 +1,80 @@
+SLA0044 Rev5/February 2018
+
+## Software license agreement
+
+### __ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT__
+
+BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE
+OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS
+INTERNATIONAL N.V, SWISS BRANCH AND/OR ITS AFFILIATED COMPANIES
+(STMICROELECTRONICS), THE RECIPIENT, ON BEHALF OF HIMSELF OR HERSELF, OR ON
+BEHALF OF ANY ENTITY BY WHICH SUCH RECIPIENT IS EMPLOYED AND/OR ENGAGED AGREES
+TO BE BOUND BY THIS SOFTWARE LICENSE AGREEMENT.
+
+Under STMicroelectronics’ intellectual property rights, the redistribution,
+reproduction and use in source and binary forms of the software or any part
+thereof, with or without modification, are permitted provided that the following
+conditions are met:
+
+1. Redistribution of source code (modified or not) must retain any copyright
+notice, this list of conditions and the disclaimer set forth below as items 10
+and 11.
+
+2. Redistributions in binary form, except as embedded into microcontroller or
+microprocessor device manufactured by or for STMicroelectronics or a software
+update for such device, must reproduce any copyright notice provided with the
+binary code, this list of conditions, and the disclaimer set forth below as
+items 10 and 11, in documentation and/or other materials provided with the
+distribution.
+
+3. Neither the name of STMicroelectronics nor the names of other contributors to
+this software may be used to endorse or promote products derived from this
+software or part thereof without specific written permission.
+
+4. This software or any part thereof, including modifications and/or derivative
+works of this software, must be used and execute solely and exclusively on or in
+combination with a microcontroller or microprocessor device manufactured by or
+for STMicroelectronics.
+
+5. No use, reproduction or redistribution of this software partially or totally
+may be done in any manner that would subject this software to any Open Source
+Terms. “Open Source Terms” shall mean any open source license which requires as
+part of distribution of software that the source code of such software is
+distributed therewith or otherwise made available, or open source license that
+substantially complies with the Open Source definition specified at
+www.opensource.org and any other comparable open source license such as for
+example GNU General Public License (GPL), Eclipse Public License (EPL), Apache
+Software License, BSD license or MIT license.
+
+6. STMicroelectronics has no obligation to provide any maintenance, support or
+updates for the software.
+
+7. The software is and will remain the exclusive property of STMicroelectronics
+and its licensors. The recipient will not take any action that jeopardizes
+STMicroelectronics and its licensors' proprietary rights or acquire any rights
+in the software, except the limited rights specified hereunder.
+
+8. The recipient shall comply with all applicable laws and regulations affecting
+the use of the software or any part thereof including any applicable export
+control law or regulation.
+
+9. Redistribution and use of this software or any part thereof other than as
+permitted under this license is void and will automatically terminate your
+rights under this license.
+
+10. THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS, WHICH ARE
+DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT SHALL
+STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+11. EXCEPT AS EXPRESSLY PERMITTED HEREUNDER, NO LICENSE OR OTHER RIGHTS, WHETHER
+EXPRESS OR IMPLIED, ARE GRANTED UNDER ANY PATENT OR OTHER INTELLECTUAL PROPERTY
+RIGHTS OF STMICROELECTRONICS OR ANY THIRD PARTY.
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings
new file mode 100644
index 000000000..3d02b5039
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=TIM;UART;I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usbd_cdc_if.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc
new file mode 100644
index 000000000..d6396c5e7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/CDC_Standalone.ioc
@@ -0,0 +1,159 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:false\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CDC_Standalone.ioc
+ProjectManager.ProjectName=CDC_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=DISABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.APP_RX_DATA_SIZE=2048
+USB_DEVICE.APP_TX_DATA_SIZE=2048
+USB_DEVICE.CLASS_NAME_FS=CDC
+USB_DEVICE.CONFIGURATION_STRING_CDC_FS=CDC Config
+USB_DEVICE.INTERFACE_STRING_CDC_FS=CDC Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,PID_CDC_FS,PRODUCT_STRING_CDC_FS,USBD_LPM_ENABLED,USBD_MAX_NUM_CONFIGURATION,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,CONFIGURATION_STRING_CDC_FS,INTERFACE_STRING_CDC_FS,APP_RX_DATA_SIZE,APP_TX_DATA_SIZE
+USB_DEVICE.IPParametersWithoutCheck=USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_CDC_FS=0x5740
+USB_DEVICE.PRODUCT_STRING_CDC_FS=STM32 Virtual ComPort in FS Mode
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=100
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Cdc
+USB_DEVICE.VirtualModeFS=Cdc_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
+VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS
+board=STM32G474E-EVAL1
+ProjectManager.Example=CDC_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..b0440969a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/Core/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "usbd_cdc_if.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..86557321b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..1ed472a63
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void USARTx_IRQHandler(void);
+void USARTx_DMA_RX_IRQHandler(void);
+void USARTx_DMA_TX_IRQHandler(void);
+void TIMx_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..4c1aa4e0e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/main.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/Core/Src/main.c
+ * @author MCD Application Team
+ * @brief USB device CDC demo main file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_USB_Device_Init();
+ /* USER CODE BEGIN 2 */
+ BSP_LED_Init(LED3);
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 64;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief This function provides accurate delay (in milliseconds) based
+ * on SysTick counter flag.
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @param Delay: specifies the delay time length, in milliseconds.
+ * @retval None
+ */
+void HAL_Delay(__IO uint32_t Delay)
+{
+ while (Delay)
+ {
+ if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+ {
+ Delay--;
+ }
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ BSP_LED_On(LED3);
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..720947c4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,205 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ * This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+static DMA_HandleTypeDef hdma_tx;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+/**
+ * @brief TIM MSP Initialization
+ * This function configures the hardware resources used in this example:
+ * - Peripheral's clock enable
+ * @param htim: TIM handle pointer
+ * @retval None
+ */
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
+{
+ /*##-1- Enable peripheral clock #################################*/
+ /* TIMx Peripheral clock enable */
+ TIMx_CLK_ENABLE();
+
+ /*##-2- Configure the NVIC for TIMx ########################################*/
+ /* Set the TIMx priority */
+ HAL_NVIC_SetPriority(TIMx_IRQn, 3, 0);
+
+ /* Enable the TIMx global Interrupt */
+ HAL_NVIC_EnableIRQ(TIMx_IRQn);
+}
+
+/**
+ * @brief UART MSP Initialization
+ * This function configures the hardware resources used in this example:
+ * - Peripheral's clock enable
+ * - Peripheral's GPIO Configuration
+ * - DMA configuration for transmission request by peripheral
+ * - NVIC configuration for DMA interrupt request enable
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspInit(UART_HandleTypeDef *huart)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /*##-1- Enable peripherals and GPIO Clocks #################################*/
+ /* Enable GPIO clock */
+ USARTx_TX_GPIO_CLK_ENABLE();
+ USARTx_RX_GPIO_CLK_ENABLE();
+
+ /* Enable USARTx clock */
+ USARTx_CLK_ENABLE();
+
+ /* Enable DMA clock */
+ DMAx_CLK_ENABLE();
+
+ /*##-2- Configure peripheral GPIO ##########################################*/
+ /* UART TX GPIO pin configuration */
+ GPIO_InitStruct.Pin = USARTx_TX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = USARTx_TX_AF;
+
+ HAL_GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStruct);
+
+ /* UART RX GPIO pin configuration */
+ GPIO_InitStruct.Pin = USARTx_RX_PIN;
+ GPIO_InitStruct.Alternate = USARTx_RX_AF;
+
+ HAL_GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStruct);
+
+ /*##-3- Configure the NVIC for UART ########################################*/
+ HAL_NVIC_SetPriority(USARTx_IRQn, 5, 0);
+ HAL_NVIC_EnableIRQ(USARTx_IRQn);
+
+ /*##-4- Configure the DMA ##################################################*/
+ /* Configure the DMA handler for Transmission process */
+ hdma_tx.Instance = USARTx_TX_DMA_CHANNEL;
+ hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_tx.Init.Mode = DMA_NORMAL;
+ hdma_tx.Init.Priority = DMA_PRIORITY_LOW;
+ hdma_tx.Init.Request = USARTx_TX_DMA_REQUEST;
+
+ HAL_DMA_Init(&hdma_tx);
+
+ /* Associate the initialized DMA handle to the UART handle */
+ __HAL_LINKDMA(huart, hdmatx, hdma_tx);
+
+ /*##-4- Configure the NVIC for DMA #########################################*/
+ /* NVIC configuration for DMA transfer complete interrupt (USARTx_TX) */
+ HAL_NVIC_SetPriority(USARTx_DMA_TX_IRQn, 6, 0);
+ HAL_NVIC_EnableIRQ(USARTx_DMA_TX_IRQn);
+}
+
+/**
+ * @brief UART MSP De-Initialization
+ * This function frees the hardware resources used in this example:
+ * - Disable the Peripheral's clock
+ * - Revert GPIO, DMA and NVIC configuration to their default state
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
+{
+
+ /*##-1- Reset peripherals ##################################################*/
+ USARTx_FORCE_RESET();
+ USARTx_RELEASE_RESET();
+
+ /*##-2- Disable peripherals and GPIO Clocks ################################*/
+ /* De-Initialize UART Tx as alternate function */
+ HAL_GPIO_DeInit(USARTx_TX_GPIO_PORT, USARTx_TX_PIN);
+ /* De-Initialize UART Rx as alternate function */
+ HAL_GPIO_DeInit(USARTx_RX_GPIO_PORT, USARTx_RX_PIN);
+
+ /*##-3- Disable the DMA Channels ###########################################*/
+ /* De-Initialize the DMA Channel associated to reception process */
+ HAL_DMA_DeInit(&hdma_tx);
+
+ /*##-4- Disable the NVIC for DMA ###########################################*/
+ HAL_NVIC_DisableIRQ(USARTx_DMA_TX_IRQn);
+ HAL_NVIC_DisableIRQ(USARTx_RX_IRQn);
+}
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..73f7a79ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,252 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+extern TIM_HandleTypeDef TimHandle;
+extern UART_HandleTypeDef UartHandle;
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles USB low priority interrupt remap.
+ */
+void USB_LP_IRQHandler(void)
+{
+ /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+ /* USER CODE END USB_LP_IRQn 0 */
+ HAL_PCD_IRQHandler(&hpcd_USB_FS);
+ /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+ /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/**
+ * @brief This function handles TIM interrupt request.
+ * @param None
+ * @retval None
+ */
+void TIMx_IRQHandler(void)
+{
+ HAL_TIM_IRQHandler(&TimHandle);
+}
+
+/**
+ * @brief This function handles DMA TX interrupt request.
+ * @param None
+ * @retval None
+ * @Note This function is redefined in "main.h" and related to DMA stream
+ * used for USART data reception
+ */
+void USARTx_DMA_TX_IRQHandler(void)
+{
+ HAL_DMA_IRQHandler(UartHandle.hdmatx);
+}
+
+/**
+ * @brief This function handles USART1 interrupt request.
+ * @param None
+ * @retval None
+ * @Note This function is redefined in "main.h" and related to DMA
+ * used for USART data transmission
+ */
+void USARTx_IRQHandler(void)
+{
+ HAL_UART_IRQHandler(&UartHandle);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd
new file mode 100644
index 000000000..bb4bb962f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ CDC_Standalone
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp
new file mode 100644
index 000000000..26c8ad088
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/CDC_Standalone.ewp
@@ -0,0 +1,1208 @@
+
+
+ 3
+
+ CDC_Standalone
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ CDC_Standalone/Exe
+
+
+ ObjPath
+ CDC_Standalone/Obj
+
+
+ ListPath
+ CDC_Standalone/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../USB_Device/App
+ $PROJ_DIR$/../USB_Device/Target
+ $PROJ_DIR$/../Core/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ CDC_Standalone.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ CDC_Standalone.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ Core
+
+ $PROJ_DIR$/../Core/Src/main.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+ USB_Device
+
+ App
+
+ $PROJ_DIR$/../USB_Device/App/usbd_desc.c
+
+
+ $PROJ_DIR$/../USB_Device/App/usbd_cdc_if.c
+
+
+ $PROJ_DIR$/../USB_Device/App/usb_device.c
+
+
+
+ Target
+
+ $PROJ_DIR$/../USB_Device/Target/usbd_conf.c
+
+
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ USB_Device_Library
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..b068189e8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\CDC_Standalone.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx
new file mode 100644
index 000000000..37a67468f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvoptx
@@ -0,0 +1,801 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ CDC_Standalone
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/Target
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/Target/usbd_conf.c
+ usbd_conf.c
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/App
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usbd_desc.c
+ usbd_desc.c
+ 0
+ 0
+
+
+ 4
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usbd_cdc_if.c
+ usbd_cdc_if.c
+ 0
+ 0
+
+
+ 4
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usb_device.c
+ usb_device.c
+ 0
+ 0
+
+
+
+
+ Application/User/Core
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 5
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 6
+ 9
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 7
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 7
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 8
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 9
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 9
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+ stm32g4xx_hal_uart.c
+ 0
+ 0
+
+
+ 9
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+ stm32g4xx_hal_uart_ex.c
+ 0
+ 0
+
+
+ 9
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 9
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 9
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 9
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 9
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 9
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+ stm32g4xx_hal_pcd.c
+ 0
+ 0
+
+
+ 9
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+ stm32g4xx_hal_pcd_ex.c
+ 0
+ 0
+
+
+ 9
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+ stm32g4xx_ll_usb.c
+ 0
+ 0
+
+
+ 9
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 9
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 9
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 9
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 9
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 9
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 10
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/USB_Device_Library
+ 0
+ 0
+ 0
+ 0
+
+ 11
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+ usbd_core.c
+ 0
+ 0
+
+
+ 11
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+ usbd_ctlreq.c
+ 0
+ 0
+
+
+ 11
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+ usbd_ioreq.c
+ 0
+ 0
+
+
+ 11
+ 43
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c
+ usbd_cdc.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx
new file mode 100644
index 000000000..8c4a96402
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/CDC_Standalone.uvprojx
@@ -0,0 +1,667 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ CDC_Standalone
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ CDC_Standalone\Exe\
+ CDC_Standalone
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User/USB_Device/Target
+
+
+ usbd_conf.c
+ 1
+ ../USB_Device/Target/usbd_conf.c
+
+
+
+
+ Application/User/USB_Device/App
+
+
+ usbd_desc.c
+ 1
+ ../USB_Device/App/usbd_desc.c
+
+
+ usbd_cdc_if.c
+ 1
+ ../USB_Device/App/usbd_cdc_if.c
+
+
+ usb_device.c
+ 1
+ ../USB_Device/App/usb_device.c
+
+
+
+
+ Application/User/Core
+
+
+ main.c
+ 1
+ ../Core/Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Core/Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_uart.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+
+
+ stm32g4xx_hal_uart_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_pcd.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ stm32g4xx_hal_pcd_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ stm32g4xx_ll_usb.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/USB_Device_Library
+
+
+ usbd_core.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ usbd_ctlreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ usbd_ioreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ usbd_cdc.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x1000
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x1000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..01067a7d0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..4be5aba2d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,256 @@
+
+
+ CDC_Standalone
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ CDC_Standalone.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/CDC_Standalone.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ Middlewares/USB_Device_Library/usbd_cdc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c
+
+
+ Middlewares/USB_Device_Library/usbd_core.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ Middlewares/USB_Device_Library/usbd_ctlreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ Middlewares/USB_Device_Library/usbd_ioreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ Application/User/USB_Device/App/usb_device.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c
+
+
+ Application/User/USB_Device/App/usbd_cdc_if.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_cdc_if.c
+
+
+ Application/User/USB_Device/App/usbd_desc.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c
+
+
+ Application/User/USB_Device/Target/usbd_conf.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Auto-generated by STM32CubeIDE
+ * @brief Linker script for STM32G474QETx Device from STM32G4 series
+ * 512Kbytes FLASH
+ * 128Kbytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000; /* required amount of heap */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..1e8b8015d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,139 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usb_device.c
+ * @author MCD Application Team
+ * @brief This file implements the USB Device
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_cdc.h"
+#include "usbd_cdc_if.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+__IO uint32_t remotewakeupon = 0;
+uint8_t HID_Buffer[4];
+extern PCD_HandleTypeDef hpcd_USB_FS;
+
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef CDC_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+/**
+ * @brief USB Clock Configuration
+ * @retval None
+ */
+void USBD_Clock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+ /* Enable HSI48 */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+ {
+ Error_Handler();
+ }
+ /*Configure the clock recovery system (CRS)**********************************/
+
+ /*Enable CRS Clock*/
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /* Default Synchro Signal division factor (not divided) */
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+ /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+ /* HSI48 is synchronized with USB SOF at 1KHz rate */
+ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+ RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+ /* Set the TRIM[5:0] to the default value */
+ RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+ /* Start automatic synchronization */
+ HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/**
+ * Init USB device Library, add supported class and start the library
+ * @retval None
+ */
+void MX_USB_Device_Init(void)
+{
+ /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+ /* USB Clock Initialization */
+ USBD_Clock_Config();
+ /* USER CODE END USB_Device_Init_PreTreatment */
+
+ /* Init Device Library, add supported class and start the library. */
+ if (USBD_Init(&hUsbDeviceFS, &CDC_Desc, DEVICE_FS) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+ /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..e566641d3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usb_device.h
+ * @author MCD Application Team
+ * @brief Header for usb_device.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+ * @brief Device file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
new file mode 100644
index 000000000..2b50db97c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
@@ -0,0 +1,605 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c
+ * @author MCD Application Team
+ * @brief This file implements the USB device descriptors.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc_if.h"
+
+/* USER CODE BEGIN INCLUDE */
+#include "main.h"
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @brief Usb device library.
+ * @{
+ */
+
+/** @addtogroup USBD_CDC_IF
+ * @{
+ */
+
+/** @defgroup USBD_CDC_IF_Private_TypesDefinitions USBD_CDC_IF_Private_TypesDefinitions
+ * @brief Private types.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Private_Defines USBD_CDC_IF_Private_Defines
+ * @brief Private defines.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Private_Macros USBD_CDC_IF_Private_Macros
+ * @brief Private macros.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Private_Variables USBD_CDC_IF_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+/* Create buffer for reception and transmission */
+/* It's up to user to redefine and/or remove those define */
+/** Received data over USB are stored in this buffer */
+uint8_t UserRxBufferFS[APP_RX_DATA_SIZE];
+
+/** Data to send over USB CDC are stored in this buffer */
+uint8_t UserTxBufferFS[APP_TX_DATA_SIZE];
+
+/* USER CODE BEGIN PRIVATE_VARIABLES */
+USBD_CDC_LineCodingTypeDef LineCoding =
+{
+ 115200, /* baud rate*/
+ 0x00, /* stop bits-1*/
+ 0x00, /* parity - none*/
+ 0x08 /* nb. of bits 8*/
+};
+uint32_t BuffLength;
+uint32_t UserTxBufPtrIn;/* Increment this pointer or roll it back to
+ start address when data are received over USART */
+uint32_t UserTxBufPtrOut; /* Increment this pointer or roll it back to
+ start address when data are sent over USB */
+
+__IO uint32_t uwPrescalerValue;
+/* USER CODE END PRIVATE_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+extern USBD_HandleTypeDef hUsbDeviceFS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+/* UART handler declaration */
+UART_HandleTypeDef UartHandle;
+/* TIM handler declaration */
+TIM_HandleTypeDef TimHandle;
+/* USB handler declaration */
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Private_FunctionPrototypes USBD_CDC_IF_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+static int8_t CDC_Init_FS(void);
+static int8_t CDC_DeInit_FS(void);
+static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length);
+static int8_t CDC_Receive_FS(uint8_t* pbuf, uint32_t *Len);
+static int8_t CDC_TransmitCplt_FS(uint8_t *pbuf, uint32_t *Len, uint8_t epnum);
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
+ void TIM_Config(void);
+ static void ComPort_Config(void);
+/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */
+
+/**
+ * @}
+ */
+
+USBD_CDC_ItfTypeDef USBD_Interface_fops_FS =
+{
+ CDC_Init_FS,
+ CDC_DeInit_FS,
+ CDC_Control_FS,
+ CDC_Receive_FS,
+ CDC_TransmitCplt_FS
+};
+
+/* Private functions ---------------------------------------------------------*/
+/**
+ * @brief Initializes the CDC media low layer over the FS USB IP
+ * @retval USBD_OK if all operations are OK else USBD_FAIL
+ */
+static int8_t CDC_Init_FS(void)
+{
+ /* USER CODE BEGIN 3 */
+ /*##-1- Configure the UART peripheral ######################################*/
+ /* Put the USART peripheral in the Asynchronous mode (UART Mode) */
+ /* USART configured as follow:
+ - Word Length = 8 Bits
+ - Stop Bit = One Stop bit
+ - Parity = No parity
+ - BaudRate = 115200 baud
+ - Hardware flow control disabled (RTS and CTS signals) */
+ UartHandle.Instance = USARTx;
+ UartHandle.Init.BaudRate = 115200;
+ UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+ UartHandle.Init.StopBits = UART_STOPBITS_1;
+ UartHandle.Init.Parity = UART_PARITY_NONE;
+ UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ UartHandle.Init.Mode = UART_MODE_TX_RX;
+
+ if(HAL_UART_Init(&UartHandle) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /*##-2- Put UART peripheral in IT reception process ########################*/
+ /* Any data received will be stored in "UserTxBufferFS" buffer */
+ if(HAL_UART_Receive_IT(&UartHandle, (uint8_t *)UserTxBufferFS, 1) != HAL_OK)
+ {
+ /* Transfer error in reception process */
+ Error_Handler();
+ }
+
+ /*##-3- Configure the TIM Base generation #################################*/
+ TIM_Config();
+
+ /*##-5- Set Application Buffers ############################################*/
+ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
+ USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
+
+ return (USBD_OK);
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief DeInitializes the CDC media low layer
+ * @retval USBD_OK if all operations are OK else USBD_FAIL
+ */
+static int8_t CDC_DeInit_FS(void)
+{
+ /* USER CODE BEGIN 4 */
+ /* DeInitialize the UART peripheral */
+ if(HAL_UART_DeInit(&UartHandle) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+ return (USBD_OK);
+ /* USER CODE END 4 */
+}
+
+/**
+ * @brief Manage the CDC class requests
+ * @param cmd: Command code
+ * @param pbuf: Buffer containing command data (request parameters)
+ * @param length: Number of data to be sent (in bytes)
+ * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
+{
+ /* USER CODE BEGIN 5 */
+ switch (cmd)
+ {
+ case CDC_SEND_ENCAPSULATED_COMMAND:
+ /* Add your code here */
+ break;
+
+ case CDC_GET_ENCAPSULATED_RESPONSE:
+ /* Add your code here */
+ break;
+
+ case CDC_SET_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case CDC_GET_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case CDC_CLEAR_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case CDC_SET_LINE_CODING:
+ LineCoding.bitrate = (uint32_t)(pbuf[0] | (pbuf[1] << 8) |\
+ (pbuf[2] << 16) | (pbuf[3] << 24));
+ LineCoding.format = pbuf[4];
+ LineCoding.paritytype = pbuf[5];
+ LineCoding.datatype = pbuf[6];
+
+ /* Set the new configuration */
+ ComPort_Config();
+ break;
+
+ case CDC_GET_LINE_CODING:
+ pbuf[0] = (uint8_t)(LineCoding.bitrate);
+ pbuf[1] = (uint8_t)(LineCoding.bitrate >> 8);
+ pbuf[2] = (uint8_t)(LineCoding.bitrate >> 16);
+ pbuf[3] = (uint8_t)(LineCoding.bitrate >> 24);
+ pbuf[4] = LineCoding.format;
+ pbuf[5] = LineCoding.paritytype;
+ pbuf[6] = LineCoding.datatype;
+ break;
+
+ case CDC_SET_CONTROL_LINE_STATE:
+ /* Add your code here */
+ break;
+
+ case CDC_SEND_BREAK:
+ /* Add your code here */
+ break;
+
+ default:
+ break;
+ }
+
+ return (USBD_OK);
+ /* USER CODE END 5 */
+}
+
+/**
+ * @brief Data received over USB OUT endpoint are sent over CDC interface
+ * through this function.
+ *
+ * @note
+ * This function will issue a NAK packet on any OUT packet received on
+ * USB endpoint until exiting this function. If you exit this function
+ * before transfer is complete on CDC interface (ie. using DMA controller)
+ * it will result in receiving more data while previous ones are still
+ * not sent.
+ *
+ * @param Buf: Buffer of data to be received
+ * @param Len: Number of data received (in bytes)
+ * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
+{
+ /* USER CODE BEGIN 6 */
+ HAL_UART_Transmit_DMA(&UartHandle, Buf, *Len);
+ return (USBD_OK);
+ /* USER CODE END 6 */
+}
+
+/**
+ * @brief CDC_Transmit_FS
+ * Data to send over USB IN endpoint are sent over CDC interface
+ * through this function.
+ * @note
+ *
+ *
+ * @param Buf: Buffer of data to be sent
+ * @param Len: Number of data to be sent (in bytes)
+ * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
+ */
+uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
+{
+ uint8_t result = USBD_OK;
+ /* USER CODE BEGIN 7 */
+ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
+ if (hcdc->TxState != 0){
+ return USBD_BUSY;
+ }
+ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
+ result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
+ /* USER CODE END 7 */
+ return result;
+}
+
+/**
+ * @brief CDC_TransmitCplt_FS
+ * Data transmitted callback
+ *
+ * @note
+ * This function is IN transfer complete callback used to inform user that
+ * the submitted Data is successfully sent over USB.
+ *
+ * @param Buf: Buffer of data to be received
+ * @param Len: Number of data received (in bytes)
+ * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static int8_t CDC_TransmitCplt_FS(uint8_t *Buf, uint32_t *Len, uint8_t epnum)
+{
+ uint8_t result = USBD_OK;
+ /* USER CODE BEGIN 13 */
+ UNUSED(Buf);
+ UNUSED(Len);
+ UNUSED(epnum);
+ /* USER CODE END 13 */
+ return result;
+}
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
+/**
+ * @brief Tx Transfer completed callback
+ * @param huart: UART handle
+ * @retval None
+ */
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
+{
+ /* Initiate next USB packet transfer once UART completes transfer (transmitting data over Tx line) */
+ USBD_CDC_ReceivePacket(&hUsbDeviceFS);
+}
+
+/**
+ * @brief ComPort_Config
+ * Configure the COM Port with the parameters received from host.
+ * @param None.
+ * @retval None.
+ * @note When a configuration is not supported, a default value is used.
+ */
+static void ComPort_Config(void)
+{
+ if(HAL_UART_DeInit(&UartHandle) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* set the Stop bit */
+ switch (LineCoding.format)
+ {
+ case 0:
+ UartHandle.Init.StopBits = UART_STOPBITS_1;
+ break;
+ case 2:
+ UartHandle.Init.StopBits = UART_STOPBITS_2;
+ break;
+ default :
+ UartHandle.Init.StopBits = UART_STOPBITS_1;
+ break;
+ }
+
+ /* set the parity bit*/
+ switch (LineCoding.paritytype)
+ {
+ case 0:
+ UartHandle.Init.Parity = UART_PARITY_NONE;
+ break;
+ case 1:
+ UartHandle.Init.Parity = UART_PARITY_ODD;
+ break;
+ case 2:
+ UartHandle.Init.Parity = UART_PARITY_EVEN;
+ break;
+ default :
+ UartHandle.Init.Parity = UART_PARITY_NONE;
+ break;
+ }
+
+ /*set the data type : only 8bits and 9bits is supported */
+ switch (LineCoding.datatype)
+ {
+ case 0x07:
+ /* With this configuration a parity (Even or Odd) must be set */
+ UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+ break;
+ case 0x08:
+ if(UartHandle.Init.Parity == UART_PARITY_NONE)
+ {
+ UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+ }
+ else
+ {
+ UartHandle.Init.WordLength = UART_WORDLENGTH_9B;
+ }
+
+ break;
+ default :
+ UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+ break;
+ }
+
+ UartHandle.Init.BaudRate = LineCoding.bitrate;
+ UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ UartHandle.Init.Mode = UART_MODE_TX_RX;
+ UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
+
+ if(HAL_UART_Init(&UartHandle) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /* Start reception: provide the buffer pointer with offset and the buffer size */
+ HAL_UART_Receive_IT(&UartHandle, (uint8_t *)(UserTxBufferFS + UserTxBufPtrIn), 1);
+}
+
+/**
+ * @brief TIM_Config: Configure TIMx timer
+ * @param None.
+ * @retval None.
+ */
+ void TIM_Config(void)
+{
+ /*##-1- Configure the TIM peripheral #######################################*/
+ /* -----------------------------------------------------------------------
+ In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1),
+ since APB1 prescaler is equal to 1.
+ TIM2CLK = PCLK1
+ PCLK1 = HCLK
+ => TIM2CLK = HCLK = SystemCoreClock
+ To get TIM2 counter clock at 10 KHz, the Prescaler is computed as following:
+ Prescaler = (TIM2CLK / TIM2 counter clock) - 1
+ Prescaler = (SystemCoreClock /10 KHz) - 1
+
+ Note:
+ SystemCoreClock variable holds HCLK frequency and is defined in system_stm32g4xx.c file.
+ Each time the core clock (HCLK) changes, user had to update SystemCoreClock
+ variable value. Otherwise, any configuration based on this variable will be incorrect.
+ This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ ----------------------------------------------------------------------- */
+
+ /* Compute the prescaler value to have TIMx counter clock equal to 10000 Hz */
+ uwPrescalerValue = (uint32_t)(SystemCoreClock / 10000U) - 1U;
+
+ /* Set TIMx instance */
+ TimHandle.Instance = TIMx;
+
+ /* Initialize TIMx peripheral as follows:
+ + Period = 10000 - 1
+ + Prescaler = (SystemCoreClock/10000) - 1
+ + ClockDivision = 0
+ + Counter direction = Up
+ */
+ TimHandle.Init.Period = 10000 - 1;
+ TimHandle.Init.Prescaler = uwPrescalerValue;
+ TimHandle.Init.ClockDivision = 0;
+ TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
+ TimHandle.Init.RepetitionCounter = 0;
+ TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+
+ if (HAL_TIM_Base_Init(&TimHandle) != HAL_OK)
+ {
+ /* Initialization Error */
+ Error_Handler();
+ }
+
+ /*##-2- Start the TIM Base generation in interrupt mode ####################*/
+ /* Start Channel1 */
+ if (HAL_TIM_Base_Start_IT(&TimHandle) != HAL_OK)
+ {
+ /* Starting Error */
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief UART error callbacks
+ * @param UartHandle: UART handle
+ * @retval None
+ */
+void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle)
+{
+ /* Transfer error occurred in reception and/or transmission process */
+ Error_Handler();
+}
+
+/**
+ * @brief TIM period elapsed callback
+ * @param htim: TIM handle
+ * @retval None
+ */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ uint32_t buffptr;
+ uint32_t buffsize;
+
+ if(UserTxBufPtrOut != UserTxBufPtrIn)
+ {
+ if(UserTxBufPtrOut > UserTxBufPtrIn) /* Rollback */
+ {
+ buffsize = APP_RX_DATA_SIZE - UserTxBufPtrOut;
+ }
+ else
+ {
+ buffsize = UserTxBufPtrIn - UserTxBufPtrOut;
+ }
+
+ buffptr = UserTxBufPtrOut;
+
+ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, (uint8_t*)&UserTxBufferFS[buffptr], buffsize);
+
+ if(USBD_CDC_TransmitPacket(&hUsbDeviceFS) == USBD_OK)
+ {
+ UserTxBufPtrOut += buffsize;
+ if (UserTxBufPtrOut == APP_RX_DATA_SIZE)
+ {
+ UserTxBufPtrOut = 0;
+ }
+ }
+ }
+}
+/**
+ * @brief Rx Transfer completed callback
+ * @param huart: UART handle
+ * @retval None
+ */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+ /* Increment Index for buffer writing */
+ UserTxBufPtrIn++;
+
+ /* To avoid buffer overflow */
+ if(UserTxBufPtrIn == APP_RX_DATA_SIZE)
+ {
+ UserTxBufPtrIn = 0;
+ }
+
+ /* Start another reception: provide the buffer pointer with offset and the buffer size */
+ HAL_UART_Receive_IT(huart, (uint8_t *)(UserTxBufferFS + UserTxBufPtrIn), 1);
+
+
+}
+/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
new file mode 100644
index 000000000..c6dcd7a78
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h
+ * @author MCD Application Team
+ * @brief Header for usbd_cdc_if.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CDC_IF_H__
+#define __USBD_CDC_IF_H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @brief For Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_CDC_IF USBD_CDC_IF
+ * @brief Usb VCP device module
+ * @{
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_Defines USBD_CDC_IF_Exported_Defines
+ * @brief Defines.
+ * @{
+ */
+/* Define size for the receive and transmit buffer over CDC */
+#define APP_RX_DATA_SIZE 2048
+#define APP_TX_DATA_SIZE 2048
+/* USER CODE BEGIN EXPORTED_DEFINES */
+#define USARTx USART1
+#define USARTx_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+#define DMAx_CLK_ENABLE() do { \
+ __HAL_RCC_DMA1_CLK_ENABLE(); \
+ __HAL_RCC_DMAMUX1_CLK_ENABLE(); \
+ }while(0)
+#define USARTx_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#define USARTx_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+
+#define USARTx_FORCE_RESET() __HAL_RCC_USART1_FORCE_RESET()
+#define USARTx_RELEASE_RESET() __HAL_RCC_USART1_RELEASE_RESET()
+
+/* Definition for USARTx Pins */
+#define USARTx_TX_PIN GPIO_PIN_9
+#define USARTx_TX_GPIO_PORT GPIOA
+#define USARTx_TX_AF GPIO_AF7_USART1
+#define USARTx_RX_PIN GPIO_PIN_10
+#define USARTx_RX_GPIO_PORT GPIOA
+#define USARTx_RX_AF GPIO_AF7_USART1
+
+/* Definition for USARTx's DMA */
+#define USARTx_TX_DMA_CHANNEL DMA1_Channel1
+#define USARTx_RX_DMA_CHANNEL DMA1_Channel2
+
+/* Definition for USARTx's DMA Request */
+#define USARTx_TX_DMA_REQUEST DMA_REQUEST_USART1_TX
+
+/* Definition for USARTx's NVIC */
+#define USARTx_DMA_TX_IRQn DMA1_Channel1_IRQn
+#define USARTx_RX_IRQn DMA1_Channel2_IRQn
+#define USARTx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler
+#define USARTx_RX_IRQHandler DMA1_Channel2_IRQHandler
+
+/* Definition for USARTx's NVIC */
+#define USARTx_IRQn USART1_IRQn
+#define USARTx_IRQHandler USART1_IRQHandler
+
+/* Size of Reception buffer */
+#define RXBUFFERSIZE 10
+
+/* Definition for TIMx clock resources */
+#define TIMx TIM2
+#define TIMx_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
+#define TIMx_FORCE_RESET() __HAL_RCC_TIM2_FORCE_RESET()
+#define TIMx_RELEASE_RESET() __HAL_RCC_TIM2_RELEASE_RESET()
+
+/* Definition for TIMx's NVIC */
+#define TIMx_IRQn TIM2_IRQn
+#define TIMx_IRQHandler TIM2_IRQHandler
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_Types USBD_CDC_IF_Exported_Types
+ * @brief Types.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_Macros USBD_CDC_IF_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/** CDC Interface callback. */
+extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype USBD_CDC_IF_Exported_FunctionsPrototype
+ * @brief Public functions declaration.
+ * @{
+ */
+
+uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len);
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CDC_IF_H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..539c83a43
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,396 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.c
+ * @author MCD Application Team
+ * @brief This file implements the USB device descriptors.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @addtogroup USBD_DESC
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+ * @brief Private types.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+ * @brief Private defines.
+ * @{
+ */
+
+#define USBD_VID 0x483
+#define USBD_LANGID_STRING 1033
+#define USBD_MANUFACTURER_STRING "STMicroelectronics"
+#define USBD_PID 0x5740
+#define USBD_PRODUCT_STRING "STM32 Virtual ComPort in FS Mode"
+#define USBD_CONFIGURATION_STRING "CDC Config"
+#define USBD_INTERFACE_STRING "CDC Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+ * @}
+ */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+ * @brief Private macros.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+uint8_t * USBD_CDC_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_CDC_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+USBD_DescriptorsTypeDef CDC_Desc =
+{
+ USBD_CDC_DeviceDescriptor,
+ USBD_CDC_LangIDStrDescriptor,
+ USBD_CDC_ManufacturerStrDescriptor,
+ USBD_CDC_ProductStrDescriptor,
+ USBD_CDC_SerialStrDescriptor,
+ USBD_CDC_ConfigStrDescriptor,
+ USBD_CDC_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_CDC_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+ 0x12, /*bLength */
+ USB_DESC_TYPE_DEVICE, /*bDescriptorType*/
+ 0x00, /*bcdUSB */
+ 0x02,
+ 0x02, /*bDeviceClass*/
+ 0x02, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idProduct*/
+ HIBYTE(USBD_PID), /*idProduct*/
+ 0x00, /*bcdDevice rel. 2.00*/
+ 0x02,
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+ USB_LEN_LANGID_STR_DESC,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+ USB_SIZ_STRING_SERIAL,
+ USB_DESC_TYPE_STRING,
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+ * @brief Private functions.
+ * @{
+ */
+
+/**
+ * @brief Return the device descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_CDC_DeviceDesc);
+ return USBD_CDC_DeviceDesc;
+}
+
+/**
+ * @brief Return the LangID string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+/**
+ * @brief Return the product string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the manufacturer string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the serial number string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = USB_SIZ_STRING_SERIAL;
+
+ /* Update the serial number string descriptor with the data from the unique
+ * ID */
+ Get_SerialNum();
+
+ /* USER CODE BEGIN USBD_CDC_SerialStrDescriptor */
+
+ /* USER CODE END USBD_CDC_SerialStrDescriptor */
+
+ return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+ * @brief Return the configuration string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == USBD_SPEED_HIGH)
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the interface string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_CDC_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Create the serial number string descriptor
+ * @param None
+ * @retval None
+ */
+static void Get_SerialNum(void)
+{
+ uint32_t deviceserial0;
+ uint32_t deviceserial1;
+ uint32_t deviceserial2;
+
+ deviceserial0 = *(uint32_t *) DEVICE_ID1;
+ deviceserial1 = *(uint32_t *) DEVICE_ID2;
+ deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+ deviceserial0 += deviceserial2;
+
+ if (deviceserial0 != 0)
+ {
+ IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+ IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+ }
+}
+
+/**
+ * @brief Convert Hex 32Bits value into char
+ * @param value: value to convert
+ * @param pbuf: pointer to the buffer
+ * @param len: buffer length
+ * @retval None
+ */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+ uint8_t idx = 0;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ if (((value >> 28)) < 0xA)
+ {
+ pbuf[2 * idx] = (value >> 28) + '0';
+ }
+ else
+ {
+ pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+ }
+
+ value = value << 4;
+
+ pbuf[2 * idx + 1] = 0;
+ }
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..dc47aadc3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h
+ * @author MCD Application Team
+ * @brief Header for usbd_desc.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_DESC USBD_DESC
+ * @brief Usb device descriptors module.
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+ * @brief Constants.
+ * @{
+ */
+#define DEVICE_ID1 (UID_BASE)
+#define DEVICE_ID2 (UID_BASE + 0x4)
+#define DEVICE_ID3 (UID_BASE + 0x8)
+
+#define USB_SIZ_STRING_SERIAL 0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+ * @brief Defines.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+ * @brief Types.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+extern USBD_DescriptorsTypeDef CDC_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+ * @brief Public functions declaration.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..dbea6a163
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,747 @@
+/* USER CODE BEGIN Header */
+/**
+******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c
+ * @author MCD Application Team
+ * @brief This file implements the board support package for the USB device library
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_cdc.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+static void SystemClockConfig_Resume(void);
+extern void USBD_Clock_Config(void);
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+ LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspInit 0 */
+
+ /* USER CODE END USB_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USB_CLK_ENABLE();
+
+ /* Peripheral interrupt init */
+ HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+ HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+ /* USER CODE BEGIN USB_MspInit 1 */
+
+ /* USER CODE END USB_MspInit 1 */
+ }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspDeInit 0 */
+
+ /* USER CODE END USB_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USB_CLK_DISABLE();
+
+ /* Peripheral interrupt Deinit*/
+ HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+ /* USER CODE BEGIN USB_MspDeInit 1 */
+ __HAL_RCC_GPIOA_CLK_DISABLE();
+ /* USER CODE END USB_MspDeInit 1 */
+ }
+}
+
+/**
+ * @brief Setup stage callback
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PreTreatment */
+ USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data Out stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+ USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data In stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+ USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+ * @brief SOF callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+ USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+ * @brief Reset callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+ USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+ if ( hpcd->Init.speed != PCD_SPEED_FULL)
+ {
+ Error_Handler();
+ }
+ /* Set Speed. */
+ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+ /* Reset Device. */
+ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+ * @brief Suspend callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+ /* Inform USB library that core enters in suspend Mode. */
+ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+ /* Enter in STOP mode. */
+ /* USER CODE BEGIN 2 */
+ if (hpcd->Init.low_power_enable)
+ {
+ /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
+ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+ }
+ /* USER CODE END 2 */
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+ * @brief Resume callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE BEGIN 3 */
+ if (hpcd->Init.low_power_enable)
+ {
+ /* Reset SLEEPDEEP bit of Cortex System Control Register. */
+ SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+ SystemClockConfig_Resume();
+ }
+ /* USER CODE END 3 */
+
+ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOOUTIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+ USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOINIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+ USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief Connect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+ USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+ * @brief Disconnect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+ USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+ /* USER CODE BEGIN LowLevelInterface */
+
+ /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+ LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+ * @brief Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+ /* Init USB Ip. */
+ hpcd_USB_FS.pData = pdev;
+ /* Link the driver to the stack. */
+ pdev->pData = &hpcd_USB_FS;
+
+ hpcd_USB_FS.Instance = USB;
+ hpcd_USB_FS.Init.dev_endpoints = 8;
+ hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+ hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+ hpcd_USB_FS.Init.Sof_enable = DISABLE;
+ hpcd_USB_FS.Init.low_power_enable = DISABLE;
+ hpcd_USB_FS.Init.lpm_enable = DISABLE;
+ hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* register Msp Callbacks (before the Init) */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+ #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+ if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+ {
+ Error_Handler( );
+ }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* Register USB PCD CallBacks */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+ /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+ /* USER CODE END RegisterCallBackFirstPart */
+ HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+ HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+ HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+ HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+ /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+ /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ /* USER CODE BEGIN EndPoint_Configuration */
+ HAL_PCDEx_PMAConfig(&hpcd_USB_FS, 0x00 , PCD_SNG_BUF, 0x14);
+ HAL_PCDEx_PMAConfig(&hpcd_USB_FS, 0x80 , PCD_SNG_BUF, 0x54);
+ /* USER CODE END EndPoint_Configuration */
+ /* USER CODE BEGIN EndPoint_Configuration_CDC */
+ HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_IN_EP, PCD_SNG_BUF, 0x94);
+ HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_OUT_EP, PCD_SNG_BUF, 0xD4);
+ HAL_PCDEx_PMAConfig(&hpcd_USB_FS, CDC_CMD_EP, PCD_SNG_BUF, 0x114);
+ /* USER CODE END EndPoint_Configuration_CDC */
+ return USBD_OK;
+}
+
+/**
+ * @brief De-Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_DeInit(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Starts the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Start(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Stops the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Stop(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Opens an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param ep_type: Endpoint type
+ * @param ep_mps: Endpoint max packet size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Closes an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Flushes an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Sets a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Clears a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns Stall condition.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Stall (1: Yes, 0: No)
+ */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+ if((ep_addr & 0x80) == 0x80)
+ {
+ return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+ }
+ else
+ {
+ return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+ }
+}
+
+/**
+ * @brief Assigns a USB address to the device.
+ * @param pdev: Device handle
+ * @param dev_addr: Device address
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Transmits data over an endpoint.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be sent
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Prepares an endpoint for reception.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be received
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns the last transferred packet size.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Received Data Size
+ */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+ * @brief Delays routine for the USB Device Library.
+ * @param Delay: Delay in ms
+ * @retval None
+ */
+void USBD_LL_Delay(uint32_t Delay)
+{
+ HAL_Delay(Delay);
+}
+
+/**
+ * @brief Static single allocation.
+ * @param size: Size of allocated memory
+ * @retval None
+ */
+void *USBD_static_malloc(uint32_t size)
+{
+ static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+ return mem;
+}
+
+/**
+ * @brief Dummy memory free
+ * @param p: Pointer to allocated memory address
+ * @retval None
+ */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+/**
+ * @brief Configures system clock after wake-up from USB resume callBack:
+ * enable HSI, PLL and select PLL as system clock source.
+ * @retval None
+ */
+void SystemClockConfig_Resume(void)
+{
+ SystemClock_Config();
+ USBD_Clock_Config();
+}
+/* USER CODE END 5 */
+
+/**
+ * @brief Returns the USB status depending on the HAL status:
+ * @param hal_status: HAL status
+ * @retval USB status
+ */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ switch (hal_status)
+ {
+ case HAL_OK :
+ usb_status = USBD_OK;
+ break;
+ case HAL_ERROR :
+ usb_status = USBD_FAIL;
+ break;
+ case HAL_BUSY :
+ usb_status = USBD_BUSY;
+ break;
+ case HAL_TIMEOUT :
+ usb_status = USBD_FAIL;
+ break;
+ default :
+ usb_status = USBD_FAIL;
+ break;
+ }
+ return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..6d8b25b3e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,175 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h
+ * @author MCD Application Team
+ * @brief Header for usbd_conf.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+#include
+#include
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @brief Driver for Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_CONF USBD_CONF
+ * @brief Configuration file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+ * @brief Defines for configuration of the Usb device.
+ * @{
+ */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES 1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION 1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ 100U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL 0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED 0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED 1U
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 0
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy memcpy
+
+/** Alias for delay. */
+#define USBD_Delay HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...) printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...) printf("ERROR: ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...) printf("DEBUG : ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+ * @brief Types.
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt
new file mode 100644
index 000000000..ed97cbd8e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/CDC_Standalone/readme.txt
@@ -0,0 +1,157 @@
+/**
+ @page CDC_Standalone USB Device Communication (CDC) application
+
+ @verbatim
+ ******************************************************************************
+ * @file USB_Device/CDC_Standalone/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the USB Device CDC application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+This application describes how to use USB device application based on the Device
+Communication Class (CDC) following the PSTN sub-protocol on the STM32G4xx devices.
+
+This example is part of the USB Device Library package using STM32Cube firmware.
+
+This is a typical application on how to use the STM32G4xx USB Device peripheral where the STM32 MCU
+behaves as a USB-to-UART bridge following the Virtual COM Port (VCP) implementation.
+ - On one side, the STM32 exchanges data with a PC host through USB interface in Device mode.
+ - On the other side, the STM32 exchanges data with other devices (same host, other host,
+ other devices).
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick. The user is
+provided with the SystemClock_Config()function to configure the clock (SYSCLK).
+
+When the VCP application is started, the STM32 MCU is enumerated as serial communication port and is
+configured in the same way (baudrate, data format, parity, stop bit) as it would configure a standard
+COM port. The 7-bit data length with no parity control is NOT supported.
+
+During enumeration phase, three communication pipes "endpoints" are declared in the CDC class
+implementation (PSTN sub-class):
+ - 1 x Bulk IN endpoint for receiving data from STM32 device to PC host:
+ When data are received over UART they are saved in the buffer "UserTxBufferFS". Periodically, in a
+ timer callback the state of the buffer "UserTxBufferFS" is checked. If there are available data, they
+ are transmitted in response to IN token otherwise it is NAKed.
+
+ - 1 x Bulk OUT endpoint for transmitting data from PC host to STM32 device:
+ When data are received through this endpoint they are saved in the buffer "UserRxBufferFS" then they
+ are transmitted over UART using DMA mode and in meanwhile the OUT endpoint is NAKed.
+ Once the transmission is over, the OUT endpoint is prepared to receive next packet in
+ HAL_UART_TxCpltCallback().
+
+ - 1 x Interrupt IN endpoint for setting and getting serial-port parameters:
+ When control setup is received, the corresponding request is executed in CDC_Control_FS().
+ In this application, two requests are implemented:
+ - Set line: Set the bit rate, number of Stop bits, parity, and number of data bits
+ - Get line: Get the bit rate, number of Stop bits, parity, and number of data bits
+ The other requests (send break, control line state) are not implemented.
+
+@note Receiving data over UART is handled by interrupt while transmitting is handled by DMA allowing
+ hence the application to receive data at the same time it is transmitting another data (full-
+ duplex feature).
+
+The support of the VCP interface is managed through the ST Virtual COM Port driver available for
+download from www.st.com.
+
+@note The user has to check the list of the COM ports in Device Manager to find out the number of the
+ COM ports that have been assigned (by OS) to the VCP interface.
+
+This application uses UART as a communication interface. The UART instance and associated resources
+(GPIO, NVIC) can be tailored in "usbd_cdc_if.h" header file according to your hardware
+configuration. Moreover, this application can be customized to communicate with interfaces other than UART.
+For that purpose a template CDC interface is provided in:
+Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src directory.
+
+To run this application, the user can use one of the following configuration:
+
+ - Configuration 1:
+ Connect USB cable to host and UART (RS232) to a different host (PC or other device) or to same host.
+ In this case, you can open two hyperterminals to send/receive data to/from host to/from device.
+
+ - Configuration 2:
+ Connect USB cable to Host and connect UART TX pin to UART RX pin on the STM32G474E-EVAL1 Rev B board
+ (Loopback mode). In this case, you can open one terminal (relative to USB com port)
+ and all data sent from this terminal will be received by the same terminal in loopback mode.
+ This mode is useful for test and performance measurements.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+For more details about the STM32Cube USB Device library, please refer to UM1734
+"STM32Cube USB Device library".
+
+@par Keywords
+
+Connectivity, USB_Device, USB, CDC, Virtual COM Port
+
+@par Directory contents
+
+ - USB_Device/CDC_Standalone/Core/Src/main.c Main program
+ - USB_Device/CDC_Standalone/Core/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - USB_Device/CDC_Standalone/Core/Src/stm32g4xx_it.c Interrupt handlers
+ - USB_Device/CDC_Standalone/Core/Src/stm32g4xx_hal_msp.c HAL MSP Module
+ - USB_Device/CDC_Standalone/USB_Device/App/usb_device.c USB Device application code
+ - USB_Device/CDC_Standalone/USB_Device/App/usb_desc.c USB device descriptor
+ - USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.c CDC interface
+ - USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.c General low level driver configuration
+ - USB_Device/CDC_Standalone/Core/Inc/main.h Main program header file
+ - USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - USB_Device/CDC_Standalone/Core/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - USB_Device/CDC_Standalone/USB_Device/App/usb_device.h USB Device application header file
+ - USB_Device/CDC_Standalone/USB_Device/App/usbd_desc.h USB device descriptor header file
+ - USB_Device/CDC_Standalone/USB_Device/App/usbd_cdc_if.h CDC interface header file
+ - USB_Device/CDC_Standalone/USB_Device/Target/usbd_conf.h USB device driver Configuration file
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G4xx devices.
+
+ - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+ board and can be easily tailored to any other supported device and development board.
+
+ - STM32G474E-EVAL1 Rev B Set-up
+ - Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+ - For loopback mode test: connect directly USART1 TX and RX pins,
+ The USART1 interface available on PA9 and PA10 of the microcontroller can be
+ connected to ST-LINK MCU. The choice can be changed by setting the related jumpers.
+ By default the USART1 communication between the target MCU and ST-LINK MCU is enabled.
+
+ - Hyperterminal configuration:
+ - BaudRate = 115200 baud
+ - Word Length = 8 Bits
+ - Stop Bit = 1
+ - Parity = None
+ - Flow control = None
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the application
+ - Install the USB virtual COM port driver
+ - Find out the number of the COM port assigned to the STM32 CDC device
+ - Open a serial terminal application and start the communication
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings
new file mode 100644
index 000000000..c853a54c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usbd_dfu_flash.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu
new file mode 100644
index 000000000..94bd816e9
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/STM32G474E-EVAL_LED_Toggle_@0x0800C000.dfu differ
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt
new file mode 100644
index 000000000..96eb2f742
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Binary/readme.txt
@@ -0,0 +1,45 @@
+/**
+ @page Binary Description of the binary template
+
+ @verbatim
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Binary/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the USB DFU application binary file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+This directory contains a binary template (in DFU format) to be loaded into Flash memory using Device
+Firmware Upgrade application.
+
+This file was converted to the DFU format using the "DFU File Manager Tool" included in the "DfuSe" PC software install.
+For more details on how to convert a .bin file to DFU format please refer to the UM0412 user manual
+"Getting started with DfuSe USB device firmware upgrade STMicroelectronics extension" available from the
+STMicroelectronics microcontroller website www.st.com.
+
+This binary is a simple LED toggling.
+The system Timer (Systick) is used to generate the delay.
+The offset address of this binary is 0x0800C000 which matches the definition in DFU application
+"USBD_DFU_APP_DEFAULT_ADD".
+
+
+@par Hardware and Software environment
+
+ - This example runs on stm32g4xx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..00a87ac7c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/main.h
@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_conf.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_dfu.h"
+#include "usbd_dfu_flash.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define BUTTON_KEY BUTTON_USER
+#define BUTTON_KEY_PIN USER_BUTTON_PIN
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..afd401747
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..9cc21a503
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..defa68d8c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/main.c
@@ -0,0 +1,240 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Src/main.c
+ * @author MCD Application Team
+ * @brief USB device DFU demo main file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ pFunction JumpToApplication;
+ uint32_t JumpAddress;
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* Configure User push-button */
+ BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_GPIO);
+
+ /* Check if the User push-button is pressed */
+ if (BSP_PB_GetState(BUTTON_KEY) != GPIO_PIN_RESET)
+ {
+ /* Test if user code is programmed starting from address 0x0800C000 */
+ if (((*(__IO uint32_t *) USBD_DFU_APP_DEFAULT_ADD) & 0x2FFC0000) ==
+ 0x20000000)
+ {
+ /* Jump to user application */
+ JumpAddress = *(__IO uint32_t *) (USBD_DFU_APP_DEFAULT_ADD + 4);
+ JumpToApplication = (pFunction) JumpAddress;
+
+ /* Initialize user application's Stack Pointer */
+ __set_MSP(*(__IO uint32_t *) USBD_DFU_APP_DEFAULT_ADD);
+ JumpToApplication();
+ }
+ }
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_USB_Device_Init();
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 64;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief This function provides accurate delay (in milliseconds) based
+ * on SysTick counter flag.
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @param Delay: specifies the delay time length, in milliseconds.
+ * @retval None
+ */
+void HAL_Delay(__IO uint32_t Delay)
+{
+ while (Delay)
+ {
+ if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+ {
+ Delay--;
+ }
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..afd77d1fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,88 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ * This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..76291b444
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,222 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles USB low priority interrupt remap.
+ */
+void USB_LP_IRQHandler(void)
+{
+ /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+ /* USER CODE END USB_LP_IRQn 0 */
+ HAL_PCD_IRQHandler(&hpcd_USB_FS);
+ /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+ /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_KEY_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc
new file mode 100644
index 000000000..affa84dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/DFU_Standalone.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:false\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=DFU_Standalone.ioc
+ProjectManager.ProjectName=DFU_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=DISABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.CLASS_NAME_FS=DFU
+USB_DEVICE.CONFIGURATION_STRING_DFU_FS=DFU Config
+USB_DEVICE.INTERFACE_STRING_DFU_FS=DFU Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,USBD_MAX_NUM_CONFIGURATION,USBD_DFU_MAX_ITF_NUM,USBD_DFU_XFER_SIZE,USBD_DFU_MEDIA,PRODUCT_STRING_DFU_FS,PID_DFU_FS,USBD_DFU_APP_DEFAULT_ADD,USBD_LPM_ENABLED,USBD_SUPPORT_USER_STRING_DESC,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,CONFIGURATION_STRING_DFU_FS,INTERFACE_STRING_DFU_FS
+USB_DEVICE.IPParametersWithoutCheck=USBD_DFU_XFER_SIZE,USBD_MAX_NUM_CONFIGURATION,USBD_DFU_APP_DEFAULT_ADD,USBD_DFU_MAX_ITF_NUM,USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_DFU_FS=0xdf11
+USB_DEVICE.PRODUCT_STRING_DFU_FS=DFU in FS Mode
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_DFU_APP_DEFAULT_ADD=0x0800C000
+USB_DEVICE.USBD_DFU_MAX_ITF_NUM=1
+USB_DEVICE.USBD_DFU_MEDIA=@Internal Flash /0x08000000/8*02Ka,248*02Kg
+USB_DEVICE.USBD_DFU_XFER_SIZE=1024
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=48
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.USBD_SUPPORT_USER_STRING_DESC=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Dfu
+USB_DEVICE.VirtualModeFS=Dfu_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS.Mode=DFU_FS
+VP_USB_DEVICE_VS_USB_DEVICE_DFU_FS.Signal=USB_DEVICE_VS_USB_DEVICE_DFU_FS
+board=STM32G474E_EVAL1
+ProjectManager.Example=DFU_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd
new file mode 100644
index 000000000..4929930d5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ DFU_Standalone
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp
new file mode 100644
index 000000000..e4efe03a3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/DFU_Standalone.ewp
@@ -0,0 +1,1202 @@
+
+
+ 3
+
+ DFU_Standalone
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ DFU_Standalone/Exe
+
+
+ ObjPath
+ DFU_Standalone/Obj
+
+
+ ListPath
+ DFU_Standalone/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../USB_Device/App
+ $PROJ_DIR$/../USB_Device/Target
+ $PROJ_DIR$/../Core/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Inc
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ DFU_Standalone.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ DFU_Standalone.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ Core
+
+ $PROJ_DIR$/../Core/Src/main.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+ USB_Device
+
+ App
+
+ $PROJ_DIR$/../USB_Device/App/usbd_desc.c
+
+
+ $PROJ_DIR$/../USB_Device/App/usbd_dfu_flash.c
+
+
+ $PROJ_DIR$/../USB_Device/App/usb_device.c
+
+
+
+ Target
+
+ $PROJ_DIR$/../USB_Device/Target/usbd_conf.c
+
+
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ USB_Device_Library
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..f7034771e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\DFU_Standalone.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx
new file mode 100644
index 000000000..3ed104527
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvoptx
@@ -0,0 +1,789 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ DFU_Standalone
+ 0x4
+ ARM-ADS
+
+ 150000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U005200303137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/User/Core
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/App
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usbd_desc.c
+ usbd_desc.c
+ 0
+ 0
+
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usbd_dfu_flash.c
+ usbd_dfu_flash.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usb_device.c
+ usb_device.c
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/Target
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/Target/usbd_conf.c
+ usbd_conf.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 6
+ 9
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 7
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 8
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 8
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 9
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 9
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 9
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 9
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 9
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+ stm32g4xx_hal_pcd.c
+ 0
+ 0
+
+
+ 9
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+ stm32g4xx_hal_pcd_ex.c
+ 0
+ 0
+
+
+ 9
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+ stm32g4xx_ll_usb.c
+ 0
+ 0
+
+
+ 9
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 9
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 9
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 9
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 9
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 9
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 9
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 9
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 9
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 9
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+ stm32g4xx_ll_pwr.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 10
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/USB_Device_Library
+ 0
+ 0
+ 0
+ 0
+
+ 11
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+ usbd_core.c
+ 0
+ 0
+
+
+ 11
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+ usbd_ctlreq.c
+ 0
+ 0
+
+
+ 11
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+ usbd_ioreq.c
+ 0
+ 0
+
+
+ 11
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c
+ usbd_dfu.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx
new file mode 100644
index 000000000..f46244aed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/DFU_Standalone.uvprojx
@@ -0,0 +1,662 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ DFU_Standalone
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ DFU_Standalone\
+ DFU_Standalone
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx
+
+ ../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ ::CMSIS
+
+
+ Application/User/Core
+
+
+ main.c
+ 1
+ ../Core/Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Core/Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Application/User/USB_Device/App
+
+
+ usbd_desc.c
+ 1
+ ../USB_Device/App/usbd_desc.c
+
+
+ usbd_dfu_flash.c
+ 1
+ ../USB_Device/App/usbd_dfu_flash.c
+
+
+ usb_device.c
+ 1
+ ../USB_Device/App/usb_device.c
+
+
+
+
+ Application/User/USB_Device/Target
+
+
+ usbd_conf.c
+ 1
+ ../USB_Device/Target/usbd_conf.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_pcd.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ stm32g4xx_hal_pcd_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ stm32g4xx_ll_usb.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_ll_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/USB_Device_Library
+
+
+ usbd_core.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ usbd_ctlreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ usbd_ioreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ usbd_dfu.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x1000
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x1000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..89720927b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..71139cfee
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,246 @@
+
+
+ DFU_Standalone
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ DFU_Standalone.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/DFU_Standalone.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ Middlewares/USB_Device_Library/usbd_core.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ Middlewares/USB_Device_Library/usbd_ctlreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ Middlewares/USB_Device_Library/usbd_dfu.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/DFU/Src/usbd_dfu.c
+
+
+ Middlewares/USB_Device_Library/usbd_ioreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ Application/User/USB_Device/App/usb_device.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c
+
+
+ Application/User/USB_Device/App/usbd_desc.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c
+
+
+ Application/User/USB_Device/App/usbd_dfu_flash.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_dfu_flash.c
+
+
+ Application/User/USB_Device/Target/usbd_conf.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Auto-generated by STM32CubeIDE
+ * @brief Linker script for STM32G474QETx Device from STM32G4 series
+ * 512Kbytes FLASH
+ * 128Kbytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000; /* required amount of heap */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..c51b21b03
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,131 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usb_device.c
+ * @author MCD Application Team
+ * @brief This file implements the USB Device
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_dfu.h"
+#include "usbd_dfu_flash.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef DFU_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+void USBD_Clock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+ /* Enable HSI48 */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+ {
+ Error_Handler();
+ }
+ /*Configure the clock recovery system (CRS)**********************************/
+
+ /*Enable CRS Clock*/
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /* Default Synchro Signal division factor (not divided) */
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+ /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+ /* HSI48 is synchronized with USB SOF at 1KHz rate */
+ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+ RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+ /* Set the TRIM[5:0] to the default value */
+ RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+ /* Start automatic synchronization */
+ HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 1 */
+
+/**
+ * Init USB device Library, add supported class and start the library
+ * @retval None
+ */
+void MX_USB_Device_Init(void)
+{
+ /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+ /* Enable USB Device clock */
+ USBD_Clock_Config();
+ /* USER CODE END USB_Device_Init_PreTreatment */
+
+ /* Init Device Library, add supported class and start the library. */
+ if (USBD_Init(&hUsbDeviceFS, &DFU_Desc, DEVICE_FS) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_DFU) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_DFU_RegisterMedia(&hUsbDeviceFS, &USBD_DFU_Flash_fops) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+ /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..a312c5197
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usb_device.h
+ * @author MCD Application Team
+ * @brief Header for usb_device.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+ * @brief Device file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..4fb775c17
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,398 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.c
+ * @author MCD Application Team
+ * @brief This file implements the USB device descriptors.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @addtogroup USBD_DESC
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+ * @brief Private types.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+ * @brief Private defines.
+ * @{
+ */
+
+#define USBD_VID 0x483
+#define USBD_LANGID_STRING 1033
+#define USBD_MANUFACTURER_STRING "STMicroelectronics"
+#define USBD_PID 0xdf11
+#define USBD_PRODUCT_STRING "DFU in FS Mode"
+#define USBD_CONFIGURATION_STRING "DFU Config"
+#define USBD_INTERFACE_STRING "DFU Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+ * @}
+ */
+
+/* USER CODE BEGIN 0 */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+static void Get_SerialNum(void);
+uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ];
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+ * @brief Private macros.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+uint8_t * USBD_DFU_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_DFU_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+USBD_DescriptorsTypeDef DFU_Desc =
+{
+ USBD_DFU_DeviceDescriptor,
+ USBD_DFU_LangIDStrDescriptor,
+ USBD_DFU_ManufacturerStrDescriptor,
+ USBD_DFU_ProductStrDescriptor,
+ USBD_DFU_SerialStrDescriptor,
+ USBD_DFU_ConfigStrDescriptor,
+ USBD_DFU_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_DFU_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+ 0x12, /*bLength */
+ USB_DESC_TYPE_DEVICE, /*bDescriptorType*/
+ 0x00, /*bcdUSB */
+ 0x02,
+ 0x00, /*bDeviceClass*/
+ 0x00, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idProduct*/
+ HIBYTE(USBD_PID), /*idProduct*/
+ 0x00, /*bcdDevice rel. 2.00*/
+ 0x02,
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+ USB_LEN_LANGID_STR_DESC,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+ USB_SIZ_STRING_SERIAL,
+ USB_DESC_TYPE_STRING,
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+ * @brief Private functions.
+ * @{
+ */
+
+/**
+ * @brief Return the device descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_DFU_DeviceDesc);
+ return USBD_DFU_DeviceDesc;
+}
+
+/**
+ * @brief Return the LangID string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+/**
+ * @brief Return the product string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the manufacturer string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the serial number string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = USB_SIZ_STRING_SERIAL;
+
+ /* Update the serial number string descriptor with the data from the unique
+ * ID */
+ Get_SerialNum();
+
+ /* USER CODE BEGIN USBD_DFU_SerialStrDescriptor */
+
+ /* USER CODE END USBD_DFU_SerialStrDescriptor */
+
+ return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+ * @brief Return the configuration string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == USBD_SPEED_HIGH)
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the interface string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_DFU_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Create the serial number string descriptor
+ * @param None
+ * @retval None
+ */
+static void Get_SerialNum(void)
+{
+ uint32_t deviceserial0;
+ uint32_t deviceserial1;
+ uint32_t deviceserial2;
+
+ deviceserial0 = *(uint32_t *) DEVICE_ID1;
+ deviceserial1 = *(uint32_t *) DEVICE_ID2;
+ deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+ deviceserial0 += deviceserial2;
+
+ if (deviceserial0 != 0)
+ {
+ IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+ IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+ }
+}
+
+/**
+ * @brief Convert Hex 32Bits value into char
+ * @param value: value to convert
+ * @param pbuf: pointer to the buffer
+ * @param len: buffer length
+ * @retval None
+ */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+ uint8_t idx = 0;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ if (((value >> 28)) < 0xA)
+ {
+ pbuf[2 * idx] = (value >> 28) + '0';
+ }
+ else
+ {
+ pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+ }
+
+ value = value << 4;
+
+ pbuf[2 * idx + 1] = 0;
+ }
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..4d4648f3e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h
+ * @author MCD Application Team
+ * @brief Header for usbd_desc.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_DESC USBD_DESC
+ * @brief Usb device descriptors module.
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+ * @brief Constants.
+ * @{
+ */
+#define DEVICE_ID1 (UID_BASE)
+#define DEVICE_ID2 (UID_BASE + 0x4)
+#define DEVICE_ID3 (UID_BASE + 0x8)
+
+#define USB_SIZ_STRING_SERIAL 0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+ * @brief Defines.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+ * @brief Types.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+extern USBD_DescriptorsTypeDef DFU_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+ * @brief Public functions declaration.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
new file mode 100644
index 000000000..b156c8cea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
@@ -0,0 +1,361 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c
+ * @author MCD Application Team
+ * @brief Memory management layer
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_dfu_flash.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @brief Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_DFU
+ * @brief Usb DFU device module.
+ * @{
+ */
+
+/** @defgroup USBD_DFU_Private_TypesDefinitions
+ * @brief Private types.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DFU_Private_Defines
+ * @brief Private defines.
+ * @{
+ */
+
+#define FLASH_DESC_STR "@Internal Flash /0x08000000/8*02Ka,248*02Kg"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+#define FLASH_ERASE_TIME (uint16_t)50
+#define FLASH_PROGRAM_TIME (uint16_t)50
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DFU_Private_Macros
+ * @brief Private macros.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DFU_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_VARIABLES */
+
+/* USER CODE END PRIVATE_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DFU_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+extern USBD_HandleTypeDef hUsbDeviceFS;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DFU_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+static uint16_t FLASH_If_Init(void);
+static uint16_t FLASH_If_Erase(uint32_t Add);
+static uint16_t FLASH_If_Write(uint8_t *src, uint8_t *dest, uint32_t Len);
+static uint8_t *FLASH_If_Read(uint8_t *src, uint8_t *dest, uint32_t Len);
+static uint16_t FLASH_If_DeInit(void);
+static uint16_t FLASH_If_GetStatus(uint32_t Add, uint8_t Cmd, uint8_t *buffer);
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
+static uint32_t GetPage(uint32_t Address);
+static uint32_t GetBank(uint32_t Address);
+/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */
+
+/**
+ * @}
+ */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN USBD_DFU_MediaTypeDef USBD_DFU_Flash_fops __ALIGN_END =
+{
+ (uint8_t*)FLASH_DESC_STR,
+ FLASH_If_Init,
+ FLASH_If_DeInit,
+ FLASH_If_Erase,
+ FLASH_If_Write,
+ FLASH_If_Read,
+ FLASH_If_GetStatus
+};
+
+/* Private functions ---------------------------------------------------------*/
+/**
+ * @brief Memory initialization routine.
+ * @retval USBD_OK if operation is successful, MAL_FAIL else.
+ */
+uint16_t FLASH_If_Init(void)
+{
+ /* USER CODE BEGIN 0 */
+ /* Unlock the internal flash */
+ HAL_FLASH_Unlock();
+
+ return 0;
+ /* USER CODE END 0 */
+}
+
+/**
+ * @brief De-Initializes Memory
+ * @retval USBD_OK if operation is successful, MAL_FAIL else
+ */
+uint16_t FLASH_If_DeInit(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* Lock the internal flash */
+ HAL_FLASH_Lock();
+
+ return 0;
+ /* USER CODE END 1 */
+}
+
+/**
+ * @brief Erase sector.
+ * @param Add: Address of sector to be erased.
+ * @retval 0 if operation is successful, MAL_FAIL else.
+ */
+uint16_t FLASH_If_Erase(uint32_t Add)
+{
+ /* USER CODE BEGIN 2 */
+ FLASH_EraseInitTypeDef eraseinitstruct;
+ uint32_t PageError = 0U;
+ HAL_StatusTypeDef status;
+
+
+ /* Unlock the Flash to enable the flash control register access */
+ HAL_FLASH_Unlock();
+
+ /* Clear OPTVERR bit set on virgin samples */
+ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+ /* Get the number of sector to erase from 1st sector */
+ eraseinitstruct.TypeErase = FLASH_TYPEERASE_PAGES;
+ eraseinitstruct.Banks = GetBank(Add);
+ eraseinitstruct.Page = GetPage(Add);
+ eraseinitstruct.NbPages = 1U;
+ status = HAL_FLASHEx_Erase(&eraseinitstruct, &PageError);
+
+ if (status != HAL_OK)
+ {
+ return 1U;
+ }
+ return 0U;
+ /* USER CODE END 2 */
+}
+
+/**
+ * @brief Memory write routine.
+ * @param src: Pointer to the source buffer. Address to be written to.
+ * @param dest: Pointer to the destination buffer.
+ * @param Len: Number of data to be written (in bytes).
+ * @retval USBD_OK if operation is successful, MAL_FAIL else.
+ */
+uint16_t FLASH_If_Write(uint8_t *src, uint8_t *dest, uint32_t Len)
+{
+ /* USER CODE BEGIN 3 */
+ uint32_t i = 0;
+
+ /* Clear OPTVERR bit set on virgin samples */
+ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
+
+ for (i = 0; i < Len; i += 8)
+ {
+ /* Device voltage range supposed to be [2.7V to 3.6V], the operation will
+ * be done by byte */
+ if (HAL_FLASH_Program
+ (FLASH_TYPEPROGRAM_DOUBLEWORD, (uint32_t) (dest + i),
+ *(uint64_t *) (src + i)) == HAL_OK)
+ {
+ /* Check the written value */
+ if (*(uint64_t *) (src + i) != *(uint64_t *) (dest + i))
+ {
+ /* Flash content doesn't match SRAM content */
+ return 2;
+ }
+ }
+ else
+ {
+ /* Error occurred while writing data in Flash memory */
+ return 1;
+ }
+ }
+ return 0;
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief Memory read routine.
+ * @param src: Pointer to the source buffer. Address to be written to.
+ * @param dest: Pointer to the destination buffer.
+ * @param Len: Number of data to be read (in bytes).
+ * @retval Pointer to the physical address where data should be read.
+ */
+uint8_t *FLASH_If_Read(uint8_t *src, uint8_t *dest, uint32_t Len)
+{
+ /* Return a valid address to avoid HardFault */
+ /* USER CODE BEGIN 4 */
+ uint32_t i = 0;
+ uint8_t *psrc = src;
+
+ for (i = 0; i < Len; i++)
+ {
+ dest[i] = *psrc++;
+ }
+ /* Return a valid address to avoid HardFault */
+ return (uint8_t *) (dest);
+
+ /* USER CODE END 4 */
+}
+
+/**
+ * @brief Get status routine
+ * @param Add: Address to be read from
+ * @param Cmd: Number of data to be read (in bytes)
+ * @param buffer: used for returning the time necessary for a program or an erase operation
+ * @retval USBD_OK if operation is successful
+ */
+uint16_t FLASH_If_GetStatus(uint32_t Add, uint8_t Cmd, uint8_t *buffer)
+{
+ /* USER CODE BEGIN 5 */
+ switch (Cmd)
+ {
+ case DFU_MEDIA_PROGRAM:
+ buffer[1] = (uint8_t)FLASH_PROGRAM_TIME;
+ buffer[2] = (uint8_t)(FLASH_PROGRAM_TIME << 8);
+ buffer[3] = 0;
+ break;
+
+ case DFU_MEDIA_ERASE:
+ default:
+ buffer[1] = (uint8_t)FLASH_ERASE_TIME;
+ buffer[2] = (uint8_t)(FLASH_ERASE_TIME << 8);
+ buffer[3] = 0;
+ break;
+ }
+ return (USBD_OK);
+ /* USER CODE END 5 */
+}
+
+/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */
+/**
+ * @brief Gets the page of a given address
+ * @param Address: Address of the FLASH Memory
+ * @retval The page of a given address
+ */
+static uint32_t GetPage(uint32_t Address)
+{
+ uint32_t page = 0U;
+
+ if (Address < (FLASH_BASE + FLASH_BANK_SIZE))
+ {
+ /* Bank 1 */
+ page = (Address - FLASH_BASE) / FLASH_PAGE_SIZE;
+ }
+ else
+ {
+ /* Bank 2 */
+ page = (Address - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
+ }
+
+ return page;
+}
+/**
+ * @brief Gets the Bank of a given address
+ * @param Address: Address of the FLASH Memory
+ * @retval The Flash bank of a given address
+ */
+static uint32_t GetBank(uint32_t Address)
+{
+ uint32_t bank = 0U;
+
+ if (Address < (FLASH_BASE + FLASH_BANK_SIZE))
+ {
+ /* Bank 1 */
+ bank = FLASH_BANK_1;
+ }
+ else
+ {
+ /* Bank 2 */
+ bank = FLASH_BANK_2;
+ }
+
+ return bank;
+}
+/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
new file mode 100644
index 000000000..5d03e9404
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
@@ -0,0 +1,127 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h
+ * @author MCD Application Team
+ * @brief Header for usbd_dfu_flash.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DFU_FLASH_H__
+#define __USBD_DFU_FLASH_H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_dfu.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_DEVICE_LIBRARY
+ * @brief For Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_MEDIA USBD_MEDIA
+ * @brief Header file for the usbd_dfu_flash.h file.
+ * @{
+ */
+
+/** @defgroup USBD_MEDIA_Exported_Defines USBD_MEDIA_Exported_Defines
+ * @brief Defines.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_MEDIA_Exported_Types USBD_MEDIA_Exported_Types
+ * @brief Types.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_MEDIA_Exported_Macros USBD_MEDIA_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_MEDIA_Exported_Variables USBD_MEDIA_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/** MEDIA Interface callback. */
+extern USBD_DFU_MediaTypeDef USBD_DFU_Flash_fops;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_MEDIA_Exported_FunctionsPrototype USBD_MEDIA_Exported_FunctionsPrototype
+ * @brief Public functions declaration.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DFU_FLASH_H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..9f94bcf81
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,721 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c
+ * @author MCD Application Team
+ * @brief This file implements the board support package for the USB device library
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_dfu.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+ extern void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+ LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspInit 0 */
+
+ /* USER CODE END USB_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USB_CLK_ENABLE();
+
+ /* Peripheral interrupt init */
+ HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+ HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+ /* USER CODE BEGIN USB_MspInit 1 */
+
+ /* USER CODE END USB_MspInit 1 */
+ }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspDeInit 0 */
+
+ /* USER CODE END USB_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USB_CLK_DISABLE();
+
+ /* Peripheral interrupt Deinit*/
+ HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+ /* USER CODE BEGIN USB_MspDeInit 1 */
+ __HAL_RCC_GPIOA_CLK_DISABLE();
+ /* USER CODE END USB_MspDeInit 1 */
+ }
+}
+
+/**
+ * @brief Setup stage callback
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PreTreatment */
+ USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data Out stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+ USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data In stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+ USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+ * @brief SOF callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+ USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+ * @brief Reset callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+ USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+ if ( hpcd->Init.speed != PCD_SPEED_FULL)
+ {
+ Error_Handler();
+ }
+ /* Set Speed. */
+ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+ /* Reset Device. */
+ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+ * @brief Suspend callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+ /* Inform USB library that core enters in suspend Mode. */
+ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+ /* Enter in STOP mode. */
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+ * @brief Resume callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+
+ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOOUTIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+ USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOINIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+ USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief Connect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+ USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+ * @brief Disconnect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+ USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+ /* USER CODE BEGIN LowLevelInterface */
+
+ /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+ LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+ * @brief Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+ /* Init USB Ip. */
+ hpcd_USB_FS.pData = pdev;
+ /* Link the driver to the stack. */
+ pdev->pData = &hpcd_USB_FS;
+
+ hpcd_USB_FS.Instance = USB;
+ hpcd_USB_FS.Init.dev_endpoints = 8;
+ hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+ hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+ hpcd_USB_FS.Init.Sof_enable = DISABLE;
+ hpcd_USB_FS.Init.low_power_enable = DISABLE;
+ hpcd_USB_FS.Init.lpm_enable = DISABLE;
+ hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* register Msp Callbacks (before the Init) */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+ #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+ if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+ {
+ Error_Handler( );
+ }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* Register USB PCD CallBacks */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+ /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+ /* USER CODE END RegisterCallBackFirstPart */
+ HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+ HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+ HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+ HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+ /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+ /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ /* USER CODE BEGIN EndPoint_Configuration */
+ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x08);
+ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x48);
+ /* USER CODE END EndPoint_Configuration */
+ return USBD_OK;
+}
+
+/**
+ * @brief De-Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_DeInit(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Starts the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Start(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Stops the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Stop(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Opens an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param ep_type: Endpoint type
+ * @param ep_mps: Endpoint max packet size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Closes an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Flushes an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Sets a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Clears a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns Stall condition.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Stall (1: Yes, 0: No)
+ */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+ if((ep_addr & 0x80) == 0x80)
+ {
+ return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+ }
+ else
+ {
+ return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+ }
+}
+
+/**
+ * @brief Assigns a USB address to the device.
+ * @param pdev: Device handle
+ * @param dev_addr: Device address
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Transmits data over an endpoint.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be sent
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Prepares an endpoint for reception.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be received
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns the last transferred packet size.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Received Data Size
+ */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+ * @brief Delays routine for the USB Device Library.
+ * @param Delay: Delay in ms
+ * @retval None
+ */
+void USBD_LL_Delay(uint32_t Delay)
+{
+ HAL_Delay(Delay);
+}
+
+/**
+ * @brief Static single allocation.
+ * @param size: Size of allocated memory
+ * @retval None
+ */
+void *USBD_static_malloc(uint32_t size)
+{
+ static uint32_t mem[(sizeof(USBD_DFU_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+ return mem;
+}
+
+/**
+ * @brief Dummy memory free
+ * @param p: Pointer to allocated memory address
+ * @retval None
+ */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+
+/* USER CODE END 5 */
+
+/**
+ * @brief Returns the USB status depending on the HAL status:
+ * @param hal_status: HAL status
+ * @retval USB status
+ */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ switch (hal_status)
+ {
+ case HAL_OK :
+ usb_status = USBD_OK;
+ break;
+ case HAL_ERROR :
+ usb_status = USBD_FAIL;
+ break;
+ case HAL_BUSY :
+ usb_status = USBD_BUSY;
+ break;
+ case HAL_TIMEOUT :
+ usb_status = USBD_FAIL;
+ break;
+ default :
+ usb_status = USBD_FAIL;
+ break;
+ }
+ return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..995316773
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,183 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h
+ * @author MCD Application Team
+ * @brief Header for usbd_conf.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+#include
+#include
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @brief Driver for Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_CONF USBD_CONF
+ * @brief Configuration file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+ * @brief Defines for configuration of the Usb device.
+ * @{
+ */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES 1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION 1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ 48U
+/*---------- -----------*/
+#define USBD_SUPPORT_USER_STRING_DESC 1U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL 0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED 0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED 1U
+/*---------- -----------*/
+#define USBD_DFU_MAX_ITF_NUM 1U
+/*---------- -----------*/
+#define USBD_DFU_XFER_SIZE 1024U
+/*---------- -----------*/
+#define USBD_DFU_APP_DEFAULT_ADD 0x0800C000U
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 0
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy memcpy
+
+/** Alias for delay. */
+#define USBD_Delay HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...) printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...) printf("ERROR: ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...) printf("DEBUG : ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+ * @brief Types.
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt
new file mode 100644
index 000000000..567ec71c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/DFU_Standalone/readme.txt
@@ -0,0 +1,152 @@
+/**
+ @page DFU_Standalone USB Device Firmware Upgrade (DFU) application
+
+ @verbatim
+ ******************************************************************************
+ * @file USB_Device/DFU_Standalone/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the USB DFU application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+Compliant implementation of the Device Firmware Upgrade (DFU)
+capability to program the embedded Flash memory through the USB peripheral.
+
+
+At the beginning of the main program the HAL_Init() function is called to reset all the peripherals,
+initialize the Flash interface and the systick. The user is provided with the SystemClock_Config()
+function to configure the system clock (SYSCLK). The Full Speed (FS) USB module uses
+internally a 48-MHz clock, which is generated from an integrated PLL.
+
+The DFU transactions are based on Endpoint 0 (control endpoint) transfer. All requests and status
+control are sent/received through this endpoint.
+
+The Internal flash memory is split as follows:
+ - DFU area located in [0x08000000 : USBD_DFU_APP_DEFAULT_ADD-1]: Only read access
+ - Application area located in [USBD_DFU_APP_DEFAULT_ADD : Device's end address]: Read, Write, and Erase
+ access
+
+In this application, two operating modes are available:
+ 1. DFU operating mode:
+ This mode is entered after an MCU reset in case:
+ - The DFU mode is forced by the user: the user presses the key sw2 button.
+ - No valid code found in the application area: a code is considered valid if the MSB of the initial
+ Main Stack Pointer (MSP) value located in the first address of the application area is equal to
+ 0x2000
+
+ 2. Run-time application mode:
+ This is the normal run-time activities. A binary which toggles LED1 on the STM32G474E-EVAL1 Rev B board is
+ provided in Binary directory.
+
+@note After each device reset (unplug the STM32G474E-EVAL1 Rev B board from PC), Plug the STM32G474E-EVAL1 Rev B board with Key User push-button button
+pressed to enter the DFU mode.
+
+Traditionally, firmware is stored in Hex, S19 or Binary files, but these formats do not contain the
+necessary information to perform the upgrade operation, they contain only the actual data of the program
+to be downloaded. However, the DFU operation requires more information, such as the product identifier,
+vendor identifier, Firmware version and the Alternate setting number (Target ID) of the target to be
+used, this information makes the upgrade targeted and more secure. To add this information, DFU file
+format is used. For more details refer to the "DfuSe File Format Specification" document (UM0391).
+
+To generate a DFU image, download "DFUse Demonstration" tool and use DFU File Manager to convert a
+binary image into a DFU image. This tool is for download from www.st.com
+To download a *.dfu image, use "DfuSe Demo" available within "DFUse Demonstration" install directory.
+
+Please refer to UM0412, DFuSe USB device firmware upgrade STMicroelectronics extension for more details
+on the driver installation and PC host user interface.
+
+@note A binary which toggles LED1 on the STM32G474E-EVAL1 Rev B board is provided in Binary directory.
+
+@note The application needs to ensure that the SysTick time base is set to 1 millisecond
+ to have correct HAL configuration.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The build-in USB peripheral of the stm32g4xx does not provide a specific interrupt for USB cable plug/unplug
+ detection. The correct way to detect the USB cable plug/unplug is to detect the availability of the VBUS line
+ using a normal GPIO pin (external interrupt line).
+
+
+@par USB Library Configuration
+
+It is possible to fine tune needed USB Device features by modifying defines values in USBD configuration
+file usbd_conf.h available under the project includes directory, in a way to fit the application
+requirements, such as:
+ - USBD_DFU_APP_DEFAULT_ADD, specifying the address from where user's application will be downloaded.
+
+Device's end address is the end address of the flash memory and it is dependent on the device in use.
+
+@par Keywords
+
+Connectivity, USB_Device, USB, DFU, Firmware upgrade
+
+@par Directory contents
+
+ - USB_Device/DFU_Standalone/Core/Src/main.c Main program
+ - USB_Device/DFU_Standalone/Core/Src/system_stm32g4xx.c stm32g4xx system clock configuration file
+ - USB_Device/DFU_Standalone/Core/Src/stm32g4xx_it.c Interrupt handlers
+ - USB_Device/DFU_Standalone/Core/Src/stm32g4xx_hal_msp.c HAL MSP Module
+ - USB_Device/DFU_Standalone/USB_Device/App/usb_device.c USB Device application code
+ - USB_Device/DFU_Standalone/USB_Device/App/usb_desc.c USB device descriptor
+ - USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.c Internal flash memory management
+ - USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.c General low level driver configuration
+ - USB_Device/DFU_Standalone/Core/Inc/main.h Main program header file
+ - USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - USB_Device/DFU_Standalone/Core/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - USB_Device/DFU_Standalone/USB_Device/App/usb_device.h USB Device application header file
+ - USB_Device/DFU_Standalone/USB_Device/App/usbd_desc.h USB device descriptor header file
+ - USB_Device/DFU_Standalone/USB_Device/App/usbd_dfu_flash.h Internal flash memory management header file
+ - USB_Device/DFU_Standalone/USB_Device/Target/usbd_conf.h USB device driver Configuration file
+
+
+@par Hardware and Software environment
+
+ - This application runs on stm32g4xx devices.
+
+ - This application has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+ board and can be easily tailored to any other supported device
+ and development board.
+
+ - STM32G474E-EVAL1 Rev B board Set-up
+ - Install the DFU driver available in "DfuSe Demonstrator" installation directory
+ For Windows 8.1 and later : Update STM32 DFU device driver manually from Windows Device Manager.
+ The install of required device driver is available under:
+ "Program Files\STMicroelectronics\Software\DfuSe v3.0.5\Bin\Driver\Win8.1" directory.
+ -Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - To run the application, proceed as follows:
+ - Install "DfuSe Demonstrator"
+ - Install the DFU driver available in "DfuSe Demonstrator" installation directory
+ - For Windows 8.1 and later : Update STM32 DFU device driver manually from Windows Device Manager.
+ The install of required device driver is available under:
+ "Program Files\STMicroelectronics\Software\DfuSe v3.0.6\Bin\Driver\Win8.1" directory.
+ - Open "DfuSe Demo", choose the "stm32g474e_eval_LED_Toggle_@0x0800C000.dfu" provided in Core\Binary
+ directory, upgrade and verify to check that it is successfully downloaded.
+ - This application allows also to upload a dfu file (either the provided DFU file or by creating a new dfu file).
+ To check that the upload was successfully performed, choose the dfu uploaded file, upgrade and verify.
+ - To run the downloaded application, execute the command "leave the DFU mode" or simply reset the
+ board.
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings
new file mode 100644
index 000000000..590f49d92
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/.extSettings
@@ -0,0 +1,12 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Application/User/Core=../Core/Src/main.c;../Core/Src/stm32g4xx_it.c;../Core/Src/stm32g4xx_hal_msp.c;../Core/Src/stm32g4xx_hal_msp.c;
+Application/User/USB_Device/App=../USB_Device/App/usbd_desc.c;../USB_Device/App/usb_device.c;
+Application/User/USB_Device/Target=../USB_Device/Target/usbd_conf.c;
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h
new file mode 100644
index 000000000..372311bd4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/main.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/Core/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+#define BUTTON_KEY1 BUTTON_USER
+#define BUTTON_KEY1_PIN USER_BUTTON_PIN
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..afd401747
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..a3e8cb2ec
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USB_LP_IRQHandler(void);
+void USBWakeUp_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c
new file mode 100644
index 000000000..7d23d8850
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/main.c
@@ -0,0 +1,226 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/Core/Src/main.c
+ * @author MCD Application Team
+ * @brief USB device HID demo main file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_USB_Device_Init();
+ /* USER CODE BEGIN 2 */
+ /* Configure the application hardware resources */
+ BSP_PB_Init(BUTTON_KEY1, BUTTON_MODE_EXTI);
+ BSP_LED_Init(LED3);
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 64;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief This function provides accurate delay (in milliseconds) based
+ * on SysTick counter flag.
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @param Delay: specifies the delay time length, in milliseconds.
+ * @retval None
+ */
+void HAL_Delay(__IO uint32_t Delay)
+{
+ while (Delay)
+ {
+ if (SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)
+ {
+ Delay--;
+ }
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ BSP_LED_On(LED3);
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..348856185
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,88 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ * This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..d6fe3f37a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
@@ -0,0 +1,242 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+extern void SystemClockConfig_Resume(void);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_FS;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles USB low priority interrupt remap.
+ */
+void USB_LP_IRQHandler(void)
+{
+ /* USER CODE BEGIN USB_LP_IRQn 0 */
+
+ /* USER CODE END USB_LP_IRQn 0 */
+ HAL_PCD_IRQHandler(&hpcd_USB_FS);
+ /* USER CODE BEGIN USB_LP_IRQn 1 */
+
+ /* USER CODE END USB_LP_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USB wake-up interrupt through EXTI line 18.
+ */
+void USBWakeUp_IRQHandler(void)
+{
+ /* USER CODE BEGIN USBWakeUp_IRQn 0 */
+ SystemClockConfig_Resume();
+ /* USER CODE END USBWakeUp_IRQn 0 */
+ HAL_PCD_IRQHandler(&hpcd_USB_FS);
+ /* USER CODE BEGIN USBWakeUp_IRQn 1 */
+
+ /* USER CODE END USBWakeUp_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles External lines interrupt request.
+ * @param None
+ * @retval None
+ */
+
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_KEY1_PIN);
+}
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd
new file mode 100644
index 000000000..bf43f11bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ HID_Standalone
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp
new file mode 100644
index 000000000..6134c6440
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/HID_Standalone.ewp
@@ -0,0 +1,1199 @@
+
+
+ 3
+
+ HID_Standalone
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ HID_Standalone/Exe
+
+
+ ObjPath
+ HID_Standalone/Obj
+
+
+ ListPath
+ HID_Standalone/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../USB_Device/App
+ $PROJ_DIR$/../USB_Device/Target
+ $PROJ_DIR$/../Core/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Inc
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 0
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ HID_Standalone.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ HID_Standalone.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ Core
+
+ $PROJ_DIR$/../Core/Src/main.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+ USB_Device
+
+ App
+
+ $PROJ_DIR$/../USB_Device/App/usbd_desc.c
+
+
+ $PROJ_DIR$/../USB_Device/App/usb_device.c
+
+
+
+ Target
+
+ $PROJ_DIR$/../USB_Device/Target/usbd_conf.c
+
+
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares
+
+ USB_Device_Library
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ $PROJ_DIR$/../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww
new file mode 100644
index 000000000..c10012689
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\HID_Standalone.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..066fa1d35
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc
new file mode 100644
index 000000000..533d9eee0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/HID_Standalone.ioc
@@ -0,0 +1,159 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USB
+Mcu.IP4=USB_DEVICE
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PA11
+Mcu.Pin1=PA12
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_USB_DEVICE_VS_USB_DEVICE_HID_FS
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.USBWakeUp_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.USB_LP_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA11.Mode=Device
+PA11.Signal=USB_DM
+PA12.Mode=Device
+PA12.Signal=USB_DP
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x1000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=HID_Standalone.ioc
+ProjectManager.ProjectName=HID_Standalone
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x1000
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USB_Device_Init-USB_DEVICE-false-HAL-false
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CodegenConfigPeriph=false
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CodegenConfigPeriph,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USB.DeviceSpeed=PCD_SPEED_FULL
+USB.IPParameters=DeviceSpeed,phy_itface,Sof_enable,low_power_enable,lpm_enable,battery_charging_enable
+USB.Sof_enable=DISABLE
+USB.battery_charging_enable=DISABLE
+USB.low_power_enable=ENABLE
+USB.lpm_enable=DISABLE
+USB.phy_itface=PCD_PHY_EMBEDDED
+USB_DEVICE.CLASS_NAME_FS=HID
+USB_DEVICE.CONFIGURATION_STRING_HID_FS=HID Config
+USB_DEVICE.HID_FS_BINTERVAL=0xA
+USB_DEVICE.INTERFACE_STRING_HID_FS=HID Interface
+USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,USBD_MAX_NUM_INTERFACES,USBD_MAX_STR_DESC_SIZ,VID,PID_HID_FS,USBD_LPM_ENABLED,HID_FS_BINTERVAL,USBD_MAX_NUM_CONFIGURATION,USBD_SELF_POWERED,USBD_DEBUG_LEVEL,LANGID_STRING,MANUFACTURER_STRING,PRODUCT_STRING_HID_FS,CONFIGURATION_STRING_HID_FS,INTERFACE_STRING_HID_FS
+USB_DEVICE.IPParametersWithoutCheck=USBD_MAX_STR_DESC_SIZ,USBD_MAX_NUM_INTERFACES
+USB_DEVICE.LANGID_STRING=1033
+USB_DEVICE.MANUFACTURER_STRING=STMicroelectronics
+USB_DEVICE.PID_HID_FS=0x5710
+USB_DEVICE.PRODUCT_STRING_HID_FS=STM32 Human interface
+USB_DEVICE.USBD_DEBUG_LEVEL=0
+USB_DEVICE.USBD_LPM_ENABLED=0
+USB_DEVICE.USBD_MAX_NUM_CONFIGURATION=1
+USB_DEVICE.USBD_MAX_NUM_INTERFACES=1
+USB_DEVICE.USBD_MAX_STR_DESC_SIZ=64
+USB_DEVICE.USBD_SELF_POWERED=1
+USB_DEVICE.VID=0x483
+USB_DEVICE.VirtualMode=Hid
+USB_DEVICE.VirtualModeFS=Hid_FS
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_USB_DEVICE_VS_USB_DEVICE_HID_FS.Mode=HID_FS
+VP_USB_DEVICE_VS_USB_DEVICE_HID_FS.Signal=USB_DEVICE_VS_USB_DEVICE_HID_FS
+board=STM32G474E_EVAL1
+ProjectManager.Example=HID_Standalone
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx
new file mode 100644
index 000000000..0e5ade2fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvoptx
@@ -0,0 +1,745 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ HID_Standalone
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/Target
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/Target/usbd_conf.c
+ usbd_conf.c
+ 0
+ 0
+
+
+
+
+ Application/User/USB_Device/App
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usbd_desc.c
+ usbd_desc.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../USB_Device/App/usb_device.c
+ usb_device.c
+ 0
+ 0
+
+
+
+
+ Application/User/Core
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 6
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 8
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 8
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 8
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 8
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 8
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+ stm32g4xx_hal_pcd.c
+ 0
+ 0
+
+
+ 8
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+ stm32g4xx_hal_pcd_ex.c
+ 0
+ 0
+
+
+ 8
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+ stm32g4xx_ll_usb.c
+ 0
+ 0
+
+
+ 8
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 8
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 8
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 8
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 8
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 8
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 8
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 8
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 8
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 8
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 8
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 8
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 8
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../Core/Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Middlewares/USB_Device_Library
+ 0
+ 0
+ 0
+ 0
+
+ 10
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+ usbd_core.c
+ 0
+ 0
+
+
+ 10
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+ usbd_ctlreq.c
+ 0
+ 0
+
+
+ 10
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+ usbd_ioreq.c
+ 0
+ 0
+
+
+ 10
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c
+ usbd_hid.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx
new file mode 100644
index 000000000..fdb2e1792
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/HID_Standalone.uvprojx
@@ -0,0 +1,652 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ HID_Standalone
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ HID_Standalone\Exe\
+ HID_Standalone
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../USB_Device/App;../USB_Device/Target;../Core/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Inc;../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Inc;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User/USB_Device/Target
+
+
+ usbd_conf.c
+ 1
+ ../USB_Device/Target/usbd_conf.c
+
+
+
+
+ Application/User/USB_Device/App
+
+
+ usbd_desc.c
+ 1
+ ../USB_Device/App/usbd_desc.c
+
+
+ usb_device.c
+ 1
+ ../USB_Device/App/usb_device.c
+
+
+
+
+ Application/User/Core
+
+
+ main.c
+ 1
+ ../Core/Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Core/Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Core/Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_pcd.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ stm32g4xx_hal_pcd_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ stm32g4xx_ll_usb.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Core/Src/system_stm32g4xx.c
+
+
+
+
+ Middlewares/USB_Device_Library
+
+
+ usbd_core.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ usbd_ctlreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ usbd_ioreq.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ usbd_hid.c
+ 1
+ ../../../../../../Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..d51d2e681
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x1000
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x1000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..2597d866b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.cproject
@@ -0,0 +1,181 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project
new file mode 100644
index 000000000..a796fb976
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/.project
@@ -0,0 +1,241 @@
+
+
+ HID_Standalone
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ HID_Standalone.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/HID_Standalone.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Core/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pcd_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_usb.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
+
+
+ Middlewares/USB_Device_Library/usbd_core.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
+
+
+ Middlewares/USB_Device_Library/usbd_ctlreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
+
+
+ Middlewares/USB_Device_Library/usbd_hid.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c
+
+
+ Middlewares/USB_Device_Library/usbd_ioreq.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ Application/User/USB_Device/App/usb_device.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usb_device.c
+
+
+ Application/User/USB_Device/App/usbd_desc.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/App/usbd_desc.c
+
+
+ Application/User/USB_Device/Target/usbd_conf.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/USB_Device/Target/usbd_conf.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..0cccfacf0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Auto-generated by STM32CubeIDE
+ * @brief Linker script for STM32G474QETx Device from STM32G4 series
+ * 512Kbytes FLASH
+ * 128Kbytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000; /* required amount of heap */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c
new file mode 100644
index 000000000..d225cfc1d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.c
@@ -0,0 +1,208 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/App/usb_device.c
+ * @author MCD Application Team
+ * @brief This file implements the USB Device
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "usb_device.h"
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_hid.h"
+
+/* USER CODE BEGIN Includes */
+#include "main.h"
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+__IO uint32_t remotewakeupon = 0;
+uint8_t HID_Buffer[4];
+extern PCD_HandleTypeDef hpcd_USB_FS;
+#define CURSOR_STEP 5
+/* USER CODE END PV */
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+static void GetPointerData(uint8_t *pbuf);
+extern void SystemClockConfig_Resume(void);
+void USBD_Clock_Config(void);
+/* USER CODE END PFP */
+
+extern void Error_Handler(void);
+/* USB Device Core handle declaration. */
+USBD_HandleTypeDef hUsbDeviceFS;
+extern USBD_DescriptorsTypeDef HID_Desc;
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN 0 */
+/**
+ * @brief USB Clock Configuration
+ * @retval None
+ */
+void USBD_Clock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+
+ /* Enable HSI48 */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
+ {
+ Error_Handler();
+ }
+ /*Configure the clock recovery system (CRS)**********************************/
+
+ /*Enable CRS Clock*/
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /* Default Synchro Signal division factor (not divided) */
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+ /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+ /* HSI48 is synchronized with USB SOF at 1KHz rate */
+ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+ RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+ /* Set the TRIM[5:0] to the default value */
+ RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+ /* Start automatic synchronization */
+ HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
+}
+/* USER CODE END 0 */
+
+/*
+ * -- Insert your external function declaration here --
+ */
+/* USER CODE BEGIN 1 */
+
+/**
+ * @brief Gets Pointer Data.
+ * @param pbuf: Pointer to report
+ * @retval None
+ */
+void GetPointerData(uint8_t * pbuf)
+{
+ static int8_t cnt = 0;
+ int8_t x = 0, y = 0;
+
+ if (cnt++ > 0)
+ {
+ x = CURSOR_STEP;
+ }
+ else
+ {
+ x = -CURSOR_STEP;
+ }
+ pbuf[0] = 0;
+ pbuf[1] = x;
+ pbuf[2] = y;
+ pbuf[3] = 0;
+}
+
+/**
+ * @brief GPIO EXTI Callback function
+ * Handle remote-wakeup through key button
+ * @param GPIO_Pin
+ * @retval None
+ */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ if (GPIO_Pin == BUTTON_KEY1_PIN)
+ {
+ if ((((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_remote_wakeup == 1) &&
+ (((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state ==
+ USBD_STATE_SUSPENDED))
+ {
+ if ((&hpcd_USB_FS)->Init.low_power_enable)
+ {
+ HAL_ResumeTick();
+ SystemClockConfig_Resume();
+ }
+ /* Activate Remote wakeup */
+ HAL_PCD_ActivateRemoteWakeup((&hpcd_USB_FS));
+
+ /* Remote wakeup delay */
+ HAL_Delay(10);
+
+ /* Disable Remote wakeup */
+ HAL_PCD_DeActivateRemoteWakeup((&hpcd_USB_FS));
+
+ /* change state to configured */
+ ((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state = USBD_STATE_CONFIGURED;
+
+ /* Change remote_wakeup feature to 0 */
+ ((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_remote_wakeup = 0;
+ remotewakeupon = 1;
+ }
+ else if (((USBD_HandleTypeDef *) hpcd_USB_FS.pData)->dev_state ==
+ USBD_STATE_CONFIGURED)
+ {
+ GetPointerData(HID_Buffer);
+ USBD_HID_SendReport(&hUsbDeviceFS, HID_Buffer, 4);
+ }
+ else
+ {
+ /* ... */
+ }
+ }
+}
+
+/* USER CODE END 1 */
+
+/**
+ * Init USB device Library, add supported class and start the library
+ * @retval None
+ */
+void MX_USB_Device_Init(void)
+{
+ /* USER CODE BEGIN USB_Device_Init_PreTreatment */
+ /* USB Clock Initialization */
+ USBD_Clock_Config();
+ /* USER CODE END USB_Device_Init_PreTreatment */
+
+ /* Init Device Library, add supported class and start the library. */
+ if (USBD_Init(&hUsbDeviceFS, &HID_Desc, DEVICE_FS) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_HID) != USBD_OK) {
+ Error_Handler();
+ }
+ if (USBD_Start(&hUsbDeviceFS) != USBD_OK) {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USB_Device_Init_PostTreatment */
+
+ /* USER CODE END USB_Device_Init_PostTreatment */
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h
new file mode 100644
index 000000000..be9481a0c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usb_device.h
@@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/App/usb_device.h
+ * @author MCD Application Team
+ * @brief Header for usb_device.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_DEVICE__H__
+#define __USB_DEVICE__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE USBD_DEVICE
+ * @brief Device file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/*
+ * -- Insert your variables declaration here --
+ */
+/* USER CODE BEGIN VARIABLES */
+
+/* USER CODE END VARIABLES */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/** USB Device initialization function. */
+void MX_USB_Device_Init(void);
+
+/*
+ * -- Insert functions declaration here --
+ */
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEVICE__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
new file mode 100644
index 000000000..44822bd57
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
@@ -0,0 +1,396 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c
+ * @author MCD Application Team
+ * @brief This file implements the USB device descriptors.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_conf.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @addtogroup USBD_DESC
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
+ * @brief Private types.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_TYPES */
+
+/* USER CODE END PRIVATE_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
+ * @brief Private defines.
+ * @{
+ */
+
+#define USBD_VID 0x483
+#define USBD_LANGID_STRING 1033
+#define USBD_MANUFACTURER_STRING "STMicroelectronics"
+#define USBD_PID 0x5710
+#define USBD_PRODUCT_STRING "STM32 Human interface"
+#define USBD_CONFIGURATION_STRING "HID Config"
+#define USBD_INTERFACE_STRING "HID Interface"
+
+/* USER CODE BEGIN PRIVATE_DEFINES */
+
+/* USER CODE END PRIVATE_DEFINES */
+
+/**
+ * @}
+ */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
+ * @brief Private macros.
+ * @{
+ */
+
+/* USER CODE BEGIN PRIVATE_MACRO */
+
+/* USER CODE END PRIVATE_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+static void Get_SerialNum(void);
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
+ * @brief Private functions declaration.
+ * @{
+ */
+
+uint8_t * USBD_HID_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+uint8_t * USBD_HID_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+USBD_DescriptorsTypeDef HID_Desc =
+{
+ USBD_HID_DeviceDescriptor,
+ USBD_HID_LangIDStrDescriptor,
+ USBD_HID_ManufacturerStrDescriptor,
+ USBD_HID_ProductStrDescriptor,
+ USBD_HID_SerialStrDescriptor,
+ USBD_HID_ConfigStrDescriptor,
+ USBD_HID_InterfaceStrDescriptor
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/** USB standard device descriptor. */
+__ALIGN_BEGIN uint8_t USBD_HID_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
+{
+ 0x12, /*bLength */
+ USB_DESC_TYPE_DEVICE, /*bDescriptorType*/
+ 0x00, /*bcdUSB */
+ 0x02,
+ 0x00, /*bDeviceClass*/
+ 0x00, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idProduct*/
+ HIBYTE(USBD_PID), /*idProduct*/
+ 0x00, /*bcdDevice rel. 2.00*/
+ 0x02,
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/
+};
+
+/* USB_DeviceDescriptor */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
+ * @brief Private variables.
+ * @{
+ */
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+
+/** USB lang identifier descriptor. */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
+{
+ USB_LEN_LANGID_STR_DESC,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING)
+};
+
+#if defined ( __ICCARM__ ) /* IAR Compiler */
+ #pragma data_alignment=4
+#endif /* defined ( __ICCARM__ ) */
+/* Internal string descriptor. */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
+
+#if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+#endif
+__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
+ USB_SIZ_STRING_SERIAL,
+ USB_DESC_TYPE_STRING,
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
+ * @brief Private functions.
+ * @{
+ */
+
+/**
+ * @brief Return the device descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_HID_DeviceDesc);
+ return USBD_HID_DeviceDesc;
+}
+
+/**
+ * @brief Return the LangID string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+/**
+ * @brief Return the product string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_PRODUCT_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the manufacturer string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the serial number string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ UNUSED(speed);
+ *length = USB_SIZ_STRING_SERIAL;
+
+ /* Update the serial number string descriptor with the data from the unique
+ * ID */
+ Get_SerialNum();
+
+ /* USER CODE BEGIN USBD_HID_SerialStrDescriptor */
+
+ /* USER CODE END USBD_HID_SerialStrDescriptor */
+
+ return (uint8_t *) USBD_StringSerial;
+}
+
+/**
+ * @brief Return the configuration string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == USBD_SPEED_HIGH)
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Return the interface string descriptor
+ * @param speed : Current device speed
+ * @param length : Pointer to data length variable
+ * @retval Pointer to descriptor buffer
+ */
+uint8_t * USBD_HID_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString((uint8_t *)USBD_INTERFACE_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @brief Create the serial number string descriptor
+ * @param None
+ * @retval None
+ */
+static void Get_SerialNum(void)
+{
+ uint32_t deviceserial0;
+ uint32_t deviceserial1;
+ uint32_t deviceserial2;
+
+ deviceserial0 = *(uint32_t *) DEVICE_ID1;
+ deviceserial1 = *(uint32_t *) DEVICE_ID2;
+ deviceserial2 = *(uint32_t *) DEVICE_ID3;
+
+ deviceserial0 += deviceserial2;
+
+ if (deviceserial0 != 0)
+ {
+ IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
+ IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
+ }
+}
+
+/**
+ * @brief Convert Hex 32Bits value into char
+ * @param value: value to convert
+ * @param pbuf: pointer to the buffer
+ * @param len: buffer length
+ * @retval None
+ */
+static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
+{
+ uint8_t idx = 0;
+
+ for (idx = 0; idx < len; idx++)
+ {
+ if (((value >> 28)) < 0xA)
+ {
+ pbuf[2 * idx] = (value >> 28) + '0';
+ }
+ else
+ {
+ pbuf[2 * idx] = (value >> 28) + 'A' - 10;
+ }
+
+ value = value << 4;
+
+ pbuf[2 * idx + 1] = 0;
+ }
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
new file mode 100644
index 000000000..e254962a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
@@ -0,0 +1,143 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h
+ * @author MCD Application Team
+ * @brief Header for usbd_desc.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DESC__C__
+#define __USBD_DESC__C__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_DESC USBD_DESC
+ * @brief Usb device descriptors module.
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
+ * @brief Constants.
+ * @{
+ */
+#define DEVICE_ID1 (UID_BASE)
+#define DEVICE_ID2 (UID_BASE + 0x4)
+#define DEVICE_ID3 (UID_BASE + 0x8)
+
+#define USB_SIZ_STRING_SERIAL 0x1A
+
+/* USER CODE BEGIN EXPORTED_CONSTANTS */
+
+/* USER CODE END EXPORTED_CONSTANTS */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
+ * @brief Defines.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_DEFINES */
+
+/* USER CODE END EXPORTED_DEFINES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
+ * @brief Types.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_TYPES */
+
+/* USER CODE END EXPORTED_TYPES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_MACRO */
+
+/* USER CODE END EXPORTED_MACRO */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+extern USBD_DescriptorsTypeDef HID_Desc;
+
+/* USER CODE BEGIN EXPORTED_VARIABLES */
+
+/* USER CODE END EXPORTED_VARIABLES */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
+ * @brief Public functions declaration.
+ * @{
+ */
+
+/* USER CODE BEGIN EXPORTED_FUNCTIONS */
+
+/* USER CODE END EXPORTED_FUNCTIONS */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_DESC__C__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
new file mode 100644
index 000000000..15ae7eef5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
@@ -0,0 +1,758 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c
+ * @author MCD Application Team
+ * @brief This file implements the board support package for the USB device library
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+#include "usbd_hid.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE END PV */
+
+PCD_HandleTypeDef hpcd_USB_FS;
+void Error_Handler(void);
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported function prototypes ----------------------------------------------*/
+
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+extern void USBD_Clock_Config(void);
+void SystemClockConfig_Resume(void);
+/* USER CODE END PFP */
+
+/* Private functions ---------------------------------------------------------*/
+static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status);
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+extern void SystemClock_Config(void);
+
+/*******************************************************************************
+ LL Driver Callbacks (PCD -> USB Device Library)
+*******************************************************************************/
+/* MSP Init */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspInit 0 */
+
+ /* USER CODE END USB_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_USB_CLK_ENABLE();
+
+ /* Peripheral interrupt init */
+ HAL_NVIC_SetPriority(USB_LP_IRQn, 6, 0);
+ HAL_NVIC_EnableIRQ(USB_LP_IRQn);
+ if(pcdHandle->Init.low_power_enable == 1)
+ {
+ /* Enable EXTI Line 18 for USB wakeup */
+ __HAL_USB_WAKEUP_EXTI_ENABLE_IT();
+ HAL_NVIC_SetPriority(USBWakeUp_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USBWakeUp_IRQn);
+ }
+ /* USER CODE BEGIN USB_MspInit 1 */
+
+ /* USER CODE END USB_MspInit 1 */
+ }
+}
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#else
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ if(pcdHandle->Instance==USB)
+ {
+ /* USER CODE BEGIN USB_MspDeInit 0 */
+
+ /* USER CODE END USB_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USB_CLK_DISABLE();
+
+ /* Peripheral interrupt Deinit*/
+ HAL_NVIC_DisableIRQ(USB_LP_IRQn);
+
+ HAL_NVIC_DisableIRQ(USBWakeUp_IRQn);
+
+ /* USER CODE BEGIN USB_MspDeInit 1 */
+ __HAL_RCC_GPIOA_CLK_DISABLE();
+ /* USER CODE END USB_MspDeInit 1 */
+ }
+}
+
+/**
+ * @brief Setup stage callback
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PreTreatment */
+ USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
+ /* USER CODE BEGIN HAL_PCD_SetupStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SetupStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data Out stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PreTreatment */
+ USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataOutStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataOutStageCallback_PostTreatment */
+}
+
+/**
+ * @brief Data In stage callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PreTreatment */
+ USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
+ /* USER CODE BEGIN HAL_PCD_DataInStageCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DataInStageCallback_PostTreatment */
+}
+
+/**
+ * @brief SOF callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PreTreatment */
+ USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_SOFCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SOFCallback_PostTreatment */
+}
+
+/**
+ * @brief Reset callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PreTreatment */
+ USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
+
+ if ( hpcd->Init.speed != PCD_SPEED_FULL)
+ {
+ Error_Handler();
+ }
+ /* Set Speed. */
+ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
+
+ /* Reset Device. */
+ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResetCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResetCallback_PostTreatment */
+}
+
+/**
+ * @brief Suspend callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PreTreatment */
+ /* Inform USB library that core enters in suspend Mode. */
+ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
+ /* Enter in STOP mode. */
+ /* USER CODE BEGIN 2 */
+ if (hpcd->Init.low_power_enable)
+ {
+ HAL_SuspendTick();
+
+ /* Stop 1 mode with Main Regulator */
+ PWR->CR1 |= PWR_CR1_LPMS_STOP1;
+ /* Set SLEEPDEEP bit of Cortex System Control Register. */
+ SCB->SCR |= (uint32_t)(SCB_SCR_SLEEPDEEP_Msk);
+ }
+ /* USER CODE END 2 */
+ /* USER CODE BEGIN HAL_PCD_SuspendCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_SuspendCallback_PostTreatment */
+}
+
+/**
+ * @brief Resume callback.
+ * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PreTreatment */
+
+ /* USER CODE BEGIN 3 */
+ if (hpcd->Init.low_power_enable)
+ {
+ HAL_ResumeTick();
+ /* Reset SLEEPDEEP bit of Cortex System Control Register. */
+ SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
+ }
+ /* USER CODE END 3 */
+
+ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ResumeCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ResumeCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOOUTIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PreTreatment */
+ USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOOUTIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief ISOINIncomplete callback.
+ * @param hpcd: PCD handle
+ * @param epnum: Endpoint number
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#else
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PreTreatment */
+ USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
+ /* USER CODE BEGIN HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ISOINIncompleteCallback_PostTreatment */
+}
+
+/**
+ * @brief Connect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PreTreatment */
+ USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_ConnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_ConnectCallback_PostTreatment */
+}
+
+/**
+ * @brief Disconnect callback.
+ * @param hpcd: PCD handle
+ * @retval None
+ */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#else
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PreTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PreTreatment */
+ USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
+ /* USER CODE BEGIN HAL_PCD_DisconnectCallback_PostTreatment */
+
+ /* USER CODE END HAL_PCD_DisconnectCallback_PostTreatment */
+}
+
+ /* USER CODE BEGIN LowLevelInterface */
+
+ /* USER CODE END LowLevelInterface */
+
+/*******************************************************************************
+ LL Driver Interface (USB Device Library --> PCD)
+*******************************************************************************/
+
+/**
+ * @brief Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
+{
+ /* Init USB Ip. */
+ hpcd_USB_FS.pData = pdev;
+ /* Link the driver to the stack. */
+ pdev->pData = &hpcd_USB_FS;
+
+ hpcd_USB_FS.Instance = USB;
+ hpcd_USB_FS.Init.dev_endpoints = 8;
+ hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
+ hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+ hpcd_USB_FS.Init.Sof_enable = DISABLE;
+ hpcd_USB_FS.Init.low_power_enable = ENABLE;
+ hpcd_USB_FS.Init.lpm_enable = DISABLE;
+ hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
+
+ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* register Msp Callbacks (before the Init) */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPINIT_CB_ID, PCD_MspInit);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_MSPDEINIT_CB_ID, PCD_MspDeInit);
+ #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+ if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
+ {
+ Error_Handler( );
+ }
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+ /* Register USB PCD CallBacks */
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SOF_CB_ID, PCD_SOFCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SETUPSTAGE_CB_ID, PCD_SetupStageCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESET_CB_ID, PCD_ResetCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_SUSPEND_CB_ID, PCD_SuspendCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_RESUME_CB_ID, PCD_ResumeCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_CONNECT_CB_ID, PCD_ConnectCallback);
+ HAL_PCD_RegisterCallback(&hpcd_USB_FS, HAL_PCD_DISCONNECT_CB_ID, PCD_DisconnectCallback);
+ /* USER CODE BEGIN RegisterCallBackFirstPart */
+
+ /* USER CODE END RegisterCallBackFirstPart */
+ HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_FS, PCD_DataOutStageCallback);
+ HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
+ HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
+ HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
+ /* USER CODE BEGIN RegisterCallBackSecondPart */
+
+ /* USER CODE END RegisterCallBackSecondPart */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+ /* USER CODE BEGIN EndPoint_Configuration */
+ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, 0x00, PCD_SNG_BUF, 0x0C);
+ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, 0x80, PCD_SNG_BUF, 0x4C);
+ /* USER CODE END EndPoint_Configuration */
+ /* USER CODE BEGIN EndPoint_Configuration_HID */
+ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData, HID_EPIN_ADDR, PCD_SNG_BUF, 0x8C);
+ /* USER CODE END EndPoint_Configuration_HID */
+ return USBD_OK;
+}
+
+/**
+ * @brief De-Initializes the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_DeInit(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Starts the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Start(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Stops the low level portion of the device driver.
+ * @param pdev: Device handle
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_Stop(pdev->pData);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Opens an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param ep_type: Endpoint type
+ * @param ep_mps: Endpoint max packet size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Closes an endpoint of the low level driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Flushes an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Sets a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Clears a Stall condition on an endpoint of the Low Level Driver.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns Stall condition.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Stall (1: Yes, 0: No)
+ */
+uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
+
+ if((ep_addr & 0x80) == 0x80)
+ {
+ return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
+ }
+ else
+ {
+ return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
+ }
+}
+
+/**
+ * @brief Assigns a USB address to the device.
+ * @param pdev: Device handle
+ * @param dev_addr: Device address
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Transmits data over an endpoint.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be sent
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Prepares an endpoint for reception.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @param pbuf: Pointer to data to be received
+ * @param size: Data size
+ * @retval USBD status
+ */
+USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
+{
+ HAL_StatusTypeDef hal_status = HAL_OK;
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
+
+ usb_status = USBD_Get_USB_Status(hal_status);
+
+ return usb_status;
+}
+
+/**
+ * @brief Returns the last transferred packet size.
+ * @param pdev: Device handle
+ * @param ep_addr: Endpoint number
+ * @retval Received Data Size
+ */
+uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
+{
+ return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
+}
+
+/**
+ * @brief Delays routine for the USB Device Library.
+ * @param Delay: Delay in ms
+ * @retval None
+ */
+void USBD_LL_Delay(uint32_t Delay)
+{
+ HAL_Delay(Delay);
+}
+
+/**
+ * @brief Static single allocation.
+ * @param size: Size of allocated memory
+ * @retval None
+ */
+void *USBD_static_malloc(uint32_t size)
+{
+ static uint32_t mem[(sizeof(USBD_HID_HandleTypeDef)/4)+1];/* On 32-bit boundary */
+ return mem;
+}
+
+/**
+ * @brief Dummy memory free
+ * @param p: Pointer to allocated memory address
+ * @retval None
+ */
+void USBD_static_free(void *p)
+{
+
+}
+
+/* USER CODE BEGIN 5 */
+/**
+ * @brief Configures system clock after wake-up from USB resume callBack:
+ * enable HSI, PLL and select PLL as system clock source.
+ * @retval None
+ */
+ void SystemClockConfig_Resume(void)
+{
+ SystemClock_Config();
+ USBD_Clock_Config();
+}
+/* USER CODE END 5 */
+
+/**
+ * @brief Returns the USB status depending on the HAL status:
+ * @param hal_status: HAL status
+ * @retval USB status
+ */
+USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+ USBD_StatusTypeDef usb_status = USBD_OK;
+
+ switch (hal_status)
+ {
+ case HAL_OK :
+ usb_status = USBD_OK;
+ break;
+ case HAL_ERROR :
+ usb_status = USBD_FAIL;
+ break;
+ case HAL_BUSY :
+ usb_status = USBD_BUSY;
+ break;
+ case HAL_TIMEOUT :
+ usb_status = USBD_FAIL;
+ break;
+ default :
+ usb_status = USBD_FAIL;
+ break;
+ }
+ return usb_status;
+}
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
new file mode 100644
index 000000000..57e14209f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
@@ -0,0 +1,177 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h
+ * @author MCD Application Team
+ * @brief Header for usbd_conf.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+#include
+#include
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/* USER CODE BEGIN INCLUDE */
+
+/* USER CODE END INCLUDE */
+
+/** @addtogroup USBD_OTG_DRIVER
+ * @brief Driver for Usb device.
+ * @{
+ */
+
+/** @defgroup USBD_CONF USBD_CONF
+ * @brief Configuration file for Usb otg low level driver.
+ * @{
+ */
+
+/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
+ * @brief Public variables.
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
+ * @brief Defines for configuration of the Usb device.
+ * @{
+ */
+
+/*---------- -----------*/
+#define USBD_MAX_NUM_INTERFACES 1U
+/*---------- -----------*/
+#define USBD_MAX_NUM_CONFIGURATION 1U
+/*---------- -----------*/
+#define USBD_MAX_STR_DESC_SIZ 64U
+/*---------- -----------*/
+#define USBD_DEBUG_LEVEL 0U
+/*---------- -----------*/
+#define USBD_LPM_ENABLED 0U
+/*---------- -----------*/
+#define USBD_SELF_POWERED 1U
+/*---------- -----------*/
+#define HID_FS_BINTERVAL 0xAU
+
+/****************************************/
+/* #define for FS and HS identification */
+#define DEVICE_FS 0
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
+ * @brief Aliases.
+ * @{
+ */
+
+/* Memory management macros */
+
+/** Alias for memory allocation. */
+#define USBD_malloc (void *)USBD_static_malloc
+
+/** Alias for memory release. */
+#define USBD_free USBD_static_free
+
+/** Alias for memory set. */
+#define USBD_memset memset
+
+/** Alias for memory copy. */
+#define USBD_memcpy memcpy
+
+/** Alias for delay. */
+#define USBD_Delay HAL_Delay
+
+/* DEBUG macros */
+
+#if (USBD_DEBUG_LEVEL > 0)
+#define USBD_UsrLog(...) printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_UsrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 1)
+
+#define USBD_ErrLog(...) printf("ERROR: ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_ErrLog(...)
+#endif
+
+#if (USBD_DEBUG_LEVEL > 2)
+#define USBD_DbgLog(...) printf("DEBUG : ") ;\
+ printf(__VA_ARGS__);\
+ printf("\n");
+#else
+#define USBD_DbgLog(...)
+#endif
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
+ * @brief Types.
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
+ * @brief Declaration of public functions for Usb device.
+ * @{
+ */
+
+/* Exported functions -------------------------------------------------------*/
+void *USBD_static_malloc(uint32_t size);
+void USBD_static_free(void *p);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBD_CONF__H__ */
+
diff --git a/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt
new file mode 100644
index 000000000..85dd4d595
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Applications/USB_Device/HID_Standalone/readme.txt
@@ -0,0 +1,101 @@
+/**
+ @page HID_Standalone USB Device Human Interface (HID) application
+
+ @verbatim
+ ******************************************************************************
+ * @file USB_Device/HID_Standalone/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the USB HID application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Application Description
+
+Use of the USB device application based on the Human Interface (HID).
+ This is a typical application on how to use the stm32g4xx USB Device peripheral, where the STM32 MCU is
+enumerated as a HID device using the native PC Host HID driver to which the STM32G474E-EVAL1 Rev B
+board is connected, in order to emulate the Mouse directions using User push-button mounted on the
+STM32G474E-EVAL1 Rev B board.
+
+At the beginning of the main program the HAL_Init() function is called to reset all the peripherals,
+initialize the Flash interface and the systick. The user is provided with the SystemClock_Config()
+function to configure the system clock (SYSCLK). The Full Speed (FS) USB module uses
+internally a 48-MHz clock which is coming from a specific output of two PLLs (PLL or PLL SAI) or from MSI
+
+This example supports remote wakeup (which is the ability of a USB device to bring a suspended bus back
+to the active condition), and the User push-button is used as the remote wakeup source.
+
+By default, in Windows powered PC the Power Management feature of USB mouse devices is turned off.
+This setting is different from classic PS/2 computer functionality. Therefore, to enable the Wake from
+standby option, user must manually turn on the Power Management feature for the USB mouse.
+
+To manually enable the wake from standby option for the USB mouse, proceed as follows:
+ - Start "Device Manager",
+ - Select "Mice and other pointing devices",
+ - Select the "HID-compliant mouse" device (make sure that PID & VID are equal to 0x5710 & 0x0483 respectively)
+ - Right click and select "Properties",
+ - Select "Power Management" tab,
+ - Finally click to select "Allow this device to wake the computer" check box.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+For more details about the STM32Cube USB Device library, please refer to UM1734
+"STM32Cube USB Device library".
+
+@par Keywords
+
+Connectivity, USB_Device, USB, HID, Full Speed, Mouse, Remote Wakeup
+
+@par Directory contents
+
+ - USB_Device/HID_Standalone/Core/Src/main.c Main program
+ - USB_Device/HID_Standalone/Core/Src/stm32g4xx_hal_msp.c MSP Initialization and de-Initialization codes
+ - USB_Device/HID_Standalone/Core/Src/system_stm32g4xx.c STM32G4xx system clock configuration file
+ - USB_Device/HID_Standalone/Core/Src/stm32g4xx_it.c Interrupt handlers
+ - USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.c General low level driver configuration
+ - USB_Device/HID_Standalone/USB_Device/App/usbd_desc.c USB device HID descriptor
+ - USB_Device/HID_Standalone/USB_Device/App/usbd_device.c USB Device
+ - USB_Device/HID_Standalone/Core/Inc/main.h Main program header file
+ - USB_Device/HID_Standalone/Core/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - USB_Device/HID_Standalone/Core/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - USB_Device/HID_Standalone/USB_Device/Target/usbd_conf.h USB device driver Configuration file
+ - USB_Device/HID_Standalone/USB_Device/App/usbd_desc.h USB device HID descriptor header file
+ - USB_Device/HID_Standalone/USB_Device/App/usbd_device.h USB Device header
+
+
+@par Hardware and Software environment
+
+ - This application runs on STM32G4xx devices.
+
+ - This application has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B board
+ and can be easily tailored to any other supported device and development board.
+
+ - STM32G474E-EVAL1 Rev B board Set-up
+ -Connect the STM32G474E-EVAL1 Rev B board CN22 to the PC through "TYPE-C" to "Standard A" cable.
+ - Press the User push-button to move the cursor.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the application
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc
new file mode 100644
index 000000000..198dbd3ee
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/ADC_ContinuousConversion_TriggerSW.ioc
@@ -0,0 +1,149 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=ENABLE
+ADC1.DMAContinuousRequests=DISABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_SOFTWARE_START
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_NONE
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,ScanConvMode,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,LowPowerAutoWait,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_ContinuousConversion_TriggerSW.ioc
+ProjectManager.ProjectName=ADC_ContinuousConversion_TriggerSW
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=ADC_ContinuousConversion_TriggerSW
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd
new file mode 100644
index 000000000..a4313e5ad
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ ADC_ContinuousConversion_TriggerSW
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp
new file mode 100644
index 000000000..30d312309
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/ADC_ContinuousConversion_TriggerSW.ewp
@@ -0,0 +1,1158 @@
+
+
+ 3
+
+ ADC_ContinuousConversion_TriggerSW
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ ADC_ContinuousConversion_TriggerSW/Exe
+
+
+ ObjPath
+ ADC_ContinuousConversion_TriggerSW/Obj
+
+
+ ListPath
+ ADC_ContinuousConversion_TriggerSW/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ADC_ContinuousConversion_TriggerSW.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ADC_ContinuousConversion_TriggerSW.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww
new file mode 100644
index 000000000..febbfd9cf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\ADC_ContinuousConversion_TriggerSW.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
new file mode 100644
index 000000000..9810a85cc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
@@ -0,0 +1,100 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Definitions of environment analog values */
+ /* Value of analog reference voltage (Vref+), connected to analog voltage */
+ /* supply Vdda (unit: mV). */
+ #define VDDA_APPLI ((uint32_t)3300)
+
+/* Definitions of data related to this example */
+ /* Full-scale digital value with a resolution of 12 bits (voltage range */
+ /* determined by analog voltage references Vref+ and Vref-, */
+ /* refer to reference manual). */
+ #define DIGITAL_SCALE_12BITS ((uint32_t) 0xFFF)
+
+ /* Init variable out of ADC expected conversion data range */
+ #define VAR_CONVERTED_DATA_INIT_VALUE (DIGITAL_SCALE_12BITS + 1)
+
+/* Private macro -------------------------------------------------------------*/
+
+/**
+ * @brief Macro to calculate the voltage (unit: mVolt)
+ * corresponding to a ADC conversion data (unit: digital value).
+ * @note ADC measurement data must correspond to a resolution of 12bits
+ * (full scale digital value 4095). If not the case, the data must be
+ * preliminarily rescaled to an equivalent resolution of 12 bits.
+ * @note Analog reference voltage (Vref+) must be known from
+ * user board environment.
+ * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
+ * @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
+ * (unit: digital value).
+ * @retval ADC conversion data equivalent voltage value (unit: mVolt)
+ */
+#define __ADC_CALC_DATA_VOLTAGE(__VREFANALOG_VOLTAGE__, __ADC_DATA__) \
+ ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) / DIGITAL_SCALE_12BITS)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..8255a59a9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..231e6bacc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx
new file mode 100644
index 000000000..e45888dbc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvoptx
@@ -0,0 +1,677 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ ADC_ContinuousConversion_TriggerSW
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+
+ 0
+ 1
+ uhADCxConvertedData,0x0A
+
+
+ 1
+ 1
+ uhADCxConvertedData_Voltage_mVolt,0x0A
+
+
+
+
+ 1
+ 0
+ uhADCxConvertedData
+ 0
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 1
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+ stm32g4xx_hal_adc.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+ stm32g4xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+ stm32g4xx_ll_adc.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx
new file mode 100644
index 000000000..9a9b98938
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/ADC_ContinuousConversion_TriggerSW.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ ADC_ContinuousConversion_TriggerSW
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ ADC_ContinuousConversion_TriggerSW\Exe\
+ ADC_ContinuousConversion_TriggerSW
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ stm32g4xx_hal_adc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ stm32g4xx_ll_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6015c7765
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project
new file mode 100644
index 000000000..a2c479e77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+
+
+ ADC_ContinuousConversion_TriggerSW
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ ADC_ContinuousConversion_TriggerSW.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/ADC_ContinuousConversion_TriggerSW.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
new file mode 100644
index 000000000..f8ce35103
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
@@ -0,0 +1,341 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c
+ * @author MCD Application Team
+ * @brief This example provides a short description of how to use the ADC
+ * peripheral to perform conversions in continuous mode.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variables for ADC conversion data */
+uint16_t uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE; /* ADC group regular conversion data */
+
+/* Variables for ADC conversion data computation to physical values */
+uint16_t uhADCxConvertedData_Voltage_mVolt = 0; /* Value of voltage calculated from ADC conversion data (unit: mV) */
+
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_ADC1_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_ADC1_Init();
+ /* USER CODE BEGIN 2 */
+
+ /* Initialize LED on board */
+ BSP_LED_Init(LED1);
+
+
+ /* Run the ADC calibration in single-ended mode */
+ if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+ {
+ /* Calibration Error */
+ Error_Handler();
+ }
+
+
+ /* Start ADC conversion */
+ if (HAL_ADC_Start(&hadc1) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ /* Wait for the first ADC conversion to be completed (timeout unit: ms) */
+ if (HAL_ADC_PollForConversion(&hadc1, 2) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* Note: At this step, you can use potentiometer on board connected */
+ /* to ADC channel input to perform a ADC conversion */
+ /* on a determined voltage level. */
+
+ /* Get ADC1 converted data */
+ /* Note: At this step, ADC is performing ADC conversions continuously, */
+ /* indefinitely (ADC continuous mode enabled in this example). */
+ /* Main program reads frequently ADC conversion data */
+ /* (without waiting for end of each conversion: software reads data */
+ /* when main program execution pointer is available and can let */
+ /* some ADC conversions data unread and overwritten by newer data) */
+ /* and stores it into the same variable. */
+ uhADCxConvertedData = HAL_ADC_GetValue(&hadc1);
+
+ /* Compute the voltage */
+ uhADCxConvertedData_Voltage_mVolt = __ADC_CALC_DATA_VOLTAGE(VDDA_APPLI, uhADCxConvertedData);
+
+ /* Toggle LED1 at each conversion */
+ BSP_LED_Toggle(LED1);
+
+ /* Note: ADC conversions data are stored into variable */
+ /* "uhADCxConvertedData". */
+ /* (for debug: see variable content into watch window). */
+
+ /* Note: ADC conversion data are computed to physical values */
+ /* into variable "uhADCxConvertedData_Voltage_mVolt" */
+ /* using helper macro "__ADC_CALC_DATA_VOLTAGE()". */
+ /* (for debug: see variable content into watch window). */
+
+
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_MultiModeTypeDef multimode = {0};
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+
+ /** Common config
+ */
+ hadc1.Instance = ADC1;
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc1.Init.GainCompensation = 0;
+ hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ hadc1.Init.LowPowerAutoWait = DISABLE;
+ hadc1.Init.ContinuousConvMode = ENABLE;
+ hadc1.Init.NbrOfConversion = 1;
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ hadc1.Init.DMAContinuousRequests = DISABLE;
+ hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+ hadc1.Init.OversamplingMode = DISABLE;
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure the ADC multi-mode
+ */
+ multimode.Mode = ADC_MODE_INDEPENDENT;
+ if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Regular Channel
+ */
+ sConfig.Channel = ADC_CHANNEL_6;
+ sConfig.Rank = ADC_REGULAR_RANK_1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+ sConfig.SingleDiff = ADC_SINGLE_ENDED;
+ sConfig.OffsetNumber = ADC_OFFSET_NONE;
+ sConfig.Offset = 0;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/* USER IRQ HANDLER TREATMENT */
+/******************************************************************************/
+
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ Error_Handler();
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..1a08f6d4c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,158 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspInit 0 */
+
+ /* USER CODE END ADC1_MspInit 0 */
+
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+ PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC12_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN ADC1_MspInit 1 */
+
+ /* USER CODE END ADC1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+ /* USER CODE END ADC1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC12_CLK_DISABLE();
+
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+ /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+ /* USER CODE END ADC1_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..b170598b9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
@@ -0,0 +1,119 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt
new file mode 100644
index 000000000..0396c2dde
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt
@@ -0,0 +1,91 @@
+/**
+ @page ADC_ContinuousConversion_TriggerSW ADC example
+
+ @verbatim
+ ******************************************************************************
+ * @file Examples/ADC/ADC_ContinuousConversion_TriggerSW/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the ADC_ContinuousConversion_TriggerSW example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+This example provides a short description of how to use the ADC peripheral to
+perform conversions in continuous mode.
+
+Example configuration:
+ADC is configured to convert a single channel, in continuous conversion mode,
+from SW trigger.
+
+Example execution:
+The ADC launch conversions in continuous mode on the selected channel.
+Then waits for the first conversion completion before reading the conversion results.
+With the continuous conversion mode and the data overwrite functionality enabled,
+ADC is continuously converting data and updating the ADC data register with new values.
+
+For debug: variables to monitor with debugger watch window:
+ - "uhADCxConvertedData": ADC group regular conversion data
+ - "uhADCxConvertedData_Voltage_mVolt": ADC conversion data computation to physical values
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+ to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+ 1 GPIO for LED
+ 1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+
+Board settings:
+ - ADC is configured to convert ADC_CHANNEL_6 (pin 46 on connector CN5).
+ - The voltage input on ADC channel is provided by the on-board potentiometer (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+To observe voltage level applied on ADC channel through GPIO, connect a voltmeter on
+pin PC0 (pin 46 on connector CN5).
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is toggling after each data read
+ - Error: In case of other errors, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, continuous mode, Continuous conversion, trigger software
+
+@par Directory contents
+
+ - ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - ADC/ADC_ContinuousConversion_TriggerSW/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - ADC/ADC_ContinuousConversion_TriggerSW/Inc/main.h Header for main.c module
+ - ADC/ADC_ContinuousConversion_TriggerSW/Src/stm32g4xx_it.c Interrupt handlers
+ - ADC/ADC_ContinuousConversion_TriggerSW/Src/main.c Main program
+ - ADC/ADC_ContinuousConversion_TriggerSW/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474xx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc
new file mode 100644
index 000000000..3bede74c5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/ADC_GainCompensation.ioc
@@ -0,0 +1,190 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.GainCompensation=VDDA_APPLI * GAIN_COMPENSATION_X1_FACTOR / DIGITAL_SCALE_12BITS
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,GainCompensation,ScanConvMode,EOCSelection,LowPowerAutoWait,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,Overrun,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.IPParametersWithoutCheck=GainCompensation
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_MEDIUM
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM1
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=PB11
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM1_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PB11.Mode=IN14-Single-Ended
+PB11.Signal=ADC1_IN14
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_GainCompensation.ioc
+ProjectManager.ProjectName=ADC_GainCompensation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.Dithering=Disable
+TIM1.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2
+TIM1.PeriodNoDither=499
+TIM1.Prescaler=149
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ClockSourceINT.Mode=Internal
+VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_GainCompensation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd
new file mode 100644
index 000000000..00f22a0aa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ ADC_GainCompensation
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp
new file mode 100644
index 000000000..bc4c69fdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/ADC_GainCompensation.ewp
@@ -0,0 +1,1158 @@
+
+
+ 3
+
+ ADC_GainCompensation
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ ADC_GainCompensation/Exe
+
+
+ ObjPath
+ ADC_GainCompensation/Obj
+
+
+ ListPath
+ ADC_GainCompensation/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ADC_GainCompensation.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ADC_GainCompensation.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww
new file mode 100644
index 000000000..28843cb63
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\ADC_GainCompensation.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h
new file mode 100644
index 000000000..0d68336c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/main.h
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* User can use this section to tailor ADCx instance under use and associated
+ resources */
+
+/* Definitions of data related to this example */
+ /* Full-scale digital value with a resolution of 12 bits (voltage range */
+ /* determined by analog voltage references Vref+ and Vref-, */
+ /* refer to reference manual). */
+ #define DIGITAL_SCALE_12BITS (0xFFFUL)
+
+ /* Init variable out of ADC expected conversion data range */
+ #define VAR_CONVERTED_DATA_INIT_VALUE (DIGITAL_SCALE_12BITS + 1)
+
+ /* Gain compensation x1 factor */
+ #define GAIN_COMPENSATION_X1_FACTOR (0x1000UL)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..8f42c2fdb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx
new file mode 100644
index 000000000..03bc7cdd3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvoptx
@@ -0,0 +1,664 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ ADC_GainCompensation
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+
+ 0
+ 1
+ uhADCxConvertedData
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+ stm32g4xx_hal_adc.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+ stm32g4xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+ stm32g4xx_ll_adc.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx
new file mode 100644
index 000000000..265307b70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/ADC_GainCompensation.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ ADC_GainCompensation
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ ADC_GainCompensation\Exe\
+ ADC_GainCompensation
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ stm32g4xx_hal_adc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ stm32g4xx_ll_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..c45a2d331
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project
new file mode 100644
index 000000000..dfa0571fc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+
+
+ ADC_GainCompensation
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ ADC_GainCompensation.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/ADC_GainCompensation.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c
new file mode 100644
index 000000000..196f2ce59
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/main.c
@@ -0,0 +1,393 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/Src/main.c
+ * @author MCD Application Team
+ * @brief This example provides a short description of how to use the ADC
+ * peripheral with sequencer, to convert several channels.
+ * Channels converted are 1 channel on external pin and 2 internal
+ * channels (VrefInt and temperature sensor).
+ * Moreover, voltage and temperature are then computed.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* Definitions of environment analog values */
+ /* Value of analog reference voltage (Vref+), connected to analog voltage */
+ /* supply Vdda (unit: mV). */
+ #define VDDA_APPLI (3300U)
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variables for ADC conversion data computation to physical values */
+__IO uint16_t uhADCxConvertedData_Voltage_mVolt = 0U; /* Value of voltage on GPIO pin (on which is mapped ADC channel) calculated from ADC conversion data (unit: mV) */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_ADC1_Init();
+ MX_TIM1_Init();
+ /* USER CODE BEGIN 2 */
+ uhADCxConvertedData_Voltage_mVolt = VAR_CONVERTED_DATA_INIT_VALUE;
+
+ /* Initialize LED on board */
+ BSP_LED_Init(LED1);
+
+ /* Run the ADC calibration in single-ended mode */
+ if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+ {
+ /* Calibration Error */
+ Error_Handler();
+ }
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+
+ /*## Start ADC conversions ###############################################*/
+ /* Start ADC group regular conversion with DMA */
+ if (HAL_ADC_Start_DMA(&hadc1,
+ (uint32_t *)&uhADCxConvertedData_Voltage_mVolt,
+ 1
+ ) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ /* Start Timer trigger */
+ if (HAL_TIM_Base_Start(&htim1) != HAL_OK)
+ {
+ /* Counter enable error */
+ Error_Handler();
+ }
+
+ BSP_LED_On(LED1);
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_MultiModeTypeDef multimode = {0};
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+
+ /** Common config
+ */
+ hadc1.Instance = ADC1;
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc1.Init.GainCompensation = VDDA_APPLI * GAIN_COMPENSATION_X1_FACTOR / DIGITAL_SCALE_12BITS;
+ hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ hadc1.Init.LowPowerAutoWait = DISABLE;
+ hadc1.Init.ContinuousConvMode = DISABLE;
+ hadc1.Init.NbrOfConversion = 1;
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+ hadc1.Init.DMAContinuousRequests = ENABLE;
+ hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+ hadc1.Init.OversamplingMode = DISABLE;
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure the ADC multi-mode
+ */
+ multimode.Mode = ADC_MODE_INDEPENDENT;
+ if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Regular Channel
+ */
+ sConfig.Channel = ADC_CHANNEL_6;
+ sConfig.Rank = ADC_REGULAR_RANK_1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+ sConfig.SingleDiff = ADC_SINGLE_ENDED;
+ sConfig.OffsetNumber = ADC_OFFSET_NONE;
+ sConfig.Offset = 0;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+ * @brief TIM1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM1_Init(void)
+{
+
+ /* USER CODE BEGIN TIM1_Init 0 */
+
+ /* USER CODE END TIM1_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+ /* USER CODE BEGIN TIM1_Init 1 */
+
+ /* USER CODE END TIM1_Init 1 */
+ htim1.Instance = TIM1;
+ htim1.Init.Prescaler = 149;
+ htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim1.Init.Period = 499;
+ htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim1.Init.RepetitionCounter = 0;
+ htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+ sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM1_Init 2 */
+
+ /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ while(1)
+ {
+ /* Toggle LED1 */
+ BSP_LED_Off(LED1);
+ HAL_Delay(800);
+ BSP_LED_On(LED1);
+ HAL_Delay(10);
+ BSP_LED_Off(LED1);
+ HAL_Delay(180);
+ BSP_LED_On(LED1);
+ HAL_Delay(10);
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ Error_Handler();
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..50a5c8710
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,233 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspInit 0 */
+
+ /* USER CODE END ADC1_MspInit 0 */
+
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+ PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC12_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ PB11 ------> ADC1_IN14
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_11;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* ADC1 DMA Init */
+ /* ADC1 Init */
+ hdma_adc1.Instance = DMA1_Channel1;
+ hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+ hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+ hdma_adc1.Init.Mode = DMA_CIRCULAR;
+ hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM;
+ if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+ /* USER CODE BEGIN ADC1_MspInit 1 */
+
+ /* USER CODE END ADC1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+ /* USER CODE END ADC1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC12_CLK_DISABLE();
+
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ PB11 ------> ADC1_IN14
+ */
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11);
+
+ /* ADC1 DMA DeInit */
+ HAL_DMA_DeInit(hadc->DMA_Handle);
+ /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+ /* USER CODE END ADC1_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspInit 0 */
+
+ /* USER CODE END TIM1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM1_CLK_ENABLE();
+ /* USER CODE BEGIN TIM1_MspInit 1 */
+
+ /* USER CODE END TIM1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+ /* USER CODE END TIM1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM1_CLK_DISABLE();
+ /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+ /* USER CODE END TIM1_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..8315a7b3f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
@@ -0,0 +1,219 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles DMA1 channel1 global interrupt.
+ */
+void DMA1_Channel1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_adc1);
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt
new file mode 100644
index 000000000..c24e4b8db
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GainCompensation/readme.txt
@@ -0,0 +1,90 @@
+/**
+ @page ADC_GainCompensation ADC example
+
+ @verbatim
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GainCompensation/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the ADC_GainCompensation example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+Use ADC Gain compensation feature to get directly voltage in mVolt from conversion
+without need of data post computing.
+
+Example configuration:
+The channel is converted upon a timer trigger and result of conversions are stored
+into a variable by DMA, operating in circular mode.
+
+Example execution:
+From the start, the ADC converts the selected channel continuously, DMA transfers
+conversion data to a variable:
+ uhADCxConvertedData_Voltage_mVolt
+
+For debug: variable to monitor with debugger watch window:
+ - "uhADCxConvertedData_Voltage_mVolt": ADC converted data in mVolt
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+ to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+ 1 GPIO for LED
+ 1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+ TIMER
+ DMA
+
+Board settings:
+ - The voltage input on the ADC channel is provided by the on-board potentiometer
+ (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, Single conversion, Gain compensation, Timer trigger
+
+@par Directory contents
+
+ - ADC/ADC_GainCompensation/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - ADC/ADC_GainCompensation/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - ADC/ADC_GainCompensation/Inc/main.h Header for main.c module
+ - ADC/ADC_GainCompensation/Src/stm32g4xx_it.c Interrupt handlers
+ - ADC/ADC_GainCompensation/Src/stm32g4xx_hal_msp.c HAL MSP module
+ - ADC/ADC_GainCompensation/Src/main.c Main program
+ - ADC/ADC_GainCompensation/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474xx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc
new file mode 100644
index 000000000..17294cc16
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/ADC_GroupsRegularInjected.ioc
@@ -0,0 +1,196 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=ADC_CHANNEL_VREFINT|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=ENABLE
+ADC1.EnableInjectedOversampling=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T2_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.ExternalTrigInjecConv=ADC_INJECTED_SOFTWARE_START
+ADC1.ExternalTrigInjecConvEdge=ADC_EXTERNALTRIGINJECCONV_EDGE_NONE
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,ScanConvMode,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,EOCSelection,Overrun,LowPowerAutoWait,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableInjectedOversampling,InjNumberOfConversion,ExternalTrigInjecConv,ExternalTrigInjecConvEdge,InjectedConvMode,injectedQueueMode,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,InjectedRank-1\#ChannelInjectedConversion,InjectedChannel-1\#ChannelInjectedConversion,InjectedSamplingTime-1\#ChannelInjectedConversion,InjectedOffsetNumber-1\#ChannelInjectedConversion,master,CommonPathInternal
+ADC1.InjNumberOfConversion=1
+ADC1.InjectedChannel-1\#ChannelInjectedConversion=ADC_CHANNEL_VREFINT
+ADC1.InjectedConvMode=None
+ADC1.InjectedOffsetNumber-1\#ChannelInjectedConversion=ADC_OFFSET_NONE
+ADC1.InjectedRank-1\#ChannelInjectedConversion=1
+ADC1.InjectedSamplingTime-1\#ChannelInjectedConversion=ADC_SAMPLETIME_47CYCLES_5
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_6CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.injectedQueueMode=DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_HIGH
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM2
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_ADC1_Vref_Input
+Mcu.Pin2=VP_SYS_VS_Systick
+Mcu.Pin3=VP_SYS_VS_DBSignals
+Mcu.Pin4=VP_TIM2_VS_ClockSourceINT
+Mcu.PinsNb=5
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_GroupsRegularInjected.ioc
+ProjectManager.ProjectName=ADC_GroupsRegularInjected
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM2.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM2.CounterMode=TIM_COUNTERMODE_UP
+TIM2.IPParameters=Prescaler,CounterMode,Period,ClockDivision,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger
+TIM2.Period=49999
+TIM2.Prescaler=2
+TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM2.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_ADC1_Vref_Input.Mode=IN-Vrefint
+VP_ADC1_Vref_Input.Signal=ADC1_Vref_Input
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM2_VS_ClockSourceINT.Mode=Internal
+VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_GroupsRegularInjected
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd
new file mode 100644
index 000000000..8ae767c29
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ ADC_GroupsRegularInjected
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp
new file mode 100644
index 000000000..4756e516d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/ADC_GroupsRegularInjected.ewp
@@ -0,0 +1,1158 @@
+
+
+ 3
+
+ ADC_GroupsRegularInjected
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ ADC_GroupsRegularInjected/Exe
+
+
+ ObjPath
+ ADC_GroupsRegularInjected/Obj
+
+
+ ListPath
+ ADC_GroupsRegularInjected/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ADC_GroupsRegularInjected.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ADC_GroupsRegularInjected.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww
new file mode 100644
index 000000000..8f1dfc4d6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\ADC_GroupsRegularInjected.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h
new file mode 100644
index 000000000..abd845994
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/main.h
@@ -0,0 +1,81 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* Definitions of data related to this example */
+ /* Full-scale digital value with a resolution of 12 bits (voltage range */
+ /* determined by analog voltage references Vref+ and Vref-, */
+ /* refer to reference manual). */
+ #define DIGITAL_SCALE_12BITS ((uint32_t) 0xFFF)
+
+ /* Init variable out of ADC expected conversion data range */
+ #define VAR_CONVERTED_DATA_INIT_VALUE (DIGITAL_SCALE_12BITS + 1)
+
+ /* Definition of ADCx conversions data table size */
+ #define ADC_CONVERTED_DATA_BUFFER_SIZE ((uint32_t) 64)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..56731dc68
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h
@@ -0,0 +1,62 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void ADC1_2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx
new file mode 100644
index 000000000..1bba9e924
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvoptx
@@ -0,0 +1,669 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ ADC_GroupsRegularInjected
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+
+ 0
+ 1
+ aADCxConvertedData,0x0A
+
+
+ 1
+ 1
+ uhADCxConvertedData_Injected,0x0A
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+ stm32g4xx_hal_adc.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+ stm32g4xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+ stm32g4xx_ll_adc.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx
new file mode 100644
index 000000000..082446533
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/ADC_GroupsRegularInjected.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ ADC_GroupsRegularInjected
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ ADC_GroupsRegularInjected\Exe\
+ ADC_GroupsRegularInjected
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ stm32g4xx_hal_adc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ stm32g4xx_ll_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..883c5b4ae
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project
new file mode 100644
index 000000000..d34ddb7b7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+
+
+ ADC_GroupsRegularInjected
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ ADC_GroupsRegularInjected.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/ADC_GroupsRegularInjected.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c
new file mode 100644
index 000000000..b179fa7de
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/main.c
@@ -0,0 +1,476 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim2;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variable containing ADC conversions results */
+__IO uint16_t aADCxConvertedData[ADC_CONVERTED_DATA_BUFFER_SIZE]; /* ADC conversion results table of regular group, channel on rank1 */
+__IO uint16_t uhADCxConvertedData_Injected; /* ADC conversion result of injected group, channel on rank1 */
+
+__IO uint16_t uhADCxConvertedData_Regular_Avg; /* The average of the ADC conversion results table of regular group, channel on rank1 */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM2_Init(void);
+/* USER CODE BEGIN PFP */
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ uint32_t tmp_index_adc_converted_data = 0;
+ uint32_t tmp_inj, tmp_avg;
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_ADC1_Init();
+ MX_TIM2_Init();
+ /* USER CODE BEGIN 2 */
+ for (tmp_index_adc_converted_data = 0; tmp_index_adc_converted_data < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index_adc_converted_data++)
+ {
+ aADCxConvertedData[tmp_index_adc_converted_data] = VAR_CONVERTED_DATA_INIT_VALUE;
+ }
+
+ /* Initialize LED on board */
+ BSP_LED_Init(LED1);
+
+
+ /* Run the ADC calibration in single-ended mode */
+ if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+ {
+ /* Calibration Error */
+ Error_Handler();
+ }
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ /*## Enable Timer ########################################################*/
+ if (HAL_TIM_Base_Start(&htim2) != HAL_OK)
+ {
+ /* Counter enable error */
+ Error_Handler();
+ }
+
+ /*## Start ADC conversions ###############################################*/
+ /* Start ADC group regular conversion with DMA */
+ if (HAL_ADC_Start_DMA(&hadc1,
+ (uint32_t *)aADCxConvertedData,
+ ADC_CONVERTED_DATA_BUFFER_SIZE
+ ) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ while (1)
+ {
+ /* Note: At this step, you can use potentiometer on board connected */
+ /* to ADC channel input to perform a ADC conversion */
+ /* on a determined voltage level. */
+
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ /* Start ADC conversion on injected group */
+ if (HAL_ADCEx_InjectedStart_IT(&hadc1) != HAL_OK)
+ {
+ /* Start Conversation Error */
+ Error_Handler();
+ }
+ /* Wait for acquisition time of ADC samples on regular and injected */
+ /* groups: */
+ /* wait time to let complete buffer of regular group to be filled (in ms) */
+ HAL_Delay(2*ADC_CONVERTED_DATA_BUFFER_SIZE);
+
+ /* Turn-on/off LED1 in function of ADC conversion result */
+ /* - Turn-off if voltage measured by injected group is below voltage */
+ /* measured by regular group (average of results table) */
+ /* - Turn-off if voltage measured by injected group is above voltage */
+ /* measured by regular group (average of results table) */
+
+ /* Variables of conversions results are updated into ADC conversions */
+ /* interrupt callback. */
+ tmp_inj = uhADCxConvertedData_Injected;
+ tmp_avg = uhADCxConvertedData_Regular_Avg;
+ if (tmp_inj < tmp_avg)
+ {
+ BSP_LED_Off(LED1);
+ }
+ else
+ {
+ BSP_LED_On(LED1);
+ }
+
+ /* Note: ADC regular conversions data are stored into array */
+ /* "aADCxConvertedData" */
+ /* (for debug: see variable content into watch window). */
+
+ /* Note: ADC injected conversion data is stored into variable */
+ /* "uhADCxConvertedData_Injected" */
+ /* (for debug: see variable content into watch window). */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_MultiModeTypeDef multimode = {0};
+ ADC_ChannelConfTypeDef sConfig = {0};
+ ADC_InjectionConfTypeDef sConfigInjected = {0};
+
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+
+ /** Common config
+ */
+ hadc1.Instance = ADC1;
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc1.Init.GainCompensation = 0;
+ hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ hadc1.Init.LowPowerAutoWait = DISABLE;
+ hadc1.Init.ContinuousConvMode = DISABLE;
+ hadc1.Init.NbrOfConversion = 1;
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T2_TRGO;
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+ hadc1.Init.DMAContinuousRequests = ENABLE;
+ hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+ hadc1.Init.OversamplingMode = DISABLE;
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure the ADC multi-mode
+ */
+ multimode.Mode = ADC_MODE_INDEPENDENT;
+ if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Regular Channel
+ */
+ sConfig.Channel = ADC_CHANNEL_6;
+ sConfig.Rank = ADC_REGULAR_RANK_1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_6CYCLES_5;
+ sConfig.SingleDiff = ADC_SINGLE_ENDED;
+ sConfig.OffsetNumber = ADC_OFFSET_NONE;
+ sConfig.Offset = 0;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Injected Channel
+ */
+ sConfigInjected.InjectedChannel = ADC_CHANNEL_VREFINT;
+ sConfigInjected.InjectedRank = ADC_INJECTED_RANK_1;
+ sConfigInjected.InjectedSamplingTime = ADC_SAMPLETIME_47CYCLES_5;
+ sConfigInjected.InjectedSingleDiff = ADC_SINGLE_ENDED;
+ sConfigInjected.InjectedOffsetNumber = ADC_OFFSET_NONE;
+ sConfigInjected.InjectedOffset = 0;
+ sConfigInjected.InjectedNbrOfConversion = 1;
+ sConfigInjected.InjectedDiscontinuousConvMode = DISABLE;
+ sConfigInjected.AutoInjectedConv = DISABLE;
+ sConfigInjected.QueueInjectedContext = DISABLE;
+ sConfigInjected.ExternalTrigInjecConv = ADC_INJECTED_SOFTWARE_START;
+ sConfigInjected.ExternalTrigInjecConvEdge = ADC_EXTERNALTRIGINJECCONV_EDGE_NONE;
+ sConfigInjected.InjecOversamplingMode = DISABLE;
+ if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+ * @brief TIM2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM2_Init(void)
+{
+
+ /* USER CODE BEGIN TIM2_Init 0 */
+
+ /* USER CODE END TIM2_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+ /* USER CODE BEGIN TIM2_Init 1 */
+
+ /* USER CODE END TIM2_Init 1 */
+ htim2.Instance = TIM2;
+ htim2.Init.Prescaler = 2;
+ htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim2.Init.Period = 49999;
+ htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM2_Init 2 */
+
+ /* USER CODE END TIM2_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/* USER IRQ HANDLER TREATMENT */
+/******************************************************************************/
+
+
+/**
+ * @brief Conversion complete callback in non blocking mode
+ * @param hadc : ADC handle
+ * @note This example shows a simple way to report end of conversion
+ * and get conversion result. You can add your own implementation.
+ * @retval None
+ */
+void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
+{
+ uint32_t tmp_index = 0;
+ uint32_t tmp_average = 0; /* Variable 32 bits for intermediate processing */
+
+ /* Process average of the buffer */
+ for (tmp_index = 0; tmp_index < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index++)
+ {
+ tmp_average += aADCxConvertedData[tmp_index];
+ }
+ tmp_average /= (ADC_CONVERTED_DATA_BUFFER_SIZE);
+ uhADCxConvertedData_Regular_Avg = (uint16_t)tmp_average;
+}
+
+/**
+ * @brief Injected conversion complete callback in non blocking mode
+ * @param hadc: ADC handle
+ * @retval None
+ */
+void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
+{
+ uhADCxConvertedData_Injected = HAL_ADCEx_InjectedGetValue(hadc, ADC_INJECTED_RANK_1);
+}
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ Error_Handler();
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..be6ff9378
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,229 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : stm32g4xx_hal_msp.c
+ * Description : This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspInit 0 */
+
+ /* USER CODE END ADC1_MspInit 0 */
+
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+ PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC12_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /* ADC1 DMA Init */
+ /* ADC1 Init */
+ hdma_adc1.Instance = DMA1_Channel1;
+ hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+ hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+ hdma_adc1.Init.Mode = DMA_CIRCULAR;
+ hdma_adc1.Init.Priority = DMA_PRIORITY_HIGH;
+ if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+ /* ADC1 interrupt Init */
+ HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
+ /* USER CODE BEGIN ADC1_MspInit 1 */
+
+ /* USER CODE END ADC1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+ /* USER CODE END ADC1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC12_CLK_DISABLE();
+
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+ /* ADC1 DMA DeInit */
+ HAL_DMA_DeInit(hadc->DMA_Handle);
+
+ /* ADC1 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
+ /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+ /* USER CODE END ADC1_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspInit 0 */
+
+ /* USER CODE END TIM2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM2_CLK_ENABLE();
+ /* USER CODE BEGIN TIM2_MspInit 1 */
+
+ /* USER CODE END TIM2_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM2)
+ {
+ /* USER CODE BEGIN TIM2_MspDeInit 0 */
+
+ /* USER CODE END TIM2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM2_CLK_DISABLE();
+ /* USER CODE BEGIN TIM2_MspDeInit 1 */
+
+ /* USER CODE END TIM2_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..fe6101e4a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c
@@ -0,0 +1,145 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+extern ADC_HandleTypeDef hadc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles DMA1 channel1 global interrupt.
+ */
+void DMA1_Channel1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_adc1);
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles ADC1 and ADC2 global interrupt.
+ */
+void ADC1_2_IRQHandler(void)
+{
+ /* USER CODE BEGIN ADC1_2_IRQn 0 */
+
+ /* USER CODE END ADC1_2_IRQn 0 */
+ HAL_ADC_IRQHandler(&hadc1);
+ /* USER CODE BEGIN ADC1_2_IRQn 1 */
+
+ /* USER CODE END ADC1_2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt
new file mode 100644
index 000000000..0489d13ef
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_GroupsRegularInjected/readme.txt
@@ -0,0 +1,106 @@
+/**
+ @page ADC_GroupsRegularInjected ADC example
+
+ @verbatim
+ ******************************************************************************
+ * @file Examples/ADC/ADC_GroupsRegularInjected/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the ADC_GroupsRegularInjected example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+Use ADC to perform conversions using the two ADC groups: regular group
+for ADC conversion on main stream and injected group for ADC conversions
+limited on specific events (conversions injected within main conversions
+stream).
+
+Example configuration:
+ADC is configured to convert a regular channel, in single conversion mode,
+from HW trigger: timer peripheral. And an injected channel, also in single
+conversion mode, but from SW trigger.
+DMA is configured to transfer reular channel conversion data in an array,
+in circular mode.
+A timer is configured in time base and to generate TRGO events for regular
+channel conversions.
+
+Example execution:
+From the start, the ADC converts the selected regular channel at each trig from timer.
+DMA transfers conversion data to the array, DMA transfer complete interruption occurs.
+Results array is updated indefinitely (DMA in circular mode).
+During this regular channel conversions, the injected channel conversion is launched by
+software.
+LED1 is turned on or off depending on whether injected channel conversion data is greater
+or not than regular channel conversions average.
+
+For debug: variables to monitor with debugger watch window:
+ - "aADCxConvertedData": ADC group regular conversion data (array of data)
+ - "uhADCxConvertedData_Injected": ADC injected group conversion data
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+ to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+ 1 GPIO for LED
+ 1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+ DMA
+ Timer
+
+Board settings:
+ - ADC is configured to convert ADC_CHANNEL_6 (pin 46 on connector CN5).
+ - The voltage input on ADC channel is provided by the on-board potentiometer (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+To observe voltage level applied on ADC channel through GPIO, connect a voltmeter on
+pin PC0 (pin 46 on connector CN5).
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on/off in function of ADC conversion
+ result.
+ - "On" if injected channel conversion data is greater than regular channel conversions average
+ - "Off" if injected channel conversion data is lower than regular channel conversions
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, regular group, single conversion mode, HW trigger,
+
+@par Directory contents
+
+ - ADC/ADC_GroupsRegularInjected/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - ADC/ADC_GroupsRegularInjected/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - ADC/ADC_GroupsRegularInjected/Inc/main.h Header for main.c module
+ - ADC/ADC_GroupsRegularInjected/Src/stm32g4xx_it.c Interrupt handlers
+ - ADC/ADC_GroupsRegularInjected/Src/main.c Main program
+ - ADC/ADC_GroupsRegularInjected/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474xx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc
new file mode 100644
index 000000000..bb4e08a96
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/ADC_OffsetCompensation.ioc
@@ -0,0 +1,186 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_6
+ADC1.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
+ADC1.CommonPathInternal=null|null|null|null
+ADC1.ContinuousConvMode=DISABLE
+ADC1.DMAContinuousRequests=ENABLE
+ADC1.DataAlign=ADC_DATAALIGN_RIGHT
+ADC1.DiscontinuousConvMode=DISABLE
+ADC1.EOCSelection=ADC_EOC_SINGLE_CONV
+ADC1.EnableAnalogWatchDog1=false
+ADC1.EnableAnalogWatchDog2=false
+ADC1.EnableAnalogWatchDog3=false
+ADC1.EnableInjectedConversion=DISABLE
+ADC1.EnableRegularConversion=ENABLE
+ADC1.ExternalTrigConv=ADC_EXTERNALTRIG_T1_TRGO
+ADC1.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_RISING
+ADC1.GainCompensation=0
+ADC1.IPParameters=Mode,ClockPrescaler,Resolution,DataAlign,GainCompensation,ScanConvMode,EOCSelection,LowPowerAutoWait,ContinuousConvMode,DiscontinuousConvMode,DMAContinuousRequests,Overrun,EnableRegularConversion,OversamplingMode,NbrOfConversion,ExternalTrigConv,ExternalTrigConvEdge,EnableInjectedConversion,EnableAnalogWatchDog1,EnableAnalogWatchDog2,EnableAnalogWatchDog3,Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,master,CommonPathInternal
+ADC1.LowPowerAutoWait=DISABLE
+ADC1.Mode=ADC_MODE_INDEPENDENT
+ADC1.NbrOfConversion=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.Overrun=ADC_OVR_DATA_OVERWRITTEN
+ADC1.OversamplingMode=DISABLE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.Resolution=ADC_RESOLUTION_12B
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_640CYCLES_5
+ADC1.ScanConvMode=ADC_SCAN_DISABLE
+ADC1.master=1
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.0.EventEnable=DISABLE
+Dma.ADC1.0.Instance=DMA1_Channel1
+Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.0.Mode=DMA_CIRCULAR
+Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.ADC1.0.Priority=DMA_PRIORITY_MEDIUM
+Dma.ADC1.0.RequestNumber=1
+Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.ADC1.0.SignalID=NONE
+Dma.ADC1.0.SyncEnable=DISABLE
+Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.ADC1.0.SyncRequestNumber=1
+Dma.ADC1.0.SyncSignalID=NONE
+Dma.Request0=ADC1
+Dma.RequestsNb=1
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=ADC1
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=TIM1
+Mcu.IPNb=6
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=PC0
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.Pin3=VP_TIM1_VS_ClockSourceINT
+Mcu.PinsNb=4
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PC0.Mode=IN6-Single-Ended
+PC0.Signal=ADC1_IN6
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=ADC_OffsetCompensation.ioc
+ProjectManager.ProjectName=ADC_OffsetCompensation
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQoutputFreq_Value=150000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=150000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=150000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
+TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV1
+TIM1.CounterMode=TIM_COUNTERMODE_UP
+TIM1.Dithering=Disable
+TIM1.IPParameters=Prescaler,CounterMode,Dithering,PeriodNoDither,ClockDivision,RepetitionCounter,AutoReloadPreload,TIM_MasterSlaveMode,TIM_MasterOutputTrigger,TIM_MasterOutputTrigger2
+TIM1.PeriodNoDither=499
+TIM1.Prescaler=149
+TIM1.RepetitionCounter=0
+TIM1.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
+TIM1.TIM_MasterOutputTrigger2=TIM_TRGO2_RESET
+TIM1.TIM_MasterSlaveMode=TIM_MASTERSLAVEMODE_DISABLE
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ClockSourceINT.Mode=Internal
+VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
+board=custom
+ProjectManager.Example=ADC_OffsetCompensation
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd
new file mode 100644
index 000000000..6a99a3f46
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ ADC_OffsetCompensation
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 150.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp
new file mode 100644
index 000000000..8d8b9c39d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/ADC_OffsetCompensation.ewp
@@ -0,0 +1,1158 @@
+
+
+ 3
+
+ ADC_OffsetCompensation
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ ADC_OffsetCompensation/Exe
+
+
+ ObjPath
+ ADC_OffsetCompensation/Obj
+
+
+ ListPath
+ ADC_OffsetCompensation/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ ADC_OffsetCompensation.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ ADC_OffsetCompensation.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww
new file mode 100644
index 000000000..e1c3d2816
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\ADC_OffsetCompensation.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h
new file mode 100644
index 000000000..0728cb243
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/main.h
@@ -0,0 +1,81 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* User can use this section to tailor ADCx instance under use and associated
+ resources */
+
+/* Definitions of data related to this example */
+ /* Full-scale digital value with a resolution of 12 bits (voltage range */
+ /* determined by analog voltage references Vref+ and Vref-, */
+ /* refer to reference manual). */
+ #define DIGITAL_SCALE_12BITS (0xFFFUL)
+
+ /* Init variable out of ADC expected conversion data range */
+ #define VAR_CONVERTED_DATA_INIT_VALUE (DIGITAL_SCALE_12BITS + 1)
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..c181b51ab
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ #define HAL_ADC_MODULE_ENABLED
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..f4a33be7e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx
new file mode 100644
index 000000000..239267243
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvoptx
@@ -0,0 +1,637 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ ADC_OffsetCompensation
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 0
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QE$Flash\STM32G4xx_512.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 3
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 6
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 7
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+ stm32g4xx_hal_adc.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+ stm32g4xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+ stm32g4xx_ll_adc.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 7
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 7
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 7
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 7
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 7
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 7
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 7
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 7
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 7
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 7
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx
new file mode 100644
index 000000000..26db35494
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/ADC_OffsetCompensation.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ ADC_OffsetCompensation
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ ADC_OffsetCompensation\Exe\
+ ADC_OffsetCompensation
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ ::CMSIS
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ stm32g4xx_hal_adc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ stm32g4xx_ll_adc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..752817ea6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project
new file mode 100644
index 000000000..235ec9efb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/.project
@@ -0,0 +1,205 @@
+
+
+ ADC_OffsetCompensation
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ ADC_OffsetCompensation.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/ADC_OffsetCompensation.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_adc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c
new file mode 100644
index 000000000..0e9e4670e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/main.c
@@ -0,0 +1,476 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/Src/main.c
+ * @author MCD Application Team
+ * @brief This example uses ADC Offset compensation feature to translate
+ * directly conversion result from the ADC range to an application
+ * specific range without need of post computing..
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef struct
+{
+ uint32_t number;
+ uint32_t offset;
+ uint32_t sign;
+ FunctionalState satur;
+ char * label;
+} t_offsetcfg;
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* Definitions of environment analog values */
+ /* Value of analog reference voltage (Vref+), connected to analog voltage */
+ /* supply Vdda (unit: mV). */
+ #define VDDA_APPLI (3300U)
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim1;
+
+/* USER CODE BEGIN PV */
+/* Private variables ---------------------------------------------------------*/
+/* Variable for ADC conversion data computation to physical values */
+__IO int16_t hADCxConvertedData_newRange = 0; /* Converted data */
+
+/* Variables to handle offset change upon button press */
+uint16_t modeIndex = 0;
+const t_offsetcfg modeString[5] = {
+ {ADC_OFFSET_NONE, 0, ADC_OFFSET_SIGN_NEGATIVE, DISABLE, "Cfg #0: Offset disabled"},
+ {ADC_OFFSET_1, 0x800, ADC_OFFSET_SIGN_NEGATIVE, DISABLE, "Cfg #1: Offset enabled, sign is negative & saturation disabled"},
+ {ADC_OFFSET_1, 0x800, ADC_OFFSET_SIGN_POSITIVE, DISABLE, "Cfg #2: Offset enabled, sign is positive & saturation disabled"},
+ {ADC_OFFSET_1, 0x800, ADC_OFFSET_SIGN_NEGATIVE, ENABLE, "Cfg #3: Offset enabled, sign is negative & saturation enabled"},
+ {ADC_OFFSET_1, 0x800, ADC_OFFSET_SIGN_POSITIVE, ENABLE, "Cfg #4: Offset enabled, sign is positive & saturation enabled"},
+};
+char *currMode;
+
+/* Variable to manage push button on board: interface between ExtLine interruption and main program */
+__IO uint8_t ubUserButtonClickEvent = RESET; /* Event detection: Set after User Button interrupt */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_TIM1_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ ADC_ChannelConfTypeDef sConfig = {0};
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_DMA_Init();
+ MX_ADC1_Init();
+ MX_TIM1_Init();
+ /* USER CODE BEGIN 2 */
+ hADCxConvertedData_newRange = VAR_CONVERTED_DATA_INIT_VALUE;
+
+ /* Initialize LED on board */
+ BSP_LED_Init(LED1);
+
+ /* Configure User push-button in Interrupt mode */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ /* Run the ADC calibration in single-ended mode */
+ if (HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED) != HAL_OK)
+ {
+ /* Calibration Error */
+ Error_Handler();
+ }
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+
+ /*## Start ADC conversions ###############################################*/
+ /* Start ADC group regular conversion with DMA */
+ if (HAL_ADC_Start_DMA(&hadc1,
+ (uint32_t *)&hADCxConvertedData_newRange,
+ 1
+ ) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ /* Start Timer trigger */
+ if (HAL_TIM_Base_Start(&htim1) != HAL_OK)
+ {
+ /* Counter enable error */
+ Error_Handler();
+ }
+
+ currMode = modeString[modeIndex].label;
+
+ BSP_LED_On(LED1);
+ while (1)
+ {
+ /* Wait for event on push button to perform following actions */
+ while ((ubUserButtonClickEvent) == RESET)
+ {
+ }
+ /* Reset variable for next loop iteration (with debounce) */
+ HAL_Delay(200);
+ ubUserButtonClickEvent = RESET;
+
+ /* Stop ADC group regular conversion with DMA */
+ if (HAL_ADC_Stop_DMA(&hadc1) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ modeIndex++;
+ if (modeIndex >= sizeof(modeString)/sizeof(modeString[0])) modeIndex = 0;
+
+ /* Reconfigure offset */
+ sConfig.Channel = ADC_CHANNEL_6;
+ sConfig.Rank = ADC_REGULAR_RANK_1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+ sConfig.SingleDiff = ADC_SINGLE_ENDED;
+ sConfig.OffsetNumber = modeString[modeIndex].number;
+ sConfig.Offset = modeString[modeIndex].offset;
+ sConfig.OffsetSign = modeString[modeIndex].sign;
+ sConfig.OffsetSaturation = modeString[modeIndex].satur;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Restart ADC group regular conversion with DMA */
+ if (HAL_ADC_Start_DMA(&hadc1,
+ (uint32_t *)&hADCxConvertedData_newRange,
+ 1
+ ) != HAL_OK)
+ {
+ /* ADC conversion start error */
+ Error_Handler();
+ }
+
+ /* Update current mode */
+ currMode = modeString[modeIndex].label;
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_MultiModeTypeDef multimode = {0};
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+
+ /** Common config
+ */
+ hadc1.Instance = ADC1;
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc1.Init.GainCompensation = 0;
+ hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ hadc1.Init.LowPowerAutoWait = DISABLE;
+ hadc1.Init.ContinuousConvMode = DISABLE;
+ hadc1.Init.NbrOfConversion = 1;
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+ hadc1.Init.DMAContinuousRequests = ENABLE;
+ hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+ hadc1.Init.OversamplingMode = DISABLE;
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure the ADC multi-mode
+ */
+ multimode.Mode = ADC_MODE_INDEPENDENT;
+ if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Regular Channel
+ */
+ sConfig.Channel = ADC_CHANNEL_6;
+ sConfig.Rank = ADC_REGULAR_RANK_1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_640CYCLES_5;
+ sConfig.SingleDiff = ADC_SINGLE_ENDED;
+ sConfig.OffsetNumber = ADC_OFFSET_NONE;
+ sConfig.Offset = 0;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+ * @brief TIM1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM1_Init(void)
+{
+
+ /* USER CODE BEGIN TIM1_Init 0 */
+
+ /* USER CODE END TIM1_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+ /* USER CODE BEGIN TIM1_Init 1 */
+
+ /* USER CODE END TIM1_Init 1 */
+ htim1.Instance = TIM1;
+ htim1.Init.Prescaler = 149;
+ htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim1.Init.Period = 499;
+ htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim1.Init.RepetitionCounter = 0;
+ htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
+ sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM1_Init 2 */
+
+ /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/******************************************************************************/
+/* USER IRQ HANDLER TREATMENT */
+/******************************************************************************/
+
+/**
+ * @brief EXTI line detection callbacks
+ * @param GPIO_Pin: Specifies the pins connected EXTI line
+ * @retval None
+ */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ if (GPIO_Pin == USER_BUTTON_PIN)
+ {
+ /* Set variable to report push button event to main program */
+ ubUserButtonClickEvent = SET;
+ }
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ while(1)
+ {
+ /* Toggle LED1 */
+ BSP_LED_Off(LED1);
+ HAL_Delay(800);
+ BSP_LED_On(LED1);
+ HAL_Delay(10);
+ BSP_LED_Off(LED1);
+ HAL_Delay(180);
+ BSP_LED_On(LED1);
+ HAL_Delay(10);
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ Error_Handler();
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..2faf7a2cd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,223 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_adc1;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspInit 0 */
+
+ /* USER CODE END ADC1_MspInit 0 */
+
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+ PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC12_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /* ADC1 DMA Init */
+ /* ADC1 Init */
+ hdma_adc1.Instance = DMA1_Channel1;
+ hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
+ hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+ hdma_adc1.Init.Mode = DMA_CIRCULAR;
+ hdma_adc1.Init.Priority = DMA_PRIORITY_MEDIUM;
+ if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
+
+ /* USER CODE BEGIN ADC1_MspInit 1 */
+
+ /* USER CODE END ADC1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+ /* USER CODE END ADC1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC12_CLK_DISABLE();
+
+ /**ADC1 GPIO Configuration
+ PC0 ------> ADC1_IN6
+ */
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+ /* ADC1 DMA DeInit */
+ HAL_DMA_DeInit(hadc->DMA_Handle);
+ /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+ /* USER CODE END ADC1_MspDeInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspInit 0 */
+
+ /* USER CODE END TIM1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM1_CLK_ENABLE();
+ /* USER CODE BEGIN TIM1_MspInit 1 */
+
+ /* USER CODE END TIM1_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+ if(htim_base->Instance==TIM1)
+ {
+ /* USER CODE BEGIN TIM1_MspDeInit 0 */
+
+ /* USER CODE END TIM1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM1_CLK_DISABLE();
+ /* USER CODE BEGIN TIM1_MspDeInit 1 */
+
+ /* USER CODE END TIM1_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a91546741
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
@@ -0,0 +1,228 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_adc1;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles DMA1 channel1 global interrupt.
+ */
+void DMA1_Channel1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_adc1);
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles key press external line interrupt request.
+ * @param None
+ * @retval None
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt
new file mode 100644
index 000000000..4072d5eaf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/ADC/ADC_OffsetCompensation/readme.txt
@@ -0,0 +1,107 @@
+/**
+ @page ADC_OffsetCompensation ADC example
+
+ @verbatim
+ ******************************************************************************
+ * @file Examples/ADC/ADC_OffsetCompensation/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the ADC_OffsetCompensation example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+Use ADC Offset compensation feature to translate directly conversion result from
+the ADC range to an application specific range without need of post computing.
+
+Example configuration:
+The channel is converted upon a timer trigger and results of conversions are stored
+into a variable by DMA, operating in circular mode.
+
+Example execution:
+From the start, the ADC converts the selected channel continuously, DMA transfers
+conversion data to a variable: hADCxConvertedData_newRange
+
+At startup, offset is disabled, ADC operates normally.
+Upon each press on User push-button, the offset configuration changes to next one in list:
+Configuration #1: Offset enabled, sign is negative & saturation disabled
+ Translation operated: 0V .. 3,3V => -2048 .. 2047
+Configuration #2: Offset enabled, sign is positive & saturation disabled
+ Translation operated: 0V .. 3,3V => 2048 .. 6143
+Configuration #3: Offset enabled, sign is negative & saturation enabled
+ Translation operated: 0V .. ~1,65V => 0
+ ~1,65V .. 3,3V => 0 .. 2047
+Configuration #4: Offset enabled, sign is positive & saturation enabled
+ Translation operated: 0V .. ~1,65V => 2048 .. 4095
+ ~1,65V .. 3,3V => 4095
+
+Note: when configuration #4 is selected, a press on User push-button returns to initial
+offset configuration. Subsequent presses will allow to go through above configuration again.
+
+For debug: variable to monitor with debugger watch window:
+ - "hADCxConvertedData_newRange": ADC converted data
+ - "currMode": ADC offset current configuration
+
+Connection needed:
+None.
+Note: Voltage on analog input pin is provided by potentiometer on board,
+ to perform a ADC conversion on a determined voltage level.
+
+Other peripherals used:
+ 1 GPIO for LED
+ 1 GPIO for analog input: PC0 (pin 46 on connector CN5)
+ 1 GPIO for push button
+ TIMER
+ DMA
+
+Board settings:
+ - The voltage input on the ADC channel is provided by the on-board potentiometer
+ (RV2). Turn RV2 to vary the ADC input voltage and observe behavior.
+ - Connect jumper JP5 on 2-3 position (LDR)
+ - Connect a wire between JP5 pin 1 and PC0
+
+
+STM32G474E-EVAL1 Rev B board LED is be used to monitor the program execution status:
+ - Normal operation: LED1 is turned-on
+ - Error: In case of error, LED1 is toggling twice at a frequency of 1Hz.
+
+@par Keywords
+
+Analog, ADC, Analog to Digital, Single conversion, Offset compensation, Timer trigger, DMA
+
+@par Directory contents
+
+ - ADC/ADC_OffsetCompensation/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - ADC/ADC_OffsetCompensation/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - ADC/ADC_OffsetCompensation/Inc/main.h Header for main.c module
+ - ADC/ADC_OffsetCompensation/Src/stm32g4xx_it.c Interrupt handlers
+ - ADC/ADC_OffsetCompensation/Src/stm32g4xx_hal_msp.c HAL MSP module
+ - ADC/ADC_OffsetCompensation/Src/main.c Main program
+ - ADC/ADC_OffsetCompensation/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474xx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd
new file mode 100644
index 000000000..188698476
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ STM32G474E_EVAL1
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+ $TOOLKIT_DIR$\CONFIG\debugger\ST\STM32G4xx.ddf
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 5.30.0.51236
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.2.14834
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+ $TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32G4x4.board
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 0
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 0
+
+
+ RDICatchPrefetch
+ 0
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 0
+
+
+ CatchNOCPERR
+ 0
+
+
+ CatchCHKERR
+ 0
+
+
+ CatchSTATERR
+ 0
+
+
+ CatchBUSERR
+ 0
+
+
+ CatchINTERR
+ 0
+
+
+ CatchHARDERR
+ 0
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $TOOLKIT_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 0
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 0
+
+
+ RDICatchPrefetch
+ 0
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 0
+
+
+ CatchNOCPERR
+ 0
+
+
+ CatchCHKERR
+ 0
+
+
+ CatchSTATERR
+ 0
+
+
+ CatchBUSERR
+ 0
+
+
+ CatchINTERR
+ 0
+
+
+ CatchHARDERR
+ 0
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 0
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 2
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 32
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $TOOLKIT_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 32
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 216.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 1
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ Browse to your third-party driver
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $TOOLKIT_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ CCXds100CatchSFERR
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+ 72.0
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp
new file mode 100644
index 000000000..1e3a982c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.ewp
@@ -0,0 +1,1305 @@
+
+
+ 3
+
+ STM32G474E_EVAL1
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 30
+ 1
+ 1
+
+ ExePath
+ STM32G474E_EVAL1\Exe
+
+
+ ObjPath
+ STM32G474E_EVAL1\Obj
+
+
+ ListPath
+ STM32G474E_EVAL1\List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ Automatic choice of formatter, without multibyte support.
+
+
+ Output description
+ Automatic choice of formatter, without multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.2.14834
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474RE ST STM32G474RE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 1
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 1
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+ STM32G474RE ST STM32G474RE
+
+
+ FPU2
+ 0
+ 4
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 0
+
+
+ OGPrintfMultibyteSupport
+ 0
+
+
+ OGScanfVariant
+ 0
+ 0
+
+
+ OGScanfMultibyteSupport
+ 0
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+ TrustZone
+ 0
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+ USE_STM32G474E_EVAL1
+ USE_IOEXPANDER
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 1
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$\..\Inc
+ $PROJ_DIR$\..\..\..\..\..\Drivers\CMSIS\Core\Include (
+ $PROJ_DIR$\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\Common
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components
+ $PROJ_DIR$\..\..\..\..\..\Utilities
+ $PROJ_DIR$\..\..\..\..\..\Utilities\Log
+ $PROJ_DIR$\..\..\..\..\..\Utilities\Fonts
+ $PROJ_DIR$\..\..\..\..\..\Utilities\CPU
+
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 1
+
+
+ IccCppInlineSemantics
+ 1
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ STM32F769I_EVAL1.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ Project.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$\stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+ Coder
+ 0
+
+
+
+
+ Doc
+
+ $PROJ_DIR$\..\readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ hx8347d
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\hx8347d\hx8347d.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\hx8347d\hx8347d_reg.c
+
+
+
+ MFXSTM32L152
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152\mfxstm32l152.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152\mfxstm32l152_reg.c
+
+
+
+ MT25ql512abb
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\mt25ql512abb\mt25ql512abb.c
+
+
+
+ STTS751
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\stts751\stts751.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\stts751\stts751_reg.c
+
+
+
+ WM8994
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\wm8994\wm8994.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\Components\wm8994\wm8994_reg.c
+
+
+
+
+ STM32G474E_EVAL1
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_audio.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_env_sensor.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_idd.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_lcd.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_qspi.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_sd.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL\stm32g474e_eval_sram.c
+
+
+
+
+ CMSIS
+
+ $PROJ_DIR$\..\Src\system_stm32g4xx.c
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_adc.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_adc_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_comp.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_opamp.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_opamp_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_qspi.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rtc_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sai_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smartcard_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_smbus.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_sram.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c
+
+
+ $PROJ_DIR$\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_fmc.c
+
+
+
+ Utilities
+
+ $PROJ_DIR$\..\..\..\..\..\Utilities\LCD\stm32_lcd.c
+
+
+
+
+ Example
+
+ EWARM
+
+ $PROJ_DIR$\startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$\..\Src\audio_play.c
+
+
+ $PROJ_DIR$\..\Src\audio_rec.c
+
+
+ $PROJ_DIR$\..\Src\bus.c
+
+
+ $PROJ_DIR$\..\Src\button.c
+
+
+ $PROJ_DIR$\..\Src\com.c
+
+
+ $PROJ_DIR$\..\Src\idd.c
+
+
+ $PROJ_DIR$\..\Src\io.c
+
+
+ $PROJ_DIR$\..\Src\joystick.c
+
+
+ $PROJ_DIR$\..\Src\lcd.c
+
+
+ $PROJ_DIR$\..\Src\led.c
+
+
+ $PROJ_DIR$\..\Src\main.c
+
+
+ $PROJ_DIR$\..\Src\potentiometer.c
+
+
+ $PROJ_DIR$\..\Src\qspi.c
+
+
+ $PROJ_DIR$\..\Src\sd.c
+
+
+ $PROJ_DIR$\..\Src\sram.c
+
+
+ $PROJ_DIR$\..\Src\stm32g4xx_it.c
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww
new file mode 100644
index 000000000..e0fd14b2a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/Project.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\Project.ewp
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..be6f73913
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__ = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
\ No newline at end of file
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h
new file mode 100644
index 000000000..9da1a415d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/Image_160_120_RGB888.h
@@ -0,0 +1,14413 @@
+// *****************************************************************************
+// File generated by STM32 Imager 1.0
+// Image name : Image
+// Coding : 24bpp mode
+// Source file : C:\worksapce\Graphics\tools\image_160_120.bmp
+// *****************************************************************************
+
+#define Image_height 120
+#define Image_width 160
+#define Image_bpp 5
+
+const uint32_t Image_RGB888[14400] =
+{
+0x2F00532F,
+0x502A0254,
+0x502801,
+0x29015029,
+0x4F27014E,
+0x4E2701,
+0x28025029,
+0x4D2A004E,
+0x2502900,
+0x2A014E2A,
+0x4E29024D,
+0x14F2900,
+0x27025029,
+0x4E2A024E,
+0x14F2A02,
+0x2C00502D,
+0x512B0151,
+0x1532D00,
+0x3100542F,
+0x53310152,
+0x1583500,
+0x37025736,
+0x5A35025A,
+0x55D3503,
+0x35025C35,
+0x5E32025B,
+0x35F3301,
+0x31005E32,
+0x5F310060,
+0x2613300,
+0x32016032,
+0x6032005F,
+0x5C3003,
+0x2F015B2F,
+0x5E2F015D,
+0x1603100,
+0x30006133,
+0x72320367,
+0xB863306,
+0x2B1D992E,
+0xAE2C2DA3,
+0x48B82D40,
+0x2C55C02B,
+0xCB305CC6,
+0x60D12F5E,
+0x2E60D02D,
+0xD53262D2,
+0x68DA3467,
+0x376CDC37,
+0xE03E6ADB,
+0x6FDF4070,
+0x4571DF43,
+0xDF456FE0,
+0x6BE3466B,
+0x476CE646,
+0xE94B6DE8,
+0x68EA506B,
+0x4C66EC4E,
+0xE04864E8,
+0x56D83F61,
+0x3C59CE3D,
+0xBE375CC6,
+0x66B63660,
+0x356EB333,
+0xC33977BA,
+0x84C63980,
+0x408ACA3E,
+0xCE4C8BCB,
+0x7ECD4F87,
+0x556ACA54,
+0xB95B5AC3,
+0x38B26042,
+0x5A2EA75E,
+0x90552E9E,
+0x2B88522D,
+0x53298450,
+0x85532D86,
+0x2D86532D,
+0x522C8752,
+0x88513089,
+0x30895230,
+0x56318A52,
+0x8D56348D,
+0x338C5434,
+0x55358E56,
+0x9056358F,
+0x38935637,
+0x583C9457,
+0x95583C94,
+0x3F975A3C,
+0x5A3D9858,
+0x9B58419C,
+0x439D5B40,
+0x59439E5B,
+0x9F5B459E,
+0x479F5D4A,
+0x5A499E5E,
+0x9D5B489E,
+0x4B9F5948,
+0x554C9E57,
+0x9D544D9D,
+0x4B9D524D,
+0x534A9B4F,
+0x99514C9C,
+0x489A4E49,
+0x4F479A4C,
+0x97514497,
+0x43945244,
+0x4F439551,
+0x924E4093,
+0x4093503F,
+0x5140934F,
+0x934F3F94,
+0x3F94503E,
+0x52419754,
+0x99563D96,
+0x469B5841,
+0x564A9F57,
+0xA7594DA3,
+0x53A95B4F,
+0x30005131,
+0x4F2B0051,
+0x1502900,
+0x27025029,
+0x4E28014E,
+0x14E2801,
+0x29014E28,
+0x4F29014F,
+0x2502902,
+0x29014F29,
+0x4F2A014D,
+0x4E2602,
+0x29024F28,
+0x4E2A0250,
+0x2512C01,
+0x2B01502A,
+0x502B0150,
+0x2542E00,
+0x2F01542D,
+0x53320153,
+0x553200,
+0x36025835,
+0x58350159,
+0x45A3701,
+0x35025C39,
+0x5E33005C,
+0x5D3101,
+0x35005D30,
+0x5E320161,
+0x15E3101,
+0x30015E31,
+0x5F34005F,
+0x5C3303,
+0x30005E31,
+0x5F32005D,
+0x5D3001,
+0x34005E34,
+0x6C370063,
+0x17F3503,
+0x30129230,
+0xAE2E25A0,
+0x48B82F3C,
+0x3153C130,
+0xCF315DC7,
+0x60D02F63,
+0x3063D12F,
+0xD83461D7,
+0x66D83564,
+0x3568DC33,
+0xDD3C6ADD,
+0x70DE3E6F,
+0x436FDF40,
+0xE0426DE3,
+0x69DF3F6C,
+0x4668E444,
+0xE7496BE6,
+0x69EC4C6C,
+0x4A65EB4B,
+0xE54366EC,
+0x56DE3A5C,
+0x345BD635,
+0xC0355FCA,
+0x69B33162,
+0x2A70AD2A,
+0xBA2677B0,
+0x8AC12D7A,
+0x398DC828,
+0xC73D8DC4,
+0x8FC94490,
+0x4F81C84C,
+0xC1576CC4,
+0x41B75C54,
+0x5F35AF62,
+0x9A5B32A5,
+0x3092552E,
+0x502B8952,
+0x86522B86,
+0x2E87542C,
+0x4C2E8651,
+0x884E2D87,
+0x3089522F,
+0x532F8850,
+0x8F55328B,
+0x338C5136,
+0x59358C55,
+0x91573991,
+0x3A945738,
+0x553B9356,
+0x96593B93,
+0x3E975B3D,
+0x583D9958,
+0x9D58429C,
+0x479F5A46,
+0x5E469C58,
+0x9E5B499F,
+0x4CA25D4A,
+0x5C4BA15E,
+0xA05B4B9E,
+0x4AA15A4D,
+0x594B9D5B,
+0x9F544C9F,
+0x4B9D534D,
+0x504C9D51,
+0x9A4F4C9D,
+0x499B4F49,
+0x4C479B4D,
+0x974F4697,
+0x44955046,
+0x4D44954F,
+0x934F4194,
+0x43934E40,
+0x5043954D,
+0x96524193,
+0x44975343,
+0x54419653,
+0x9B554098,
+0x469E5541,
+0x554AA257,
+0xA7594BA3,
+0x54AA5C4F,
+0x30005130,
+0x50310151,
+0x14E2B01,
+0x27004D29,
+0x4D28004C,
+0x14D2701,
+0x28014E28,
+0x4E27014E,
+0x14F2701,
+0x25004E27,
+0x4E26004D,
+0x2522B00,
+0x28025028,
+0x502B004E,
+0x1512C00,
+0x2A004F2A,
+0x512C004F,
+0x532C00,
+0x2C01542D,
+0x532F0053,
+0x5543101,
+0x32055732,
+0x5A370157,
+0x4583603,
+0x35035A38,
+0x5B2F015C,
+0x25F3300,
+0x33015E32,
+0x5C32005D,
+0x5B3100,
+0x32015E33,
+0x5D33005D,
+0x25E3601,
+0x32005D31,
+0x5D31015D,
+0x603300,
+0x34005E35,
+0x6B370061,
+0x17A3101,
+0x2F0F9132,
+0xAE2C209E,
+0x47B62E37,
+0x3251BF2F,
+0xCD315BC7,
+0x62D13160,
+0x3061D12F,
+0xD4315FD3,
+0x66D83461,
+0x3B68D936,
+0xDB3C6BD8,
+0x70DF406F,
+0x3A6DDC3D,
+0xE03E71DE,
+0x65E43F6D,
+0x305CE332,
+0xEE415DE8,
+0x66F35261,
+0x5B65EF4B,
+0xEF766DED,
+0x64DD856F,
+0x7B52C289,
+0xC3505AB6,
+0x6CBE5165,
+0x6073B451,
+0xC2867EB6,
+0x85C18789,
+0x3782C48A,
+0xC03290C6,
+0x8DC63892,
+0x4887C641,
+0xC0507CBF,
+0x4FB9516C,
+0x5A3EB064,
+0xA06236AB,
+0x3098552E,
+0x512D9054,
+0x87512E88,
+0x2B85502E,
+0x502E8651,
+0x874F3089,
+0x318A542F,
+0x53318A53,
+0x8A53328B,
+0x358E5531,
+0x59369056,
+0x93583790,
+0x3C955939,
+0x573D9458,
+0x9A5A3F98,
+0x3D985740,
+0x56429B57,
+0x9D56459B,
+0x49A05B46,
+0x5E4AA15D,
+0x9E5C4A9F,
+0x4AA15E4B,
+0x5F4BA05C,
+0xA05951A3,
+0x4CA0554E,
+0x5D4CA05D,
+0x9F5751A1,
+0x4D9D544F,
+0x534B9D51,
+0x9D524E9E,
+0x4C9C514E,
+0x4F4A9B4F,
+0x974C4899,
+0x46964E48,
+0x4B45974A,
+0x954C4294,
+0x43945041,
+0x5145974E,
+0x97534396,
+0x45985443,
+0x55439854,
+0x9C544298,
+0x499C5245,
+0x5549A157,
+0xA3544DA3,
+0x57AC5C4B,
+0x2E005030,
+0x4C2F004D,
+0x14F2B01,
+0x28004E29,
+0x4D28004C,
+0x14C2601,
+0x25004C26,
+0x4D28004B,
+0x4C2702,
+0x2A014E29,
+0x5027004D,
+0x4E2801,
+0x2B024E29,
+0x512C004F,
+0x1512C01,
+0x28005029,
+0x50290050,
+0x2522B01,
+0x2C01512A,
+0x512D0353,
+0x9543006,
+0x31095431,
+0x55310455,
+0x3583401,
+0x34035935,
+0x5A32045A,
+0x25B3003,
+0x35015D32,
+0x5E37025D,
+0x5D3503,
+0x34005C34,
+0x5E37015A,
+0x5C3703,
+0x35005C35,
+0x5D35005B,
+0x5E3501,
+0x36005E34,
+0x66370162,
+0x1743601,
+0x2F0E8F32,
+0xAC2F20A1,
+0x45B73035,
+0x3551C02F,
+0xCC325EC9,
+0x61D13460,
+0x315ECF2F,
+0xD6325ED2,
+0x64D83163,
+0x3567DA33,
+0xDF3166DA,
+0x64E11F66,
+0x5C68E638,
+0xE4546AE4,
+0x61E0565E,
+0xEE87E4AB,
+0xBFFF94DB,
+0x75ADFF8C,
+0xFF89C1FD,
+0x93F57CB8,
+0x4D8FF152,
+0xFF6C9BFA,
+0xDDFF8AB8,
+0x8AC2FFB3,
+0xF84B92FF,
+0x9DFF3077,
+0x4292FF64,
+0xA72B7DF0,
+0xD99487CD,
+0x94D26E97,
+0x3988CC47,
+0xBE4084C7,
+0x69BE4C7A,
+0x5E4FB550,
+0xA75F42AA,
+0x30A15D37,
+0x53319B56,
+0x89522F8F,
+0x318A5431,
+0x4F318A53,
+0x86503089,
+0x2F88522D,
+0x51318A50,
+0x8D52358D,
+0x338D5034,
+0x5A389058,
+0x92573A91,
+0x3C935739,
+0x573C9357,
+0x99543E97,
+0x3F99543F,
+0x5A469A56,
+0xA05A4C9F,
+0x479E5A48,
+0x5C49A15B,
+0xA15E4BA0,
+0x4DA25E4E,
+0x5A50A35E,
+0xA35B4DA0,
+0x52A45D51,
+0x5953A45D,
+0xA35552A4,
+0x52A35651,
+0x5250A255,
+0x9D534F9F,
+0x4E9C5152,
+0x4E4E9B50,
+0x994E4D9A,
+0x4B974C4C,
+0x4D479448,
+0x964D499A,
+0x44964E47,
+0x5143954D,
+0x98544494,
+0x42955144,
+0x55429753,
+0x9C53459A,
+0x4FA1544A,
+0x574DA058,
+0xA65A50A3,
+0x5AAC5E53,
+0x30004E30,
+0x4D2E014F,
+0x24F2C00,
+0x28024E29,
+0x4E28004C,
+0x4C2602,
+0x27004D26,
+0x4D2A004C,
+0x4C2901,
+0x2C004C28,
+0x5028024E,
+0x14E2901,
+0x2D024F2C,
+0x502A0051,
+0x4F2800,
+0x2C01512A,
+0x522B0353,
+0x502902,
+0x2D01512A,
+0x552E0353,
+0x2533001,
+0x2B045430,
+0x57300353,
+0x563102,
+0x34025933,
+0x5B32025A,
+0x15C3201,
+0x34035E35,
+0x5A35015B,
+0x25C3800,
+0x36035D38,
+0x5B37015B,
+0x35D3A01,
+0x38015B38,
+0x5D37015B,
+0x5E3801,
+0x36016034,
+0x66370160,
+0x733D01,
+0x32078C35,
+0xAC311B9E,
+0x43B63035,
+0x3553C131,
+0xCD325CCA,
+0x62D13660,
+0x3262D435,
+0xD63661D2,
+0x68D63666,
+0x2168D72B,
+0xDC755EDE,
+0x8BDCD474,
+0xFF71AFFF,
+0xCDFF77B3,
+0x9FCAFF9C,
+0xC472A9FF,
+0x59BF235F,
+0x4381E11E,
+0xEA5093DB,
+0xD3FB87BB,
+0x89BEFDAA,
+0xDF6BA8FD,
+0x4DA73C86,
+0x1C6BCF1C,
+0xD54179EA,
+0xA3D6236C,
+0x79B6E75D,
+0xC1558FDE,
+0x82D04672,
+0x5B90D759,
+0xD05FA1BE,
+0xB6A178BC,
+0x61B67B62,
+0x4E5AB461,
+0xAB5C50B0,
+0x36A25F43,
+0x5A32A15E,
+0x8F56339B,
+0x2B8A522E,
+0x502F8C54,
+0x8B522F88,
+0x318A5032,
+0x4E348D50,
+0x9053338A,
+0x36905338,
+0x553A9257,
+0x95583792,
+0x3C94573D,
+0x553D9659,
+0x9A564098,
+0x40995641,
+0x57449B56,
+0x9F5A469B,
+0x4AA25D48,
+0x5D4CA25E,
+0xA55F4FA5,
+0x4FA46053,
+0x5D4EA25A,
+0xA45B52A5,
+0x50A35953,
+0x5555A65A,
+0xA55454A4,
+0x51A25555,
+0x5752A356,
+0x9F5453A4,
+0x529F534F,
+0x504F9D51,
+0x9B50509B,
+0x4C9A4D4F,
+0x4E4E9C50,
+0x98514798,
+0x44964E48,
+0x53439350,
+0x96544495,
+0x43955343,
+0x55449854,
+0x9D59459C,
+0x4A9E574B,
+0x574CA25A,
+0xA5594FA3,
+0x59AC5E53,
+0x30015132,
+0x4C2E014E,
+0x4C2A00,
+0x2A004B29,
+0x4D2A004C,
+0x14D2702,
+0x27014D27,
+0x4C27014D,
+0x4C2800,
+0x2A03502B,
+0x5028004D,
+0x4D2A02,
+0x2E034F2B,
+0x502B0151,
+0x502900,
+0x2802522B,
+0x522B004F,
+0x1522A02,
+0x2D03542D,
+0x542E0052,
+0x1542F01,
+0x2C02522D,
+0x542F0152,
+0x563100,
+0x34005731,
+0x58340359,
+0x3593202,
+0x37005A32,
+0x5C38015C,
+0x15D3801,
+0x37005C37,
+0x5B39005B,
+0x583702,
+0x37025B38,
+0x5B38005A,
+0x5A3901,
+0x3A005E3A,
+0x653A015E,
+0x6F3703,
+0x2F0A8C35,
+0xAC2F169A,
+0x44B8352F,
+0x3554C130,
+0xCD355CC9,
+0x5DD4325E,
+0x3762D33C,
+0xD52963D3,
+0x5DD92168,
+0xF26DDC80,
+0xC8FFACE2,
+0x85B5F79A,
+0xF38EBBF8,
+0xAAED6AA6,
+0x377BCD59,
+0xD33868C0,
+0x8FEF286F,
+0x73B1F346,
+0xFD9CCEFC,
+0x97F28EC0,
+0x286AD456,
+0xE7356ACF,
+0x90EC4084,
+0x66A5EC45,
+0xFFA1D4FC,
+0xAFF28DC7,
+0x2B78D366,
+0xC12265C8,
+0x72AA4E7E,
+0x4F66B04C,
+0xC85B78C7,
+0x8AC6618A,
+0x4985B257,
+0x48509C75,
+0xAB4E51B4,
+0x39A55642,
+0x5C3AA45E,
+0x9760339F,
+0x2B915933,
+0x54328853,
+0x8A4E338C,
+0x338C4F32,
+0x52328B4D,
+0x8E51348F,
+0x38925334,
+0x57379153,
+0x95583C93,
+0x3B92563F,
+0x58409859,
+0x9B57439A,
+0x449B5744,
+0x5A479E5A,
+0xA15C499E,
+0x4CA35D4A,
+0x5C4EA45D,
+0xA6634BA1,
+0x4FA46153,
+0x6152A563,
+0xA55855A8,
+0x53A55953,
+0x5855A85A,
+0xA55854A7,
+0x54A45854,
+0x5552A356,
+0xA25751A3,
+0x51A45650,
+0x5550A154,
+0x9D5250A1,
+0x4C9B504C,
+0x4E4D9952,
+0x9C504A9C,
+0x489B4D4B,
+0x53459653,
+0x99544698,
+0x46985646,
+0x58489E57,
+0x9E5A4A9E,
+0x4C9E584B,
+0x5750A35A,
+0xA55852A5,
+0x5CAB5E53,
+0x2F005031,
+0x4B2E004C,
+0x24D2D02,
+0x2D004B2B,
+0x4A2A014C,
+0x14D2600,
+0x25004C26,
+0x4D26004B,
+0x24F2A01,
+0x2A024F2B,
+0x4E29024F,
+0x3502C02,
+0x2D034F2B,
+0x502C0250,
+0x502900,
+0x2D01512D,
+0x522A0052,
+0x522801,
+0x2E01532D,
+0x522B0153,
+0x2542B00,
+0x2C00532D,
+0x552D0052,
+0x533001,
+0x2F00532F,
+0x56320054,
+0x1583300,
+0x37025A33,
+0x5A370159,
+0x5A3601,
+0x36005A36,
+0x5A36005A,
+0x583700,
+0x37035939,
+0x5A37005B,
+0x25C3900,
+0x3A005C39,
+0x6137025D,
+0x723A01,
+0x36098B36,
+0xAF31189C,
+0x45B8312B,
+0x3757C436,
+0xD0395BC6,
+0x63D43260,
+0x365DD31C,
+0xCB635BD4,
+0x8DC2F552,
+0xF4AACCFF,
+0xD2F66BAD,
+0x79B4F89E,
+0xFA5EA2F7,
+0x82D070AA,
+0x397FE548,
+0xEA5895EC,
+0xDDF28FBF,
+0x7CB9F6AD,
+0xD1488EF5,
+0x65CF124B,
+0x2854B32C,
+0xE71D67D0,
+0x9FED348C,
+0x599FF256,
+0xB9347BDD,
+0x50BA325E,
+0x275BC324,
+0xDF4965D1,
+0xA9F75788,
+0x6CA5F566,
+0xF986BCFA,
+0xC2F399C7,
+0x85B7DF92,
+0xE47DAAE6,
+0xAFC876AE,
+0x4FAC866A,
+0x513BA572,
+0xA64E2CA6,
+0x399B5A29,
+0x4D339252,
+0x8E51328B,
+0x358D5235,
+0x51358F50,
+0x9053358D,
+0x38905435,
+0x553B9557,
+0x95563B94,
+0x41975A3F,
+0x58419857,
+0x9B56449B,
+0x469D5944,
+0x59489F5B,
+0x9E5C4A9F,
+0x4DA35C49,
+0x5D4EA45C,
+0xA4604EA5,
+0x52A6634F,
+0x6156A864,
+0xAA5B57A8,
+0x57A95D56,
+0x5A57A95D,
+0xA85956A9,
+0x54A85A54,
+0x5655A759,
+0xA65851A4,
+0x52A25651,
+0x5553A055,
+0x9B54559D,
+0x529B5353,
+0x52509C52,
+0x9C4F4F9D,
+0x4B9D4F4D,
+0x51499A4F,
+0x9B534798,
+0x499A5349,
+0x594B9C57,
+0x9E5A4C9F,
+0x4F9F5A4C,
+0x5F52A35D,
+0xAA6055A7,
+0x5DAB6158,
+0x2F015131,
+0x4D2E014D,
+0x14C2D02,
+0x29004B2C,
+0x4C27014D,
+0x4C2601,
+0x25014D27,
+0x4E27004C,
+0x4E2601,
+0x2C004D27,
+0x4D2B014E,
+0x34F2B00,
+0x2D014E2A,
+0x522C0050,
+0x2522D00,
+0x2D01512C,
+0x522A0152,
+0x2542C00,
+0x2B00502A,
+0x532B0151,
+0x1542A01,
+0x2D005028,
+0x522C0153,
+0x2532E00,
+0x2F00532F,
+0x57320053,
+0x2583300,
+0x36015933,
+0x58350359,
+0x583601,
+0x38035D39,
+0x5837035A,
+0x4583D03,
+0x3A025839,
+0x59380359,
+0x15A3702,
+0x3A025E3B,
+0x6538005E,
+0x1783901,
+0x37018E34,
+0xAF361D9E,
+0x42B8352D,
+0x2253C42B,
+0xCA2357CC,
+0x62D36956,
+0xFB8DD0D7,
+0xD0FF7DB6,
+0x97CCFC9D,
+0xE63770C9,
+0x73E01E5D,
+0x2A6DE728,
+0xDE1D62DB,
+0x73EA2E71,
+0x72B3EE2D,
+0xF599C8F7,
+0x8BF76FAB,
+0x1767E453,
+0xD31765DA,
+0x5FC4466B,
+0x2A48A831,
+0xC61C45AC,
+0x58CD2761,
+0xA4EC612,
+0xB31940A7,
+0x5ACD2042,
+0x3D59BE34,
+0xC15372CD,
+0x71E44E62,
+0x395AD251,
+0xC72C5EC7,
+0x70CF2E60,
+0x3E84D439,
+0xE7539EE6,
+0xBCEE67A1,
+0x9FCCF88F,
+0xEE93C1EF,
+0x9AA36FAA,
+0x29A84945,
+0x5730A257,
+0x8D513691,
+0x368F5335,
+0x5636904F,
+0x8F533B92,
+0x3B915537,
+0x543A9555,
+0x95533C96,
+0x4096553F,
+0x58439A59,
+0x9B594299,
+0x469E5A42,
+0x5D499F5A,
+0xA15E4EA4,
+0x4FA45F4C,
+0x5E4FA55D,
+0xA75F4FA6,
+0x54AA6351,
+0x6257A962,
+0xA85C5AAC,
+0x58AA5E56,
+0x5C57A95D,
+0xA95B56A9,
+0x55A85A56,
+0x5856A95B,
+0xA45753A6,
+0x54A45754,
+0x5554A357,
+0xA2554FA2,
+0x4D9F534F,
+0x51529D52,
+0x9E52509B,
+0x509D5252,
+0x504A9B4F,
+0x99504999,
+0x4899544B,
+0x594A9C57,
+0x9E5B4C9D,
+0x51A25E4C,
+0x6553A363,
+0xAA6854A4,
+0x5DAD6A58,
+0x2F005030,
+0x4C2E024E,
+0x4C2D01,
+0x26014C2E,
+0x4C28004C,
+0x4B2701,
+0x27004B25,
+0x4D27014D,
+0x24F2A00,
+0x2D024D2B,
+0x4E2C024F,
+0x14D2B00,
+0x2C004D29,
+0x522E004F,
+0x502B01,
+0x2C00522C,
+0x522A0152,
+0x1522A01,
+0x2A02512D,
+0x50290051,
+0x522800,
+0x2B01532A,
+0x512B0050,
+0x1512C01,
+0x2F01532E,
+0x542F0054,
+0x1573200,
+0x34025834,
+0x57360058,
+0x3583701,
+0x37035736,
+0x58370358,
+0x3583A03,
+0x38015637,
+0x5A3A0257,
+0x2593704,
+0x3A005937,
+0x6939025B,
+0x2793B00,
+0x2F069038,
+0xB12321A1,
+0x39B82C34,
+0x8852BE5B,
+0xD8DC65C3,
+0xA4CDFF94,
+0xFA6199FD,
+0x8DC981B9,
+0x193CAC59,
+0xE62A66E5,
+0x83E73781,
+0x356BE44A,
+0xDB215CDC,
+0x77E0225F,
+0x5796EB2E,
+0xF47DB6F4,
+0x98F075AE,
+0x7EBCF055,
+0xC45696CE,
+0x73EC2D5F,
+0x4A81DC3C,
+0xF55089EE,
+0x99ED5E9A,
+0x7AAFF85C,
+0xEF81BFFA,
+0x8EE477BE,
+0x557EDB3B,
+0x904859B1,
+0x58B33F43,
+0x4961C845,
+0xA63849BD,
+0x53B73949,
+0x4366C63E,
+0xD84673C5,
+0x85CE5486,
+0x488AD049,
+0xEC4C8CDC,
+0x8BEA589A,
+0x539DC351,
+0x5135A259,
+0x96502B9E,
+0x338F522F,
+0x533A9252,
+0x90553991,
+0x39925338,
+0x533A9553,
+0x97523C94,
+0x439B5640,
+0x55439756,
+0x9C5A3F98,
+0x449D5A42,
+0x5D4AA05D,
+0xA45D4CA1,
+0x4DA4604F,
+0x6352A662,
+0xA66250A8,
+0x54AA6352,
+0x5E58AA61,
+0xAB5E58AB,
+0x5AAB5F5A,
+0x5F57A95D,
+0xA85C59AA,
+0x5CA95D59,
+0x595AA95C,
+0xA65956A7,
+0x56A55954,
+0x5555A356,
+0x9F5357A2,
+0x55A05653,
+0x5352A152,
+0x9E51529F,
+0x4F9C504F,
+0x53499D54,
+0x9A544A9B,
+0x499B564C,
+0x5E4D9E5B,
+0xA0634C9E,
+0x51A1664E,
+0x6C56A66C,
+0xA86E56A7,
+0x5CAC7656,
+0x2E005031,
+0x4D2E004C,
+0x4D2D01,
+0x27014D2B,
+0x4D29014D,
+0x14D2800,
+0x26014D28,
+0x4E27004C,
+0x14F2E00,
+0x2C014F2D,
+0x502D014F,
+0x1502E00,
+0x2F004F2C,
+0x4E2E0050,
+0x512C00,
+0x2C00522C,
+0x512B0051,
+0x522B00,
+0x2901512B,
+0x4F28004F,
+0x14F2800,
+0x2702512A,
+0x4F28004F,
+0x14F2700,
+0x2B00522A,
+0x552D0054,
+0x552F00,
+0x34005631,
+0x54330157,
+0x553400,
+0x37025735,
+0x56370257,
+0x2573801,
+0x37015637,
+0x59360257,
+0x15B3802,
+0x3A005A37,
+0x6D39015E,
+0x67F3B01,
+0x2C0C912C,
+0xB185119E,
+0x71B3E148,
+0xFF6DA5FB,
+0xAAFBA9D0,
+0x1D63D86C,
+0xBC2470DC,
+0x52BE3A65,
+0x417EE933,
+0xD35085E2,
+0x54D82564,
+0x2D66DB1B,
+0xF65B9BEF,
+0x9BE679B0,
+0x7AB9F851,
+0xE45D98EF,
+0x58E02B69,
+0x2571E616,
+0xEA1E68D7,
+0x73D5337E,
+0x7BB5F13B,
+0xFF99D2FC,
+0xB8FDA1D6,
+0x578DD576,
+0xB42459C3,
+0x3FB91A4A,
+0x1A56C316,
+0xDD3469D5,
+0x73CE4A7E,
+0x4570BE4C,
+0xB84261B1,
+0x79D2345E,
+0x5687D851,
+0x97436EBB,
+0x4C883153,
+0x204B8C2A,
+0x99244EA9,
+0x5DA92548,
+0x577ACE33,
+0x6E648BA6,
+0x9B665C8B,
+0x35915147,
+0x4A318E44,
+0x9252348F,
+0x37915238,
+0x503A9552,
+0x97543B93,
+0x42975542,
+0x56469B58,
+0x9C5A459A,
+0x479E5B45,
+0x5D4AA15B,
+0xA45F4CA2,
+0x4FA6614D,
+0x6251A662,
+0xA96550A8,
+0x56AB6454,
+0x5E5AAC63,
+0xAE6158AA,
+0x5BAB5E5D,
+0x5E5AAC61,
+0xAC5C59AA,
+0x59AA5B5B,
+0x5A5BAC5C,
+0xA75B59A8,
+0x55A55957,
+0x5657A456,
+0xA0545BA2,
+0x58A15658,
+0x5454A250,
+0xA15452A0,
+0x4DA0554F,
+0x59489C55,
+0x9C584E9F,
+0x4D9E5E4E,
+0x644BA063,
+0xA16A4CA1,
+0x52A26B51,
+0x7154A46F,
+0xA97754A7,
+0x5BAA7D54,
+0x2E004E2F,
+0x4B2D004C,
+0x14D2D01,
+0x28004E2C,
+0x4C28014C,
+0x14D2900,
+0x28014D29,
+0x4D29014D,
+0x4F2C01,
+0x2C004F2D,
+0x4F2C004F,
+0x1512E00,
+0x2F014F2D,
+0x4D2E004F,
+0x2512D01,
+0x2C00512C,
+0x522C0052,
+0x1502B01,
+0x28005028,
+0x5029014F,
+0x4E2701,
+0x28004E27,
+0x4F28014F,
+0x2502801,
+0x29005029,
+0x552C0051,
+0x1562D00,
+0x33005530,
+0x56350157,
+0x553400,
+0x38015635,
+0x55350156,
+0x2573800,
+0x34005536,
+0x58360056,
+0x5A3602,
+0x3E065A3A,
+0x6E330066,
+0x2782700,
+0xD7249967,
+0xBEFF7EBD,
+0x5FA1EF88,
+0xF15898F1,
+0x5CD4418D,
+0x1F54C718,
+0xDF336DE7,
+0x67E23467,
+0x5E94EF2E,
+0xE94C87E6,
+0xA4EC426F,
+0x8CC5FB71,
+0xD262A2E7,
+0x6EEA2560,
+0x2A6EEB24,
+0xE22468DA,
+0x6BE32C71,
+0x427EE334,
+0xF26BA3F0,
+0xB2FD73AA,
+0x1A66D96C,
+0xAA457DC5,
+0x49A03953,
+0x254DA424,
+0xDF3064C9,
+0xADF2478C,
+0x9BD0FC72,
+0xF9A3D1F4,
+0xCAF98EC5,
+0x74B4FB82,
+0xEE6C9BE7,
+0xAAE585C8,
+0x5498E272,
+0xFC89C1FD,
+0xB9F593CA,
+0x5D92E382,
+0xA748659D,
+0x53AD3E56,
+0x505FA949,
+0xDA7B8EC5,
+0xC0DF99B3,
+0x8FBED0A4,
+0x7F5EA7A2,
+0x914F4397,
+0x3A945036,
+0x503C9453,
+0x97543F96,
+0x42975442,
+0x59459A55,
+0x9C59489D,
+0x49A05B47,
+0x5D4AA15A,
+0xA35E4CA3,
+0x4EA5604C,
+0x6350A661,
+0xA96450A7,
+0x57AA6252,
+0x625AAC61,
+0xAE625DB0,
+0x5EB1635E,
+0x605AAD5F,
+0xAE5E5BAE,
+0x5DAB5D5D,
+0x5A5EAD5D,
+0xA75B5BA9,
+0x58A45959,
+0x585BA55A,
+0xA1555CA4,
+0x59A1545A,
+0x5359A152,
+0x9E5353A0,
+0x4FA05850,
+0x5D4D9F5A,
+0x9E5E4FA1,
+0x4EA1654F,
+0x6C4A9F68,
+0xA1724FA1,
+0x52A27452,
+0x7D51A178,
+0xA78152A5,
+0x56A98851,
+0x2D014D2F,
+0x4B2C004B,
+0x14D2C01,
+0x2A004C2C,
+0x4D2A024D,
+0x4C2702,
+0x29014D29,
+0x4D2C014D,
+0x4F2B00,
+0x2D004F2B,
+0x4F2D0050,
+0x14F2D00,
+0x2E014E2E,
+0x4F30014E,
+0x2503002,
+0x2B01512D,
+0x512A0051,
+0x1512B00,
+0x27015028,
+0x4F29004E,
+0x502902,
+0x28004E27,
+0x5029014F,
+0x14F2802,
+0x2A015028,
+0x532B0152,
+0x1562C01,
+0x3000552F,
+0x57340054,
+0x543300,
+0x35005336,
+0x55340055,
+0x1563600,
+0x34005235,
+0x58360157,
+0x1583703,
+0x24016236,
+0x77530060,
+0x7FBDD91A,
+0xF782ADFF,
+0x6DD47AAC,
+0x1F64D53D,
+0xDE2A6DE9,
+0x59DC3275,
+0x2462D833,
+0xF13D6CDD,
+0xBDFA729A,
+0x63A7FA8C,
+0xF11367EC,
+0xA0EB7CB4,
+0x346FD35D,
+0xCD1D5AD8,
+0x64D51C56,
+0x296BE325,
+0xEA2B67E6,
+0xB3F53F88,
+0x92C8FA80,
+0xEF5FA3F7,
+0x5CE62177,
+0x2455CA15,
+0xD43557B9,
+0x71DC3478,
+0x3A5CB03D,
+0xED2B5BC5,
+0x97F63C86,
+0x438CF452,
+0xE63B89F2,
+0x5CD12D7A,
+0x22429A23,
+0xBB113389,
+0x75D82155,
+0x599CEB27,
+0xE77EB3F1,
+0x88D8629E,
+0x2F6CBE4B,
+0xFF5DA2E4,
+0x94F68EBD,
+0x647BD862,
+0xA85C679E,
+0x90B85F75,
+0x84B9EB67,
+0xFF8DBBFA,
+0xA3C87AAA,
+0x41935265,
+0x523B944E,
+0x97534198,
+0x44995542,
+0x58449955,
+0x9D58479C,
+0x479E5947,
+0x5A4AA15C,
+0xA35E4BA2,
+0x51A75F4D,
+0x6351A760,
+0xAB6350A8,
+0x5AAE6053,
+0x605CAE61,
+0xB0625CAF,
+0x5BAE605D,
+0x5C5EB15F,
+0xAE5F5BAD,
+0x5AAA5B5C,
+0x5D5BAC5B,
+0xAB5D5CAC,
+0x59A75C5D,
+0x5959A45A,
+0xA3555CA4,
+0x56A15558,
+0x5757A156,
+0xA15C54A0,
+0x559F5E56,
+0x6451A162,
+0x9F6750A1,
+0x4C9F6D4F,
+0x754D9E72,
+0xA07552A0,
+0x50A37D51,
+0x884FA481,
+0xA88B52A6,
+0x55A99150,
+0x2E004A2C,
+0x4B2C014C,
+0x14D2D01,
+0x28014D2E,
+0x4B28004B,
+0x4A2A00,
+0x2C004A29,
+0x4D2A014D,
+0x14F2A00,
+0x2D00502A,
+0x4F2B004F,
+0x4F2B00,
+0x2D024F2F,
+0x4C2E004C,
+0x4C2D01,
+0x2A004F2E,
+0x512A0051,
+0x502C00,
+0x28004F29,
+0x52290052,
+0x512A01,
+0x27014E27,
+0x4F28004E,
+0x2512801,
+0x29014E26,
+0x502A0153,
+0x532C01,
+0x3100542D,
+0x55330255,
+0x523201,
+0x34005433,
+0x56320051,
+0x533702,
+0x33005335,
+0x57350358,
+0x1583102,
+0x93005226,
+0xD8FF4E94,
+0x73B4FFAA,
+0xDA1165E5,
+0x66E5326F,
+0x3166E724,
+0xE33A7AE3,
+0x81E13574,
+0x5891E93D,
+0xF8A8D6FA,
+0x76F076B9,
+0x49E136,
+0xD52560D9,
+0x40CF1E55,
+0x1D50DE19,
+0xE4346DE4,
+0x76E43E74,
+0x286BEA3C,
+0xF02F5CCD,
+0xA3F75E97,
+0x377FEC69,
+0xB9204CC4,
+0x52C11C3D,
+0x2F4DB22D,
+0xA3333F9D,
+0x4AAA3A3E,
+0x5477DA48,
+0xB04360B9,
+0x49AA3251,
+0x305EC62D,
+0xC1264DBE,
+0x68DD1847,
+0x3472E52E,
+0xCF3251C4,
+0x7FDB3661,
+0x4E91E943,
+0xD54B84DE,
+0x67C0316F,
+0x335BA236,
+0xD34777CA,
+0x6FBF347B,
+0x4666BC2E,
+0xD6697BBB,
+0x8EC57396,
+0x6688C27B,
+0xAF4C84B8,
+0x918F4B83,
+0x3D96504B,
+0x543A9350,
+0x99564096,
+0x45985641,
+0x58459957,
+0x9B57459B,
+0x489F5B47,
+0x5E4AA15C,
+0xA45D4CA3,
+0x4FA55D4F,
+0x6053A861,
+0xAA6351A7,
+0x5BAE6154,
+0x635EB060,
+0xB1615EB3,
+0x5CB0625C,
+0x5E5FAF5B,
+0xAB5D5FAF,
+0x5BAD5D5A,
+0x585AAC5F,
+0xAB5A5AAC,
+0x58AA5E5C,
+0x5856A75B,
+0xA25859A4,
+0x55A35755,
+0x6054A35F,
+0xA16254A1,
+0x56A06756,
+0x7150A26A,
+0x9E714EA3,
+0x4D9E754C,
+0x7D4E9E79,
+0xA28551A1,
+0x4EA28A4F,
+0x964EA48F,
+0xA7984FA7,
+0x54A99D4D,
+0x2C014C2E,
+0x4B2C004A,
+0x4A2B00,
+0x29014C2C,
+0x4D26014C,
+0x4C2900,
+0x2A014C2B,
+0x4E2E004C,
+0x24F2A01,
+0x2C004F2B,
+0x4F2E0050,
+0x24D2E01,
+0x2D014B2C,
+0x4E2F014C,
+0x14F2D02,
+0x2A004D2C,
+0x4F2B004E,
+0x4E2B01,
+0x28005228,
+0x51260253,
+0x1522600,
+0x28015024,
+0x4E260051,
+0x24F2801,
+0x28005028,
+0x4F290052,
+0x502801,
+0x2F02542B,
+0x53300153,
+0x1553300,
+0x34005433,
+0x54330155,
+0x3553601,
+0x3E00542F,
+0x54250357,
+0x4D2700,
+0xFF75B2C0,
+0xBDF87FB5,
+0x1567E081,
+0xCF275FDC,
+0x8DE91B6E,
+0x2366C234,
+0xEB316FD7,
+0xA2EE3377,
+0x7AC3FC63,
+0xE03B7EEF,
+0x49C81B56,
+0x2567DD1B,
+0xE3255CCC,
+0x70E73668,
+0x477FD936,
+0xFF68AEF9,
+0x8EEE72B3,
+0x4B8CF74A,
+0xF084C2F7,
+0x5ADB5590,
+0x1634BB26,
+0xD52D58C7,
+0x58D73463,
+0x2D59C52C,
+0xC03B5DC1,
+0x51A84C60,
+0x454DAD3F,
+0xAF3D5BBB,
+0x64C5355C,
+0x4B79CE34,
+0xEF4480D9,
+0xA7EE5A99,
+0x83BDFA6B,
+0xFF99CFFF,
+0xB6EE7AB7,
+0x65ADF07B,
+0xC94890F8,
+0x2B5A2866,
+0x3C56971C,
+0xF7578BD2,
+0xC5F47FBB,
+0x7DB3EC82,
+0xEF6699EA,
+0xB6F672A7,
+0x84B8F97A,
+0xF279ACFF,
+0xA8BD73A3,
+0x48A5866D,
+0x47379A4E,
+0x984F3D98,
+0x439A5746,
+0x57449956,
+0x9E5B499B,
+0x4A9E5A49,
+0x5E4AA05C,
+0xA55F4EA2,
+0x52A45C53,
+0x6254A75F,
+0xAB5F52A9,
+0x5BAD6156,
+0x655BAF60,
+0xAE615EB2,
+0x5DB0615B,
+0x5E60B060,
+0xAE5F5EAD,
+0x5BAE605C,
+0x5E5AAC60,
+0xAC5D5CAF,
+0x59AA5F5A,
+0x5D55A75C,
+0xA36054A6,
+0x57A16158,
+0x6956A465,
+0xA16C53A3,
+0x56A26F56,
+0x78539F72,
+0xA17A4DA1,
+0x4B9F7F4C,
+0x874CA084,
+0xA48E4EA2,
+0x4BA4944E,
+0x9D4DA69B,
+0xA9A04DA7,
+0x4CA8A34E,
+0x2C00482B,
+0x4D2E0049,
+0x4A2B01,
+0x2B004A2C,
+0x4A28014B,
+0x4A2A00,
+0x2A004C2A,
+0x4D2E004B,
+0x14E2A00,
+0x2A024E2C,
+0x4C2D014E,
+0x4B2E01,
+0x2C004A2B,
+0x4B2B014B,
+0x14D2C00,
+0x2B034F2E,
+0x4E28024F,
+0x1502601,
+0x29005229,
+0x4F260153,
+0x522900,
+0x27005028,
+0x4F27024F,
+0x24E2702,
+0x27005027,
+0x4F280050,
+0x1512A00,
+0x2F00512B,
+0x54300254,
+0x1523002,
+0x33005232,
+0x54320054,
+0x1563901,
+0x1900582F,
+0x5A5D004C,
+0x73B3FC1E,
+0xFF3A81F8,
+0x6DEA8FC7,
+0x1D64DE19,
+0xAC1062C7,
+0x57961B59,
+0x3D67C12D,
+0xCE2C72DB,
+0x6EE52271,
+0x1557CE1D,
+0xE72C66E3,
+0x5EE5307A,
+0x1E59D625,
+0xE92669F6,
+0xA8FA1F76,
+0x5092F45D,
+0xDE2253D0,
+0x7AF2225B,
+0x317CEF28,
+0xCE2057DD,
+0x5ADE1E45,
+0x1C5BDA23,
+0xD32665E8,
+0x4DB82C55,
+0x284FBA29,
+0xAB2949AE,
+0x499E3043,
+0x3A429D43,
+0xA22F3A96,
+0x4B9E294A,
+0x2E61B22B,
+0xEE3780DE,
+0x89E74D86,
+0x3E80EB45,
+0xC81D66DE,
+0x55D40745,
+0x1E57BB29,
+0x9717439A,
+0x4C912A46,
+0x3B5CAC30,
+0xAC396BBC,
+0x59B1355C,
+0x3169CF39,
+0xC43D6CC3,
+0x518B405F,
+0x3F5AAC47,
+0xD3426FB1,
+0x9EE8517F,
+0x72B1FD53,
+0xAD73ABFD,
+0xA86268AB,
+0x39974C55,
+0x563E9B52,
+0x9D5B449A,
+0x4BA15D49,
+0x5D4DA15D,
+0xA3604BA2,
+0x50A7604E,
+0x6152A762,
+0xA95E53A9,
+0x59AB6057,
+0x615AAE61,
+0xB1645AB0,
+0x5EB1605D,
+0x605DB061,
+0xAF625EAF,
+0x5DAF625C,
+0x5E5BAD62,
+0xAC6359AB,
+0x5AAB645A,
+0x6858A963,
+0xA56C58A7,
+0x59A66D5A,
+0x755AA46F,
+0xA17759A4,
+0x55A17C54,
+0x8553A183,
+0x9F884FA0,
+0x4DA18E4B,
+0x974A9E92,
+0xA49C4CA2,
+0x4AA7A34C,
+0xA64BA6A6,
+0xA6A94BA5,
+0x49A5AB4B,
+0x2C00482A,
+0x4A2C004B,
+0x492B00,
+0x2B004B2C,
+0x492A004A,
+0x4A2900,
+0x29014D29,
+0x4B2A014C,
+0x4B2A00,
+0x2D014E2C,
+0x4D2B024F,
+0x14C2D02,
+0x2D004B2C,
+0x4B2C014C,
+0x4B2C00,
+0x2A024C2E,
+0x4F27014E,
+0x14F2800,
+0x28015129,
+0x50280151,
+0x522800,
+0x26005128,
+0x4D26014E,
+0x34D2901,
+0x27005027,
+0x4F28014F,
+0x1512A02,
+0x2B00502A,
+0x522E0051,
+0x532E00,
+0x34005132,
+0x55330153,
+0x532800,
+0xAC00391F,
+0xB7FF468A,
+0x3C87E57E,
+0xD64BA3F2,
+0x5EE11865,
+0x1B53D429,
+0xC2194CC4,
+0x7DEA1D53,
+0x4891E93C,
+0xC12C53C4,
+0x5ED53040,
+0x225DD528,
+0xE23067E7,
+0x5BE02265,
+0x316CEA28,
+0xF768A4F3,
+0xB9FD82B6,
+0x549BF383,
+0xB951A0F5,
+0x63DA134E,
+0x2762DA22,
+0xDA2257D8,
+0x41C9215D,
+0x3556C116,
+0xD14C7BDB,
+0x82E45281,
+0x5E97EE53,
+0xF070A1F6,
+0x9EEC76A7,
+0x5E9DF863,
+0xC74F8DEF,
+0x5DCA345C,
+0x2E54B037,
+0xC02E5CBB,
+0x53BF3156,
+0x2D54BF30,
+0xA1244AAD,
+0x50AA2B4C,
+0x2D4AA92D,
+0xB73E4BA8,
+0xB3FF3C61,
+0xA2DFFF73,
+0xE195C6EC,
+0x5FA679B5,
+0x3C569D44,
+0x8434418A,
+0x40803B44,
+0x393B5F50,
+0x9F463E8E,
+0x57994061,
+0x335D8E42,
+0xB3396EA9,
+0xA9B44F6B,
+0x75C99C93,
+0x554AA16E,
+0x9C5A429E,
+0x4E9F5C46,
+0x5E4EA15D,
+0xA35F4CA1,
+0x51A45E4E,
+0x6054A760,
+0xAB6055A8,
+0x5BAD6057,
+0x645CAE62,
+0xB1635DB1,
+0x5FB1635E,
+0x615FB264,
+0xB1625DB0,
+0x5CAF605D,
+0x665DAF63,
+0xAE6C5CAE,
+0x5DAC715D,
+0x715CAD70,
+0xA7705CAA,
+0x5AA5745A,
+0x7A58A475,
+0xA37F57A5,
+0x51A38254,
+0x8C4FA389,
+0xA18F4DA2,
+0x4AA1944A,
+0x9D49A29A,
+0xA3A14BA3,
+0x45A3A14A,
+0xA847A5A5,
+0xA3A849A5,
+0x46A3AC47,
+0x2A015131,
+0x48290048,
+0x1482A00,
+0x2B00492A,
+0x492C014A,
+0x4B2A00,
+0x26004C27,
+0x4A29014C,
+0x492A00,
+0x2B004B2D,
+0x492A004C,
+0x472A00,
+0x2A00472A,
+0x4A2B0049,
+0x4B2B00,
+0x2800492A,
+0x4E26014C,
+0x4E2801,
+0x27014F28,
+0x5029014E,
+0x502702,
+0x26015027,
+0x4D26004D,
+0x14C2701,
+0x28024F28,
+0x4C26024F,
+0x14D2801,
+0x2B014E26,
+0x502C014F,
+0x2532E01,
+0x3000532C,
+0x4E270154,
+0x114E3F00,
+0xFAA7DBF2,
+0x9CE85393,
+0x4381E251,
+0xCB275EC5,
+0x4ACE2860,
+0x2F65E921,
+0xFF306DE6,
+0x82EF90C3,
+0x1149DA47,
+0xF77DACF2,
+0x8CFD71AC,
+0x4979EB44,
+0xEA2854CA,
+0xC5FE4180,
+0x84C1FB81,
+0xF56DA3FB,
+0x6AE83989,
+0x2779F219,
+0xC21753C5,
+0x64DC2148,
+0x206EE61C,
+0xF93E86F3,
+0xAEFF5394,
+0x6EBDF873,
+0xE24C97F1,
+0x6EF02C6C,
+0x5CA6FD26,
+0xF44D97F8,
+0x7BEE3B82,
+0x2062DC34,
+0xA20B2FB9,
+0x4AC42B34,
+0x1F44BF25,
+0x912245BC,
+0x2C881F34,
+0x344BAF31,
+0x9B3746A6,
+0x4EA03349,
+0x353C8F32,
+0x8B3F4D95,
+0x59B73B47,
+0x1B379B28,
+0x911A379D,
+0x4C912042,
+0x5788CE35,
+0xE36390D8,
+0x9FDE75A6,
+0x6075B76F,
+0xA151558D,
+0x508C5257,
+0x4C518C40,
+0x79594E92,
+0x7C6D5E5A,
+0x4D998869,
+0x4E5EAA8D,
+0x9E59479C,
+0x4E9E594A,
+0x5C50A15C,
+0xA5604EA2,
+0x53A55B52,
+0x5D56A85C,
+0xAB5E58AA,
+0x5AAC6057,
+0x645EAF63,
+0xB2665EB0,
+0x5CB26761,
+0x6B5EAF6A,
+0xB06D5EB1,
+0x60B1715F,
+0x7460B075,
+0xAC765FAF,
+0x5DAB785D,
+0x7D5BAA78,
+0xA9805AA7,
+0x59A6845A,
+0x8858A684,
+0xA79054A6,
+0x4DA59352,
+0x9B49A296,
+0xA19C49A2,
+0x479FA049,
+0xA4459FA1,
+0xA0A8459E,
+0x46A2AC48,
+0xB447A3B2,
+0xA1B347A2,
+0x429FB345,
+0x33015D33,
+0x472B014F,
+0x1472901,
+0x2B00482A,
+0x482B004A,
+0x4A2C00,
+0x27004A27,
+0x4926004A,
+0x14B2A00,
+0x2900492B,
+0x482A014B,
+0x492B00,
+0x2A00492B,
+0x472B0047,
+0x4B2900,
+0x28014B2A,
+0x4C26014C,
+0x14C2701,
+0x29014F27,
+0x4F290150,
+0x14F2801,
+0x28024F29,
+0x4F280250,
+0x14D2702,
+0x26024D27,
+0x4D27004C,
+0x4C2601,
+0x28024E28,
+0x4F2A024E,
+0x3502D01,
+0x1F02502E,
+0x473B004F,
+0xA0CEFF0A,
+0xEF3A8DF5,
+0xBEF34D8F,
+0x2145B37E,
+0xD8255BD2,
+0x83F2265E,
+0x5796F046,
+0xEB95CCFC,
+0x80EB4489,
+0x78B3FD41,
+0xE05C9EF5,
+0x4BD72B6A,
+0x395BD029,
+0xEF4779CD,
+0x78E44294,
+0x245EDD36,
+0xDF2165E1,
+0x59DD285E,
+0x1A48C11C,
+0xD01F5DCD,
+0xA5F92D67,
+0x7EBDFE6E,
+0xF679B5FF,
+0x53D34F99,
+0x1B47C412,
+0xBE1F4DC5,
+0x51C31D4B,
+0x1254D21E,
+0xC31A54CE,
+0x4DC01E45,
+0x235BCE1D,
+0xF4327EE2,
+0xD0F97DB4,
+0x9BD2FF99,
+0xE484B8F2,
+0x61C772A0,
+0x3448B041,
+0x8C30469C,
+0x3D933845,
+0x32489A2B,
+0xA93E57A5,
+0x5CBB3A5A,
+0x4167C43B,
+0xDB4064C4,
+0x6DC6457E,
+0x3C70C53E,
+0xE94B7FD8,
+0x85E3508D,
+0x3F83E83F,
+0xC95A86D0,
+0x79BE6789,
+0x4C609F64,
+0x98505C97,
+0x657E655D,
+0x68A17F6A,
+0x5043A15D,
+0xA057449F,
+0x4DA1594D,
+0x5C4EA25A,
+0xA45E4FA3,
+0x53A55D4E,
+0x5D57A860,
+0xAB5F57A9,
+0x5AAC605A,
+0x655AAE62,
+0xB16C5DB0,
+0x60B46E60,
+0x705FB26E,
+0xB2735EB3,
+0x60B2735F,
+0x7A60B178,
+0xAD7D5FAF,
+0x5DAA825B,
+0x845EAB80,
+0xA78859A8,
+0x56A78D57,
+0x9255A890,
+0xA69652A6,
+0x4BA59A4E,
+0x9F47A29A,
+0x9CA048A0,
+0x469FA445,
+0xA7439BA4,
+0x9FAC459E,
+0x43A2AD48,
+0xB244A2B3,
+0x9DB244A1,
+0x3E9CB641,
+0x3300682D,
+0x4F310258,
+0x1472B00,
+0x2B014629,
+0x482A0049,
+0x482B00,
+0x27004B29,
+0x4825004B,
+0x4A2600,
+0x27004926,
+0x4928004A,
+0x1492900,
+0x29004928,
+0x4828004A,
+0x492600,
+0x28004926,
+0x4D29004C,
+0x4B2501,
+0x27024E27,
+0x4E26014E,
+0x14F2601,
+0x27014F26,
+0x4F27014F,
+0x14D2702,
+0x25024C27,
+0x4C26004B,
+0x14C2600,
+0x2A024E27,
+0x5026014B,
+0x34F2E01,
+0x49004819,
+0xD7FF104D,
+0x4496F0A8,
+0xFF3169D8,
+0x5DD385BE,
+0x3071ED2D,
+0xF32861E6,
+0x9AFC6EA7,
+0x5098FB50,
+0xF23569E7,
+0xA5F15B94,
+0x4E7CE47F,
+0xCE364BC7,
+0x4ECC2957,
+0x3F54C62D,
+0xD44A65CE,
+0x6CDE3665,
+0x376BE531,
+0xD7326AE2,
+0x52C82160,
+0x2C57C51A,
+0xFB2B7CDB,
+0x86F34297,
+0x1F6BE83A,
+0xCC1550D1,
+0x43C80F3C,
+0x2D5ACC25,
+0xC22D64D3,
+0x47B81D4A,
+0x2B55CA1B,
+0xBE2954CE,
+0x4AC12B47,
+0x2044B61C,
+0xEB286BD9,
+0x82F43382,
+0x3379F43B,
+0xF3266BE3,
+0x66E14485,
+0x3361D737,
+0xAA2C58CD,
+0x50A62E44,
+0x3D6CCA32,
+0xEA5B93EE,
+0x86D873A4,
+0x466ED354,
+0xC83A5FC8,
+0x70C33C70,
+0x233F8F46,
+0xC43F64B5,
+0x5CB13569,
+0x3152AA2C,
+0xFF417CD4,
+0xCFFF82C3,
+0x97CAFB94,
+0x99769CD5,
+0x607D615F,
+0x6384776E,
+0x4561CD6A,
+0x9B583FAD,
+0x4CA0533F,
+0x5C4EA057,
+0xA35854A3,
+0x55A76050,
+0x5F55A760,
+0xAC6457AA,
+0x5BAC665A,
+0x6C5EB16B,
+0xB16F5DB1,
+0x62B27060,
+0x7761B274,
+0xB17B61B2,
+0x61AE7A61,
+0x8560AF7F,
+0xAB8861AF,
+0x5DAB8C5C,
+0x915BAB8B,
+0xAA9457AA,
+0x55A89756,
+0x9C54A898,
+0xA59E4EA7,
+0x4BA2A04C,
+0xA548A3A2,
+0x9AA2469F,
+0x449CA743,
+0xAF429EAC,
+0x9DB2429E,
+0x3E9EB442,
+0xB53C9EB6,
+0x9AB33A9D,
+0x3296B137,
+0x2E0C7427,
+0x53300560,
+0x4C2F00,
+0x2900472B,
+0x482A0147,
+0x492B00,
+0x2700492A,
+0x47260049,
+0x482400,
+0x24014923,
+0x48250048,
+0x462401,
+0x25004725,
+0x47260147,
+0x462601,
+0x23004724,
+0x4B270049,
+0x4C2700,
+0x26014B26,
+0x4E27014D,
+0x14D2702,
+0x28024D27,
+0x4F28014F,
+0x14D2701,
+0x26004B25,
+0x4C25004C,
+0x4A2600,
+0x28004924,
+0x4E2C014D,
+0x441E02,
+0xFC235970,
+0x8BEC82B8,
+0x2761D43E,
+0xE456AAFE,
+0x60E83E84,
+0x255FDF1F,
+0xF35D9EF6,
+0x71ED599C,
+0x5C7CDA35,
+0xDD5A7CE1,
+0x66DB516F,
+0x5E83E438,
+0xD372A3E6,
+0x56CB4D67,
+0x324FD12B,
+0xED3D70E7,
+0x52DC3F6D,
+0x2D4CCB24,
+0xC82759D7,
+0x47B7264E,
+0x2A44B227,
+0xB72355C3,
+0x47BA144A,
+0x1B3FBC1F,
+0xD32951CC,
+0x5ACC235A,
+0x2953BD2A,
+0xD5264CC7,
+0x53D52357,
+0x2859D81B,
+0xE53965DA,
+0x91E54F7D,
+0x4C87DD62,
+0xC44F80E2,
+0x4CAD3362,
+0x254BB62D,
+0xEA3168D5,
+0xAFF73F8B,
+0x71BDF468,
+0xEC73B3F6,
+0x84DE5F9F,
+0x488CE344,
+0xD74F8CDE,
+0x85CB5088,
+0x5A7CC55B,
+0xD95093EF,
+0x6FBE3D75,
+0x5E96EA32,
+0xF777B1F8,
+0xB4F288BF,
+0x648FDE7D,
+0xA0455EAE,
+0x73CA3854,
+0x4C85D94D,
+0xDE57A1EB,
+0x6F8A4A85,
+0x6871665A,
+0x4459A461,
+0xB34861F0,
+0x3E9F5338,
+0x5652A25C,
+0xA55955A4,
+0x54A65D56,
+0x6654A864,
+0xA96659AA,
+0x5BAB6C56,
+0x705EAE6F,
+0xB27560B0,
+0x62B37862,
+0x8362B27F,
+0xAF8561B1,
+0x5FB08761,
+0x8D5FAE8B,
+0xAD905DAF,
+0x57AA965C,
+0x9C56AA97,
+0xA79C56A9,
+0x51A79E53,
+0xA04EA49D,
+0xA1A24DA5,
+0x479FA449,
+0xA8449DA4,
+0x9AA8429B,
+0x429AAC42,
+0xB13E9AAF,
+0x9AB23F9B,
+0x3498B23C,
+0xB53496B3,
+0x93B23496,
+0x2D8FB130,
+0x2F157822,
+0x582F1068,
+0x512E01,
+0x2700492C,
+0x47290147,
+0x472900,
+0x2800482A,
+0x47270049,
+0x472402,
+0x24014825,
+0x47220248,
+0x472200,
+0x21004624,
+0x47250046,
+0x452201,
+0x22014824,
+0x4A270048,
+0x4C2800,
+0x27004B25,
+0x4B25004D,
+0x4B2600,
+0x28014D29,
+0x4D27024F,
+0x4B2500,
+0x26014C26,
+0x4B26014B,
+0x4B2502,
+0x27034B24,
+0x461E004B,
+0x20574500,
+0xFF699DF9,
+0x79E483BA,
+0x2C66CD29,
+0xDF2871CD,
+0x80EA2A67,
+0x4380F037,
+0xFB639EF4,
+0x6DDE5699,
+0x8794E745,
+0xD188A2DE,
+0x55C76A76,
+0x2656CC35,
+0xD93A60C9,
+0x8EEF5B74,
+0x5691F84F,
+0xFB6CADFC,
+0x77F75EA4,
+0x1C5BE432,
+0xCF1B50DB,
+0x5BDA2144,
+0x204AC128,
+0xB32A4EBF,
+0x54CD2042,
+0x285AD322,
+0xC81E4BC1,
+0x50C31F4C,
+0x2C64D61A,
+0xFD467EE4,
+0xB6FE70A4,
+0x89BEFE80,
+0xF271B7FF,
+0x87F04391,
+0x3F87F542,
+0xDB3673E5,
+0x4FAC2771,
+0x3C48A742,
+0xB92E55BD,
+0x58C52E54,
+0x3B61CA33,
+0xE62655CC,
+0x96F13378,
+0x68B2F943,
+0xE064ADF8,
+0x5BBA4B85,
+0x6D93DD32,
+0xB073B9FF,
+0x65CF4459,
+0x4082E643,
+0xDB5BA1FF,
+0x7FCD5A98,
+0x3379C041,
+0x803D61AD,
+0x43A0483E,
+0x4B68C144,
+0xEE5D8DDB,
+0xBAFD7DB1,
+0x6CB1C989,
+0x715EBC87,
+0xFA6B88FF,
+0x3EC53D8C,
+0x5A3B9F51,
+0xA65E52A4,
+0x55A56653,
+0x6C56A868,
+0xAA6D57A9,
+0x59AC7458,
+0x7D5EAC78,
+0xAF8062B0,
+0x61B18462,
+0x8A60B387,
+0xB08E5FAF,
+0x5EB18E62,
+0x945BAE91,
+0xAC9B59AC,
+0x51AA9B5B,
+0xA04FAA9D,
+0xA69F54A7,
+0x4CA5A04F,
+0xA64CA2A2,
+0x9DA84BA0,
+0x4099A446,
+0xA94098A5,
+0x95AD3F96,
+0x3D97B03E,
+0xB13997B0,
+0x95B13896,
+0x3394B036,
+0xB03394B4,
+0x8EAF348E,
+0x2E8CAD32,
+0x261A8020,
+0x622A126C,
+0x542A09,
+0x2A004D2E,
+0x45280046,
+0x1482A00,
+0x27014929,
+0x48240146,
+0x1492200,
+0x21014722,
+0x45200045,
+0x1441F00,
+0x21004522,
+0x46210045,
+0x462200,
+0x23004520,
+0x48250048,
+0x1492500,
+0x27004C26,
+0x4C26004C,
+0x14D2600,
+0x29014D29,
+0x4D27014C,
+0x4C2601,
+0x25004B25,
+0x4A24004B,
+0x1492400,
+0x28034B21,
+0x401E0249,
+0x76ABE903,
+0xF75698EA,
+0x69D873B1,
+0x3774E229,
+0xF9447BE7,
+0x58E260A4,
+0x5D95EF1A,
+0xE56AAFF6,
+0x58C52A60,
+0x4A4CB359,
+0xAF5D63B5,
+0x4AB73B48,
+0x518AE52C,
+0xF76CA9F6,
+0x70EC60A7,
+0x3471E934,
+0xE13269E3,
+0x72ED1056,
+0x5993E92F,
+0xEC569CED,
+0x53D7368A,
+0x2950C216,
+0xC22651C6,
+0x57D51F45,
+0x1F4FD322,
+0xAE204ABA,
+0x5BC62148,
+0x3392F525,
+0xF0509DFB,
+0x7CE95494,
+0x2966DE3D,
+0xB11546C9,
+0x44B62030,
+0x193FB02C,
+0xA3223EA9,
+0x4EB73244,
+0x3144A93D,
+0xAA304199,
+0x45942F4A,
+0x41459A35,
+0x6436408C,
+0x31821E26,
+0x192E892F,
+0xC7173EA7,
+0x6DD32160,
+0x427FD52A,
+0xC7447AB3,
+0x4A894D7D,
+0x33458C3C,
+0x9B2B3D8A,
+0x7CDC3240,
+0x71A9F948,
+0xE98FC0FD,
+0x92C88BB9,
+0x4C6BC169,
+0x88374E98,
+0x7194354A,
+0x6795C552,
+0x8053ACCB,
+0xFF7361E7,
+0xA9FF65AC,
+0x5E5EDD4C,
+0xA7613EAC,
+0x54A86C4B,
+0x735BAA6E,
+0xAA775BA9,
+0x59AB7B5C,
+0x815FAC7F,
+0xAF875FAD,
+0x5EB18B60,
+0x935DB28E,
+0xAE9660B3,
+0x5BAC995E,
+0x9E58AA9C,
+0xAC9E58AC,
+0x4FA79E56,
+0xA44AA6A0,
+0x9EA34BA2,
+0x489EA44A,
+0xA3449EA4,
+0x97A34399,
+0x3C94A43F,
+0xA73A93A5,
+0x95AD3992,
+0x3893AD39,
+0xB03493AE,
+0x91B13291,
+0x3191B132,
+0xB1318EB0,
+0x8BB0338B,
+0x2D8AAC31,
+0x2425851F,
+0x68231B72,
+0x95D2712,
+0x26004F26,
+0x482B0049,
+0x472900,
+0x26004727,
+0x48230146,
+0x482000,
+0x21014822,
+0x461F0147,
+0x461F00,
+0x21014622,
+0x45200146,
+0x441F00,
+0x2200441F,
+0x4A230046,
+0x472101,
+0x25014A25,
+0x4D26004B,
+0x14D2500,
+0x29004B25,
+0x4D26014C,
+0x4B2601,
+0x23004924,
+0x49240148,
+0x4A2401,
+0xE024827,
+0x79A70041,
+0x4995FF48,
+0xF34A89F0,
+0x56EC4395,
+0x5C9AEA2D,
+0xF077B3F8,
+0x70D7337A,
+0x6EA6F741,
+0xD1224EDB,
+0x45B33E54,
+0x4647BE41,
+0xC93E59CF,
+0x83ED2958,
+0x79B2F452,
+0xD65F9BE2,
+0x58D23C66,
+0x3065D837,
+0xEB356EE8,
+0x86EA317F,
+0x3D7FEA38,
+0xD81D5FDA,
+0x41C61344,
+0x194FD512,
+0xE9215AE4,
+0x67E61E64,
+0x2B65EA26,
+0xBC2A52CD,
+0x4FCB3350,
+0x1743CD26,
+0xE01451D6,
+0x69E6265E,
+0x2B69E72B,
+0xE63B83F4,
+0x46BE3980,
+0x2E39A629,
+0x962D3983,
+0x40A03940,
+0x2D48AD3A,
+0x9D343A8E,
+0x42A22B40,
+0x394CA733,
+0xC43755BB,
+0x65C23F68,
+0x3E316943,
+0x60452F62,
+0x25532D19,
+0x2F305B25,
+0x83302359,
+0x569F2D2F,
+0x6459A845,
+0xAA6344A7,
+0x4BA64E46,
+0x416CCA38,
+0xF74A84E1,
+0x8ADA5094,
+0x5091DE4B,
+0x784255A2,
+0x50725247,
+0x5A4E685A,
+0x8D587E6D,
+0xFF7A4CC6,
+0x87FC5269,
+0x51AEFF47,
+0xA36F64CF,
+0x53A9714A,
+0x7D54A877,
+0xAA835AA7,
+0x5DAA855D,
+0x8B5EAB89,
+0xAE8F5DAE,
+0x5FAF945E,
+0x9A5BAD98,
+0xAE9E59AF,
+0x55AC9E56,
+0xA153ABA2,
+0xA5A050A8,
+0x49A0A14C,
+0xA4469EA3,
+0x9BA5449C,
+0x439AA545,
+0xA54097A4,
+0x92A73D92,
+0x368FA63B,
+0xA9348EA9,
+0x8FAC358F,
+0x3590AE30,
+0xAF318DAD,
+0x8BAC318D,
+0x2F88AC30,
+0xB03189AD,
+0x87AF3087,
+0x2E84AC30,
+0x1E2B871A,
+0x6D1D2375,
+0x16631F1F,
+0x230C5B27,
+0x462A0350,
+0x472A00,
+0x26004727,
+0x45250144,
+0x1462200,
+0x1E004521,
+0x461F0045,
+0x471F00,
+0x1E01451E,
+0x461F0145,
+0x1462100,
+0x2000481E,
+0x45200045,
+0x2492400,
+0x28004823,
+0x4B26004A,
+0x4C2700,
+0x28004C28,
+0x4C27014D,
+0x4A2501,
+0x24014924,
+0x4A230149,
+0x2482302,
+0x33004726,
+0xA0FF1541,
+0x6CB2F95D,
+0xDB2F6ECE,
+0x80EB3B7B,
+0x73A6FA46,
+0xE16BA0F5,
+0xA2F54D7A,
+0x4772E162,
+0xD9415BBF,
+0x65EA5465,
+0x7DAFFF31,
+0xD62A46BC,
+0x6FE53656,
+0x7AA0EE4F,
+0xCC395FD0,
+0x98E93D5F,
+0x3464D682,
+0xE53676EA,
+0x4DCF2867,
+0x2B5CD61C,
+0xEF2667E5,
+0x90FA3E79,
+0x3790FB46,
+0xFF2F86F9,
+0xA6FD5197,
+0x5BA1FB5E,
+0xFE3B89F7,
+0x8CE8448E,
+0x5E97F15D,
+0xE54979E7,
+0x8DF6366D,
+0x3D94F845,
+0xB92F71E1,
+0x4FBB1C37,
+0x3A59BE31,
+0xA43550BB,
+0x428B314A,
+0x394B9B33,
+0xA52F3E92,
+0x3F8C3248,
+0x27359730,
+0x581F1B69,
+0x20582525,
+0x2C35871A,
+0x962F459C,
+0x46A34946,
+0x3149AD37,
+0x7B2F52A0,
+0x2C3F454B,
+0x3F3A7328,
+0x7A3B377E,
+0x3D863535,
+0x2D3C843A,
+0x602A2F5C,
+0x2B5A2227,
+0x262A5A2D,
+0x78403F84,
+0x57865E41,
+0x5A528859,
+0x1A655B88,
+0xCF2A3A85,
+0x8CF86132,
+0x4697FF40,
+0xAA787FE7,
+0x4DAC7D4F,
+0x864EAB7F,
+0xA98A55AA,
+0x59AA8D57,
+0x985BAF95,
+0xAE9B5AAD,
+0x5CAE9E59,
+0xA358ACA0,
+0xABA356AA,
+0x50A79F53,
+0xA050A6A2,
+0x9EA34CA3,
+0x449BA346,
+0xA3419AA5,
+0x91A24095,
+0x3D92A440,
+0xA6388FA3,
+0x8BA6358A,
+0x2E89A431,
+0xAB318DAA,
+0x8BAD328D,
+0x3189AC31,
+0xAD3186AC,
+0x86A92F89,
+0x3085AD2C,
+0xAB2F82AA,
+0x7FA83183,
+0x327DA82F,
+0x192F8818,
+0x7419307F,
+0x1C6D1A29,
+0x22135F1C,
+0x4E280B58,
+0x482B01,
+0x24004627,
+0x45220046,
+0x2442202,
+0x1E024522,
+0x451D0048,
+0x441A01,
+0x1A00451A,
+0x471B0146,
+0x1471D01,
+0x2100461C,
+0x45200147,
+0x1462201,
+0x23014723,
+0x4B260147,
+0x4A2500,
+0x27004B26,
+0x4A26014D,
+0x492402,
+0x24004823,
+0x4823014A,
+0x3442601,
+0xD5003C0B,
+0x84EB74AA,
+0x4D91F54B,
+0xCB1D4FB5,
+0xAFFE2148,
+0x6B94F16F,
+0xC64775E2,
+0x4FC02B40,
+0x4479EB2B,
+0xE2305DDF,
+0x94FC2E5E,
+0x3247CE5A,
+0xF24C78E7,
+0xB8F8A9CA,
+0x3967DD84,
+0xDB3F5BCE,
+0x5CD24C66,
+0x6183F13B,
+0xC14249C3,
+0x5EDD2335,
+0x378CF41E,
+0xF94D95F5,
+0x5DE4428D,
+0x1444DB1C,
+0xC01033C8,
+0x48CC1835,
+0x1E65E41E,
+0xF6428BF6,
+0x86F05B9C,
+0x3874EA49,
+0xC32C69E3,
+0x50BD2352,
+0x143CAF27,
+0xE01F43A8,
+0x85F23E6C,
+0x3377E641,
+0xB0295CE2,
+0x58B62B40,
+0x2D64CB30,
+0xBE3457CA,
+0x76D7355F,
+0x3860D03D,
+0x9B3248B0,
+0x3A823540,
+0x3D3E6E2B,
+0xA8292966,
+0x4186304C,
+0x4A539A35,
+0xB05E62A0,
+0x55A75061,
+0x29479337,
+0x7D2D2069,
+0x3F893A2C,
+0x403D8B3A,
+0x8833438F,
+0x49953446,
+0x416FC137,
+0x644A77BB,
+0x4C84433C,
+0x687AAE58,
+0x707E8CAA,
+0xDE367BC5,
+0x6AF20C39,
+0x38A6F91C,
+0xA98374EB,
+0x50AC8332,
+0x8F4AAE87,
+0xAD944BAE,
+0x52AB9550,
+0xA153AB9C,
+0xA89F52AC,
+0x52A99F4E,
+0xA350A8A2,
+0xA0A34EA5,
+0x4DA2A44D,
+0xA3489FA5,
+0x97A34699,
+0x3F95A544,
+0xA43990A5,
+0x88A23A8E,
+0x3388A238,
+0xA53086A1,
+0x89A93188,
+0x2F87A932,
+0xA92E86AA,
+0x88AC2E88,
+0x2E82AA30,
+0xAB3083AB,
+0x80A82E82,
+0x3080A72D,
+0xA3307FA5,
+0x7EA6337E,
+0x367AA336,
+0x192D8818,
+0x78163481,
+0x25701831,
+0x1E206718,
+0x53270F5D,
+0x24C2505,
+0x26004528,
+0x45210144,
+0x1462100,
+0x1C014620,
+0x451A0044,
+0x451800,
+0x18024419,
+0x44180245,
+0x1451A01,
+0x1B01441B,
+0x47210046,
+0x452001,
+0x23004521,
+0x4A240148,
+0x14A2501,
+0x26004823,
+0x4A250049,
+0x1482301,
+0x24014726,
+0x46220047,
+0x482401,
+0xFF0C4336,
+0x6DD17EB4,
+0x3578DC2D,
+0xE02740AC,
+0x85EE3A76,
+0x4581F853,
+0xBB3878E7,
+0xA3FE1F2C,
+0x5E96EF6F,
+0xE92450D2,
+0x9DEF4674,
+0x5D97F975,
+0xF14376E5,
+0x8BF18AB1,
+0x4B7BF06D,
+0xDA3767DF,
+0x43DF294B,
+0x274BDB16,
+0xFF589FF4,
+0xA2FF62A3,
+0x2D6CF45D,
+0xC62957D4,
+0x4FD51E43,
+0x386CEF27,
+0xFA428AF5,
+0x66E42B7D,
+0x1C42C219,
+0xC91D44CC,
+0x53D21945,
+0x1F48CE1D,
+0xB91F3BC5,
+0x58BC1E42,
+0x1537B521,
+0xCC1A45CB,
+0x44BE2455,
+0x2A4DC81B,
+0xBF253BB8,
+0x6DD6244A,
+0x63A9FF32,
+0xFC6DB4FF,
+0x95F46BAB,
+0x6AADFF57,
+0xE5609EF8,
+0x39943B73,
+0x314BB82E,
+0x7C3262D2,
+0x3E8C1B2E,
+0x446CB22E,
+0x75394589,
+0x3F7B333B,
+0x3D3C8538,
+0xA1304CB5,
+0x459D3945,
+0x3E57A842,
+0xED5082DA,
+0xA1F466A8,
+0x5694E15F,
+0xF95DA5F6,
+0x97E164AD,
+0x5084D45B,
+0x752BA58F,
+0xD43328D6,
+0x3DF3735D,
+0x7589F65B,
+0xE256D7FF,
+0x29A49374,
+0x9A4EAD94,
+0xA99D4EAA,
+0x4EA89F4A,
+0x9E4EAAA0,
+0xA7A54BA6,
+0x4DA3A04C,
+0xA34BA1A3,
+0x9AA3499E,
+0x419AA344,
+0xA43F95A5,
+0x90A33B92,
+0x388CA23E,
+0x9F348AA1,
+0x85A23088,
+0x2D85A231,
+0xA82D85A3,
+0x86A92D86,
+0x3084AB2D,
+0xA82F84A9,
+0x80A62E83,
+0x2B7FA32D,
+0xA22A7DA5,
+0x7DA52C7D,
+0x307DA430,
+0xA4337DA3,
+0x7BA7367C,
+0x3C7BA039,
+0x142E8F13,
+0x7E123784,
+0x35791339,
+0x192A6F14,
+0x5A1E1966,
+0x555240A,
+0x26024A29,
+0x44220144,
+0x1452000,
+0x18014620,
+0x46190045,
+0x1431902,
+0x18004217,
+0x43190043,
+0x461801,
+0x1802471A,
+0x451A0046,
+0x2462100,
+0x23004520,
+0x47220146,
+0x24A2500,
+0x26024924,
+0x4823004A,
+0x492400,
+0x24004826,
+0x47250046,
+0x3F1700,
+0xDA487386,
+0x76DC3A69,
+0x3F60C435,
+0xBD2558B3,
+0x7AF32C47,
+0x5885F541,
+0xEA1F4DD9,
+0xA9F85F85,
+0x334ACC74,
+0xF7466AE2,
+0xC0F272A3,
+0x4979E08D,
+0xEC445FE7,
+0x6FE65B72,
+0x5C81E951,
+0xF887A3F6,
+0x9BFD8CB9,
+0x498EFE60,
+0xE85190E7,
+0x4EE13372,
+0x1A38C120,
+0xF42558CF,
+0x8FFD3382,
+0x327EF032,
+0xCA3068ED,
+0x39BB283F,
+0x224AD52D,
+0xF82456D9,
+0x9CFA4683,
+0x519EFC52,
+0xE9428FFA,
+0x4BC72968,
+0x4C8BF724,
+0xEF5399F8,
+0x4ABD3278,
+0x3E83EB1B,
+0xE84C8DE6,
+0x7BEC4B85,
+0x2963DC3C,
+0xE02764DA,
+0x5DD92C6B,
+0x1746B72E,
+0xBF234BC0,
+0x63CB214C,
+0x3E6BC12C,
+0xAB344DA6,
+0x3E752341,
+0x3D446C2D,
+0x6E4B2D63,
+0x407A3B31,
+0x2C3B7843,
+0x6E332E6D,
+0x3077312F,
+0x32509D30,
+0xD13869D1,
+0x89D8306A,
+0x488FD345,
+0xB34187D1,
+0xB0D13496,
+0x3180B344,
+0x25125066,
+0xB70B3E75,
+0xABF81081,
+0x2D86F01E,
+0xFF4897F6,
+0x85E964C9,
+0x9D41A699,
+0xA8A24AAA,
+0x49A7A347,
+0xA54AA5A3,
+0x9DA348A2,
+0x499CA447,
+0xA2439BA4,
+0x94A34196,
+0x3B93A240,
+0xA33A90A3,
+0x8BA4368E,
+0x3287A435,
+0xA32C85A3,
+0x82A52A83,
+0x2B83A52C,
+0xA82583A8,
+0x86AB2C86,
+0x2E83AB2B,
+0xA83180A9,
+0x7CA2317F,
+0x2B799F2C,
+0xA2317CA3,
+0x7BA5317A,
+0x3A79A237,
+0xA13C79A2,
+0x799F3F7B,
+0x43789841,
+0x12299A17,
+0x83113189,
+0x327F1134,
+0x152D760F,
+0x6419256C,
+0x85C1B15,
+0x23015623,
+0x43210148,
+0x2432100,
+0x1E00441E,
+0x431A0043,
+0x431800,
+0x16004217,
+0x42170042,
+0x2441900,
+0x18004217,
+0x451A0145,
+0x441F00,
+0x21024621,
+0x45210144,
+0x1472200,
+0x25004822,
+0x47220047,
+0x1482400,
+0x24014725,
+0x47240146,
+0x370801,
+0xED5C98D2,
+0x75E5437C,
+0x5489F03E,
+0xD33976E6,
+0xAFFC495F,
+0x5A80EC87,
+0xED2D46D3,
+0x3EC63E76,
+0x3343BC2C,
+0xFA557CE4,
+0x7EE16290,
+0x3152D255,
+0xFF5D93F8,
+0x6CE3A5D4,
+0x5A87F13E,
+0xEDACCAF3,
+0x4CDF7B93,
+0x4D66E232,
+0xD22444C5,
+0x50D42556,
+0x285AD828,
+0xD52257D0,
+0x51C72859,
+0x1B47C120,
+0xEC2859D5,
+0x92F13878,
+0x5DA5FF53,
+0xCC4693FF,
+0x5AD41857,
+0x2359D722,
+0xD61640CB,
+0x83F11C4B,
+0x2F67D948,
+0xE4225CDF,
+0x70F12E66,
+0x275CD62C,
+0xCA2D5AC3,
+0x62D53359,
+0x284DBA2A,
+0x982645AE,
+0x2C8A2136,
+0x3773E021,
+0xE95FB1FF,
+0x54B86195,
+0x3F78D82F,
+0xCE6DB8FB,
+0x4B9C497B,
+0x50539240,
+0x853651A0,
+0x37823B31,
+0x4057A23A,
+0xB63C61C2,
+0x43903F54,
+0x2B1C5340,
+0x87392754,
+0x72C44143,
+0x579FFA40,
+0xAE59A7E9,
+0x3B4B5999,
+0x3E594E1B,
+0x5967946E,
+0xDE3B53D3,
+0x8AF3264C,
+0x36B7F81A,
+0xD555C1FB,
+0x50CB7C5C,
+0xA057C889,
+0xA6A847A7,
+0x45A4A545,
+0xA446A0A5,
+0x97A6419B,
+0x4294A944,
+0xA23A90A3,
+0x8BA1398D,
+0x358BA336,
+0xA33188A2,
+0x81A12D87,
+0x2C80A527,
+0xA7297EA3,
+0x7DA62A7F,
+0x2980A92B,
+0xA82981A6,
+0x7EA82A80,
+0x2A7EA22A,
+0xA2307CA2,
+0x7BA2307A,
+0x3077A02D,
+0x9D34789F,
+0x799E3676,
+0x3D789E38,
+0x9B43799F,
+0x77984277,
+0x48778E47,
+0x15279B16,
+0x88122E91,
+0x35831136,
+0x11327E10,
+0x6A162A71,
+0x125E1821,
+0x23055823,
+0x4420014E,
+0x1412200,
+0x1E01421F,
+0x411D0042,
+0x411B00,
+0x16004318,
+0x42170043,
+0x1441900,
+0x1900421B,
+0x411B0043,
+0x421E00,
+0x20004520,
+0x45210246,
+0x482300,
+0x26004722,
+0x46230147,
+0x1472600,
+0x23014624,
+0x47220046,
+0x371100,
+0xE8569CFF,
+0x8FF2396A,
+0x4783EA52,
+0xE1305CD3,
+0x6AE64C76,
+0x628CD951,
+0xC42B3ABE,
+0x47D02041,
+0x4E75E125,
+0xBF83B4FF,
+0x35A44A58,
+0x2B4ECE23,
+0xC02C46D3,
+0x7CDF373F,
+0x3A5CE54C,
+0xF35377ED,
+0x59E36D92,
+0x3548CB1F,
+0xC93755C6,
+0x43BD2F49,
+0x2E41C52E,
+0xC71E3CC0,
+0x3AB12140,
+0x2341B11E,
+0xDE2966D2,
+0x76DE3975,
+0x2B63E437,
+0xAF1C40C7,
+0x54C6153C,
+0x2E61D624,
+0xFC4C86F0,
+0x6DEC3F8F,
+0x245BCB2A,
+0xDE2951C6,
+0x44BA2A64,
+0x1F31961D,
+0x871A2F96,
+0x22731C28,
+0x27339212,
+0x9C1F256C,
+0x3B942634,
+0x202A831B,
+0xED214EBA,
+0x91F73786,
+0x3266D54B,
+0xE92D59C5,
+0x85EF488A,
+0x26439641,
+0xA5304697,
+0x57B63B46,
+0x3252BC3B,
+0xFC328BEE,
+0x92F9479B,
+0x4181D74D,
+0x8C2B46A1,
+0x59A7333D,
+0x354F8B38,
+0x70424583,
+0x4D9C5131,
+0x629D7E51,
+0x3D70B685,
+0xED764AAA,
+0xA3FE936D,
+0x15ADFC3F,
+0xFF2BADF9,
+0x66E166D9,
+0xAB29A2AF,
+0xA5A843A7,
+0x419EA940,
+0xA3409CA4,
+0x93A44098,
+0x388BA240,
+0x9F30879F,
+0x829E2E85,
+0x2A7F9D2C,
+0x9E297CA0,
+0x7BA02779,
+0x277AA329,
+0xA7287BA5,
+0x7CA6297C,
+0x2679A527,
+0xA4287BA2,
+0x77A42A78,
+0x2E77A12D,
+0xA23277A0,
+0x79A23178,
+0x37769F36,
+0x9D3C799D,
+0x769A3E78,
+0x46779741,
+0x91497693,
+0x748B4A75,
+0x5075884C,
+0x152A9E15,
+0x8F143198,
+0x38860F33,
+0x1336800F,
+0x6F123178,
+0x19661128,
+0x1E095E1C,
+0x4B210055,
+0x1422100,
+0x1D01411E,
+0x421D0042,
+0x421E00,
+0x17004119,
+0x42170043,
+0x441900,
+0x1800431A,
+0x421B0043,
+0x421E00,
+0x2001441F,
+0x42200144,
+0x452001,
+0x22004621,
+0x46230046,
+0x452300,
+0x21004624,
+0x45200046,
+0x9452100,
+0xE15194FF,
+0x75E53C6D,
+0x4D84EB3E,
+0xE33A56CA,
+0x44CE406A,
+0x486BE72A,
+0xCF2D47BB,
+0x84EF1D47,
+0x4B77EE4A,
+0xC62D4CC6,
+0x5FD62941,
+0x385FE02F,
+0xD4588EF1,
+0x59D1456A,
+0x5985F038,
+0xEC7CA1F4,
+0x4EE0527A,
+0x475DD227,
+0xD93F64D3,
+0x7BF33161,
+0x558DF444,
+0xF74185F4,
+0x56D52074,
+0x1B53CA1A,
+0xBB2145C7,
+0x4CC6244A,
+0x2A4EC52D,
+0xDD2C61DC,
+0x6CE7285C,
+0x448FF932,
+0xD54B91FD,
+0x2E9C1F58,
+0x1136A40E,
+0xBE1241B2,
+0x46B41944,
+0x2C55BD17,
+0xA61D2792,
+0x47AE1C44,
+0x284AB32D,
+0x9E2D46A0,
+0x39A91F3E,
+0x1B338E1D,
+0x671E2E8D,
+0x1F6E1A1A,
+0x18308D17,
+0xC62353BA,
+0x5AD22C58,
+0x2967DA2C,
+0xA32A56C3,
+0x3386444F,
+0x25348E33,
+0xCA2845AA,
+0x70C43165,
+0x3F7DCF39,
+0xB63978D7,
+0x33722759,
+0x2D3D8029,
+0x7E3E3874,
+0x47774F48,
+0x376D6F39,
+0x334C8362,
+0xD92182B5,
+0x89DB158D,
+0x2495E920,
+0xFE20A2F8,
+0xD7FF2DB5,
+0xB266D762,
+0x9EAE33A3,
+0x3B9FAB40,
+0xAA3F98A9,
+0x8BA03F93,
+0x30839E35,
+0x972C7D9B,
+0x76962A79,
+0x22759A25,
+0x9F21749B,
+0x76A42175,
+0x2575A623,
+0xA223749E,
+0x74A32576,
+0x27759F25,
+0x9E2B749D,
+0x739E2A75,
+0x3575A22E,
+0x9E3878A1,
+0x779C3A79,
+0x3D799A3A,
+0x96447897,
+0x76944776,
+0x4B758F4C,
+0x8A4F728D,
+0x778B4E72,
+0x557A8B53,
+0x152AA516,
+0x92112F9B,
+0x388B1231,
+0x1037850E,
+0x7310347F,
+0x226A162C,
+0x1A116118,
+0x521F045A,
+0x1472100,
+0x1D01401F,
+0x411C0040,
+0x401D00,
+0x1700411C,
+0x43190043,
+0x3F1A00,
+0x18013F18,
+0x401A0040,
+0x401E00,
+0x1F00431E,
+0x411F0042,
+0x1412201,
+0x20004322,
+0x46220045,
+0x2452100,
+0x24004523,
+0x451A0146,
+0x33657500,
+0xD94073EA,
+0x76EA3263,
+0x578BF049,
+0xEA4057D0,
+0x4BD0446D,
+0x405EDE27,
+0xF41D41C5,
+0x50CC2569,
+0x2C46BA22,
+0xD11B3DBC,
+0x75E12F4C,
+0x346BE142,
+0xB13249BD,
+0x37B3202B,
+0x2F53D42B,
+0xD83256D7,
+0x56D63653,
+0x5D90D539,
+0xED3A70E1,
+0x95F7427C,
+0x5997F15C,
+0xD4367BEA,
+0x45C51D53,
+0x336BE51D,
+0xD02655E0,
+0x6EDA2C56,
+0x3672E02B,
+0xF23367D9,
+0x7CED3C84,
+0x2157D931,
+0xB9204EC9,
+0x43B6173A,
+0x1340AD15,
+0xB61539AE,
+0x3BB22036,
+0x1C5ED410,
+0xC92E63D6,
+0x78E92C54,
+0x2A57B630,
+0xE8295ECB,
+0x73E13270,
+0x2052BC37,
+0xA41F41B3,
+0x429E1D42,
+0x1D2A8029,
+0xB31F3A97,
+0x7BE81A46,
+0x3578EF37,
+0xE01F65DA,
+0x8EF83072,
+0x3E72E143,
+0xA02D50B2,
+0x2B712E3E,
+0x23337C1F,
+0x90283684,
+0x3E8A3343,
+0x2C509C29,
+0x84334582,
+0x45803547,
+0x38687B32,
+0x26689D69,
+0xDB1F6FA0,
+0x96FE3581,
+0x179AEE05,
+0xFB2DA1F0,
+0xA7EF08AA,
+0x92B2FA10,
+0x98B949B9,
+0x3B95AC2B,
+0xA93E92AE,
+0x86A2398D,
+0x2D7E9F31,
+0x962A789B,
+0x72952874,
+0x22719825,
+0x9D1F7098,
+0x70A02072,
+0x266F9E21,
+0x9B256F9A,
+0x709D2472,
+0x2B709A29,
+0x9B2F719B,
+0x739A3073,
+0x3C759D34,
+0x9A3E749C,
+0x76974276,
+0x46779443,
+0x914B7793,
+0x758E5177,
+0x51728C53,
+0x8C57758B,
+0x7B8C5879,
+0x5F83915A,
+0x1328A714,
+0x98102C9F,
+0x348F0F2F,
+0xE34870C,
+0x790B3683,
+0x296E1030,
+0x171C6514,
+0x581B1060,
+0x4C1E02,
+0x1D01431F,
+0x3F1C0040,
+0x401D01,
+0x1A00401E,
+0x3E190040,
+0x13F1A00,
+0x1B003E19,
+0x3F1B013F,
+0x401D00,
+0x1F00411D,
+0x421F0040,
+0x412100,
+0x25004222,
+0x43250142,
+0x2452501,
+0x24014522,
+0x40180246,
+0x2A606100,
+0xE05994FF,
+0x77E13A6D,
+0x5983E543,
+0xD84164DD,
+0x63E8314F,
+0x162E9931,
+0xC514399A,
+0x3EAF0C45,
+0x1E3CB321,
+0xD62A57DD,
+0x52C5315C,
+0x1237BE30,
+0xE51841D4,
+0x7DDC2E63,
+0x3E64D75E,
+0xF184AEF6,
+0x60D74175,
+0x5554B132,
+0xD74051B1,
+0x59DF3C61,
+0x1C50D729,
+0xD11847CC,
+0x88F3205A,
+0x498DFA45,
+0xED3082FF,
+0x40B61C62,
+0x2E69D32E,
+0xF43A76EB,
+0x35B13A7E,
+0x122FA70D,
+0xEC2E67D7,
+0x69EF387A,
+0x2B58D92C,
+0xF6306EE7,
+0x4BC73981,
+0x1136A924,
+0xD32766D2,
+0x43B63367,
+0x9308F0E,
+0xA91B40B4,
+0x5DD3193E,
+0x2B64E123,
+0xD8346ADB,
+0x68D53670,
+0x365FD530,
+0xA71A3098,
+0x379B1743,
+0x223C9F20,
+0xB72950BE,
+0x55BC1744,
+0x2863D027,
+0xBE1E53BE,
+0x7FE2235D,
+0x366FDB3F,
+0x6F294096,
+0x327E2126,
+0x3354AA23,
+0x9D426BB4,
+0x89A5487D,
+0x68B23D49,
+0x2D9ACC43,
+0xEC1CA5E0,
+0x7DEA0E8B,
+0xA9FF405,
+0xFD34B3FC,
+0xBBFC36C3,
+0x31B3F509,
+0xB59FA9F9,
+0x308FB745,
+0xAB3A8DA9,
+0x80A33386,
+0x287BA32E,
+0x9827789E,
+0x70962472,
+0x206D9423,
+0x92206C93,
+0x6B961E69,
+0x286A9724,
+0x952A6D97,
+0x6D97286B,
+0x306E962D,
+0x9A327199,
+0x74973573,
+0x3E73993A,
+0x9A45759A,
+0x76974772,
+0x4C75914C,
+0x8F517791,
+0x788D5277,
+0x5A7A8E57,
+0x955D7D90,
+0x85976181,
+0x6A8B9963,
+0xF2BAD12,
+0x9D112BA7,
+0x3194132E,
+0x102F880F,
+0x7D0D3385,
+0x2C720B32,
+0x12246913,
+0x5E151763,
+0x2571A07,
+0x1F004A1A,
+0x3F1F0146,
+0x401D01,
+0x1D003F1D,
+0x3F1C003F,
+0x13D1B01,
+0x1D003E1C,
+0x401E0040,
+0x3F1D00,
+0x1D003F1D,
+0x40210040,
+0x402002,
+0x23004123,
+0x43250141,
+0x2452201,
+0x1F014421,
+0x55410144,
+0x2B5E8A17,
+0xE53875E3,
+0x65C04E77,
+0x557CEE4C,
+0xD31F32B5,
+0x35BC2554,
+0x192B8B1D,
+0x8C1E266C,
+0x33921A39,
+0x1F3EB81B,
+0x9E264FC7,
+0x41AD0F21,
+0x264CD728,
+0xD02663E4,
+0x44BB143F,
+0x495AD423,
+0xCB5869DA,
+0x5CD4243E,
+0x3C5BE233,
+0xCD4256B6,
+0x3FC03A50,
+0x2347C125,
+0xB61F41BE,
+0x6ADF273C,
+0x3272E832,
+0x9D2C5AD3,
+0x56BE252B,
+0x244BC631,
+0xA8264CBE,
+0x71E7132D,
+0x2450CC3C,
+0xCD254FD8,
+0x39BC1A45,
+0x3486FC14,
+0xCB3379FD,
+0x79E41242,
+0x264AA92F,
+0x4415153C,
+0x2837081A,
+0x291C3B21,
+0x660F0D64,
+0x1A7B1015,
+0x18328D12,
+0xDC333D9F,
+0x5BCE3363,
+0x2B4EB832,
+0xAD335ADB,
+0x49BA193F,
+0x1F3DA31D,
+0xA51C47B2,
+0x2A712643,
+0x242E9225,
+0x801E2E7C,
+0x2F762833,
+0x28409F25,
+0xF7316DD0,
+0x90F5407D,
+0x347FDF45,
+0xD53372D0,
+0x89BD59AB,
+0x59AB343C,
+0x1873AF27,
+0xE20798D8,
+0x9FFC1C8B,
+0x2A9FE04,
+0xFC03B8FE,
+0xC1FB17B9,
+0x10C5FA28,
+0xD96BB3F6,
+0x298DB475,
+0xAF3488A7,
+0x7EA12F84,
+0x247A9F2A,
+0x9822749D,
+0x6F951F71,
+0x206C921F,
+0x90256893,
+0x68922466,
+0x2A669128,
+0x912D6A95,
+0x6D932D68,
+0x35709536,
+0x94397294,
+0x6F914071,
+0x48749544,
+0x954C7697,
+0x75945175,
+0x56799452,
+0x8F597A92,
+0x7C915B7A,
+0x65809660,
+0x98668597,
+0x8C976C89,
+0x76929D70,
+0xB31B10F,
+0xA00F2FA8,
+0x31971030,
+0xF308D11,
+0x840F2F84,
+0x2E780E34,
+0x1027700F,
+0x61101D69,
+0x60100C,
+0x1F015419,
+0x4020024B,
+0x401E00,
+0x1E01401F,
+0x411E003F,
+0x3F1C01,
+0x1C003E1B,
+0x401E003E,
+0x3F1D00,
+0x2000401D,
+0x3F200140,
+0x412102,
+0x23014224,
+0x44250141,
+0x2452701,
+0x29014427,
+0x390D0244,
+0x477FC100,
+0xEA396ACF,
+0x69B04678,
+0x3D52C14D,
+0xD13B5AD0,
+0x1C851F4A,
+0x2367E819,
+0x9C1C1E6C,
+0x2D8A1A38,
+0x1931A313,
+0xAC112DA4,
+0x2EAA1E29,
+0x2A4AD30D,
+0xBB1541BE,
+0x3FC01C36,
+0x334BC825,
+0xFF90A0ED,
+0x76F288BE,
+0x323FAC3F,
+0xC84247AD,
+0x41C22946,
+0x2C4BC523,
+0xC52742C2,
+0x44C3274F,
+0x1E3EB81C,
+0xBE2A31A0,
+0x69DC3D4F,
+0x2E65D73B,
+0xDB1F2C9A,
+0x52DA3166,
+0x3270EA22,
+0xC52C71FC,
+0x28A3163A,
+0x30A90A,
+0x520D1454,
+0x34683832,
+0x3B438027,
+0x62213F81,
+0x2B660D27,
+0x31344F0B,
+0xA72A3576,
+0x399E1940,
+0x36458219,
+0x4F2A2F78,
+0x2C8F1F14,
+0x141B6D14,
+0x83131C6C,
+0x1B6F2C27,
+0x282B8A27,
+0xFF1F62D3,
+0x97FE4C95,
+0x347AEC56,
+0x8A2F4CC7,
+0x49A92F45,
+0x2D51B03B,
+0xF22F68D7,
+0x81DF2E81,
+0x296ED738,
+0x823171CD,
+0x80543D62,
+0x67C02D3A,
+0x1472D62F,
+0xF10C85ED,
+0x95F60093,
+0x4A6FB07,
+0xFD01B4FD,
+0xB3FA00BC,
+0x9FF201,
+0xE3229FE8,
+0x238BB281,
+0xAB2D85AD,
+0x7CAB2C81,
+0x2274A323,
+0x981E719F,
+0x6C951C6E,
+0x226B941F,
+0x93296A95,
+0x698E2A6B,
+0x3269912A,
+0x8F316990,
+0x6B92356C,
+0x3A6B8E3A,
+0x95446D92,
+0x73974A70,
+0x4D77974F,
+0x99517998,
+0x7A97577D,
+0x5E7B9858,
+0x94637D96,
+0x8498637E,
+0x6D899A69,
+0x9A6E8B98,
+0x959E6F90,
+0x7997A077,
+0x937B107,
+0xA20D33AB,
+0x319D1031,
+0x102D910F,
+0x830A2F8B,
+0x307F0D2E,
+0xD28780C,
+0x6A132170,
+0x9630A19,
+0x1A005B13,
+0x471F0054,
+0x1402001,
+0x1D003E1E,
+0x3F1E003F,
+0x3F1D00,
+0x1D00401D,
+0x401E003F,
+0x401E00,
+0x1F00401D,
+0x3C1E0040,
+0x3E2001,
+0x24014224,
+0x45240043,
+0x2442201,
+0x23014423,
+0x48290243,
+0x22575705,
+0xDA4867B3,
+0x67D65873,
+0x31308940,
+0x952167E2,
+0x49CC0929,
+0x1F51D50F,
+0xE80F32A8,
+0x1D7F2562,
+0xD2B9B11,
+0xDD163FD7,
+0x59E21D50,
+0xA42D023,
+0xBD1633B9,
+0x6CDD233F,
+0x7BA1EB39,
+0xD35A6FDF,
+0x39AA3752,
+0x563D8535,
+0xBE3D45B0,
+0x56CC3953,
+0x3560DA2D,
+0xF14B85F7,
+0x4CB6337D,
+0x3241A426,
+0xF04479D4,
+0x7AEC488D,
+0x3453CC3D,
+0x9F2D60E3,
+0x29891535,
+0x93EC80B,
+0x811236AF,
+0x174F1724,
+0x3E40641B,
+0x31414B6E,
+0x18194B22,
+0x4C201E5C,
+0x601F3056,
+0x2F55012D,
+0x9316C1C,
+0x7A44445B,
+0x4C592B44,
+0x5437285A,
+0x6B241F2A,
+0x56D71F25,
+0x2D68E220,
+0x51272C70,
+0x17713C16,
+0x26399E28,
+0xBA234BB6,
+0x47BB1D49,
+0x1B3AB215,
+0x962951BC,
+0x469F293B,
+0x2458CE22,
+0xAF285DB2,
+0x4BA4274E,
+0x25479722,
+0x77345B86,
+0x9B414E81,
+0x68BD1746,
+0x196BD81F,
+0xE2097FE0,
+0x9EFB0187,
+0x2A9FB02,
+0xFB00ABFC,
+0xB6FC02AE,
+0x39B7FC16,
+0xFE07BFFF,
+0x37AC86B8,
+0xA71378B2,
+0x78A5277A,
+0x2474A31E,
+0x9D1E6E9D,
+0x6D981F6E,
+0x236A9521,
+0x952A6B96,
+0x6D912E6D,
+0x376A9031,
+0x8E3C6C8F,
+0x6C8F3E6C,
+0x41709041,
+0x97487194,
+0x78974E76,
+0x58789554,
+0x9A5C7C98,
+0x7E975D7E,
+0x627D9562,
+0x9A647E95,
+0x899C6A85,
+0x728D9D6F,
+0x9E73919C,
+0x99A07294,
+0x7E9BA179,
+0xA38B307,
+0xA81036AF,
+0x35A10F37,
+0x11339C10,
+0x890E3290,
+0x32860F31,
+0xC2A7E0F,
+0x730C2379,
+0x1C6C0D20,
+0x1807640E,
+0x4E21005E,
+0x452401,
+0x1C003E1F,
+0x401E0040,
+0x3F1D00,
+0x1D00401E,
+0x401D003F,
+0x3F1D00,
+0x1F003F1D,
+0x3F200040,
+0x3D1F00,
+0x21004121,
+0x44230042,
+0x3432302,
+0x21024325,
+0x573E0142,
+0x3C6ABE0F,
+0xA55D6DA9,
+0x44AE4360,
+0x416CC034,
+0x550A3EBD,
+0x49BE1C18,
+0xC1B9318,
+0xA42254C9,
+0x42B61A36,
+0x235EE715,
+0xAC2359E0,
+0x4CD61A2C,
+0x11A9818,
+0xD91A49C1,
+0x4CBF2D64,
+0x331F962E,
+0xB53942BC,
+0x7CC92A37,
+0x9ABFFC6D,
+0xF15D83E4,
+0x7FEE608F,
+0x4164DB4F,
+0xA33967DF,
+0x339C282C,
+0x2E40A92B,
+0xD13B54BB,
+0x6BE03E61,
+0x3C70E54B,
+0x861926A1,
+0x19732B37,
+0x202B7D16,
+0x4428456E,
+0x627C3833,
+0x66030C3B,
+0x6FA01431,
+0x5F84D230,
+0xFF7293FF,
+0x55CE2A4F,
+0x39840917,
+0x1A488214,
+0x631E2445,
+0x3A911D24,
+0x3729211F,
+0x82151038,
+0x266E0D25,
+0x27246D27,
+0xE1293598,
+0x88FB2756,
+0x3865DF46,
+0xED2250BB,
+0x80F33072,
+0x5192F747,
+0x8A253C91,
+0x42A22428,
+0x1D3F8F33,
+0xA12542AE,
+0x3D861147,
+0x36478F21,
+0x583B6494,
+0x7F233965,
+0x3AD4314E,
+0x165EE333,
+0xD1117DE8,
+0x89E50478,
+0x697EF05,
+0xFE07ACF9,
+0xB6FA01B6,
+0x1ACF600,
+0xF200A0ED,
+0xAFFF19A7,
+0xAA0C8EAB,
+0x72A31A70,
+0x2273A81E,
+0x9C1F70A1,
+0x6C981E6C,
+0x266D9623,
+0x942B6B96,
+0x71952C6C,
+0x3D709535,
+0x96447496,
+0x74974773,
+0x4D78984C,
+0x994F7796,
+0x7C995978,
+0x637C9A5E,
+0x9A63819C,
+0x8098647E,
+0x68829964,
+0x9E6C869D,
+0x8DA16B88,
+0x7490A071,
+0xA27897A0,
+0x9AA47797,
+0x7E9CA67B,
+0xA31AF06,
+0xAB0C37AD,
+0x32A50E39,
+0x1330A00E,
+0x90112F97,
+0x29880A2B,
+0xF2B870D,
+0x780E2981,
+0x1D740E25,
+0x120E6D0C,
+0x581A0165,
+0x1502200,
+0x1E014624,
+0x401E0040,
+0x13D2100,
+0x1E003C1E,
+0x3D1F023E,
+0x3E2101,
+0x1F00401C,
+0x3F20003E,
+0x1412100,
+0x23004020,
+0x42210243,
+0x1422501,
+0x25014122,
+0x3D1A0144,
+0x2B5B6900,
+0x9F36659F,
+0x63C14C5E,
+0x1D3EA943,
+0xB21444AF,
+0x1A7B0E4C,
+0x1839A505,
+0xA018329A,
+0x50C20C34,
+0x1734AF10,
+0xA9092498,
+0x3ABC1832,
+0x2345B41E,
+0xB03549B9,
+0x43BE283B,
+0x4573EF2C,
+0xFB81A7FA,
+0xA5EF769B,
+0x6D81E28D,
+0xC8444FCD,
+0x52C34860,
+0x384FC732,
+0xCD2C3EA5,
+0x73DD597C,
+0x4E91F14E,
+0xAC385FD4,
+0x359A2A40,
+0x2C52DB25,
+0xA9345ACA,
+0x4DE6203C,
+0x3C4E7909,
+0x42151237,
+0x4123236,
+0x58289691,
+0x9F022BA1,
+0x2E9C164A,
+0x8732B00F,
+0x35FFB8F6,
+0x3C878C10,
+0x20306202,
+0x7022488E,
+0x3C543448,
+0x1F308A3A,
+0xEF193CBC,
+0x49C8366F,
+0x5B87FC20,
+0xFE396BE4,
+0x60CC5A9F,
+0x2A4BC336,
+0xCA345FC5,
+0x8EF12A5F,
+0x2B53C550,
+0x962E3C94,
+0x42AE2B45,
+0x3068D924,
+0xE52F70E1,
+0x67DF3575,
+0x2759A71D,
+0x5A3E596D,
+0x89335280,
+0x33AB1D4F,
+0xD68D508,
+0xD8156CCC,
+0x8CEE0069,
+0x29DFC04,
+0xFC05A9FA,
+0xB5FC02B2,
+0x4B5FC06,
+0xDA03ABF3,
+0x8CD80094,
+0xAD1CAE64,
+0x71A5016E,
+0x1D6E9D23,
+0x9D1E6F9F,
+0x6B941F6E,
+0x2468931E,
+0x982B6894,
+0x7398316F,
+0x3D749A3A,
+0x9C43769D,
+0x7FA14B7A,
+0x537F9C52,
+0x9A5C7F9A,
+0x7F9A607F,
+0x63809C60,
+0x9A618099,
+0x849B6381,
+0x69889D65,
+0xA36C8BA0,
+0x8FA46E8E,
+0x7492A370,
+0xA37996A1,
+0x99A47C98,
+0x809EA87C,
+0xC2FAB0A,
+0xAC0B35AC,
+0x36AB0C37,
+0xF33A711,
+0x99102D9F,
+0x288F0F2C,
+0xD258B0C,
+0x820C2B8A,
+0x217F0E2A,
+0x11107706,
+0x6418016D,
+0x1592100,
+0x22014D23,
+0x41270044,
+0x13F2401,
+0x24003E20,
+0x411F003F,
+0x13F2100,
+0x1E00401E,
+0x4021003E,
+0x412101,
+0x21004121,
+0x42220041,
+0x1422201,
+0x22024226,
+0x492E0041,
+0xC4C3807,
+0x85375398,
+0x42723A4F,
+0x262A6939,
+0x5D0946A5,
+0x1F3D0819,
+0x43374D2F,
+0x69413F65,
+0x2A74403E,
+0x1B3AAE13,
+0xE31D52DF,
+0x4BC9255A,
+0x233BB523,
+0xE52045C5,
+0x78E53367,
+0x3452CC54,
+0xA53952C0,
+0x51CB2F2D,
+0x6587F633,
+0xC75976D3,
+0x6BDF4F62,
+0x4672E24F,
+0xB04A72E9,
+0x44A6444B,
+0x20279730,
+0xAD2E53D3,
+0x4091304B,
+0x3160D038,
+0x7D353F8A,
+0x4488222D,
+0x243C4E35,
+0x4B2A2C40,
+0x5AD2D530,
+0x105CC252,
+0xA12762B6,
+0x68BB0E43,
+0x136FB32B,
+0x99847AE3,
+0xA22FF8B,
+0x163E7E29,
+0x50113267,
+0x4E72292E,
+0x1538B04C,
+0xE93671EF,
+0xAFFF3668,
+0x1B50CA6F,
+0xD3346ADF,
+0x40A2305E,
+0x2941A730,
+0xFF3068D3,
+0x51C45BA4,
+0x26327F28,
+0xC12547A8,
+0x6AE02551,
+0x2B65D828,
+0xAB2C6ADF,
+0x47B22559,
+0x29509922,
+0x7433658C,
+0xA944326C,
+0x5BCF1846,
+0x1558DF11,
+0xD12473EA,
+0x86DE0473,
+0x697EF01,
+0xEB049FE7,
+0xB2FC06A2,
+0x6ADF702,
+0xEE039CE9,
+0x9DE903A6,
+0x825FCB00,
+0x629D04BE,
+0x236C9F14,
+0x9A1E6A9B,
+0x6B971D68,
+0x276C9A1E,
+0x9C2D6F9A,
+0x77A03073,
+0x447AA239,
+0xA14A7DA5,
+0x81A2507E,
+0x5983A355,
+0x9F60839F,
+0x839C6282,
+0x5F80995E,
+0x9A628699,
+0x879D6585,
+0x6C8BA068,
+0xA46E8CA2,
+0x92A66F8F,
+0x7593A772,
+0xA47895A2,
+0x9AA57B98,
+0x809CA87D,
+0xB31AA0A,
+0xAD0F32AD,
+0x39AF0F36,
+0x1033AC0D,
+0x9E0D2FA5,
+0x2A960E2D,
+0xB278D0E,
+0x8C0B288B,
+0x22860B27,
+0xC17800B,
+0x6D120276,
+0x601F00,
+0x24015724,
+0x40250047,
+0x412400,
+0x22004022,
+0x3F1D0140,
+0x401C00,
+0x21003E1E,
+0x3D1E003F,
+0x402001,
+0x20014020,
+0x40200040,
+0x3432500,
+0x25024328,
+0x492F0242,
+0x15423907,
+0xAC374B88,
+0x41884E75,
+0x3336561F,
+0x66342A4C,
+0x487A3836,
+0x3C3E6839,
+0x7368576D,
+0x22426F6D,
+0x32459F2E,
+0x8228368B,
+0x2C93132C,
+0x232E9724,
+0xB32B3FB5,
+0x1F7D2F3F,
+0x2A3AA824,
+0xAD3042B5,
+0x58CF233F,
+0x1F34A138,
+0xA62533AE,
+0x48B72C44,
+0x5368D734,
+0xE14748B8,
+0x42AF667D,
+0x2D42A337,
+0xC33F6AEB,
+0x4EAE4761,
+0x3039A549,
+0x67392C4F,
+0x44603C44,
+0x1523452E,
+0x2BA7291D,
+0x1D57D939,
+0x2485DE0C,
+0x820347C2,
+0x35A1032D,
+0x46576400,
+0x5A1D3B9E,
+0x2227FF83,
+0x73E8766,
+0x6F174596,
+0x4182303B,
+0x1B31A240,
+0xF82655CC,
+0x7DE74A88,
+0x273BB23A,
+0xBD3050C2,
+0x5FCE2E52,
+0x3762D53E,
+0xB73771DD,
+0x3C873350,
+0x28419F23,
+0xCE1D439C,
+0x56C03667,
+0x1E5BC523,
+0x841F5BCC,
+0x416F283A,
+0x3749613A,
+0x572E5568,
+0x72364062,
+0x3080322E,
+0x193E9B18,
+0xD51F4DC6,
+0x84EA015A,
+0x598F904,
+0xE704A2F7,
+0xA7F2009C,
+0x2A9F305,
+0xC80882C4,
+0x94D50188,
+0x206DC700,
+0x9E9631EB,
+0x1C619700,
+0x9F1E6A9B,
+0x6D9B236E,
+0x246C9B22,
+0x9E2E719C,
+0x78A42F73,
+0x407CA23A,
+0xA4497FA4,
+0x85A55280,
+0x5984A456,
+0xA25D85A3,
+0x87A16085,
+0x6488A263,
+0x9F668C9D,
+0x8BA1688C,
+0x6E8EA36C,
+0xA36E8EA3,
+0x90A5708E,
+0x7492A675,
+0xA57797A7,
+0x9AA87B98,
+0x7F9BA77E,
+0xF2EAA0D,
+0xB11034AC,
+0x32B31037,
+0xF2FB30F,
+0xA4092EAE,
+0x2C9C0E2D,
+0xB2A920F,
+0x920C2791,
+0x298E0A2A,
+0x71A890C,
+0x730D087F,
+0x1691C00,
+0x26005E22,
+0x44270051,
+0x1402302,
+0x21003E21,
+0x3F1F003E,
+0x13F1F00,
+0x20003E20,
+0x3E1F003F,
+0x13F2001,
+0x20004021,
+0x3E1F013E,
+0x2422400,
+0x1D00401F,
+0x411C0043,
+0x1E4D5E00,
+0x653B6DBA,
+0x4B862B35,
+0x3A375E28,
+0x9F414F88,
+0x6BA44269,
+0x5A6C9B4B,
+0x81646D9A,
+0x2F41595C,
+0x3838703B,
+0x864D3748,
+0x4FDA1733,
+0x173DAA20,
+0xAD152D8E,
+0x5CC82147,
+0x1F359033,
+0xDB2243B9,
+0x3499265D,
+0x2F54D21F,
+0x94265CC8,
+0x4EBE1A32,
+0x5C56B639,
+0xB34B5EC0,
+0x2B89474E,
+0x2C3D981E,
+0xA84554C4,
+0x31783D44,
+0x3244B13E,
+0x6546444C,
+0x1F453245,
+0x371C350F,
+0x13FF5422,
+0xC0D96906,
+0x12EA,
+0xD02041F,
+0x12A0000,
+0x202D2E01,
+0x1B1D417E,
+0x1517E139,
+0x2346707F,
+0x58284571,
+0x37743E43,
+0x2939B646,
+0xE82E53C0,
+0x37B13A74,
+0x3558CB25,
+0xCA5088F2,
+0x62D02A56,
+0x2C65DA35,
+0xA7235CD9,
+0x45BB2245,
+0x214FBD29,
+0x92396FDA,
+0x32741F40,
+0x22329018,
+0x7B1F3A91,
+0x4F793646,
+0x3E638442,
+0x4B3D6278,
+0x78312A5E,
+0x489C1F31,
+0x949B51B,
+0xEB255DDE,
+0x83E10772,
+0x195EC03,
+0xEE099AF0,
+0x9BE405A0,
+0x792D102,
+0xDD02A1E0,
+0x88CD0399,
+0x286D501,
+0xDC345BDE,
+0x1870A70F,
+0x9D1E6796,
+0x70A2236A,
+0x286FA028,
+0xA12E75A2,
+0x7AA62F76,
+0x3F7EA639,
+0xAA4583A8,
+0x86A84F85,
+0x578AA952,
+0xAB5B8BAA,
+0x8BA7628B,
+0x648DA568,
+0xA1678FA5,
+0x8EA3678B,
+0x6F8EA26D,
+0xA56E8DA2,
+0x90A57291,
+0x7692A774,
+0xA87994A8,
+0x9BA77C97,
+0x819DA97F,
+0x1429A813,
+0xB1122EAB,
+0x33B51135,
+0xE34B713,
+0xAA0832B2,
+0x2CA10A2E,
+0xA2C990E,
+0x90082793,
+0x29910927,
+0x81A8F0D,
+0x7C0C1288,
+0x701305,
+0x2201651D,
+0x4A270059,
+0x412500,
+0x21003A21,
+0x3B1F003A,
+0x3B2000,
+0x1D013B1F,
+0x3C1C003C,
+0x3D1E00,
+0x20013E1F,
+0x3E1F013F,
+0x13E2200,
+0x22013E21,
+0x3F1E0044,
+0x37548300,
+0x823167AB,
+0x568D3744,
+0x313C7138,
+0x86576291,
+0x6B7A5B6B,
+0x635E775C,
+0x8D65738A,
+0x4D6A5C69,
+0x373C7465,
+0x6C3E2E38,
+0x49B34846,
+0x1847B91D,
+0x7F184AC6,
+0x2E731C23,
+0x213B9027,
+0x8318359C,
+0x32871924,
+0x1D2B7D1B,
+0x6A242D84,
+0x3D951B21,
+0x353C892E,
+0x7C273188,
+0x2F5A1A27,
+0x34326C3C,
+0x6E25164C,
+0x1D4F2129,
+0x211F592E,
+0x50576162,
+0x1A422030,
+0x7A27230A,
+0x17FF5124,
+0x4F652E00,
+0xB5F,
+0x1C030023,
+0x1D0301,
+0x13202700,
+0x28232736,
+0x241ACE35,
+0x1A39598D,
+0x442A478A,
+0x3E792027,
+0x2740AD4F,
+0xAF406DCE,
+0x6FE22A42,
+0x5299FC33,
+0xC5275BCD,
+0x62DC3257,
+0x458BEA2C,
+0x87315FC1,
+0x6ADC2137,
+0x356EE339,
+0x801E389E,
+0x459D233A,
+0x3170E027,
+0x7D2D5DD3,
+0x3B7B253F,
+0x2E5FAA2B,
+0x4B38699B,
+0xA12A4682,
+0x56C51C49,
+0x45DD707,
+0xE3117BE0,
+0x90E90A87,
+0x69FF304,
+0xD60495ED,
+0x8DDA038C,
+0x294DC07,
+0xF0029DE2,
+0x98E403A4,
+0x97E204,
+0xCB0172D7,
+0x169E8716,
+0x9C1D5D96,
+0x709F276A,
+0x2B72A526,
+0xA52E76A5,
+0x7BA8307A,
+0x4382AB39,
+0xAE4684AE,
+0x8CB04E88,
+0x558BB054,
+0xAD598DAF,
+0x90AA5A8E,
+0x6191AA5D,
+0xA76390A8,
+0x90A66691,
+0x6D90A56A,
+0xA26F90A3,
+0x91A66F8E,
+0x7793A673,
+0xAA7B95A8,
+0x9AA47D98,
+0x849FAB7E,
+0x1826A815,
+0xB1172BAD,
+0x31B51230,
+0xC31B911,
+0xAF0732B6,
+0x2AA8062B,
+0xC2A9F0B,
+0x950A2597,
+0x27950A26,
+0x71F940A,
+0x88081A8E,
+0x78080B,
+0x1E016F12,
+0x53230063,
+0x2492601,
+0x21003E23,
+0x361C0139,
+0x1381E00,
+0x1D01371D,
+0x3B1C0038,
+0x391C00,
+0x1D00391C,
+0x3C1E003C,
+0x3B2101,
+0x1D003D1D,
+0x3B30003D,
+0x4B81BD1A,
+0xA92C4A87,
+0x4A804978,
+0x3A5E9C2F,
+0x2C606689,
+0x1E09542C,
+0x5C382145,
+0x66583A32,
+0x767F6257,
+0x5553726D,
+0x763A2F53,
+0x314A3B43,
+0x2E469B3E,
+0xB41D4CBC,
+0x2C88264C,
+0x2A1F5516,
+0x300F1C59,
+0x18411503,
+0x230F3416,
+0x45221750,
+0xF2D2315,
+0x292E5922,
+0x4B1C1A52,
+0x2D4C2118,
+0x2428643F,
+0x5D1C193C,
+0x1E5F2015,
+0x1F316815,
+0x41393647,
+0x12382024,
+0x8F261E05,
+0x23FE502A,
+0x373B3009,
+0x1531,
+0x1E01021C,
+0x260000,
+0x25313900,
+0x1F1E193C,
+0x5043C939,
+0x353D50A2,
+0x38204E92,
+0x3EA32D20,
+0x4E88F450,
+0xC12B4CB1,
+0x90FE3855,
+0x3366DB46,
+0xE22D4FC4,
+0x8DFC2F73,
+0x4076C845,
+0xB41F359D,
+0x65D52553,
+0x17399C30,
+0x9C24409A,
+0x64CF2842,
+0x285BBD31,
+0xA2233D8F,
+0x5FBB2E50,
+0x255BBE27,
+0x4E3968A7,
+0xA91F3D75,
+0x59D40B51,
+0x960C918,
+0xEC057CD9,
+0x8DE5038C,
+0x9CEE05,
+0xF0069EF0,
+0xA3F703A2,
+0x285D005,
+0xF3009AE5,
+0xA6F501A4,
+0x4A5F301,
+0xB70080DC,
+0x36B7412F,
+0x990B6BAC,
+0x70A02466,
+0x2D72A62A,
+0xAB2F75A7,
+0x7CA9327B,
+0x4382AB3A,
+0xB24687B0,
+0x8CB24B8A,
+0x508EB34D,
+0xB2568FB3,
+0x90AF598E,
+0x5D8EAE5A,
+0xAE5F91AE,
+0x91AB6592,
+0x6B91AA68,
+0xA86E91A9,
+0x94A67194,
+0x7592A573,
+0xA57B95A6,
+0x9CA67C99,
+0x839DAB7F,
+0x1728A717,
+0xB21727AB,
+0x2AB71229,
+0xC29B70F,
+0xB3072BB9,
+0x2AAB052D,
+0xE26A609,
+0x980A1F9C,
+0x22930724,
+0x823970A,
+0x8D062296,
+0x6820610,
+0x1C02770B,
+0x59210067,
+0x14D2200,
+0x21004021,
+0x311C023A,
+0x1321B00,
+0x1A003219,
+0x33160133,
+0x2361800,
+0x1C003718,
+0x371E0136,
+0x1381D01,
+0x12023A1F,
+0x434F0037,
+0x4A528434,
+0x6E384B7E,
+0x508F2C39,
+0x4B5A8A2D,
+0x194E5575,
+0x4637531F,
+0x804E2673,
+0x3467381A,
+0x61755C3D,
+0x6C66776B,
+0x3B4A4551,
+0x45454331,
+0x3F38795D,
+0x77102176,
+0x3C8A1228,
+0x1A255E27,
+0x22180E24,
+0x262E2516,
+0x3D2F3433,
+0x3430283F,
+0x2F3C3F31,
+0x2E212A34,
+0x442B0F29,
+0x3B3A3C34,
+0x3B375341,
+0x45283258,
+0x2748170A,
+0x2B26462F,
+0x522F2C2F,
+0x11381D37,
+0x94302500,
+0x19FF4D25,
+0x8E7D2A0F,
+0x973,
+0x28030324,
+0x230108,
+0x295B6902,
+0x231E041C,
+0x404EFC3A,
+0x1B325B60,
+0x6D145F9D,
+0x50D4392A,
+0x4262DF39,
+0xEE3540B0,
+0x6DDC4480,
+0x2146BD34,
+0xEC2C62CE,
+0x68CD2E7A,
+0x1E379532,
+0xB81E45A7,
+0x46B12A43,
+0x2245AA1C,
+0x9424409B,
+0x4EA1283D,
+0x2649A430,
+0xD126439E,
+0x71CA3B6B,
+0x256DD433,
+0x7D2757AD,
+0x812E325C,
+0x50C20F31,
+0x1161D51D,
+0xE80370CB,
+0x93F50289,
+0x59DF806,
+0xF307A3FA,
+0xA0F401A1,
+0x789D504,
+0xFB02A1EF,
+0xA9F802AB,
+0xA3F407,
+0xC6056CD1,
+0x46C20045,
+0xA12EB86D,
+0x6CA01F6A,
+0x3074A32A,
+0xAC3077A5,
+0x7EAB347A,
+0x3F81AB3B,
+0xB04285AF,
+0x89B24186,
+0x4B8AB24A,
+0xB34E8CB1,
+0x8FB45390,
+0x568FB455,
+0xB25B8EB0,
+0x8FAE6091,
+0x6792AD63,
+0xAA6E93AB,
+0x95A87193,
+0x7A98A971,
+0xA67D99A8,
+0x9CA77E9A,
+0x879EAD80,
+0x1921A513,
+0xB31823AD,
+0x1FB61322,
+0xC25B811,
+0xB40828B6,
+0x2BAF042D,
+0xA25A607,
+0x9A0A23A2,
+0x1796071F,
+0x91B9708,
+0x94041C98,
+0x5880315,
+0x18027D07,
+0x5F19006D,
+0x511F02,
+0x20004422,
+0x341A023A,
+0x2E1602,
+0x14012D15,
+0x2D150230,
+0x2E1702,
+0x18012E18,
+0x32180032,
+0x2321802,
+0xD013217,
+0x4E5B0033,
+0x9D718B39,
+0x71B1AECC,
+0x4678313A,
+0x4F6A9A40,
+0x4E364F87,
+0x53606A3E,
+0xA37B6F70,
+0x4592694A,
+0x77996047,
+0x66728967,
+0x43585662,
+0x5C614136,
+0x34223461,
+0x5D2B2956,
+0x22441320,
+0x43393A24,
+0x302D1C35,
+0x333B180F,
+0x33282D4B,
+0x2F4A393A,
+0x3F3D341F,
+0x615A5A4E,
+0x5A4D4544,
+0x4150554D,
+0x38394443,
+0x372A1B36,
+0x2946201E,
+0x3A31522E,
+0x3E262034,
+0x19402C24,
+0x5E282210,
+0xFFF562E,
+0x65664205,
+0x1F262961,
+0x1D000427,
+0x5A640103,
+0x1D2D443A,
+0x5A62C20,
+0x498CE924,
+0x222B5605,
+0x81111E5F,
+0x56A14D3E,
+0x615DAC4E,
+0xD44D58C2,
+0x55C43660,
+0x3D51BA1F,
+0xC2305BBD,
+0x3693274E,
+0x22368A26,
+0x9E234BB2,
+0x49AD2841,
+0x1F3EAE1C,
+0xD02360D5,
+0x55B2285C,
+0x436BD92F,
+0xB92B69EA,
+0x3B7E2851,
+0x1850BE1B,
+0x92204CAA,
+0x5A622649,
+0x2A703327,
+0x113F9727,
+0xE1036CC5,
+0x90ED0082,
+0x108EF205,
+0xE4068EDF,
+0xA1F60695,
+0x192E00B,
+0xF8038FDB,
+0xA4F503AA,
+0x3A2F402,
+0xD10574DB,
+0x4EDE0051,
+0x9468E712,
+0x5F96229C,
+0x2C6F9D24,
+0xA22C75A0,
+0x7BAB2F79,
+0x387EAA39,
+0xAD3882AC,
+0x84B03E82,
+0x4488B240,
+0xB44588B1,
+0x8CB64C8C,
+0x4F8EB54D,
+0xB2548EB4,
+0x92B25C8F,
+0x6493B361,
+0xAF6794AE,
+0x98AB6C96,
+0x7997AC71,
+0xA9809AAC,
+0x9FAA809C,
+0x89A0AC83,
+0x151BA210,
+0xAB171EA9,
+0x1AB01219,
+0xC23B711,
+0xB4092CB3,
+0x2DB00430,
+0x42AA904,
+0x9C0722A1,
+0x14980A1C,
+0x6169507,
+0x97061697,
+0xA900115,
+0xD058406,
+0x65150174,
+0x2561E01,
+0x1C004923,
+0x38180140,
+0x2E1102,
+0x11022A0F,
+0x2C0F032E,
+0x32C1100,
+0x12002B13,
+0x2C11012C,
+0x22F1300,
+0xD022E16,
+0x464D002F,
+0xCE9BC455,
+0xADC885A4,
+0x4273A186,
+0x54485B4B,
+0x865E73A8,
+0x3B6C3444,
+0x857E9058,
+0x815A4E67,
+0x769C484B,
+0x4F5C7761,
+0x44564C5C,
+0x37414D35,
+0x45363C44,
+0x7A3A3245,
+0x307B2D2E,
+0x180F572B,
+0x49262961,
+0x22291918,
+0x49385136,
+0x3C3E374A,
+0x42424A35,
+0x564E4E4E,
+0x40636970,
+0x303B3D3A,
+0x30272F3E,
+0x402A262D,
+0x23323533,
+0x311D3828,
+0x344A5D69,
+0x16331C19,
+0x2411360F,
+0x14FF581C,
+0x19BD22,
+0x53676110,
+0x8948626A,
+0x3348547D,
+0x700E0A21,
+0x2AFF5E29,
+0x36807122,
+0x33335B00,
+0x781B222D,
+0x3B8D7560,
+0x4A50BB45,
+0xD2448FF6,
+0x50A12E5E,
+0x30357A3F,
+0x8A2B4B98,
+0x419F3141,
+0x2C51AA29,
+0xB83543AC,
+0x63E12C4F,
+0x3170D428,
+0xD43F87EC,
+0x59D53768,
+0x25439C34,
+0x971D3C80,
+0x49A82543,
+0x2D64CD25,
+0xA02373C8,
+0x677B2F75,
+0x4C763831,
+0x53A52D,
+0xEA0475EE,
+0xA4FF0D8D,
+0x1BA7FA08,
+0xD207AAE9,
+0x85CF0189,
+0x291DB04,
+0xF4099EEA,
+0xA0F500A7,
+0x2A2FB01,
+0xD90480E9,
+0x43DC0260,
+0x4C63E900,
+0x699F44E0,
+0x27689213,
+0xA32D6C9D,
+0x78A52D73,
+0x337BA82F,
+0xAC3680AB,
+0x81AD387F,
+0x3982AE38,
+0xB23B83AE,
+0x88B44586,
+0x498DB549,
+0xB64E90B6,
+0x93B45692,
+0x5C93B25A,
+0xB46194B2,
+0x98AE6796,
+0x7999AF6F,
+0xAC7F9BB0,
+0xA2AB819E,
+0x89A3AF83,
+0xF189D0C,
+0xAA1812A4,
+0x18AF1217,
+0xE1DB212,
+0xB20929B4,
+0x2BAF022C,
+0x32FA902,
+0xA00628A2,
+0x1299091E,
+0x312950A,
+0x95021295,
+0x10940116,
+0x30D8B03,
+0x6B0F0880,
+0x5B1F01,
+0x1E004E22,
+0x3A1C0041,
+0x9331803,
+0xB0B2911,
+0x260A0C25,
+0xC260D0E,
+0xB072508,
+0x290A062A,
+0x12C0C00,
+0x2B12,
+0x8197001D,
+0xD29FC1BC,
+0xA4C587B0,
+0x7D89D194,
+0x483D678F,
+0x77543F46,
+0x709D575E,
+0x44619B55,
+0x8B5B68A1,
+0x64785A71,
+0x47415861,
+0x55392937,
+0x394A534D,
+0x473B3443,
+0x57383162,
+0x3A3F4637,
+0x2C3A8A46,
+0x9025339C,
+0x1E2E3E37,
+0x3E3A842F,
+0x553A375E,
+0x4257443E,
+0x3F364951,
+0x4A3B2E34,
+0x34365951,
+0x342A2F3E,
+0x40363034,
+0x3F47483E,
+0x3430324D,
+0x3E31273B,
+0xD252127,
+0x192F5E16,
+0x1C75293E,
+0x2817FF4F,
+0x2D0005AC,
+0x834000A,
+0x29115D00,
+0xFF5F29C6,
+0x99AE0902,
+0x2733063D,
+0x28355C2F,
+0x8A382219,
+0x55CC3339,
+0x4E94FF31,
+0x8E3E74F0,
+0x3584363F,
+0x3D448A35,
+0x90363B8A,
+0x44AE283A,
+0x3641A135,
+0xC62D4DC0,
+0x5BC82551,
+0x4594F631,
+0xAE1A45BF,
+0x429F244B,
+0x34429625,
+0x95203E9D,
+0x4FA51D3B,
+0x2157BB23,
+0x79245EA6,
+0x7F662161,
+0xAB6321,
+0xA11C24A,
+0xD60A68C7,
+0x93E50779,
+0x192ED02,
+0xED0497F5,
+0xA9FB0A9B,
+0x69FF003,
+0xF400AAF7,
+0xA1F602A6,
+0x1A1F604,
+0xE3077BE9,
+0x3ED70361,
+0x64ADF03,
+0xAF7C81F1,
+0x1D599113,
+0x95236691,
+0x6FA1256D,
+0x2D76A727,
+0xAA2F7BA8,
+0x7FAE2C7C,
+0x3381AC33,
+0xAF3882AE,
+0x84B13B82,
+0x448BB440,
+0xB4458BB5,
+0x8FB84C8D,
+0x5D91B957,
+0xB86293B5,
+0x9AB56895,
+0x729BB56D,
+0xB2789CB2,
+0xA2B27C9F,
+0x8AA7B081,
+0xD169F0A,
+0xA5130CA2,
+0x13AA1411,
+0x816AE12,
+0xB00A20AC,
+0x29AA0126,
+0x32EA600,
+0x9B082BA0,
+0x189A0920,
+0x6139709,
+0x95041497,
+0x12910116,
+0x40E8C01,
+0x74070E82,
+0x1651602,
+0x1A01571E,
+0x3F18054A,
+0xC371204,
+0x6152D0E,
+0x1E061421,
+0x161E0617,
+0x9122106,
+0x25081124,
+0x724070B,
+0x36002204,
+0x8291583D,
+0xDA8C9CEA,
+0xAACA84A3,
+0xA8BCCE96,
+0x6F4552CA,
+0x42554E6F,
+0x37374C38,
+0x5B4A455C,
+0x43594646,
+0x3B4C4F3A,
+0x4337444D,
+0x4A443C43,
+0x50584F3F,
+0x3825365C,
+0x53493E4F,
+0x2D38382B,
+0x4C49653C,
+0x8833438F,
+0x3E793A42,
+0x343A9834,
+0x693F2352,
+0x2E5B3531,
+0x2E387D35,
+0x2B312649,
+0x36342C1F,
+0x2C252C39,
+0x35321C24,
+0x3A3C3631,
+0x453C443A,
+0x46382F39,
+0x31593437,
+0x192C612C,
+0x3D153C6E,
+0x55247628,
+0xFF6128FF,
+0x18FF562A,
+0x3F0CFF54,
+0xA40803FF,
+0x590A4A96,
+0x3D6F152A,
+0x201E2E24,
+0xA3423B7A,
+0x3EAD4139,
+0x3F78EA30,
+0x6D263F92,
+0x3A84483B,
+0x3A4AAA32,
+0xAB393A92,
+0x4FC83649,
+0x2C5DD42F,
+0xC83A79FB,
+0x63C32C5D,
+0x1838A137,
+0x88233781,
+0x409A243E,
+0x24358928,
+0xCC2B5ACF,
+0x68D72958,
+0x2443AC32,
+0x84294375,
+0x6D5D375B,
+0x13953C1F,
+0x2D05A645,
+0xB50C3EAA,
+0x76C40B53,
+0x391DE09,
+0xF5059BED,
+0xAAF403A6,
+0x29CE905,
+0xF706AAF4,
+0x9BEE02AD,
+0xA9FF102,
+0xE3017DF1,
+0x3BE30152,
+0x17BF06,
+0xE13772E8,
+0x12788E48,
+0x99225B88,
+0x66972860,
+0x2470A022,
+0xA82871A5,
+0x77A82A77,
+0x2F7CAC2C,
+0xAE347EAD,
+0x82B0397F,
+0x3F83AF40,
+0xB74487B1,
+0x8EB54A8B,
+0x5590B650,
+0xB85D93B8,
+0x96B56296,
+0x6E9CB469,
+0xB4759EB6,
+0xA0B679A0,
+0x8AA6B17C,
+0x81D9E06,
+0xA00C10A0,
+0xDA61010,
+0xE11AA10,
+0xAA0A1DAC,
+0x2AA60423,
+0x42DA000,
+0x9A09289A,
+0x1F9A0C27,
+0x9189608,
+0x95031599,
+0x16910212,
+0x2128D02,
+0x7A0A1186,
+0x16C0D05,
+0x17005F1B,
+0x48130953,
+0x173D110E,
+0x61B330B,
+0x19061D25,
+0x1C18041C,
+0x6151B03,
+0x1E061A1C,
+0x2210114,
+0x68001700,
+0x756BC56E,
+0xEA828CEA,
+0xB5D398B1,
+0xB5BBD19B,
+0xDDBFBAD2,
+0x649D6D7A,
+0x5869654F,
+0x59566654,
+0x4D504049,
+0x44455446,
+0x48434B53,
+0x6C566677,
+0x667C4F4B,
+0x504E6B59,
+0x57422C43,
+0x287C5441,
+0x49373F2D,
+0x4C4D3B6F,
+0x3F88553B,
+0x244AC931,
+0x74474590,
+0x2F7A362F,
+0x253DA21F,
+0x6332336A,
+0x334D4A3D,
+0x332F4E2B,
+0x2F2C222C,
+0x23373D30,
+0x51525C33,
+0x573F4258,
+0x4258383E,
+0x1A345A37,
+0x5D2E2140,
+0x2E611E38,
+0x7F17332A,
+0x20A01620,
+0x19508213,
+0x14E9C2E,
+0x70101B37,
+0x1A2B233E,
+0x4D363411,
+0xC43F3B84,
+0xA9FF4555,
+0x2B4ECA60,
+0x76463761,
+0x4E9C3137,
+0x3D408F41,
+0xE13552C5,
+0x87F03669,
+0x60A6FF45,
+0x6F1B45A8,
+0x30671D3B,
+0x3D468C1E,
+0x88344887,
+0x3A7D3437,
+0x2B41912E,
+0xA3173275,
+0x3E912848,
+0x25419219,
+0x81315783,
+0x834B3365,
+0x11A84D1B,
+0x151FB544,
+0xC60B3793,
+0x79D4085C,
+0x18FEA05,
+0xEF0491ED,
+0xA2F0019C,
+0x5A7F002,
+0xF300B0F8,
+0xA6F903A9,
+0x297F005,
+0xF90D73E8,
+0x58EB0076,
+0x24B702,
+0xD20342C2,
+0x12B66056,
+0x84115B91,
+0x61921E5A,
+0x1D619524,
+0xA2266CA0,
+0x72A32772,
+0x2E74AA2A,
+0xAD307AAB,
+0x7FAE357C,
+0x4081AE3C,
+0xB54586B0,
+0x8CB74B8A,
+0x508FB44D,
+0xB95391B4,
+0x95B85995,
+0x679AB761,
+0xB66E9CB9,
+0xA4B9729E,
+0x82A7B77D,
+0x4239B02,
+0xA409179F,
+0xBA10B16,
+0xC0CA20D,
+0xA20814A4,
+0x26A2031C,
+0x42B9C02,
+0x98092498,
+0x1F970C26,
+0x819970D,
+0x97061497,
+0x16920315,
+0x2108B02,
+0x81071287,
+0x3730F06,
+0x1800691C,
+0x4E110360,
+0x1C45110D,
+0x921390B,
+0x2003222F,
+0x20160221,
+0x31F1504,
+0x17031B17,
+0x5170016,
+0x68422A1D,
+0x7B6DF76D,
+0xEC8D90EF,
+0xB4E9A9B2,
+0x9EB3D0A7,
+0xD5ADBBC8,
+0x90DABFB8,
+0x897ED29B,
+0x9F6E6CBE,
+0x62825557,
+0x383D8258,
+0x61444766,
+0x59715662,
+0x35486351,
+0x44415A50,
+0x443B4D78,
+0x3C4A483E,
+0x2B328153,
+0x5D2C3DBE,
+0x467C563F,
+0x3237974C,
+0xCD3140A2,
+0x379F2F5D,
+0x173B942E,
+0x78223797,
+0x1E494B4D,
+0x20339A30,
+0x933F3853,
+0x3A5B424B,
+0x564A4D3F,
+0x4D3D3842,
+0x323B4C40,
+0x402D3734,
+0x55353E59,
+0x203F3325,
+0x1D3D592F,
+0x712B5386,
+0x2E4B2837,
+0x2A224E1D,
+0x1F304F81,
+0x2B3B1516,
+0x40399540,
+0xEB4255CF,
+0x5FC8448A,
+0x29205C34,
+0x8A56436A,
+0x51AA4946,
+0x3761CB3C,
+0xE9346CEB,
+0x6ED43679,
+0x2A53C535,
+0xCF1D39A5,
+0x5ABB3558,
+0x34387039,
+0x8D2F3C89,
+0x3E912E43,
+0x2E46A829,
+0x9D2F449F,
+0x66DA2641,
+0x3B6BD432,
+0x58223160,
+0x9944364F,
+0x30AA1914,
+0x1548A317,
+0xD01552A2,
+0x86D5097C,
+0x58AE104,
+0xFA059FF2,
+0xAAF800AA,
+0x1A9F402,
+0xFA04ABF6,
+0xAFFA04B2,
+0x698F206,
+0xFF1381F4,
+0x50EA085D,
+0x14CE509,
+0xCE0343C9,
+0x30C91C4B,
+0x841E9C65,
+0x5B85194F,
+0x1F5E921D,
+0x9D1E6395,
+0x6EA2226A,
+0x2C6FA427,
+0xAA2B73A6,
+0x7AAB2F79,
+0x417FAD36,
+0xB14382AE,
+0x8AB64787,
+0x508DB64B,
+0xB75390B4,
+0x92B95691,
+0x6095B959,
+0xBA6A9ABB,
+0xA0B76F9E,
+0x7FA6B974,
+0x1E9800,
+0xA0051A9F,
+0xEA00A18,
+0xB0A9D09,
+0xA00C129F,
+0x209E0615,
+0x82A9A05,
+0x990A289B,
+0x1D950B24,
+0xC19980E,
+0x96091A9A,
+0xD900314,
+0xC8B02,
+0x82040B87,
+0x17C0903,
+0x1200731A,
+0x5D0F0D66,
+0x1D510D15,
+0x61F4209,
+0x30072538,
+0x221E0225,
+0x3201602,
+0x19021F14,
+0x110011,
+0x5A9B3F3A,
+0x766AF163,
+0xF5938EEF,
+0xCDE9B0AD,
+0xB5B5ECD8,
+0xD89AA9D8,
+0x96D99AA1,
+0x9F94D99C,
+0xC97961E0,
+0x53D4765C,
+0x4A4CBF5A,
+0xBE5D66B1,
+0x5FB75F64,
+0x503ABE5F,
+0x953724BE,
+0x566A423D,
+0x41454838,
+0x423B8A43,
+0x6E1C47D1,
+0x397D342C,
+0x3452C13D,
+0x91213396,
+0x3793223C,
+0x24257D29,
+0xB52C4ABD,
+0x2B662543,
+0xF3C9E22,
+0x9C232E84,
+0x49603A4B,
+0x3C42843E,
+0x614D536A,
+0x56764D48,
+0x505F7847,
+0x454C536A,
+0x4356403A,
+0x2E2F572E,
+0x492E2646,
+0x354B1D29,
+0x2B374C2A,
+0x87220E32,
+0x47BB2F32,
+0x4972E63E,
+0x9D364EB3,
+0x32912C3D,
+0x324FB827,
+0xFF4373E9,
+0x42975088,
+0x2C4C9B2F,
+0xC1265ABE,
+0x59CA255E,
+0x316ED62E,
+0xD35993F5,
+0x3772345F,
+0x282F6724,
+0x982C418F,
+0x4FB13147,
+0x3154C43A,
+0xDA304BBB,
+0x4B9B3872,
+0x1C376B2B,
+0x67274084,
+0x82403551,
+0x3F961B2C,
+0xB40B51A,
+0xC80658C3,
+0x84D70D70,
+0x89E201,
+0xFB01A5FA,
+0xADFC04AB,
+0x4A7F403,
+0xF502ACF5,
+0xA8F205AA,
+0x19AEE06,
+0xF22787E4,
+0x1DDF1E6E,
+0x60FAA01,
+0xD90845D9,
+0x5ECE1358,
+0x6460D22F,
+0x4C7A379C,
+0x23588312,
+0x941D5C8A,
+0x659B2160,
+0x28699E25,
+0xA4296EA2,
+0x78AB2B71,
+0x3E7CAE33,
+0xAE407EAD,
+0x86B44482,
+0x4F8BB34C,
+0xB8568FB6,
+0x93BA5991,
+0x5F95BB5A,
+0xBD6497BA,
+0x9FBA699B,
+0x75A4B96F,
+0x1279801,
+0x9C03269D,
+0x199E0723,
+0xD109A07,
+0x9E0E0E9C,
+0x1B990711,
+0x7219A04,
+0x9B0A249C,
+0x1C970D20,
+0xD1A9A0C,
+0x970B1B99,
+0xA950714,
+0xC8E06,
+0x84060687,
+0x860700,
+0xF007E16,
+0x6E0E0375,
+0x1A600E14,
+0x71F4F0F,
+0x38022440,
+0x252D0423,
+0x1202302,
+0x18002217,
+0x1D11080E,
+0x64E45D5D,
+0x827CF067,
+0xF1ABA0ED,
+0xA9F1CABF,
+0xA897E8B8,
+0xE29488EF,
+0x74DF7C77,
+0x7773DE7E,
+0xDA6F65E0,
+0x42D7574B,
+0x564BD353,
+0xD4584DD4,
+0x3BD65D52,
+0x4B3ACE4B,
+0xC3463AC5,
+0x32B94435,
+0x3C419040,
+0x2E2E4163,
+0x911D2069,
+0x40AB2A37,
+0x2749B91B,
+0x70254DBF,
+0x46A62026,
+0x27359A2A,
+0xA9212988,
+0x28752245,
+0x2653CF27,
+0x751A3196,
+0x2F802D2E,
+0x4D57A133,
+0xA03E3158,
+0x2F76525D,
+0x3C2F4031,
+0x4D292538,
+0x343D4648,
+0x33233B47,
+0x37302A3B,
+0x2F563D2B,
+0x2027853A,
+0xEE214FD9,
+0x5ED22A63,
+0x3550C137,
+0xC5344EBB,
+0x64D23665,
+0x4C84EB3E,
+0x914C8BF7,
+0x3A742433,
+0x3755A13E,
+0xD0374CA5,
+0x72DF3366,
+0x4272E239,
+0x8A2C4DB8,
+0x45742C3E,
+0x53528743,
+0x90484F8B,
+0x3E843C4D,
+0x20397D2A,
+0x842D46A5,
+0x398E1D39,
+0x2C3C6A2C,
+0x6E284372,
+0x73413251,
+0x498D1B37,
+0xE54A526,
+0xF00469B2,
+0x8AE10383,
+0x3A2EE09,
+0xF401A9F4,
+0xA4F402A6,
+0x2ABFA04,
+0xF805B0FA,
+0xA2F105AF,
+0x589DF06,
+0xCA0582ED,
+0x9E0204B,
+0x200C804,
+0xC50427D5,
+0x64D10745,
+0x2773D51C,
+0x836379E3,
+0x1C4A782C,
+0x8520577D,
+0x5E8B1F59,
+0x2661981F,
+0xA027669B,
+0x6FA52D6A,
+0x3675A931,
+0xAC3C7BAA,
+0x80AE477E,
+0x4D86AD4B,
+0xB4538AAF,
+0x92B9588C,
+0x5F94B85D,
+0xBB6296BA,
+0x9DBC6698,
+0x70A2BD6B,
+0x2C9A00,
+0x99002999,
+0x1F9B0425,
+0xA159907,
+0x9D0C0899,
+0x1D9D0512,
+0x3189B07,
+0x9D0A1B99,
+0x1D9E0B1B,
+0xB1A990A,
+0x970A1C9B,
+0xE940815,
+0x30F8F06,
+0x88040C8C,
+0x8A0701,
+0x12028412,
+0x790D0081,
+0x1971110C,
+0x8236210,
+0x42052251,
+0x25380421,
+0x1213006,
+0x18001C27,
+0x5A2E220B,
+0x67F75C5C,
+0x8E89EE6D,
+0xEEAFA8E9,
+0x93F3C9B4,
+0x7667F2A7,
+0xE97D62ED,
+0x5CF18167,
+0x5D48ED75,
+0xE65534E6,
+0x40E45236,
+0x5644E753,
+0xE0563FE5,
+0x3FDC503E,
+0x4732D34F,
+0xC54838C8,
+0x2EC14234,
+0x3F24C040,
+0x613E34AC,
+0x6D1C1F4C,
+0x5DDA2C29,
+0x2A45BA27,
+0x75302252,
+0x3FAD3134,
+0x2A49C024,
+0xBF202C89,
+0x4EB5304A,
+0x1A1D8A2B,
+0xA32750BC,
+0x53B32639,
+0x3E399046,
+0x613A4596,
+0x4186513D,
+0x3F437732,
+0x7C4B4564,
+0x344B4045,
+0x45466646,
+0x8E483B87,
+0x3AA24849,
+0x2B52C43D,
+0xD14D8FFD,
+0x2F8E3055,
+0x4370D321,
+0xD24A95FA,
+0x6CDA3463,
+0x4479E839,
+0x8D2A45AD,
+0x459C353B,
+0x3949A33E,
+0xD72E45A2,
+0x65D5335E,
+0x30408C30,
+0x68363D79,
+0x427C4846,
+0x3C418243,
+0x83303576,
+0x4798323A,
+0x243F882B,
+0x942C3A89,
+0x3E8E3241,
+0x24397429,
+0x722D4C92,
+0x5348234E,
+0x286E3F2B,
+0x124B962E,
+0xF30079D0,
+0xA6F503A3,
+0x1A5F207,
+0xF602A7F4,
+0xA3F105A8,
+0x3ABF704,
+0xEC05B0F8,
+0xA2F204A5,
+0x6A4F706,
+0xE60D73DD,
+0x15E22340,
+0x316DA0B,
+0xCB0235DA,
+0x45BD0546,
+0x1465CC0C,
+0xCC2F7BD5,
+0x1C67615F,
+0x77244B73,
+0x577E2057,
+0x2257861E,
+0x96205D8E,
+0x659F2A62,
+0x316BA22E,
+0xA43772A5,
+0x7AA93F76,
+0x4D81AE46,
+0xB25185AD,
+0x8DB3568A,
+0x5C91B358,
+0xB96196B5,
+0x9BBC6698,
+0x709EBB6A,
+0x319C00,
+0x99002C9A,
+0x20980227,
+0x6179805,
+0x99090798,
+0x1DA00717,
+0x4129F09,
+0x9D07179E,
+0x1A9F0C19,
+0xB1DA00E,
+0x9A0D1E9B,
+0x1D950821,
+0x5158F05,
+0x8B01108E,
+0x8B0602,
+0xB008B0E,
+0x83080088,
+0x117B0A02,
+0xE21700E,
+0x510B1E64,
+0x2346051B,
+0x9203B04,
+0x20001C31,
+0xA9493D01,
+0x5FF05E57,
+0xB4A4EA66,
+0xE1ABA1EF,
+0x70F3A89B,
+0x6551EC88,
+0xEC6C52EF,
+0x42EE6E50,
+0x6044E861,
+0xE85035E9,
+0x3CED523B,
+0x4D3DEA51,
+0xE04F3DE3,
+0x3DDB4B3B,
+0x483ED248,
+0xC84A3AD1,
+0x2AC1473C,
+0x4222C33D,
+0xA73F17C1,
+0x3442383B,
+0x2E8C3017,
+0x2C409E31,
+0x54483149,
+0x2A7A4335,
+0x2146B224,
+0x71153AA2,
+0x3CA61927,
+0x2753BA24,
+0x97243495,
+0x3D9E343A,
+0x4051BB2B,
+0xCA263EAB,
+0x3F8D304C,
+0x37439B35,
+0xBE413D7D,
+0x58D2304B,
+0x4440743A,
+0xF33952B5,
+0x54C44174,
+0x3344A537,
+0xCD2345BC,
+0x75DA3955,
+0x4879DD48,
+0xAA3158BA,
+0x54B7324B,
+0x3242A533,
+0xB9383A91,
+0x69D13F5D,
+0x4A83E93B,
+0xF15791FB,
+0x55B3407A,
+0x2C317130,
+0x973C3876,
+0x4CA93F41,
+0x2E43983B,
+0xB22F4CAD,
+0x469D2E4F,
+0x2941952B,
+0x942A4196,
+0x4497293F,
+0x2E4FA02E,
+0x66305193,
+0x66602742,
+0x29582C30,
+0xD44902F,
+0xE8057ED2,
+0xAAF5028D,
+0x4AAF601,
+0xF804AAF9,
+0xA5F402AA,
+0x3ABFA02,
+0xF103AEF8,
+0xA0F001A5,
+0x19BE802,
+0xE11476E0,
+0x1D62434,
+0x2120EA1A,
+0xED1C56F6,
+0x57D80560,
+0xE62C804,
+0xC00B5CB2,
+0x45B33D55,
+0x6F1A5466,
+0x5376294F,
+0x24547C23,
+0x8922547E,
+0x5E962358,
+0x2D639B27,
+0xA0336AA0,
+0x72A3396F,
+0x477BAB3F,
+0xAD5280A9,
+0x8BB05683,
+0x5E8FB256,
+0xB76494B6,
+0x9ABA6797,
+0x719EBB6B,
+0x2359F00,
+0x9900339C,
+0x2398052D,
+0xD179609,
+0x9C0C0C9B,
+0x17A00411,
+0x214A609,
+0xA00315A1,
+0x1DA1061E,
+0xA1EA20A,
+0x990A209E,
+0x23950926,
+0x4179506,
+0x9003118E,
+0x38C050B,
+0x9009007,
+0x8B0C008C,
+0x5850E00,
+0xB117B0F,
+0x640C1272,
+0x1D540916,
+0x9164703,
+0x31021841,
+0xE4534E13,
+0x6CE75C52,
+0xB9A3E87E,
+0xEC9F8FF1,
+0x52ED7E74,
+0x7057EA64,
+0xF37E64EE,
+0x4BF17357,
+0x5B3FF465,
+0xEB4B2EEE,
+0x36E74B34,
+0x4635E04A,
+0xDC422FDF,
+0x3CD74533,
+0x463CD545,
+0xCC463AD1,
+0x2FC84B41,
+0x3A23C343,
+0xA8371DB7,
+0x54653018,
+0x1A582928,
+0x22124132,
+0x69251A4D,
+0x206E2422,
+0x284BAE29,
+0x6C2653C7,
+0x22801E1F,
+0x2E51B218,
+0xCB1A389C,
+0x349A2857,
+0x364DB928,
+0xB33351C1,
+0x3C8D2543,
+0x3050B636,
+0xA73A61CE,
+0x30903943,
+0x3425432A,
+0xA6323799,
+0x1F832635,
+0x36359A32,
+0xF24E81E2,
+0x6EE24E8C,
+0x2D3EA440,
+0x902E3B9E,
+0x3298233E,
+0x2A41A22E,
+0xBE4C51AF,
+0x65D3355C,
+0x466FE035,
+0x983061C9,
+0x31762E3B,
+0x3B478634,
+0x993F4A90,
+0x4FA8414D,
+0x3352B438,
+0xC02B4BB5,
+0x70E12C4E,
+0x3D7AF335,
+0x9F315BCD,
+0x469C2E47,
+0x2742912C,
+0x8A2E4988,
+0x5559294F,
+0x98D602E,
+0x1034AC2D,
+0xEC0880D9,
+0xA3F30297,
+0x1A9F704,
+0xF400A8F9,
+0xADFC02A6,
+0x4A9FB02,
+0xEE03A7F6,
+0xA4F3049F,
+0x4A8F603,
+0xD80773E1,
+0x4D31926,
+0x2F06F226,
+0xE81A33F8,
+0x3DDC083E,
+0xD66EB07,
+0xBE0F58C6,
+0x81E41559,
+0x672E9A43,
+0x54601E55,
+0x27516E2B,
+0x76275370,
+0x56812953,
+0x2F598A2A,
+0x99335D90,
+0x6A9F3764,
+0x4172A23C,
+0xA84977A2,
+0x85AC537D,
+0x5C87AD54,
+0xB2638DB3,
+0x97B76591,
+0x709DBA6A,
+0x38A200,
+0x9A00359E,
+0x22970531,
+0xE199A0C,
+0x9D0F0A9B,
+0x14A30905,
+0x21AA806,
+0xA5011CA9,
+0x1EA00121,
+0x520A106,
+0x9C091F9C,
+0x22990729,
+0x6159704,
+0x8F011590,
+0xE900514,
+0x8008E02,
+0x8E0C008D,
+0x8E0D01,
+0xB01890E,
+0x77090281,
+0xA670C06,
+0x6580A,
+0x461C004B,
+0xEE50554E,
+0x7EE15E51,
+0x9F89ED93,
+0xEB9882E8,
+0x55E07764,
+0x6953E968,
+0xF17056EB,
+0x3CF2664B,
+0x4F37EB55,
+0xE84F33E7,
+0x3DE8513C,
+0x422CE34D,
+0xDE4531DB,
+0x30D44131,
+0x4234D141,
+0xCC4438CB,
+0x27C93F30,
+0x3B25C43D,
+0xA83B1EB6,
+0x548E351E,
+0x21563B3B,
+0x1A309122,
+0x77172A79,
+0x2B811C26,
+0x152F991C,
+0x6F1F4DBA,
+0x3FA11D22,
+0x1D309E1A,
+0xC51F1F7C,
+0x52C82956,
+0x202E8F2B,
+0xCA2134A7,
+0x6EEA3160,
+0x2B40A643,
+0xA1313CA7,
+0x399E3C4C,
+0x3630882C,
+0xAF363D97,
+0x65D52645,
+0x364FB141,
+0xC04267CF,
+0x39A8485B,
+0x383B8F30,
+0xE2365BC5,
+0x88F6417A,
+0x538DFC4E,
+0xB6477BE2,
+0x4EB93353,
+0x2D44962B,
+0x8A343F92,
+0x43903444,
+0x323B8541,
+0xAC4151A0,
+0x56C63752,
+0x305EBF36,
+0xE02E65C9,
+0x60C43971,
+0x244BB433,
+0x9F2F58C4,
+0x46A52F4B,
+0x2C4FA729,
+0x7F2B50A8,
+0x6C502453,
+0xA903A24,
+0x1C35A51C,
+0xE20250BC,
+0xA5FD0390,
+0x5A6FA03,
+0xF805A8F9,
+0xAAF905AC,
+0x3A4F303,
+0xE708A6F5,
+0xA1F6019B,
+0x4B0F805,
+0xEC0733D4,
+0xBD8171F,
+0x3000D430,
+0xF92A15ED,
+0x3CDC1240,
+0x43ECC00,
+0xC91768D7,
+0x9DFD2D5C,
+0x4F68DB22,
+0x51621A70,
+0x2A535B27,
+0x6B2E5366,
+0x53742E52,
+0x31537A33,
+0x8E375785,
+0x6295375C,
+0x3E689B3A,
+0xA0426EA0,
+0x7BA34675,
+0x5881A84C,
+0xAC5E88AB,
+0x90B25F8B,
+0x6A96B466,
+0x3BA602,
+0x9B0138A2,
+0x269C0933,
+0x16129B0F,
+0xA115029F,
+0x9A50C00,
+0x21DA705,
+0xA70122A9,
+0x21A20024,
+0x523A101,
+0x9805239D,
+0x27980528,
+0x5219905,
+0x90021995,
+0xE90010F,
+0x4069102,
+0x8F08008D,
+0x8F0B00,
+0x12008F0E,
+0x8212008A,
+0x771300,
+0xF006512,
+0x502E0057,
+0xE44D4A8C,
+0x7DE5685D,
+0x9883E890,
+0xE58777E9,
+0x4DE86D5F,
+0x604DE161,
+0xED664DE3,
+0x3BED573C,
+0x4B34EF53,
+0xE85038E4,
+0x37E15341,
+0x472DDA4C,
+0xCF412FD6,
+0x25D0412D,
+0x3A29CF3D,
+0xCB3D2AD0,
+0x2CC43829,
+0x3C29BE3A,
+0xAA3A1EB0,
+0x43A4351C,
+0x181D674F,
+0x2D51C42D,
+0x891C44B5,
+0x2B8E132C,
+0x235CCA1D,
+0x6F1F1F86,
+0x51C91A1E,
+0x2561D322,
+0x9322206E,
+0x32891E35,
+0x2847AD1D,
+0xA8243EAD,
+0x44B52139,
+0x334AA627,
+0xE4476FD1,
+0x6BDE516E,
+0x467CFB42,
+0xC9364CB4,
+0x85ED4068,
+0x4874E549,
+0xAA3746A7,
+0x4CA84544,
+0x3555BF45,
+0xFE598EFF,
+0x78E36891,
+0x335BCC47,
+0xBA2D43B1,
+0x5ACE2E52,
+0x3A51B034,
+0x83353B7C,
+0x41774847,
+0x41498F48,
+0xAF314493,
+0x5CC93053,
+0x3565D830,
+0xC84273DC,
+0x4FB33964,
+0x3149AA31,
+0xC22F4EA6,
+0x6CDD365C,
+0x3760CD39,
+0xAA3250AD,
+0x7C582951,
+0x18B61F18,
+0xC69C905,
+0xC30D80E0,
+0x89ED0275,
+0x498F208,
+0xF503A5F9,
+0x9BE505AA,
+0x6A2F003,
+0xED02AAF4,
+0xA3F4059F,
+0x68CCD07,
+0xD9073BD5,
+0x22E2060C,
+0x2008CA20,
+0xE11B12D5,
+0x39F12003,
+0xA51DD04,
+0xCA0675E3,
+0x8DF9345A,
+0x2497FF33,
+0x5B5246AF,
+0x2A555F1D,
+0x5E2E5657,
+0x52652C52,
+0x38556F30,
+0x793F5775,
+0x58823D54,
+0x3E5B8A3E,
+0x96406493,
+0x6E9A3F6B,
+0x4C74A042,
+0xA9507DA2,
+0x89AC5682,
+0x618FB05B,
+0x3CA301,
+0xA0063AA2,
+0x259A0B34,
+0x1A159E17,
+0xA21601A0,
+0x10A61200,
+0x22A706,
+0xA40027A5,
+0x2BA2022A,
+0x3279E00,
+0x9A09219D,
+0x25980725,
+0x2249803,
+0x96021D97,
+0xE8F000C,
+0x50E8F03,
+0x90070591,
+0x910B00,
+0x1B00900F,
+0x8619008C,
+0x802000,
+0x14026F1F,
+0x49390063,
+0xDA4C36CD,
+0x81E37569,
+0x7E73E496,
+0xE16C5EE8,
+0x4CE05B4E,
+0x5B4CDE5B,
+0xE65747E3,
+0x39EB5643,
+0x4933E74D,
+0xE04C35E7,
+0x2CD94E3D,
+0x432CD247,
+0xCC4533CF,
+0x28C83F2D,
+0x3A25CB3D,
+0xC73B2BCB,
+0x28BA3729,
+0x3929B136,
+0xB44028AC,
+0x36B84524,
+0x443C6C44,
+0x221A4A47,
+0x55213D7A,
+0x1C6B1827,
+0x2961D416,
+0x5B211C81,
+0x238B1D18,
+0x1A40A61A,
+0xBA173BA2,
+0x298F244D,
+0x284EB71C,
+0xB03D6CEA,
+0x36982945,
+0x20349E19,
+0xA0213DAA,
+0x3BAB1D30,
+0x39469F29,
+0x822F3487,
+0x3AAB2627,
+0x1735A11B,
+0x842A2C90,
+0x2F724238,
+0x3E4DA63D,
+0x912C56B4,
+0x3D932642,
+0x2849A226,
+0xFB4E80E4,
+0x8AF35C97,
+0x3673ED4C,
+0x803455C0,
+0x52A53B41,
+0x3B53A938,
+0xAF3953B0,
+0x4EB9314E,
+0x3154AE31,
+0x9D1D419F,
+0x3E8F283D,
+0x23347530,
+0xBD2D448C,
+0x5EC63F57,
+0x3565D22A,
+0xDD2F6CE2,
+0x6CD13C68,
+0x3AAE6F29,
+0x56DB904,
+0xD60980D3,
+0xA2F60BA2,
+0x69CEF04,
+0xEE0597EB,
+0xA0EF019B,
+0x2A3EF08,
+0xED06ADFD,
+0xA7F70394,
+0x687E205,
+0xEA093DD0,
+0x1B8020E,
+0x1B07BD33,
+0xE52A0BE0,
+0xCC0C0F,
+0x537DB00,
+0xE50D66DF,
+0x70E1166C,
+0x28A0FF41,
+0xA1297CEF,
+0x1E5D5436,
+0x532B5957,
+0x565C325D,
+0x3A535F38,
+0x68415364,
+0x53704251,
+0x42557843,
+0x86415580,
+0x5F8C3D5C,
+0x4366933C,
+0x9E456D96,
+0x79A24975,
+0x4D82A94B,
+0x3A9D01,
+0xA00B38A1,
+0x239B1032,
+0x23089B19,
+0xA41D00A3,
+0x10A81300,
+0x26A706,
+0x9F002DA4,
+0x2B9E012C,
+0x5289B00,
+0x9608229B,
+0x219B0D1F,
+0x1229C0A,
+0x97012297,
+0x1391001B,
+0x2128C00,
+0x91040B90,
+0x8F0902,
+0x2100910F,
+0x871E008C,
+0x841F02,
+0x1B007427,
+0x3C310B6D,
+0xD74C3FDD,
+0x79E78272,
+0x7165E38D,
+0xDE5B4EE1,
+0x4BDE5549,
+0x5D51DC57,
+0xE15C4DE1,
+0x40DD5242,
+0x4B39DC4E,
+0xD84635DD,
+0x2ED84C3C,
+0x4227D143,
+0xCD402CD0,
+0x29C9402C,
+0x3D27C53B,
+0xC03C27BC,
+0x21B43424,
+0x3423A931,
+0xAE3C26AB,
+0x2EBD5334,
+0x404A6140,
+0x44262253,
+0x3B524444,
+0x2B5B4C39,
+0x22329239,
+0x952445A6,
+0x1F6A1333,
+0x2115551F,
+0xDF1E1C78,
+0x35A03160,
+0x1E246B1B,
+0xBB1D2383,
+0x77E9284F,
+0x2D55C942,
+0xB4223898,
+0x2C882F46,
+0x33297826,
+0xAD2F3292,
+0x52C52638,
+0x2B59CC2E,
+0xA12B4CD6,
+0x3E9C243A,
+0x2C3D9232,
+0x82282C87,
+0x3F9C2533,
+0x2E4AB42D,
+0xD92A63CE,
+0x49BD3066,
+0x383F8E2B,
+0xAB393684,
+0x59B8434D,
+0x3857BE48,
+0xC53C52C3,
+0x46BE385F,
+0x2E45AC28,
+0x862B4691,
+0x45A53044,
+0x333D9033,
+0xAC384FB7,
+0x51B43247,
+0x3067D227,
+0xB82859C7,
+0x559C244B,
+0x3FA4341B,
+0x677E500,
+0xE90895D8,
+0x9AF302A0,
+0x3A4FC05,
+0xF2079CED,
+0x9BEB06A1,
+0x3ABF902,
+0xED09A1F4,
+0x81D8048D,
+0x77AF105,
+0xD20639DC,
+0xFC00C02,
+0xE07C005,
+0xE21B02CF,
+0x20DC1A14,
+0x4CD03,
+0xE0063CD5,
+0x56CF0061,
+0x3480ED25,
+0xD61494FF,
+0x2C854165,
+0x582A6158,
+0x5B5E3460,
+0x38595E37,
+0x65415363,
+0x52644252,
+0x43526A41,
+0x73445370,
+0x51784354,
+0x3A59823A,
+0x943B5E87,
+0x6A993B66,
+0x3973A139,
+0x369701,
+0x9D09339C,
+0x1DA01330,
+0x20039C1A,
+0xA41E009E,
+0xFA81200,
+0x227A707,
+0x9D012EA5,
+0x2B9B002D,
+0x5289801,
+0x9508289A,
+0x17990B23,
+0x6159B0C,
+0x94021D98,
+0x19900121,
+0x4188B01,
+0x8F050D8C,
+0x900503,
+0x1E00910F,
+0x90250191,
+0x8A2101,
+0x1A007E29,
+0x3B2D2C72,
+0xD55545E3,
+0x69E07B67,
+0x6659E179,
+0xDD5A4ADB,
+0x47D65043,
+0x5348D852,
+0xD74F42DB,
+0x40D74B3E,
+0x4737D94A,
+0xD14328D5,
+0x2AD0442D,
+0x4226CF44,
+0xCB3F29CE,
+0x27C63E25,
+0x3C26C63C,
+0xB83623C0,
+0x22AE3424,
+0x2C19AE31,
+0xAF4223A6,
+0x21AB481F,
+0x76635F34,
+0x62463995,
+0x565D4C6B,
+0x2F45594B,
+0x22276A3C,
+0xAA3255C6,
+0x16621A40,
+0x1C288919,
+0x72212B87,
+0x31672F28,
+0x2E216539,
+0x8E22236E,
+0x42B7172F,
+0x3249B51F,
+0xB5294EBC,
+0x40AD274D,
+0x303A8C34,
+0xBA343995,
+0x7AF02342,
+0x4380FB2F,
+0xEB3978EB,
+0x47B7386F,
+0x233AB42A,
+0xC0224FB8,
+0x42B91E41,
+0x2444B223,
+0xAA2141A6,
+0x376D2043,
+0x4F43743A,
+0xC34B5AB0,
+0x5DC14164,
+0x3762D33A,
+0xF13972E1,
+0x8EF55590,
+0x4482E752,
+0x92416AD4,
+0x439D2A3F,
+0x3149982F,
+0xA031489F,
+0x4DAC3042,
+0x2A49A434,
+0x7B1F3B8B,
+0x4A7E2135,
+0x59B1282D,
+0x985F300,
+0xEA0598F4,
+0x9AE704A7,
+0x5A1F002,
+0xDF04A4EF,
+0x9AF40494,
+0x59CE904,
+0xFA0296E3,
+0x81E204A3,
+0x56DD404,
+0xBC0B49EC,
+0x39AD050D,
+0x1300F210,
+0xCE080EDC,
+0x28D8131C,
+0x122DDB15,
+0xE60B43E9,
+0x47CF0060,
+0x205DD608,
+0xF61A85F6,
+0x52C51487,
+0x5F277D53,
+0x67623367,
+0x415C613A,
+0x63405962,
+0x56634558,
+0x46546645,
+0x69465068,
+0x4D674650,
+0x3C506C3C,
+0x7F35506F,
+0x5B883457,
+0x2B65942F,
+0x339402,
+0x99082D97,
+0x189C1129,
+0x20059D15,
+0xA21B00A0,
+0x13A71000,
+0x227A907,
+0xA10130A8,
+0x2E9B002E,
+0x1279701,
+0x93071F92,
+0x1197081F,
+0x80C9C0E,
+0x98040C9A,
+0x1E910316,
+0x2198D01,
+0x8E010F8A,
+0x900203,
+0x1A00920D,
+0x91240192,
+0x2912600,
+0x23008A29,
+0x3324556E,
+0xD55544E1,
+0x5AE37662,
+0x5349DC68,
+0xD65042D5,
+0x44D0493A,
+0x4E44D851,
+0xD34940D6,
+0x3CD1493E,
+0x4634CE47,
+0xD24125D1,
+0x24D04226,
+0x4124CB40,
+0xC73B24CD,
+0x26C13A22,
+0x3A23C33C,
+0xB2311FBB,
+0x1CA73020,
+0x3D21A32D,
+0x9E3D11AE,
+0x5E984F26,
+0x6C55815C,
+0x67444CA3,
+0x5F3B305B,
+0x1F3F2723,
+0x2E235D2D,
+0xA01836A4,
+0x36941644,
+0x15389E18,
+0x812A3294,
+0x2C753631,
+0x2B295D38,
+0xA4342E86,
+0x329A252F,
+0x1E27801E,
+0xF93361D4,
+0x62D6497F,
+0x35318C39,
+0x8E1F1B7A,
+0x3EBE151F,
+0x1A48D00D,
+0xB42A4FD8,
+0x4EB61432,
+0x2A4ABE23,
+0x862040BA,
+0x2B8A2028,
+0x263FA826,
+0x8A273594,
+0x467C3936,
+0x40427848,
+0xB1434E88,
+0x53AF3850,
+0x2C58C630,
+0xCB2E62D4,
+0x4FC12D64,
+0x244FC021,
+0xE63164C4,
+0x77E74383,
+0x3C66D13F,
+0xE83763B8,
+0x5EC14679,
+0x2F4F9B40,
+0xCB3156BE,
+0x61DB3663,
+0x4E7F9831,
+0x28DE900,
+0xF403A0F6,
+0xA7F406AE,
+0x6A3F203,
+0xFF02A6F6,
+0x9AF007AE,
+0x2A0EE04,
+0xE5069FF0,
+0x82D90992,
+0xD6CC803,
+0xBA0329CB,
+0x2B97020D,
+0x3314C20C,
+0xFA2216E2,
+0x30DE0433,
+0x142ED719,
+0xF61254E9,
+0x5CE80B77,
+0x24BCC00,
+0xED1C6BDD,
+0x73E81F7A,
+0x6548B524,
+0x69693776,
+0x45656741,
+0x6948606A,
+0x5967495B,
+0x46566548,
+0x65485667,
+0x4D624550,
+0x3C4C623E,
+0x6D394B66,
+0x5077334E,
+0x2655822D,
+0x2298E00,
+0x95072294,
+0x119A0F1C,
+0x1506A211,
+0xA31201A5,
+0x1BA70E03,
+0x29A801,
+0xA40035A7,
+0x2C9A0031,
+0x3229201,
+0x92091E91,
+0xD950C18,
+0xE099611,
+0x9808059C,
+0xF93050C,
+0xB8F02,
+0x8A000387,
+0x8F0201,
+0x18009210,
+0x93210191,
+0x911F00,
+0x26009224,
+0x3F2D7D66,
+0xD25645DA,
+0x4FDB6E5A,
+0x5245D660,
+0xD04B40D6,
+0x34CE4734,
+0x4C3ECE45,
+0xD14B41D4,
+0x37CE483D,
+0x452FCA46,
+0xD04124CB,
+0x21CF4125,
+0x3E23C93D,
+0xC43B25CA,
+0x25C03C28,
+0x3722BD38,
+0xB23122B7,
+0x18AA2F21,
+0x3E0FA32D,
+0xB57646A1,
+0x3ABE774F,
+0x422AAE5C,
+0x783E2A9F,
+0x874341AA,
+0x1B55232D,
+0x22145128,
+0x7D221156,
+0x3FA61C28,
+0x275DCD14,
+0x7E21278E,
+0x2B80292C,
+0x2C256D2C,
+0xA4272A7B,
+0x3FAF1B41,
+0x2130982C,
+0xB61F44AE,
+0x59C42846,
+0x3F6CD52F,
+0xC22C5BD1,
+0x39B92440,
+0x1E27941C,
+0xED102BA3,
+0x91FF2B6B,
+0x4D8EEF4E,
+0xCF3D76EF,
+0x48B9325D,
+0x2646BD24,
+0x912D3495,
+0x42A73D40,
+0x3C44A635,
+0xA13F4499,
+0x57AB455C,
+0x2D42A740,
+0xA43254BD,
+0x46B12447,
+0x2D47A329,
+0xB72E4EAD,
+0x48B02A55,
+0x3248AC27,
+0xA33156B9,
+0x48A52444,
+0x395FB72E,
+0xA1335EC3,
+0x51BF2D52,
+0x41789322,
+0x49CEA00,
+0xE909A9F6,
+0xA2ED099A,
+0x4AAFB04,
+0xF303A1F0,
+0xA3F502A5,
+0x499E603,
+0xF00699EE,
+0x7BD00A9B,
+0x1059BD06,
+0xCD061BA9,
+0x25BB100B,
+0x62B9D0E,
+0xA80F1C7F,
+0x20D9151A,
+0x1024D313,
+0xE3003DCC,
+0x4EE60F4A,
+0x4AD405,
+0xD30047C4,
+0x78EA1D54,
+0x3F87EC26,
+0x70723C9D,
+0x476C6E43,
+0x6C4D656B,
+0x5B6A4D5E,
+0x4A5D6949,
+0x66485868,
+0x51624553,
+0x3E4E633E,
+0x64394B64,
+0x4D6B314C,
+0x214D6F2B,
+0x11F8F00,
+0x94031A94,
+0xC980715,
+0x110E9D0A,
+0xA50F18A5,
+0x25A4061B,
+0x12FA900,
+0xA20136A6,
+0x2E9C0034,
+0x4269400,
+0x8E0B198E,
+0xF921114,
+0x1009900F,
+0x940F0495,
+0x1950C02,
+0x7009108,
+0x8A06008B,
+0x8D0700,
+0x1500910E,
+0x91210091,
+0x1932103,
+0x29009828,
+0x3F329460,
+0xD5574CD5,
+0x40D55F4D,
+0x4C41CF51,
+0xCF4D40D2,
+0x31CF4634,
+0x4431D144,
+0xCA4737CB,
+0x32CA4539,
+0x422FC640,
+0xCF4028CE,
+0x25CB3E22,
+0x3D26C93D,
+0xC33D29C8,
+0x22BE3A27,
+0x3424B935,
+0xA92E1FB5,
+0x1B9F2D1A,
+0x5C2BA33D,
+0xBD6C43B0,
+0x25B64C31,
+0x461EBD42,
+0x9B3922BB,
+0x81403690,
+0x31702D24,
+0x23246724,
+0x801A2564,
+0x1F7D1427,
+0x1E4CC219,
+0x7F202A99,
+0x2D952029,
+0x20298120,
+0xE7182F8B,
+0x56C93172,
+0x1E35A52D,
+0xA12734A4,
+0x2A871F31,
+0x3054BA1F,
+0xE74382ED,
+0x48D03771,
+0x191F9A28,
+0xA01E1E75,
+0x3BAD1C2E,
+0x2C52CC27,
+0xE82F6ADB,
+0x7AF33D77,
+0x3168DB3D,
+0xBF3565DD,
+0x54C62C51,
+0x2E50C432,
+0x90344BB4,
+0x469B4844,
+0x4450A242,
+0x91314BA3,
+0x50A42C3A,
+0x364F9E2C,
+0xA0394A91,
+0x4092364A,
+0x2A3B8130,
+0x9934408D,
+0x3D882F3F,
+0x2532712F,
+0x872B428B,
+0x508A2642,
+0x5E9B4730,
+0xA98DF04,
+0xF70594E4,
+0xA5F104A1,
+0x4A9F102,
+0xF905A1EC,
+0x9FF505B0,
+0x5A1F501,
+0xEA049DF6,
+0x80D50493,
+0xD5BB406,
+0xB1040CB3,
+0x33C60509,
+0x1B24B314,
+0x900D42B0,
+0x3BB30640,
+0x1236D30F,
+0xE20E47D7,
+0x4C50053,
+0x830D907,
+0xC50057CD,
+0x86F01F56,
+0x19ACFF30,
+0xA14765D9,
+0x4874784C,
+0x6E516B71,
+0x616E5567,
+0x4D5E6E4F,
+0x69485867,
+0x53654753,
+0x3E506740,
+0x64364D65,
+0x4B67304E,
+0x204A6A29,
+0x11A8E01,
+0x95021292,
+0x10980413,
+0x5189D07,
+0xA60521A1,
+0x2BA30427,
+0x2EA401,
+0x9F0035A3,
+0x309A0134,
+0x3299502,
+0x8A091E90,
+0xA8A0F15,
+0xE058E10,
+0x9112008F,
+0x1931500,
+0x14008E17,
+0x8A10018B,
+0x8A0E00,
+0x15008F11,
+0x901B008F,
+0x8F2600,
+0x2E00991F,
+0x4335A753,
+0xD45443D7,
+0x33D75645,
+0x493BCD48,
+0xC84436CF,
+0x29CC4635,
+0x412CCC40,
+0xC83F2DCC,
+0x2BC84230,
+0x3F2AC63C,
+0xCB3E24CC,
+0x23C73C24,
+0x3A22C639,
+0xC03924C5,
+0x1FB93923,
+0x3320B635,
+0xA93726B2,
+0x4599391D,
+0x613EC36D,
+0xBD5132B8,
+0x2CB73F29,
+0x3C23BF47,
+0x904D53BC,
+0x68573137,
+0x2A743525,
+0x1E30752C,
+0xAE1055B4,
+0x237F0F44,
+0x11277A1E,
+0xB92741A5,
+0x30961848,
+0x2231921E,
+0xB21F2D85,
+0x61E02142,
+0x2D52C636,
+0xA02441B4,
+0x338D2735,
+0x2F3A9E21,
+0xB62D3AA8,
+0x54D62042,
+0x1A3CBC28,
+0xA11630AD,
+0x2D981937,
+0x28309319,
+0xD42A3FB2,
+0x6EDA3258,
+0x3D72E834,
+0xE53373E8,
+0x80F03D79,
+0x3466D546,
+0xB42A56D4,
+0x4CB42F4B,
+0x3F4C9D3B,
+0x7C3F408D,
+0x3F882C3A,
+0x3445963B,
+0x8F30447F,
+0x459B3340,
+0x32418B3C,
+0x87413F8A,
+0x48983C41,
+0x3F4C9E40,
+0xAA374DA5,
+0x6FA43351,
+0x549C5F39,
+0x58DD71D,
+0xE80592E4,
+0xA4ED0390,
+0x7A8F202,
+0xF101AAF2,
+0x95EE04AB,
+0x49AEF04,
+0xEC089FF8,
+0x78CD0598,
+0x951AD04,
+0x950420B9,
+0xD9D0A0A,
+0x1310B71D,
+0x920A26A0,
+0x48AB0822,
+0x94AC708,
+0xDC1250E1,
+0x19CF1140,
+0x1036D108,
+0xBC0067E8,
+0x73DF084D,
+0x279CFE27,
+0xCA0B91F5,
+0x4E9E5C52,
+0x775C797E,
+0x65735A6E,
+0x50607055,
+0x694C5D6B,
+0x54674857,
+0x3F536942,
+0x69395068,
+0x4F6C3851,
+0x25496B30,
+0x11F9100,
+0x98021996,
+0x1998001E,
+0x11F9B03,
+0xA100269E,
+0x2DA0012A,
+0x30A201,
+0xA10135A4,
+0x2D9A0031,
+0x2299300,
+0x88082790,
+0x8820F19,
+0x13048911,
+0x8C16008E,
+0x8A1A00,
+0x20018A1F,
+0x891F018A,
+0x871A00,
+0x19018D1A,
+0x8D19008D,
+0x8B2400,
+0x29009B1C,
+0x4231B648,
+0xCF4E38D4,
+0x2FCD4D36,
+0x4631CC48,
+0xC94536CB,
+0x2CC84538,
+0x3E28C940,
+0xC83E28CB,
+0x26C53E27,
+0x3C27C639,
+0xC83E24C8,
+0x20C53B25,
+0x3A20C23A,
+0xBD3820C2,
+0x21B7381E,
+0x3524BC36,
+0x98371EAE,
+0x39BD6B47,
+0x482CBB5A,
+0xB74228B6,
+0x23B83F28,
+0x3F25B93D,
+0x8A4541B0,
+0x86472F57,
+0x276B2F2E,
+0x1A217B1F,
+0xAB2753C9,
+0x1F7C1441,
+0x1C2D701A,
+0xE1183485,
+0x2E953269,
+0x242B7D22,
+0x9B223493,
+0x1E761B34,
+0x324BAF14,
+0xB93D73DC,
+0x45AE2A53,
+0x2D3CA31F,
+0xA33240B8,
+0x31A32331,
+0x203CB524,
+0xAF1A39B3,
+0x32B01731,
+0x20359411,
+0x922A3686,
+0x3AA92730,
+0x233BAB25,
+0xD5274CB7,
+0x77E53561,
+0x4D85F041,
+0xC7487BE8,
+0x4DB43A62,
+0x3D57BA34,
+0xC34052B3,
+0x53C24463,
+0x31459D34,
+0x7D3549AB,
+0x3772353C,
+0x36408438,
+0x8A313E89,
+0x58AA3E47,
+0x3F58B548,
+0xC83C5EC6,
+0x75892E61,
+0x45AF6039,
+0x371CA32,
+0xDF0798EC,
+0x9EE00B8B,
+0x5A7EE05,
+0xF405A5ED,
+0x97F004AD,
+0x3A2F403,
+0xEF039AEE,
+0x6ECE0396,
+0xB5CC406,
+0x8D0327AD,
+0xCAA0703,
+0x1408A31C,
+0x9D1228A4,
+0x2EA60A16,
+0x249C101,
+0xDD135DDF,
+0x29BB1A36,
+0xF31C20E,
+0xD8045DE5,
+0x62D60160,
+0x218DF412,
+0xE70195F7,
+0x68DB1970,
+0x815AA667,
+0x6C7A607A,
+0x5368755C,
+0x714E616F,
+0x5A694B5C,
+0x42586947,
+0x69405569,
+0x50693C4F,
+0x2C4E6B33,
+0x22A9701,
+0x9B01259A,
+0x249D0024,
+0x249800,
+0x9A002D9A,
+0x2B98002E,
+0x2D9C00,
+0x9E002D9F,
+0x2798002B,
+0x289001,
+0x8305258D,
+0x10810A1D,
+0x1006830B,
+0x85170089,
+0x861F02,
+0x22008523,
+0x87230087,
+0x871E01,
+0x1C018D1D,
+0x8C1C008C,
+0x8A2000,
+0x29009816,
+0x452EB44C,
+0xCB452ED1,
+0x26CB432D,
+0x3A27CA3D,
+0xCB4432C7,
+0x2DCA4535,
+0x3C26C73F,
+0xC93F2CCA,
+0x25C53E28,
+0x3A23C73B,
+0xC23A23C7,
+0x20C03B22,
+0x381DC03A,
+0xBA391FBF,
+0x26B9371F,
+0x3A1FB63B,
+0xB24F309C,
+0x38BA5F3D,
+0x3D28BB59,
+0xB53A26B5,
+0x25B73E27,
+0x3A1DB33D,
+0x792A45AA,
+0xBF45358E,
+0x347B234E,
+0x171B731E,
+0x9B203EB1,
+0x1D641731,
+0x1E2A8620,
+0xBD1D2888,
+0x4AAF224D,
+0x1F348B23,
+0x9615359E,
+0x3894232F,
+0x1F2B8522,
+0xCE223EA8,
+0x4FC63D63,
+0x2F439F2D,
+0xEB2A49AF,
+0x67E23675,
+0x2234AA2C,
+0xA81A2D9A,
+0x37A31B40,
+0x1B319D1B,
+0x8B22379D,
+0x36A5283A,
+0x2A348B26,
+0xA02D3A91,
+0x53B33341,
+0x3563D030,
+0xC6406DDE,
+0x5BBE365B,
+0x314EB534,
+0xF15379E2,
+0x99F8518E,
+0x5C82E95B,
+0xB73F70DD,
+0x428E3C5A,
+0x454E9A39,
+0xB73F4CA3,
+0x5CBA445A,
+0x4063CA41,
+0xC73768C8,
+0x6D652A58,
+0x3E9E2F2D,
+0x70C729,
+0xDF048BE7,
+0x92DC0489,
+0x399DD06,
+0xF205A7F6,
+0x92EC04A7,
+0x1A0F304,
+0xE8049DF0,
+0x6ECD0587,
+0x867C106,
+0xB50622CA,
+0x5A22203,
+0xF08A209,
+0xAF150AB7,
+0x1C9A061C,
+0x83EBA07,
+0xDC0C54D8,
+0x24BC123E,
+0x635C617,
+0xE70D49D5,
+0x5AD60064,
+0x96EE500,
+0xE40777F0,
+0x89F11266,
+0x5F5CC226,
+0x807C5299,
+0x5D6E825E,
+0x755A687A,
+0x62715263,
+0x4E606E50,
+0x6F4B5D6D,
+0x566B4B5B,
+0x3B576A3E,
+0x2D9601,
+0x9E00289B,
+0x289E0025,
+0x2249900,
+0x95002D96,
+0x2693022C,
+0x2239400,
+0x9C01289B,
+0x20960222,
+0x1209100,
+0x7E00208D,
+0x1A7C041C,
+0x70E7E05,
+0x86140084,
+0x2841F01,
+0x28018423,
+0x82240085,
+0x832201,
+0x1F00851E,
+0x871D0086,
+0x881E00,
+0x2B00940E,
+0x432CBF45,
+0xCD492FCE,
+0x2FCB4530,
+0x422FC942,
+0xC83C25CB,
+0x28C9412A,
+0x3B21C840,
+0xC63D2BC3,
+0x20C23B28,
+0x3A20C43A,
+0xC23B28C5,
+0x1DBB3820,
+0x3919BB3A,
+0xC03D22BB,
+0x18AE3A21,
+0x47298B32,
+0xBD5032A5,
+0x29B54327,
+0x3B2CB040,
+0xB13A2BB4,
+0x25B13E2D,
+0x404EB23E,
+0x7E35699C,
+0xC445379D,
+0x31862454,
+0x1F287919,
+0x861D3287,
+0x3A8F1528,
+0x1E2F8615,
+0x801B297A,
+0x40AE1322,
+0x2545B226,
+0x942752BD,
+0x318C212E,
+0x2845B821,
+0x8B1F349E,
+0x55CA172E,
+0x2C3F9F31,
+0xA22339A2,
+0x6BE4213C,
+0x367CEB3E,
+0xA92240BC,
+0x40AF2A47,
+0x1E39A225,
+0x901E359A,
+0x2F822D35,
+0x32307525,
+0x9F3550B2,
+0x53BB2942,
+0x395FD134,
+0xED4378E4,
+0x8FF04E89,
+0x456AAF50,
+0xBD4B67BE,
+0x5FC93756,
+0x3463C836,
+0xBF4068CD,
+0x58B0355A,
+0x4561B93B,
+0xB83953A3,
+0x53AF3A50,
+0x3850B23C,
+0xAE3157BD,
+0x7C4B3240,
+0x57AB2339,
+0x85DB109,
+0xD20584E7,
+0x84D40981,
+0xAA0E309,
+0xEA05A2F4,
+0x8BE20397,
+0x49CF606,
+0xDA0D9AF2,
+0x5EBF077B,
+0x64AA604,
+0xD5042DD0,
+0x58C1304,
+0x60CAC0F,
+0xBA0821EA,
+0x1198050E,
+0xC1FAB0A,
+0xC70A24AD,
+0x3FD3183E,
+0x1450DE1E,
+0xDF064BD7,
+0x4ACA0159,
+0x150CE03,
+0xD1043FCA,
+0x88EB0557,
+0x236ED809,
+0x9E5E35AD,
+0x62847C56,
+0x81616F82,
+0x6D7E6370,
+0x5C69795F,
+0x71596673,
+0x5F6D5763,
+0x495C6850,
+0x299701,
+0x9E02279A,
+0x279B0026,
+0x32A9801,
+0x90012D91,
+0x288C012E,
+0x238D01,
+0x99022492,
+0x1F94001D,
+0x1199100,
+0x8503208D,
+0x1B7B001F,
+0x61D7C05,
+0x850B0D82,
+0x1871A00,
+0x26008424,
+0x81220284,
+0x802500,
+0x1E008123,
+0x84200183,
+0x871D01,
+0x29009111,
+0x412ABB4A,
+0xCF4A30D4,
+0x2CC64732,
+0x3E2AC53F,
+0xC53A1FC6,
+0x28C43B23,
+0x3D25C740,
+0xC43B23C3,
+0x1FBF3920,
+0x3B21BF39,
+0xBF3A21C2,
+0x20BD3C18,
+0x411EC540,
+0x9A3519BE,
+0x26903716,
+0x4B26AE4B,
+0xA9371CB7,
+0x25AC331C,
+0x3A29AD37,
+0xA83926AC,
+0x30AB3B31,
+0x313EAF41,
+0x6826639C,
+0xC7413590,
+0x35862E51,
+0x1C296D25,
+0x93262E69,
+0x53C71A39,
+0x1C2D7826,
+0x70232183,
+0x2970202C,
+0x292C8522,
+0xA53660C2,
+0x23771941,
+0x1E1A5D24,
+0x9E272F83,
+0x51BE2B3F,
+0x437FED28,
+0xAB2A4FBC,
+0x34AC2840,
+0x2843BE19,
+0xAC2F5FE3,
+0x44B12C44,
+0x2B3C9C29,
+0x87223681,
+0x42952D3A,
+0x303D9C34,
+0x94263F91,
+0x57BE353D,
+0x2A2D7F32,
+0xB73151B6,
+0x5BCA2D54,
+0x2244A533,
+0xC23E57B6,
+0x50B63859,
+0x3854B132,
+0xA83559B4,
+0x51AC2B4B,
+0x4C6ABB35,
+0xDA5C87DC,
+0x5DBF477A,
+0x2C4DA836,
+0x652C479B,
+0xA83C4660,
+0x63C52856,
+0x87ED20E,
+0xBB0C84E5,
+0x83D50873,
+0x67CC10B,
+0xF00690E2,
+0x82E9048F,
+0x48CE903,
+0xD00783D8,
+0x58B20770,
+0x342B703,
+0xB61F24D5,
+0x5A21D00,
+0xB06AA08,
+0xBE1A07C3,
+0x19AA0D14,
+0x1F11A90F,
+0xBE0D43BC,
+0x52E31C4B,
+0x1F47F32D,
+0xD40B38E4,
+0x5FDC0452,
+0x154D502,
+0xD10556CC,
+0x7AE0006D,
+0x1A76DF0D,
+0xBD214BC7,
+0x68B5534C,
+0x8A688D87,
+0x7C816D7B,
+0x6A76866C,
+0x7A6B7580,
+0x6D7A6470,
+0x5C697562,
+0x299800,
+0x9C01289A,
+0x289C0124,
+0x269500,
+0x8B01278E,
+0x23860028,
+0x1B8500,
+0x93021D8A,
+0x12990217,
+0x169401,
+0x89001690,
+0x18840118,
+0x227B00,
+0x82041979,
+0x861106,
+0x1D00871A,
+0x841E0186,
+0x812201,
+0x18007E1D,
+0x7E1A007E,
+0x841A01,
+0x26009010,
+0x3F25B84C,
+0xCD482CCC,
+0x2DC5432D,
+0x3E26C841,
+0xC23A20C4,
+0x1EC33B20,
+0x3A1DC23C,
+0xBF3C1CC0,
+0x1FC53C1C,
+0x3F1FC43C,
+0xC83E1AC6,
+0x1CBD411E,
+0x2A12A839,
+0x953B1F84,
+0x21AB481D,
+0x3819B94A,
+0xAC3A23AA,
+0x28B13C27,
+0x3828AB3A,
+0xAE3C2BAB,
+0x2BAC3C28,
+0x2F54A73E,
+0x6732708D,
+0x8A343696,
+0x32841C33,
+0x22288622,
+0x76162278,
+0x57CF1F2E,
+0x1B277825,
+0x50211E5A,
+0x2A72321A,
+0x2124721F,
+0xBC1B2A83,
+0x38882C52,
+0x27268124,
+0x801C2978,
+0x349E1E2B,
+0x2A46B818,
+0xC12A5BCA,
+0x2D872F50,
+0x1E2B841C,
+0xF02363CF,
+0x56CE3872,
+0x2144AC2C,
+0xB3293198,
+0x42B2364D,
+0x26459A31,
+0xAA344AB0,
+0x4FB0314B,
+0x2F41A129,
+0xA633419F,
+0x4AA72F3D,
+0x39489A2F,
+0xAA344B9B,
+0x4EAA354F,
+0x4A6AD62B,
+0xD15482E3,
+0x6CD14871,
+0x395CBB44,
+0xE4315FB4,
+0x84F0497A,
+0x4C84E754,
+0xB74675E9,
+0xB0403F7D,
+0x85E03159,
+0xD89E104,
+0xF10D80D0,
+0x7ECC0699,
+0x68ED303,
+0xAB0B8BE3,
+0x87D60A56,
+0x689E406,
+0xD7037BE1,
+0x7FE50970,
+0x1B31BA06,
+0xAA29038D,
+0x18C2306,
+0x1311AA09,
+0x93111AB0,
+0x15B20B00,
+0x438C319,
+0xB90741A8,
+0x58DF1656,
+0x373FF129,
+0xDE1950FC,
+0x60D7004A,
+0x35BDC03,
+0xDB0175DE,
+0x76D5037B,
+0x346FE118,
+0xE22661DB,
+0x83EB2F78,
+0x8679CD56,
+0x858F76A0,
+0x72838573,
+0x85748086,
+0x79846F7C,
+0x68777F6D,
+0x2A9900,
+0x9E01289A,
+0x299D0126,
+0x2279A01,
+0x87002690,
+0x26840027,
+0x11A8102,
+0x8D021483,
+0x9970012,
+0x1119903,
+0x8F000B95,
+0x1789000E,
+0x1A8700,
+0x8000197C,
+0x5850017,
+0x17008B0A,
+0x841D0287,
+0x1861C01,
+0x12008016,
+0x7912007D,
+0x7F1400,
+0x24008C0A,
+0x4224AD52,
+0xD0492DCE,
+0x26C9432B,
+0x3C21C73D,
+0xC23B1EC2,
+0x23C03A1E,
+0x3D1EC542,
+0xC74426C0,
+0x21C54524,
+0x3F1BBD45,
+0xA2381AB8,
+0x118D2E12,
+0x44218933,
+0xAB4B179C,
+0x10B6461A,
+0x361EA838,
+0xAA3B29A7,
+0x29AB3A2B,
+0x3527A837,
+0xA83828A6,
+0x24A43625,
+0x25399F37,
+0x6D2E7D8F,
+0x894235A8,
+0x25531933,
+0x1B2B6316,
+0xB91C366A,
+0x4CB91B4B,
+0x1C2B7E16,
+0x7D1D2670,
+0x26722127,
+0x282D6A21,
+0xAF1E2B72,
+0x3FA2244D,
+0x2937A020,
+0x93212E8C,
+0x2B8B1E3A,
+0x2639A22A,
+0xB81B2383,
+0x2C8D3243,
+0x2039921C,
+0xBE1B2B85,
+0x74E9224B,
+0x326CEC3B,
+0xAE2E62D4,
+0x4BB42447,
+0x315DC42D,
+0xB83455BF,
+0x49A43350,
+0x363D9837,
+0x93344294,
+0x3F883840,
+0x3D4EA235,
+0xB4314091,
+0x53B53A56,
+0x3B5DB938,
+0xE3416ACF,
+0x8AF04B84,
+0x4576E155,
+0xAC3763CF,
+0x54BD354E,
+0x2E52CB33,
+0x82214DA2,
+0xA8542E4F,
+0x64BE4230,
+0xB70C707,
+0xDA0575CA,
+0x7FB61A88,
+0x88FD50A,
+0xF60496E8,
+0x6BB20C85,
+0x1388D102,
+0xDB0469CC,
+0x5DB50473,
+0x2142B50C,
+0xAE1E0086,
+0x1A22705,
+0x7159F0C,
+0xBF1B00B8,
+0xA9C040F,
+0x1442C20F,
+0xBA0C38BC,
+0x47CB0F4E,
+0x2715D81D,
+0xF53333F1,
+0x63DD1058,
+0x449C900,
+0xE90470E1,
+0x80DD018A,
+0x3F69DB14,
+0xF7407BEC,
+0x92FA348A,
+0x529FFC39,
+0xA28489DE,
+0x7C8A9779,
+0x90808A93,
+0x878D7D8A,
+0x7383847A,
+0x22A9800,
+0x9E002A9C,
+0x299D0025,
+0x1259A01,
+0x86012591,
+0x29840227,
+0x1198003,
+0x8D030D80,
+0x8990111,
+0x59800,
+0x9803089A,
+0x128F000C,
+0x2158A00,
+0x80001984,
+0x8810017,
+0x7008401,
+0x87110186,
+0x18A1100,
+0xC00840C,
+0x760F007D,
+0x791301,
+0x20008707,
+0x3F239F57,
+0xC94A28D2,
+0x22C74027,
+0x381CC63B,
+0xC0391DBE,
+0x1CC13D1F,
+0x431AC13F,
+0xBE421AC5,
+0x18AF4014,
+0x3618A93A,
+0x93380E9F,
+0x1AA34B1D,
+0x4319A046,
+0xB3471BAA,
+0x14AA3A11,
+0x3822A434,
+0xA43524A7,
+0x27A43529,
+0x3125A234,
+0xA03225A1,
+0x219E3325,
+0x203F9938,
+0x6629948B,
+0x7C3450BC,
+0x21582C37,
+0x22266926,
+0xBD253474,
+0x2E7A2753,
+0x1A347E17,
+0x8F223790,
+0x36772239,
+0x16357D25,
+0xA6252E7E,
+0x68D11A37,
+0x1F3BA635,
+0x8E1F3D96,
+0x388B2C35,
+0x2A46B122,
+0x8D355EC8,
+0x50C42235,
+0x2238912A,
+0x87182B87,
+0x2A991E2C,
+0x1648BB15,
+0xEA3053CB,
+0x68D93F81,
+0x1F45BA36,
+0xEB4C81ED,
+0x58BB5083,
+0x3148B237,
+0x943A3F98,
+0x49984044,
+0x3747953B,
+0xB2404FA9,
+0x4BA6324B,
+0x33469D33,
+0xB1364BA6,
+0x4DAA354F,
+0x2F4DBD34,
+0xA73553B4,
+0x51BD314A,
+0x3E58BE3D,
+0xC93660C9,
+0x78CD3F71,
+0x33939228,
+0xF5BB81B,
+0xC11A69C2,
+0x33A82758,
+0x152EBA2C,
+0x9F0F279D,
+0x72CC1145,
+0x576D204,
+0xEC057DBF,
+0x5DD80483,
+0xC37A01C,
+0xA11F20A2,
+0x4AD1E04,
+0x1905BC18,
+0xA41A04AE,
+0x15B60E01,
+0x132FAE06,
+0xAE053DBB,
+0x44D10E42,
+0x191AD51A,
+0xDE2020D8,
+0x61E5283D,
+0x58E40F,
+0xC70354CE,
+0x87E50767,
+0x2074DE16,
+0xEC3079E8,
+0x77E83081,
+0x38A0FF35,
+0xE44F9BFF,
+0x7FAC8A88,
+0x9881979B,
+0x94968793,
+0x83939181,
+0x299600,
+0x9F012A9D,
+0x29A0012A,
+0x2279D01,
+0x87012892,
+0x25810127,
+0x6187F05,
+0x8B05067F,
+0x6930005,
+0x10E9C03,
+0x9801119C,
+0xF93010D,
+0x1108D00,
+0x80001487,
+0xE800014,
+0x3028102,
+0x82050083,
+0x1870400,
+0x5018A04,
+0x7B080082,
+0x790501,
+0x1D008000,
+0x3D1E8065,
+0xCF4B2BCD,
+0x1AC84023,
+0x3819BD37,
+0xBF3B1CBA,
+0x18C03D1C,
+0x461BC140,
+0xAD3C10C1,
+0x11AB4115,
+0x4B17A443,
+0xAC5C27A0,
+0x1AA14415,
+0x4213AB45,
+0xA93B13B7,
+0x12A5350F,
+0x321E9E2E,
+0xA23325A1,
+0x219D3224,
+0x2D20992D,
+0x9E322599,
+0x219B3525,
+0x30389632,
+0x493AB484,
+0x66432A7C,
+0x2450352F,
+0x1D2C7F1F,
+0xAD1F2C61,
+0x2D792248,
+0x22246020,
+0xA522367E,
+0x285C1E4A,
+0x27348821,
+0x861E297F,
+0x40AD1A33,
+0x2857D41D,
+0x982647C0,
+0x3BA21E3B,
+0x202E8527,
+0xE02955BB,
+0x2A7E446A,
+0x2534911C,
+0x891D40A7,
+0x29721030,
+0x1E2E881C,
+0xA5222777,
+0x5BAD2039,
+0x3771E035,
+0xC53044A5,
+0x77DB3F5E,
+0x3A6FDF3F,
+0x9D33489C,
+0x5BB93E44,
+0x3B61C43F,
+0xCA3557BE,
+0x52BB3D61,
+0x3B58C133,
+0xB33451B4,
+0x378B2747,
+0x39398C2A,
+0x963A3B87,
+0x4FAE303C,
+0x3A4ABB3B,
+0xBC3D62D3,
+0x74BA2A69,
+0x2D82B928,
+0x1949A23C,
+0x89344AAA,
+0x1D724031,
+0x19029430,
+0xCC0A13CE,
+0x4DA50C35,
+0x26FD016,
+0xBA097CD1,
+0x56C40469,
+0x1035CB0D,
+0xA4172EB3,
+0x2801B0B,
+0x3F02AD20,
+0xB63602C0,
+0xAF0903,
+0x83BC20E,
+0xBC0434A9,
+0x36CB133F,
+0x1819CB1A,
+0xC31724D7,
+0x47DC171C,
+0x1050DA17,
+0xBC026AE2,
+0x56BA0056,
+0x2079E114,
+0xD20381E8,
+0x59CB096C,
+0x2679DF24,
+0xF23087F0,
+0x8ADB5F94,
+0x9C87BA8B,
+0x9B9E8FA2,
+0x8D9D9A8A,
+0x2A9700,
+0xA1012E9E,
+0x2B9F002C,
+0x2289A00,
+0x8A012894,
+0x20810027,
+0x5108102,
+0x8C050184,
+0x1930000,
+0x1089B02,
+0x9E010C9F,
+0xB990012,
+0x10E9401,
+0x8301108C,
+0x117E0014,
+0x47B00,
+0x7C00007B,
+0x810000,
+0x1008800,
+0x81000086,
+0x17C0000,
+0x16007E00,
+0x3E215570,
+0xD14926D0,
+0x19C94221,
+0x3B1BBC3A,
+0xBF3D1EBC,
+0x1ABD3A16,
+0x4112C345,
+0xAD4412B1,
+0x14B4541A,
+0x571DA655,
+0xAA4B0FAC,
+0xFB34610,
+0x3C12B040,
+0x9F310FAE,
+0x179A2B15,
+0x2D1A9B2D,
+0x972C1C9C,
+0x1F952B20,
+0x2C1D942C,
+0x98312295,
+0x269B3326,
+0x34389430,
+0x522A577E,
+0x5541273B,
+0x2D733B2A,
+0x24266324,
+0xA11E2E5E,
+0x20661E42,
+0x1B2B6B19,
+0xA8222F84,
+0x2A772251,
+0x1726681B,
+0x8E232E8A,
+0x349B1A34,
+0x14389C14,
+0xD12854BE,
+0x31872F60,
+0x25399F16,
+0xBE242986,
+0x5ECF2555,
+0x2C3C9E32,
+0xA314256E,
+0x328C2236,
+0x1839921C,
+0x6D1B2B96,
+0x26822226,
+0x2031981D,
+0xAF30459F,
+0x58BD374D,
+0x3956BB41,
+0xA031409C,
+0x4BAB3A41,
+0x4B7DE834,
+0xDC5288EC,
+0x69CD4A79,
+0x2F52BA46,
+0x9A324BA9,
+0x44A7323E,
+0x3432702F,
+0x932C2C77,
+0x39833135,
+0x2C48932E,
+0xB22E53A9,
+0x71A5325D,
+0x1C8F8220,
+0x2A249B1D,
+0x743B3A9F,
+0x2754462F,
+0x1B119139,
+0xAA1236A5,
+0x56D0164A,
+0x175CBD15,
+0xB40C68BC,
+0x3C9E0967,
+0x222ACE19,
+0xB1062BC0,
+0x4AF2708,
+0x38068920,
+0xB536059F,
+0xABE0D03,
+0xD22C30D,
+0xBB0F31B3,
+0xABF103C,
+0x1E1ED51F,
+0xC01929D2,
+0x54DB1C2B,
+0x1751CE11,
+0xE51171E1,
+0x5ECB0C7C,
+0x1A65D609,
+0xE11278E4,
+0x7ADC1385,
+0x1C79DA28,
+0xE71D72DA,
+0x9DF53987,
+0x8F97EF57,
+0xADA094C9,
+0x97A4A594,
+0x12C9400,
+0x9F002F9C,
+0x2E9F022C,
+0x1269C00,
+0x8D002394,
+0x1A850024,
+0x9068204,
+0x8B0A0086,
+0x940301,
+0x1009A00,
+0x9E020C9D,
+0x129E0114,
+0x139800,
+0x8401108E,
+0xE7C0011,
+0x2027800,
+0x74000178,
+0x7A0100,
+0x1028102,
+0x85000886,
+0x582000A,
+0xB007F01,
+0x3C1C2678,
+0xC94719D3,
+0x14C24017,
+0x3A19BC39,
+0xBA3C18BA,
+0x14C23E15,
+0x4410BB48,
+0xAD5113A7,
+0x4A24B08,
+0x4E06AA4C,
+0xB04410B2,
+0xDAE3D11,
+0x3210A338,
+0x9B2C139F,
+0x1A9B2D1C,
+0x27189326,
+0x8E261C92,
+0x2087251D,
+0x2D228827,
+0x99312195,
+0x1E982C21,
+0x2C438C2D,
+0x642D4075,
+0x4639253B,
+0x21563F21,
+0x1F2C5C29,
+0xA22A3570,
+0x275E1B46,
+0x1D31641A,
+0x93152D75,
+0x368F1D35,
+0x2257C81E,
+0x91193D89,
+0x358D1D3B,
+0x1F327C1D,
+0xBB273279,
+0x4FB2234C,
+0x1A30961B,
+0x9317328F,
+0x62CE2636,
+0x263E9D34,
+0x8631418B,
+0x2E7D1E28,
+0x2D3DAB1E,
+0x961A3A97,
+0x37931E2A,
+0x1F298F22,
+0xA3293790,
+0x69CA3242,
+0x466FBF3F,
+0xA34A67C6,
+0x3684344E,
+0x314AAB32,
+0xE1456CD9,
+0x73DB4377,
+0x476FD84C,
+0xCB3864D1,
+0x48AD3765,
+0x34348E37,
+0x793C3A75,
+0x307C3B3A,
+0x2F428A31,
+0x8B324287,
+0x51883443,
+0x237D6F33,
+0x4526A122,
+0x793C1C7C,
+0x2C564719,
+0x25207821,
+0xCE1F1FAB,
+0x4DB8152F,
+0x1955C814,
+0xAB0D4BC2,
+0x45B21150,
+0x2109880E,
+0x9A1D28BA,
+0x5C72203,
+0x2D038F17,
+0x9A2E0694,
+0x3A81504,
+0x400A11A,
+0xC00929BF,
+0xBF1428,
+0x1300BD19,
+0xBF150DBE,
+0x5CCF0E45,
+0x1754C70A,
+0xEB1C6ED8,
+0x76E41285,
+0x1365D80F,
+0xD80D67DC,
+0x76DE2577,
+0x327BE845,
+0xF9248EEF,
+0xB6FF349D,
+0x61A9FE3B,
+0xC7928FE8,
+0x9EB2A397,
+0x2A9102,
+0x9E002B9A,
+0x279A012A,
+0x1219601,
+0x8D022294,
+0x17870020,
+0x12048403,
+0x8B140087,
+0x911000,
+0x9603,
+0x9F010199,
+0x79C000A,
+0x1119E01,
+0x87010A95,
+0x47A0208,
+0x1027601,
+0x72010173,
+0x4730103,
+0x2057900,
+0x86000D7F,
+0xD880016,
+0x6008300,
+0x3D180B80,
+0xC34610CD,
+0x17C64216,
+0x3A17BF3F,
+0xBA3B16BA,
+0x11C14214,
+0x4B0DB448,
+0xA04E11A8,
+0x8944402,
+0x4507AB49,
+0xA43B06A8,
+0xBA9370B,
+0x260FA02F,
+0x94261491,
+0x14922615,
+0x22178A22,
+0x851F198C,
+0x1782221B,
+0x261F7D20,
+0x8E271B88,
+0x1A8C2C20,
+0x2D238728,
+0x5B436A73,
+0x5C372E65,
+0x195E2821,
+0x1C2C661C,
+0x8C1A2F74,
+0x2A66283C,
+0x1A276D15,
+0x73171F61,
+0x306D1835,
+0x1E4DB123,
+0x811C47B7,
+0x3397222D,
+0x1A286F1E,
+0x8D1A2880,
+0x3BA11D28,
+0x193C9F17,
+0x7D263EA3,
+0x4E921A29,
+0x3E6ED735,
+0xAD1B2A87,
+0x34892346,
+0x2E34882A,
+0xA0263996,
+0x277A1E39,
+0x1E31961D,
+0x8623359E,
+0x3D892A2F,
+0x406BC730,
+0x984574D4,
+0x2C632F48,
+0x33449D2B,
+0xC931409E,
+0x5DCB3560,
+0x416AD53B,
+0xCA3A64C8,
+0x64D24161,
+0x2F4BA53E,
+0x85242569,
+0x387F3633,
+0x3645962D,
+0x882E458D,
+0x5E7B203B,
+0x38554040,
+0x442B6138,
+0x9C52139C,
+0x365D4119,
+0x2645831A,
+0xDC1F47BF,
+0x2A951425,
+0x1C3FA215,
+0xA01B3EAA,
+0x37C32236,
+0x1B139F11,
+0x9D230086,
+0x49C1F05,
+0x3404BB37,
+0xB822049F,
+0x22CE1B06,
+0xA01B50A,
+0xB40C24B0,
+0x34D31C21,
+0x1C29CD1C,
+0xB6104FD1,
+0x5FC9103D,
+0x1065C812,
+0xDF146ECD,
+0x78E3187A,
+0x1362DA1B,
+0xD7075DD3,
+0x5AD52268,
+0x4667EB56,
+0xFE3394F6,
+0xB6FE37A0,
+0x3FBAFE39,
+0xD76F94F6,
+0xA0C3988A,
+0x2258E00,
+0x97012596,
+0x24960125,
+0x209400,
+0x8C02208F,
+0x12890122,
+0x1E008705,
+0x84260086,
+0x892000,
+0x2008E11,
+0x9B010197,
+0x39F0301,
+0x9A000,
+0x8D000099,
+0x37B0102,
+0x27101,
+0x6C00006F,
+0x26B0000,
+0x10A7300,
+0x7E001179,
+0x1385001B,
+0x1048300,
+0x4A150086,
+0xC94A15B2,
+0x1AC74814,
+0x3C15C343,
+0xBC3D12BC,
+0xBC04A14,
+0x5A16B04C,
+0x8B2F06AF,
+0x78B3904,
+0x3E099F43,
+0xA03310A6,
+0xB942B08,
+0x2919912C,
+0x8A1D148F,
+0x148A1D13,
+0x1B16831C,
+0x801E1782,
+0x157B1B16,
+0x1E197B1B,
+0x80221F83,
+0x13842219,
+0xF23741D,
+0x2E275558,
+0x802B47A8,
+0x1C512531,
+0x1E265C12,
+0x4F1B3376,
+0x44A41722,
+0x192E7B0B,
+0x50172857,
+0x2F691821,
+0x1E2A6613,
+0x8C204CBC,
+0x1F681D30,
+0x1B26701B,
+0xA8172C7F,
+0x30911D42,
+0x26337C1D,
+0xAC252E84,
+0x2163214A,
+0x283B9515,
+0xD73A74DD,
+0x58C32D60,
+0x2B35942C,
+0x6B21278D,
+0x338A2323,
+0x223A9528,
+0x7327388D,
+0x347C272E,
+0x3239852D,
+0xE02E5BBE,
+0x56BF456E,
+0x2D3A9D34,
+0xB3293A82,
+0x387F324C,
+0x3959BE24,
+0xCA396DD3,
+0x62D0375E,
+0x3C48B932,
+0x8F2D3D91,
+0x3B832839,
+0x34367D35,
+0x883546A1,
+0x575F294D,
+0x315F4B38,
+0x35223626,
+0x97632559,
+0x33796E1F,
+0x1330912B,
+0xB92F4E8D,
+0x33D11835,
+0x1C24EE16,
+0xB61317C9,
+0x8A00E0E,
+0x2F03941F,
+0x9B310880,
+0x39E2801,
+0x3E02952F,
+0x9C170BB1,
+0x9A40B11,
+0xF01B919,
+0xAC0D0FB3,
+0x64E5180E,
+0x48BD14,
+0xC51545B1,
+0x46B81148,
+0xB73CE17,
+0xD80C79D0,
+0x75DE1371,
+0x755C91B,
+0xCB0248B4,
+0x54D4205D,
+0x5658E55D,
+0xE94377EE,
+0xA6F83982,
+0x3DB8FF38,
+0xE13BA2FF,
+0x88CF6E77,
+0x218D00,
+0x95012193,
+0x20930021,
+0x11F8E01,
+0x88001E8C,
+0xD89001C,
+0x28008D0C,
+0x83300087,
+0x842A00,
+0x800881D,
+0x97000091,
+0x29A0200,
+0x1079F02,
+0x920104A2,
+0x6850303,
+0x17301,
+0x6802006A,
+0x3670100,
+0x2146E02,
+0x77001671,
+0x14800017,
+0x1078400,
+0x61130087,
+0xD0481175,
+0x18C44A15,
+0x4110C345,
+0xBC3F0FBD,
+0x7BD4E10,
+0x762BAE5A,
+0x424D21AC,
+0xF76391F,
+0x2F0B8E32,
+0x87270989,
+0xD84230A,
+0x1D148321,
+0x791B1387,
+0x12791912,
+0x1A197719,
+0x7213147C,
+0x116C1012,
+0x11176911,
+0x721D156A,
+0xF732121,
+0x203A5811,
+0x2C43AF3C,
+0x9F182D60,
+0x25541E41,
+0x1D265F12,
+0x73182C64,
+0x4DA6202B,
+0x132D7C23,
+0x741A2779,
+0x2376142A,
+0x21245518,
+0x97143A9A,
+0x2D901831,
+0x1E307E16,
+0xCF1E3183,
+0x49B6275C,
+0x23307F23,
+0x6E28398D,
+0x47A82723,
+0x2135892C,
+0xAB1C297A,
+0x5ACD2247,
+0x1E5BD52F,
+0xA22136AB,
+0x48A92431,
+0x2E388C32,
+0x89263491,
+0x338F2433,
+0x2C31772A,
+0x9C2C338F,
+0x4DAA273F,
+0x2C44A322,
+0xA9213291,
+0x35873448,
+0x314BB629,
+0xD5384DB9,
+0x49B04268,
+0x4568D62A,
+0xA3293B95,
+0x3079393F,
+0x2F42942C,
+0x79313A88,
+0x6564374D,
+0x38754340,
+0x4D19A14C,
+0x5041197B,
+0x2E643D27,
+0x341D9874,
+0xAC281894,
+0xC782121,
+0x11159408,
+0xB8141CB8,
+0x12A81008,
+0x1C05BA17,
+0xA2360A81,
+0x4923804,
+0x2D029140,
+0xBC0C0AB2,
+0x8A71032,
+0x1E00AA32,
+0xD00F00C5,
+0x4CC61428,
+0x457C60C,
+0xD5193BA3,
+0x66C9135D,
+0x1476CE10,
+0xDA0E81D8,
+0x69D40E76,
+0x135AC61F,
+0xC50054B1,
+0x6FD9186C,
+0x575BE14D,
+0xC9455AD5,
+0x76DD4151,
+0x329EF238,
+0xD52892F0,
+0x89D63772,
+0x1A8A00,
+0x8E001D8F,
+0x1F8D021D,
+0x208A01,
+0x87001C88,
+0xC8C001A,
+0x31009013,
+0x83330089,
+0x1803000,
+0xE018323,
+0x9300018D,
+0x940100,
+0x69C02,
+0x98010FA0,
+0x8C0009,
+0x2007B02,
+0x6604016C,
+0x3650300,
+0x116500,
+0x7101186A,
+0x14750017,
+0xF8001,
+0x740B0081,
+0xD34D1232,
+0x11C2500B,
+0x4910C849,
+0xBD470FBE,
+0x7BE5408,
+0x7C2BB468,
+0x37C3E88,
+0x5627804C,
+0x6C5A4573,
+0x69585256,
+0x2B693F3F,
+0x1E19692A,
+0x6B221F62,
+0x186A1E1D,
+0x10106117,
+0x5A0D0F5C,
+0x26580F18,
+0x1F295419,
+0x43252251,
+0x6B3A1D32,
+0x27642C32,
+0x2C244D2E,
+0x8429337E,
+0x71D1E36,
+0x19183E16,
+0x74112D87,
+0x3E9C1C30,
+0x15257318,
+0x73162368,
+0x1F58142B,
+0x181E581D,
+0xB31B3A91,
+0x3482274E,
+0x1F349119,
+0x951C3074,
+0x5ECD1B31,
+0x27349926,
+0x541C399E,
+0x2E7A262A,
+0x162E8720,
+0x822744A3,
+0x2D8C2634,
+0x234EBB1B,
+0xC61E4FCA,
+0x43B21F52,
+0x2A41A325,
+0xA82443A6,
+0x23822A3A,
+0x232C8F21,
+0x8A1B308E,
+0x36A02A31,
+0x1F359923,
+0x9625348F,
+0x409B273A,
+0x25368929,
+0xB82642A1,
+0x63C83951,
+0x3A5BB53D,
+0x9F3860DE,
+0x2F6D293E,
+0x2737712A,
+0x732E3671,
+0x4A732B3E,
+0x2B89582B,
+0x370E8636,
+0x92451EB9,
+0x396A391B,
+0x2D3F911C,
+0xC4400E98,
+0xF8D310D,
+0x190FB52E,
+0xA0201184,
+0xEB51509,
+0x1809B22A,
+0xB73E0C8E,
+0x4943502,
+0x42058847,
+0xBD1603AC,
+0x12AD112D,
+0x22009931,
+0xC91301B9,
+0x30A90D12,
+0x7249D02,
+0xC40848C3,
+0x71D31256,
+0x86BCE10,
+0xD8126BD0,
+0x64D91870,
+0xC68D822,
+0xC60163BE,
+0x6FD51777,
+0x9066ED63,
+0xED8D63EE,
+0x84DF4B6C,
+0x26A1DF26,
+0xDF2D8AE1,
+0x9EEE3086,
+0x1B8701,
+0x8F011D8E,
+0x1C8C001D,
+0x1E8900,
+0x88031B87,
+0x78D001D,
+0x33008F16,
+0x8938008D,
+0x17E3600,
+0x10007E25,
+0x8B000186,
+0x18E0101,
+0x2039300,
+0x9C03139C,
+0x5930018,
+0x18401,
+0x6B050076,
+0x660600,
+0x56401,
+0x65001262,
+0x196D0117,
+0x3157800,
+0x7D01127B,
+0xB35B1301,
+0x8C85405,
+0x4C0EC352,
+0xC54C0FC9,
+0x10BC6303,
+0x8130C575,
+0x1E884D4B,
+0x65348555,
+0x85724D87,
+0x6A878661,
+0x986E8893,
+0x99A26F8F,
+0x7C8E987B,
+0x8A778690,
+0x7A86717E,
+0x707B8470,
+0x926D7F89,
+0x6681667D,
+0x9131D4F,
+0x1C100710,
+0x346C0305,
+0x293E892B,
+0x4E1C2B6C,
+0x18540D1B,
+0x29215217,
+0x6D0D2574,
+0x2B871629,
+0x17267216,
+0x6C131848,
+0x2B6E1021,
+0x1A32761B,
+0x9C142D83,
+0x35912341,
+0x182D8221,
+0x7B142C91,
+0x2D821D2F,
+0x1F51BA1E,
+0x942251C3,
+0x2D652238,
+0x1B2B792D,
+0x791D3294,
+0x328D1925,
+0x1D207223,
+0xB71C3999,
+0x66DE2049,
+0x1B3C9F35,
+0x7F1D2E82,
+0x37923023,
+0x2E40AB35,
+0x79333585,
+0x388D2535,
+0x293BA926,
+0x9626378C,
+0x265F243C,
+0x2C50BD29,
+0x81283697,
+0x449B2E2E,
+0x3F57BD34,
+0xB02A4AAA,
+0x388E4048,
+0x32398E32,
+0x762C3A81,
+0x3E6A2B47,
+0x2E5F572C,
+0x4B0EA75C,
+0x443609A9,
+0x24575822,
+0x270C6D41,
+0x852E0698,
+0x88E3412,
+0x2316DE3E,
+0x931A09A6,
+0x3BC220D,
+0x3405C51F,
+0x8D380992,
+0x1845204,
+0x3A01A945,
+0x943705A2,
+0x15C21F03,
+0x41029F20,
+0xD02C02A4,
+0x28A20E10,
+0x457CD09,
+0xBD0555CF,
+0x51C90D50,
+0x1455CD10,
+0xDD186CDB,
+0x6CE62669,
+0x1B5AD51B,
+0xD30373D4,
+0x87D71179,
+0x7D74EA51,
+0xC76976EA,
+0xDAD01BA1,
+0x21E0EB05,
+0xF023CBF3,
+0xACF430A6,
+0x11B8A00,
+0x8F001D8F,
+0x1B8D011A,
+0x168D00,
+0x8A03198B,
+0x28E011C,
+0x33029124,
+0x8F3A008F,
+0x843801,
+0x10008026,
+0x8300007E,
+0x860000,
+0x38E00,
+0x97010D96,
+0x8940119,
+0x3008B01,
+0x6E05017B,
+0x630101,
+0x1006201,
+0x60020C5F,
+0x14690118,
+0x2127101,
+0x82031476,
+0x62710F02,
+0x3D36109,
+0x5608C65A,
+0xC5590BC1,
+0x1AC07100,
+0x8037C184,
+0x28884D32,
+0x6B438D60,
+0x8E7C598E,
+0x718B886C,
+0x967B8D93,
+0x8E947D8D,
+0x7B8F987C,
+0x8F788A92,
+0x868E7785,
+0x747F8C7B,
+0x84687B87,
+0x68895D6D,
+0x51618554,
+0x5F363C5A,
+0x3A931F21,
+0x24368422,
+0x691D2658,
+0x14491E29,
+0x14225A0F,
+0x4D151C54,
+0x26521013,
+0x19204C1C,
+0x911B2C64,
+0x2A69153B,
+0x19278219,
+0x74142763,
+0x3D821C2B,
+0x173B9823,
+0x80163585,
+0x2D76152C,
+0x203AA818,
+0xBB163694,
+0x35852E51,
+0x25227226,
+0x92222891,
+0x25762731,
+0x21308718,
+0x75212F76,
+0x32A01F29,
+0x294AB01E,
+0xBE325DD9,
+0x258A2A49,
+0x3133962B,
+0xA4313685,
+0x41963445,
+0x303B992A,
+0x9C23359B,
+0x37882B38,
+0x25388622,
+0x6E2E377D,
+0x27593230,
+0x35308332,
+0xA93945B2,
+0x3EA33343,
+0x2B3D8B2F,
+0x8A32407F,
+0x4A772944,
+0x2B3E6429,
+0x521C626F,
+0x5F5313B6,
+0x2A465324,
+0x41185844,
+0x912E0B92,
+0x15992210,
+0x320B8620,
+0xA416038F,
+0xF922010,
+0x2D05D02F,
+0x8C4704B9,
+0x217A560A,
+0x4D096F48,
+0x8345008A,
+0x13B72104,
+0x3E01A614,
+0xCA1E009A,
+0x49C31032,
+0x939C600,
+0xCC0D2FB8,
+0x5ACD154B,
+0xE3AAB09,
+0xDF1F4AC2,
+0x52D31A60,
+0x215BD21B,
+0xD91C73DB,
+0x94E41B8A,
+0x1B82D90E,
+0x9D32A4B7,
+0xEBD11DE4,
+0x12E2EE00,
+0xF723D1F5,
+0xA7F62DAB,
+0x2198A00,
+0x97001D92,
+0x1893011C,
+0x1119300,
+0x8B00148F,
+0x8E0314,
+0x2E019125,
+0x94340092,
+0x1903601,
+0xE018325,
+0x7E01007E,
+0x17F0103,
+0x1028200,
+0x8F000E8D,
+0xA980317,
+0x1009001,
+0x7B000086,
+0x16E0101,
+0x6802,
+0x5E01075F,
+0x12620111,
+0x166A01,
+0x7A021371,
+0xC830218,
+0x2BF680B,
+0x6102BF6B,
+0xC56803C5,
+0x2DC57E00,
+0x8136BF99,
+0x30905410,
+0x78479362,
+0x97866099,
+0x81999373,
+0xA289969C,
+0x99A08B9A,
+0x83949C88,
+0x957F8F96,
+0x89907C8E,
+0x6F829077,
+0x8767778B,
+0x6A84586D,
+0x556A8854,
+0x8A556B87,
+0x142E5B60,
+0x303B710B,
+0x3B162E6B,
+0x4BAC0710,
+0xF1D5225,
+0x5B141023,
+0x1D4E1422,
+0x1A285415,
+0x911B123B,
+0x2564183B,
+0x17285D17,
+0x74173794,
+0x2A5A1529,
+0x1C398E18,
+0x8F163D97,
+0x2C6F2231,
+0x173C9419,
+0x9E1A1A49,
+0x4CA92F40,
+0x223A962D,
+0x8E25328C,
+0x297C2832,
+0x162C7C1C,
+0x98232E88,
+0x2E8A1F3C,
+0x263AB31E,
+0xBB2249C6,
+0x40A42C49,
+0x2E4DCD25,
+0xA02A41B3,
+0x36842E3B,
+0x2B398A30,
+0x902F3E93,
+0x2F872535,
+0x2E398B26,
+0x86262069,
+0x2A6E3639,
+0x322B6C33,
+0xBF302E7B,
+0x3DAD3045,
+0x2F44AC26,
+0x91254298,
+0x4277264B,
+0x3163731E,
+0x5E244956,
+0x3C58284D,
+0x294D6023,
+0x49165E4F,
+0x9F2E0B8E,
+0xB873E0D,
+0x3E139E35,
+0xA6160693,
+0x11B31E1C,
+0x4103A231,
+0x893E059F,
+0x10664302,
+0x52007D6F,
+0x6C540D78,
+0x6A8560A,
+0x3A0DB42E,
+0xAF120E9F,
+0x34CB0A22,
+0x1525BD0C,
+0xC2093AC9,
+0x38B50B54,
+0x943B313,
+0xC80837BA,
+0x40CD0F3C,
+0x1E7AE925,
+0xDE1478DC,
+0x8AE51A82,
+0x1F93E926,
+0xD11E9ED3,
+0xDCDC04D3,
+0x11D2F106,
+0xED13C1F2,
+0xA0F31EA1,
+0x1178C01,
+0x99001B95,
+0x1597001B,
+0x3169400,
+0x8E011693,
+0x93000F,
+0x27009619,
+0x9A2A0095,
+0x952B01,
+0xB018A1F,
+0x79000080,
+0x7A0001,
+0x7B00,
+0x8B001184,
+0xE950015,
+0x19500,
+0x8501008F,
+0x7A0001,
+0x17001,
+0x61020666,
+0x1260010C,
+0x3196601,
+0x7A011B6D,
+0x185001B,
+0x2647F08,
+0x6F03CF72,
+0xC67100BB,
+0x3CBD9200,
+0x8738BBA3,
+0x2F955401,
+0x7A489967,
+0xA18C5F9F,
+0x8AA39E78,
+0xA692A0A3,
+0x9DA5969F,
+0x8798A08E,
+0x9B82929E,
+0x8C957E8F,
+0x6E829279,
+0x87657589,
+0x6A8B5A6E,
+0x52678B54,
+0x99596E89,
+0x658A6679,
+0x1D203D53,
+0x65293972,
+0x27552133,
+0x1A1F450B,
+0x7E0A1538,
+0x6201936,
+0x14225608,
+0x73121230,
+0x2D6A2B35,
+0x1A1C5C18,
+0x6C0F1464,
+0x2A751524,
+0x182F831D,
+0x612E55C5,
+0x2F7A1428,
+0x1833951D,
+0x88202F85,
+0x4BBE142D,
+0x253B8624,
+0x86263E97,
+0x328B262C,
+0x172B851B,
+0x82253791,
+0x31952230,
+0x1F34A524,
+0xC72648B5,
+0x4BB72E54,
+0x2B4DC827,
+0xB92C55D4,
+0x399A2D4A,
+0x2E40A62F,
+0x882E3D9C,
+0x41A72732,
+0x222A882D,
+0x572E2A82,
+0x25772219,
+0x35286B31,
+0x7F282566,
+0x44B72431,
+0x233C9E2C,
+0xBC2B41A0,
+0x428B2957,
+0x264D5D29,
+0x75255C7A,
+0x39671C38,
+0x22445D20,
+0x3F1E3635,
+0xB96C1078,
+0x8973E04,
+0x37197D19,
+0xB128049F,
+0xCB91A09,
+0x4104B230,
+0x903A007F,
+0x2844B01,
+0x52029165,
+0x75621271,
+0x119F630F,
+0x2928AA30,
+0xB6100683,
+0x2AF1C12,
+0x1504B615,
+0xBB0331C6,
+0x46BE0B48,
+0x552BD0B,
+0xC40A46C2,
+0x5AB1239,
+0x1638B71D,
+0xE21978DA,
+0x85DE167D,
+0x2185E01D,
+0xD7267CDA,
+0xAFD90B9F,
+0x13B4E910,
+0xE710ADE9,
+0x97EE1694,
+0x1188C00,
+0x9B021E98,
+0x1699001A,
+0x1159801,
+0x91000F94,
+0x292000A,
+0x20009708,
+0x9A250097,
+0x982800,
+0x9019017,
+0x76000085,
+0x770001,
+0x1017600,
+0x86010880,
+0xF8A0011,
+0xB9500,
+0x8F020097,
+0x870000,
+0x7B01,
+0x6401016F,
+0x1466010B,
+0x1C6600,
+0x77001A6E,
+0x1182031E,
+0x8098904,
+0x7701BA7B,
+0xC27900BC,
+0x44C2980E,
+0x883BB4AB,
+0x2C985300,
+0x8149A068,
+0xAA8D6AA4,
+0x8FAB9F7D,
+0xAB94A9A9,
+0x9FA797A3,
+0x889AA391,
+0x9F8697A4,
+0x8A987E90,
+0x697E9473,
+0x8B5D748C,
+0x6F8C5873,
+0x576E8E55,
+0x925A6E8B,
+0x7F9F5972,
+0x54668E65,
+0x732D4166,
+0x1E452839,
+0x10256C0F,
+0x74070D28,
+0x15340F29,
+0x15194A14,
+0x63131F52,
+0x2E7B1D25,
+0x12226E16,
+0x5E09164A,
+0x226C1A1F,
+0x14399E0B,
+0xB71A3178,
+0x2E772650,
+0x1529681F,
+0x8F1A2572,
+0x4EBF1536,
+0x2750B82A,
+0x98233182,
+0x24742539,
+0x1D296C1D,
+0x9D19264C,
+0x38A62839,
+0x192F8420,
+0xA9212C90,
+0x52C12640,
+0x2851BE29,
+0xCA2546C1,
+0x54C52144,
+0x334FB832,
+0xA5294DB0,
+0x49A23134,
+0x212E9429,
+0x62232171,
+0x1C623420,
+0x24256C2B,
+0x6D2B2A71,
+0x307E2628,
+0x2743B327,
+0x811B3D8B,
+0x4A932536,
+0x2D529C27,
+0x7C1C4286,
+0x57851D42,
+0x1D324C2C,
+0x3E19585E,
+0x5A302759,
+0x1DB22F0E,
+0x30105A39,
+0xB01D0F88,
+0x4BF2309,
+0x4406B43D,
+0x7343017D,
+0x9A580D,
+0x5B0D8B55,
+0x68621E6B,
+0x2E645E1C,
+0x2A228B1D,
+0xB1152CA9,
+0x933414,
+0x1F009C33,
+0xBC0716B6,
+0x44B1084A,
+0x250B406,
+0xBF0756C4,
+0x9D1542,
+0x1027B21C,
+0xD9087AD3,
+0x76D90B6B,
+0x2571D611,
+0xD72971E0,
+0xA9DC2A88,
+0xA3D80C,
+0xE50694D8,
+0x95EC108B,
+0x1178D00,
+0x9C031C97,
+0x199E011B,
+0x1099A00,
+0x94000499,
+0xE92000E,
+0x7009400,
+0x990F0299,
+0x981300,
+0x501950D,
+0x7F00008B,
+0x1730001,
+0x7501,
+0x8101007B,
+0xB860005,
+0x129104,
+0x98000098,
+0x900000,
+0x1018602,
+0x6F02007C,
+0xE6C0106,
+0x1196B00,
+0x75011B6E,
+0x197F0121,
+0xA068702,
+0x8604418B,
+0xBA8800C9,
+0x4DBAA213,
+0x8835B8B3,
+0x1D985000,
+0x7C429E66,
+0xAB8E61A5,
+0x8DADA17A,
+0xAD93AFAA,
+0xA1A996A7,
+0x899BA790,
+0x9F8193A1,
+0x84977B8E,
+0x687E9570,
+0x9161778F,
+0x6F8E5C74,
+0x5B6E8F58,
+0x965A7090,
+0x7A975E77,
+0x647CA061,
+0x8E546A92,
+0x396D485F,
+0x1B256022,
+0x9D060630,
+0x82A1F43,
+0x10164709,
+0x53181E4B,
+0x37861221,
+0x14205F1C,
+0x5E1A2F73,
+0x1C681024,
+0x20297E14,
+0x681C3B94,
+0x2E861427,
+0x182E811C,
+0x55132B80,
+0x327C1F23,
+0x2C4EBF20,
+0x992F4AA5,
+0x4BC41E3C,
+0x21358424,
+0x702E3071,
+0x339B1626,
+0x232B9320,
+0x8B1F318E,
+0x42B01F2C,
+0x224AB821,
+0xA5213B9E,
+0x4CC41F3F,
+0x294EBC26,
+0xAC2038A1,
+0x3A9E2F49,
+0x2730932A,
+0x66232774,
+0x206F241F,
+0x24277223,
+0x71252071,
+0x26632626,
+0x2432A023,
+0x7A1F42B1,
+0x32652535,
+0x22419126,
+0x822A56AB,
+0x516B2550,
+0x1C3D4828,
+0x391E4B56,
+0x72411B5A,
+0x207A321D,
+0x26188525,
+0xA21F128B,
+0x10AA2E19,
+0x5015883B,
+0x62570E70,
+0x147D5D15,
+0x5310754D,
+0x666D1A60,
+0x20805F1C,
+0xD39BE25,
+0xB6183DBC,
+0x2BE3003,
+0x170DBC2A,
+0xCA1534BF,
+0x50BF134B,
+0x550B507,
+0xBA0851B9,
+0xC9D183B,
+0x748BA16,
+0xD5077AD1,
+0x7BE0136A,
+0x2171DD19,
+0xD62D5ED7,
+0x92DF2F74,
+0x99EE825,
+0xD90486D1,
+0x8DE70B7B,
+0x1C9002,
+0x9B001E97,
+0x1D9E001C,
+0x129D01,
+0x99000D9A,
+0x15950015,
+0x18F01,
+0x96000092,
+0x960300,
+0x9801,
+0x85000091,
+0x7B0101,
+0x7901,
+0x8201007D,
+0x3850001,
+0x2108B01,
+0x9D010A97,
+0x9C0006,
+0x9200,
+0x7B000088,
+0xC740002,
+0x186E00,
+0x71011A6F,
+0x1A7B011E,
+0x2138200,
+0x8E0D008D,
+0xBF8F0A92,
+0x4EB79F1E,
+0x8930BCB5,
+0xD954B00,
+0x773A9D65,
+0xA68A58A2,
+0x87ACA071,
+0xAD8EAFA9,
+0xA0AB90A7,
+0x8597A68D,
+0x9E7F92A2,
+0x869B758B,
+0x697F986F,
+0x94647893,
+0x71926074,
+0x5F73945D,
+0x985F7596,
+0x7A985D77,
+0x5A789A5D,
+0x9556739A,
+0x66974F71,
+0x2E3D7547,
+0x6A0B1139,
+0x113E1627,
+0x11286A07,
+0x4A0A1241,
+0x1E52121D,
+0x1D387D17,
+0x6F162964,
+0x20701323,
+0x9267212,
+0x86243C94,
+0x2973182B,
+0xF2B701A,
+0x60192678,
+0x266D131C,
+0x23308D16,
+0x932847AE,
+0x348D1E39,
+0x2D4EB721,
+0x7D222F7B,
+0x2A8F272B,
+0x23348921,
+0xAB1339B1,
+0x29861434,
+0x1F37A41F,
+0xA51E287E,
+0x3995213A,
+0x243AAF1F,
+0xA72845A3,
+0x39A62C41,
+0x25349728,
+0x6D302A79,
+0x26722522,
+0x21277020,
+0x761E1E72,
+0x276D2024,
+0x26349A20,
+0x7D1A216C,
+0x21522332,
+0x29398321,
+0x831F2B4D,
+0x3A43285D,
+0x24525819,
+0x3B1A483F,
+0x64451D59,
+0x1C7E130D,
+0x28118129,
+0xB32313A3,
+0x17922E10,
+0x5C256B49,
+0x636C1C5B,
+0x1059430A,
+0x48175641,
+0x7573194D,
+0x2EAC5918,
+0xE3ECB27,
+0xBD1331C4,
+0x14C62916,
+0x1320A71C,
+0xC6213AB0,
+0x51B8094E,
+0x1744B205,
+0xBA0F3FBB,
+0x1A971831,
+0x845A203,
+0xC70070CE,
+0x6BD20660,
+0x2A6DD917,
+0xD41F6AE3,
+0x6ECF186A,
+0x1981D31C,
+0xD8137FD1,
+0x89DF0D77,
+0x11F9001,
+0x9A002296,
+0x189D0221,
+0x1179D03,
+0x9B00189D,
+0x12920113,
+0x2079200,
+0x91010090,
+0x920100,
+0x9900,
+0x91000197,
+0x880101,
+0x8201,
+0x81000081,
+0xF820102,
+0x2108800,
+0x9B000A95,
+0x2A00009,
+0x9B01,
+0x89000093,
+0x8810100,
+0x3157501,
+0x73011875,
+0x1A7A011A,
+0x1148103,
+0x8D04008C,
+0xB39A200C,
+0x4CB0A12B,
+0x9534BEB5,
+0x954214,
+0x702A9D5B,
+0xA3864EA1,
+0x7EA89969,
+0xA880A9A3,
+0x9EA784A4,
+0x8195A585,
+0x9F7990A3,
+0x859A728A,
+0x657F9769,
+0x975F7893,
+0x76966176,
+0x5D769560,
+0x985B7796,
+0x76995A78,
+0x52719858,
+0x95507297,
+0x6D964B6D,
+0x49669B4C,
+0x4524344D,
+0x1E52171E,
+0x1023580B,
+0x48122462,
+0x2254121A,
+0x1B2F710E,
+0x5C1C3682,
+0x24641023,
+0x11206915,
+0x810C2166,
+0x34891535,
+0x1C2F8017,
+0x84152B7F,
+0x126A1824,
+0x11267511,
+0x97192D73,
+0x24632131,
+0x2039821E,
+0x7A2E45B2,
+0x3286252B,
+0x26278421,
+0xAD1E268B,
+0x28881C36,
+0x142EA111,
+0x931B3395,
+0x2F951B2C,
+0x2438961E,
+0x9B303797,
+0x3C992E36,
+0x20289024,
+0x77342B81,
+0x24762527,
+0x20267C22,
+0x761C2685,
+0x23681E24,
+0x25317F1D,
+0x61262778,
+0x327B2A24,
+0x292E6021,
+0x4B28417C,
+0x4C60293E,
+0x1A40432B,
+0x3C285A50,
+0x63391949,
+0x105F1D15,
+0x1609940C,
+0x84201399,
+0x11713710,
+0x6E1B6C53,
+0x56751557,
+0x18745A12,
+0x601D6254,
+0x75692155,
+0x2D9A4428,
+0x17328F16,
+0xCB2245B1,
+0x2AB62537,
+0x14318C17,
+0xB91759A9,
+0x63B60277,
+0x1D4DB307,
+0xB81729AF,
+0x43BB1238,
+0x45EBF0B,
+0xC80465CF,
+0x5CCE0E62,
+0x214BC60E,
+0xEC2D62D7,
+0x6DD41C7A,
+0x1A6BBC13,
+0xD31A73CA,
+0x84D61373,
+0x1219200,
+0x9A022293,
+0x1B9D0021,
+0x11CA002,
+0x9B001EA0,
+0x108F0014,
+0xF8C01,
+0x8D01068C,
+0x8E0001,
+0x9701,
+0x9C010099,
+0x950000,
+0x1018C00,
+0x84000089,
+0x15830103,
+0x98600,
+0x96000A8E,
+0xD9E0012,
+0x20A9F01,
+0x9401099B,
+0x68A0003,
+0x1147F00,
+0x73001778,
+0x177A0018,
+0xF8001,
+0x8E000287,
+0x1A8B0900,
+0x5FC3B534,
+0x9A37BBB7,
+0x953C2E,
+0x691E9C52,
+0x9F7F419E,
+0x71A18E5C,
+0xA278A19D,
+0x9BA77CA0,
+0x7E95A780,
+0x9F768FA3,
+0x839B6F8A,
+0x677F996B,
+0x97627C98,
+0x76966078,
+0x5E75955E,
+0x965B7597,
+0x73965573,
+0x516E9655,
+0x934E6C94,
+0x68924A6C,
+0x496A9A46,
+0x55384C70,
+0x2E6E1826,
+0x91B4A19,
+0x4A132A5E,
+0x36720A10,
+0xD2C6C0F,
+0xB3102965,
+0x1A55214F,
+0x1028720D,
+0x5F0F2574,
+0x2A790E17,
+0x223C9E1C,
+0x6820338A,
+0x1C751426,
+0x141C641B,
+0x77122770,
+0x22731C1D,
+0x1C318F1C,
+0x8E203794,
+0x24672432,
+0x28369A2B,
+0x93283CB2,
+0x2A9A1D2E,
+0x122D9816,
+0x89172DA3,
+0x2475152B,
+0x241C681D,
+0x8E1E2E7E,
+0x36A9252F,
+0x2E2C7B25,
+0x8E2D2781,
+0x287D3030,
+0x1C257C27,
+0x54272F98,
+0x276F1A18,
+0x1E236327,
+0x84212571,
+0x1F63232B,
+0x1D26581D,
+0x6A273B66,
+0x2728213A,
+0x2455631A,
+0x351D3F2F,
+0x68402455,
+0x105D282A,
+0x160E9B19,
+0x862F0989,
+0x115E3C03,
+0x76245F50,
+0x59711452,
+0x26565420,
+0x7A1D6B5D,
+0x7263295C,
+0x72B22E37,
+0x7739608,
+0xBB0D62A3,
+0x4DA7186E,
+0x215FB01A,
+0xC11999C9,
+0xBDD409B1,
+0x295FA80E,
+0xB71F2A8C,
+0x57D51147,
+0x1863E018,
+0xDB1163E4,
+0x4CC60B71,
+0x2160D72B,
+0xE12272DB,
+0x7BD8267A,
+0x1366B714,
+0xCA1466BF,
+0x80D11071,
+0x1219301,
+0x98002393,
+0x1E9D0221,
+0x11CA001,
+0x97001E9D,
+0x10920315,
+0x58B00,
+0x86000088,
+0x18C0001,
+0x1019301,
+0x9F02019B,
+0x19D0100,
+0x9401,
+0x8900008B,
+0xD870101,
+0xA8602,
+0x93011288,
+0x1B9A021E,
+0x11CA000,
+0x9C001CA0,
+0x13920111,
+0x198600,
+0x7803177B,
+0x17780118,
+0xC7C01,
+0x8B030282,
+0x8A0E01,
+0x60168A0F,
+0x9332C1C0,
+0x8D3724,
+0x5F109649,
+0x9973369B,
+0x6198814B,
+0x9C729A97,
+0x97A27699,
+0x7993A57B,
+0x9E738EA3,
+0x819B6D87,
+0x67819F69,
+0x99637C9A,
+0x79975F7B,
+0x5C74965E,
+0x96597597,
+0x6E945272,
+0x4A6D934D,
+0x93496A94,
+0x64924869,
+0x3F649042,
+0x78426391,
+0x2B6A1C3F,
+0xC1E5011,
+0x56162564,
+0x2770081F,
+0xF2F6808,
+0xB2082061,
+0x26682150,
+0x111E5C17,
+0x62141A54,
+0x25691523,
+0x18379016,
+0x801E3A84,
+0x1A6D1C2A,
+0x1A1F6F1E,
+0xA21B1F6C,
+0x246C1C28,
+0x22298316,
+0xA21F47B4,
+0x228B2A3A,
+0x1F329619,
+0x952D40B8,
+0x2D7A1F2D,
+0x16288F22,
+0x691C2C8C,
+0x248B271F,
+0x1E1A7021,
+0x8C21146B,
+0x3E9A1E1D,
+0x2E3D9F2F,
+0x7E262F85,
+0x2E7F372D,
+0x222B792B,
+0x522B2369,
+0xF4F2E28,
+0x28176121,
+0x73261C76,
+0x378E1D26,
+0x1717492F,
+0x6B331C4E,
+0x40682435,
+0x26350F16,
+0x58295462,
+0x4A152052,
+0x28705E27,
+0x27078F39,
+0x903C047C,
+0x22624C07,
+0x72193D4B,
+0x51572067,
+0x2D595E22,
+0x821F585F,
+0x83483F88,
+0x8AA3116E,
+0x1286AE0D,
+0xB30989B9,
+0x8DAD1A87,
+0x30B0C026,
+0xCC1CB1AD,
+0xEDE001DC,
+0x2686B113,
+0xC11671B8,
+0x52C10A53,
+0x1F55D210,
+0xE41E5CEA,
+0x58D21C67,
+0x363CF1A,
+0xBB046AC4,
+0x63B51761,
+0x125CAD10,
+0xBA0D66B8,
+0x79CC116E,
+0x209200,
+0x95001F91,
+0x1B9B001F,
+0x31D9D00,
+0x9800209E,
+0x6930016,
+0x2008A00,
+0x83000183,
+0x890001,
+0x2029300,
+0xA300069C,
+0x2A40000,
+0x100A002,
+0x8C000192,
+0x870000,
+0x2068500,
+0x89001686,
+0x18950117,
+0x209D00,
+0x9F0020A1,
+0x1999001C,
+0x198F01,
+0x7D011584,
+0x107B010E,
+0x57E03,
+0x8B060080,
+0x58B0D01,
+0x800891B,
+0x7E160079,
+0x7D2C00,
+0x5202893C,
+0x9064228F,
+0x54907639,
+0x92648E8C,
+0x8F99718F,
+0x708C9E71,
+0x9F6E889F,
+0x839D6C86,
+0x647E9C68,
+0x98617D9A,
+0x75965D77,
+0x5775985A,
+0x94527296,
+0x6B944C6D,
+0x496A9549,
+0x91456690,
+0x60904465,
+0x3F608C3F,
+0x903E5D8F,
+0x255D3B60,
+0x1D1B4611,
+0x631A2558,
+0x1E4F0F22,
+0x10245C06,
+0x7E1B246A,
+0x235F1831,
+0x191C5C0A,
+0x63111948,
+0x24611021,
+0x15327F11,
+0x871D39A5,
+0x1F601737,
+0x19297916,
+0x5F161660,
+0x3798111D,
+0x13226F24,
+0xA62142A8,
+0x48BE2343,
+0x223BAA28,
+0xA1253C9F,
+0x249E2B3F,
+0x2E2B7E25,
+0x85231F5D,
+0x14691D25,
+0x22198A16,
+0x67211D69,
+0x2A902C22,
+0x283DB028,
+0x883440B8,
+0x2D84243A,
+0x2A3DA12D,
+0x7628338A,
+0x19583224,
+0x29106328,
+0x50250D41,
+0x155F2413,
+0x2A247725,
+0x691A1F6F,
+0x2B752726,
+0x23374D2F,
+0x503B4215,
+0x6D6D2E42,
+0x235C152E,
+0x361A834D,
+0x7A4E0084,
+0x21534D0A,
+0x642A5F5F,
+0x545F2B5A,
+0x366D8D20,
+0x4E69746C,
+0x9D318389,
+0xC1A138B1,
+0x3CC9B22C,
+0x9F35BCA4,
+0xD2AD35C0,
+0x1FDDC93C,
+0xDE03F1D5,
+0xEEE001F7,
+0x1EB6CD0F,
+0xBA0985C3,
+0x4DC00A53,
+0x1345BE0C,
+0xC91753CC,
+0x3DB20054,
+0x46CD00D,
+0xDB177AD2,
+0x7FD82580,
+0x1374CB23,
+0xB60F6DB3,
+0x6DBA076B,
+0x11D9101,
+0x93012090,
+0x1E9B0021,
+0x21D9E00,
+0x9D031F9C,
+0x5940118,
+0x8B00,
+0x82020181,
+0x8A0002,
+0x59100,
+0xA502109A,
+0x2A60007,
+0x100A401,
+0x9202019D,
+0x8B0000,
+0x1038300,
+0x83010F85,
+0x1D8D0116,
+0x11D9300,
+0x9F00219A,
+0x1E9C001F,
+0x189302,
+0x8601128F,
+0x4830009,
+0x2038001,
+0x8C010284,
+0x18B1000,
+0x19028C11,
+0x7F170186,
+0x3762800,
+0x4700792E,
+0x895C1384,
+0x47876B32,
+0x8B57847F,
+0x89956784,
+0x6D8B9B6C,
+0x9A69839B,
+0x7B996882,
+0x607A9862,
+0x985C7696,
+0x73945A73,
+0x52719558,
+0x934C6C92,
+0x67934768,
+0x45669246,
+0x8E426290,
+0x5D8C4060,
+0x3D5E8A3E,
+0x8E3D5C91,
+0x42753B5C,
+0x181E482A,
+0x59112660,
+0x1A53141F,
+0x121D5A10,
+0x74091D5D,
+0x20601528,
+0xF1D5A0E,
+0x77122474,
+0x135E0E2E,
+0x91A5F11,
+0x950E286A,
+0x26761B3A,
+0x15177514,
+0x6B172786,
+0x3381131D,
+0x293EA619,
+0xA419328D,
+0x44A8243F,
+0x274DC723,
+0x96233DB0,
+0x308D2835,
+0x2A1A8A23,
+0x414C267C,
+0x185D3117,
+0x2D145C26,
+0x6D1E1A6C,
+0x2B7B2A1C,
+0x25318B1A,
+0xA81F368E,
+0x3D9B2E3C,
+0x1E1C6123,
+0x73373791,
+0x2A742F2B,
+0x2E1C6C32,
+0x66260A48,
+0x1B6B2313,
+0x1A114D27,
+0x442B388E,
+0x344A2418,
+0x1C36B535,
+0x16263F76,
+0x6252574F,
+0x157F773E,
+0x332C7822,
+0x633C1E70,
+0x26684424,
+0x623E664F,
+0x4C8A2946,
+0x485D8134,
+0x48BFA656,
+0x9435DBAD,
+0xEC793BD7,
+0x31F3BB33,
+0xA938F6CB,
+0xF7B830EF,
+0x8FADE0A,
+0xDD00F5DA,
+0xF7E600F3,
+0x21C1D90F,
+0xAB0E9FCE,
+0x59C90746,
+0x336B005,
+0xBF0E37B1,
+0x6BD81751,
+0x759BD00,
+0xD50D6CC4,
+0x80D61F7C,
+0x1B6CBB10,
+0xCB1986CC,
+0x84CB0D81,
+0x2138C01,
+0x95012191,
+0x1F980124,
+0x11F9902,
+0x9C001E9F,
+0x930115,
+0x8E01,
+0x80000183,
+0x2880100,
+0xE8F02,
+0x9E001794,
+0x10AA010E,
+0x9A903,
+0x990101A4,
+0x910001,
+0x8801,
+0x82000381,
+0x1B850215,
+0x11C8F02,
+0x9C031D94,
+0x239F0322,
+0x21E9500,
+0x8D001693,
+0xA8A000D,
+0x58500,
+0x8B000085,
+0x8D0101,
+0x1302880E,
+0x80160287,
+0x722101,
+0x3E01702B,
+0x7A4D0477,
+0x3D7C6420,
+0x824D7A74,
+0x818C5D7E,
+0x67829164,
+0x956A8499,
+0x7999637D,
+0x5D77975E,
+0x97587296,
+0x6E94516F,
+0x4C699050,
+0x944B6B93,
+0x64914667,
+0x40608E43,
+0x8C3F5F8E,
+0x5B8C3E5F,
+0x3A598B3C,
+0x87395987,
+0x558D365B,
+0x172E6838,
+0x5D182B6A,
+0x24610F24,
+0x51D5015,
+0x6A10296C,
+0x2A740D24,
+0x112E790E,
+0xB70A1B63,
+0x10592752,
+0x1529700C,
+0x85142583,
+0x30881331,
+0x152F8A13,
+0x791A3590,
+0x22731C27,
+0x1827771E,
+0x89143092,
+0x369D132B,
+0x253FA023,
+0xA3213BA7,
+0x2791253A,
+0x2C258F23,
+0x74351F5A,
+0x16682C18,
+0x2019872C,
+0x75221C7F,
+0x2B7A1E1C,
+0x282A8726,
+0x8D25297C,
+0x3EA11F30,
+0x2845BC23,
+0x7A202467,
+0x307A2C2D,
+0x2E297E34,
+0x5C322977,
+0x197E2D0D,
+0x3721792A,
+0x71361846,
+0x3C563F3D,
+0x735D384B,
+0x453445AB,
+0x622B2B3B,
+0x3C6E4551,
+0x382C7453,
+0x5F3C3268,
+0x2663322B,
+0x85244645,
+0x47973459,
+0x8B726C36,
+0x3DD9A942,
+0x9040E4AF,
+0xFB9144ED,
+0x2BFDCB3C,
+0xD71AFBD9,
+0xF9D118FA,
+0x2F9E202,
+0xE201F7DF,
+0xF0E200F5,
+0x15D8DF06,
+0xAD0EAAD4,
+0x50C50D46,
+0x2357D317,
+0xC80D6FDA,
+0x61CC0D5A,
+0x59BE0A,
+0xC2034FAA,
+0x6EC91666,
+0x1673C117,
+0xCD0E7FC7,
+0x89D71483,
+0xB8900,
+0x95011B8D,
+0x1D970025,
+0x1D9900,
+0x9E011E9F,
+0x3970016,
+0x1008F00,
+0x8601018A,
+0x850000,
+0x1148C01,
+0x99011391,
+0x1DA60015,
+0x17AC02,
+0xA10106A8,
+0x1960001,
+0x18C01,
+0x7F030083,
+0x127C000B,
+0x1C8300,
+0x94001D8C,
+0x20980120,
+0x209702,
+0x91011C93,
+0x1895021C,
+0x109302,
+0x9103048F,
+0x900100,
+0xF008A08,
+0x80130185,
+0x1721E00,
+0x33006825,
+0x6F420069,
+0x31705619,
+0x7642706A,
+0x75844F72,
+0x627A8E5D,
+0x96647F94,
+0x7594617C,
+0x53709759,
+0x94536F96,
+0x6891506E,
+0x4769914C,
+0x90446490,
+0x63904263,
+0x40608F42,
+0x8B3E5D8C,
+0x5B893C5C,
+0x3758883A,
+0x87385786,
+0x5A8A3658,
+0x20407137,
+0x5B0E225F,
+0x13470C22,
+0x1822590D,
+0x660E205F,
+0x1E6A1324,
+0xA236810,
+0x77091D65,
+0x3E920C27,
+0x10176715,
+0x74152777,
+0x2464101E,
+0x152D8608,
+0x90122166,
+0x1D6C1D36,
+0x19236F15,
+0x851E2F83,
+0x36931C23,
+0x1C2F9615,
+0xB822399B,
+0x207E1F41,
+0x2921721F,
+0x8933297C,
+0x1B70341F,
+0x19147526,
+0x88191F81,
+0x2C821F21,
+0x262B7B19,
+0x3E1F2985,
+0x33921513,
+0x273C9F28,
+0x82252C84,
+0x21712732,
+0x28256125,
+0x5D2B2046,
+0x30744924,
+0x4F2A8061,
+0x49603549,
+0x543F7043,
+0x70577879,
+0x6570532E,
+0x5D655960,
+0x5C5F394E,
+0x40446442,
+0x61363B62,
+0x2F524133,
+0x73386156,
+0x786D3162,
+0xB0835478,
+0x30F1BE4D,
+0x8739F4B9,
+0xF9A837DB,
+0x2AFCCF2F,
+0xDC19FBD5,
+0xF3E107FF,
+0xF4DE08,
+0xE501F8E3,
+0xEFE400F4,
+0x13DBE804,
+0xBE12AEC8,
+0x33A9195D,
+0x1C5FD114,
+0xCB1664CA,
+0x61D0115E,
+0x86BD519,
+0xC4056CCF,
+0x6BC61966,
+0x1B72C514,
+0xD11780CE,
+0x82D8217D,
+0x10A8800,
+0x95011C8C,
+0x229A011E,
+0x1229D00,
+0x9D01209F,
+0xB9A001D,
+0x9901,
+0x8A000091,
+0x850100,
+0x168600,
+0x9601138A,
+0x23A0001B,
+0x19AA01,
+0xA5010AAC,
+0x9F0000,
+0x9300,
+0x8003008A,
+0x137C0208,
+0x11A7B00,
+0x8B001984,
+0x15910017,
+0x1149202,
+0x93001B92,
+0x26950123,
+0x11E9700,
+0x96001399,
+0x8F0005,
+0x8008D00,
+0x800D0189,
+0x721701,
+0x30006720,
+0x5F370060,
+0x28634C10,
+0x6E38665D,
+0x6D7D456B,
+0x56748752,
+0x9059748A,
+0x76955B77,
+0x4E709659,
+0x904C6C93,
+0x65924C68,
+0x47669348,
+0x8E436591,
+0x5D8B3E5E,
+0x3B5C8B3D,
+0x893D5C8A,
+0x59883A5A,
+0x34588837,
+0x88345888,
+0x58873356,
+0x2C508331,
+0x560F235D,
+0xF3E111B,
+0xC24610F,
+0x61162066,
+0x22631021,
+0xF1E5918,
+0x5113266F,
+0x398C131C,
+0x17257D13,
+0x76172B8E,
+0x26711D20,
+0xE26770E,
+0x6414298A,
+0x3399161E,
+0x141F701B,
+0x8B152786,
+0x1F74212B,
+0x1628860E,
+0x891E2F95,
+0x24811C2B,
+0x2E217E25,
+0x942A217C,
+0x186B2E23,
+0x1D177521,
+0x771A2185,
+0x2A8B1726,
+0x162E8517,
+0x7F152C83,
+0x20702125,
+0x2428891D,
+0x88252C7E,
+0x2877252C,
+0x372A6622,
+0x6D522D84,
+0x395A4E25,
+0xCD805E6C,
+0x56925E61,
+0x6C60944D,
+0xA17438A1,
+0x3E80705E,
+0x603C8677,
+0x6051376A,
+0x405B5938,
+0x524D4951,
+0x4B4D653F,
+0x785B5673,
+0x895A725E,
+0xD99D5BAD,
+0x17F2C03C,
+0x8E3DF7B2,
+0xF9C432DE,
+0x17FAD229,
+0xD307FCD9,
+0xF4E610FE,
+0xF2E112,
+0xE701FAE4,
+0xF3E901F7,
+0x16D7E502,
+0xB20CB3C9,
+0x30AE3251,
+0x1D71DA1B,
+0xC40E5DC5,
+0x68DB1E56,
+0x96FE022,
+0xD41066CF,
+0x66C51A6F,
+0x1D62B919,
+0xDC267ED2,
+0x83D42687,
+0x68700,
+0x95001A8C,
+0x20990119,
+0x259C00,
+0x9C011E9E,
+0x14A0001F,
+0x1069C00,
+0x8E000198,
+0x2880001,
+0x168401,
+0x8E001789,
+0x1F9B0319,
+0x21EA601,
+0xAB0313AE,
+0xA70201,
+0x1019C01,
+0x8100008E,
+0xE7C0006,
+0x177B01,
+0x8600137E,
+0x128C0116,
+0x10E8F00,
+0x94021590,
+0x25970222,
+0x1209B01,
+0x9F011B9C,
+0xB99021A,
+0x4009101,
+0x80020088,
+0x1751300,
+0x2702661C,
+0x542D005C,
+0x1C5A4104,
+0x622F5B52,
+0x63713A61,
+0x496A7D44,
+0x8A506B82,
+0x708D5270,
+0x4D6F9252,
+0x944A6A92,
+0x65924765,
+0x43649044,
+0x8D3F608E,
+0x5B893D5E,
+0x3A58893A,
+0x86395788,
+0x58863757,
+0x32568637,
+0x85305587,
+0x54862D54,
+0x3055892E,
+0x5E193A70,
+0x19521222,
+0x12266B12,
+0x671A2473,
+0x1E58161D,
+0x15266617,
+0x700F256D,
+0x296B0E26,
+0x12328D08,
+0x62172E89,
+0x1E6F121D,
+0x111F7814,
+0x86122C81,
+0x2C8E152A,
+0x192B8813,
+0x941A2283,
+0x247A1A29,
+0x2429911E,
+0x7B233390,
+0x2B8E241E,
+0x29217329,
+0x921D1F7B,
+0x26892621,
+0x231E8322,
+0x9E1C2287,
+0x2A7F2132,
+0x1A268716,
+0x8A232C7C,
+0x226C2732,
+0x20287821,
+0x65262B91,
+0x2D8D2320,
+0x452C772C,
+0x6B59286B,
+0x3166872D,
+0x95556B84,
+0x35D78743,
+0x8C48CC87,
+0xBD8F4DCE,
+0x409E7939,
+0x5B3B836B,
+0x6B534476,
+0x5D5C4737,
+0x4F7B5E48,
+0x60517953,
+0x62835674,
+0xA74EB778,
+0xF0B13BDF,
+0x7F9B90D,
+0x9531F7AC,
+0xF9C525E0,
+0x5FDDA28,
+0xD500F9DE,
+0xF8E306FE,
+0x1EFDC13,
+0xE600FDE4,
+0xF6EB00FA,
+0x12DCE606,
+0xB30BBEC5,
+0x1D9C3569,
+0x1D5CB919,
+0xBD0E55C3,
+0x64D1194F,
+0x1257C206,
+0xE32B61CF,
+0x7BD93B7C,
+0x6397E969,
+0xE857A1EC,
+0xA1E764A2,
+0x1008B00,
+0x95000D8D,
+0x2499011B,
+0x2A9E00,
+0x9F0024A1,
+0x21A20022,
+0x19A103,
+0x9300059C,
+0x18A0000,
+0x10D8700,
+0x89001B87,
+0x19950017,
+0x120A000,
+0xB00219AC,
+0xAA020D,
+0xA301,
+0x8A000198,
+0x37E0001,
+0x1097801,
+0x82000D7D,
+0x988010F,
+0x1058C00,
+0x93010791,
+0x2596001A,
+0x279B00,
+0xA000219F,
+0x229F0022,
+0xF9601,
+0x8300018C,
+0x770700,
+0x20016713,
+0x4E29005A,
+0xE513502,
+0x58235547,
+0x5C653358,
+0x4462733B,
+0x8449667C,
+0x6A864B6B,
+0x4D6E8D4D,
+0x8C47688C,
+0x608D4262,
+0x3F608D40,
+0x8A3D5E8C,
+0x59883B5A,
+0x3A588739,
+0x87375888,
+0x56873656,
+0x31558735,
+0x87315586,
+0x53872E53,
+0x34538930,
+0x6F2B4980,
+0x236A142D,
+0x81D5A10,
+0x7313337E,
+0x1D601224,
+0x19358E11,
+0x7B0A286B,
+0x2D700D28,
+0x143A910B,
+0x80102E89,
+0x236B1627,
+0x15257414,
+0x8E1C2D87,
+0x2B900D2F,
+0xE1F6E0F,
+0x85111A75,
+0x2E971023,
+0x1B227D11,
+0xA629238F,
+0x2A812D2A,
+0x1F268721,
+0x94261F84,
+0x1F852023,
+0x26288129,
+0x97242C96,
+0x1F641E27,
+0x2121771F,
+0x60272278,
+0x247C1E1E,
+0x23257824,
+0x7E202E8E,
+0x2C812523,
+0x452E7E3E,
+0x657B377A,
+0x3E5BAC37,
+0xA6526CC0,
+0x3CD29261,
+0xA43BE8A5,
+0xDC893DEA,
+0x40B17B41,
+0x483D9561,
+0x764C3668,
+0x67694549,
+0x3A956F45,
+0x7F548B69,
+0x41B07A70,
+0xAA32DCA5,
+0xFCAB1FF4,
+0xEFEB61B,
+0xA830F5B0,
+0xFDD11EE4,
+0x5FAD413,
+0xD903FEDD,
+0xFBE600FD,
+0xF4DF04,
+0xE501F8DF,
+0xFBEB00FB,
+0x2BDDE10B,
+0xC105CFC1,
+0x30A42C9E,
+0x1254B717,
+0xB20B4BB7,
+0x5DC5133B,
+0x2A67C917,
+0xE3466FD5,
+0x91E75588,
+0x7BA6F373,
+0xF06DB3F8,
+0xB9F474B3,
+0x8A00,
+0x9302028E,
+0x2495011C,
+0x289B01,
+0xA3002B9F,
+0x22A30027,
+0x1EA501,
+0x9A0204A3,
+0x8E0100,
+0x28900,
+0x86020C85,
+0x1C8F0119,
+0x1239B01,
+0xB0011EA5,
+0x2AC0118,
+0xA900,
+0x9401019E,
+0x880000,
+0x1027E02,
+0x8001017C,
+0x830002,
+0x1008C00,
+0x8F000090,
+0x2395010E,
+0x269601,
+0xA100269E,
+0x299E0025,
+0x1D9C02,
+0x86000493,
+0x7C0000,
+0x22016C0E,
+0x4B2A005B,
+0x492B00,
+0x4D0F4F3C,
+0x575D2752,
+0x3A5A6A2F,
+0x7B3E6073,
+0x66824365,
+0x486B8546,
+0x8C496B8A,
+0x5F8B4766,
+0x3D5C8B40,
+0x893B5B8A,
+0x5585395A,
+0x34538236,
+0x88345486,
+0x55873454,
+0x30548632,
+0x862D5286,
+0x53872E53,
+0x3052862F,
+0x792F5285,
+0x296E193A,
+0x1124F06,
+0x67151D5A,
+0x1B571123,
+0x1B2B7114,
+0x84112F80,
+0x24730F2E,
+0x132F860B,
+0x78142F84,
+0x29891128,
+0x16288818,
+0x85171C70,
+0x27821028,
+0xC1E7D0E,
+0x7C16208A,
+0x3096111E,
+0x1A2D9E13,
+0x9D242BA0,
+0x1F832B2E,
+0x20237B1D,
+0x801C208B,
+0x1C871E1E,
+0x282F8D24,
+0x89222380,
+0x28951824,
+0x191E7423,
+0x7D22256E,
+0x22871F27,
+0x24217C23,
+0x77252785,
+0x245A2B25,
+0x491F643D,
+0x5E8D336B,
+0x4A64BB3F,
+0xD96E64D5,
+0x5BD1693D,
+0x9F46F6B3,
+0xD78D42E8,
+0x2ED26F39,
+0x513F9650,
+0x844B3C9D,
+0x6F895255,
+0x3D849152,
+0xAF739594,
+0x9E1B056,
+0x9D10F5B2,
+0xFD9E22FA,
+0x13FFAC17,
+0xC017EDAF,
+0xFDD805F2,
+0x3FDDA06,
+0xE400FCDC,
+0xF8E701FD,
+0x1FAE601,
+0xE303FCE6,
+0xFEEB00FA,
+0x1DE2DB1B,
+0xCA0CE2CC,
+0x4BAA2BD5,
+0xF50B51E,
+0xCE1A4AB2,
+0x5AC00D60,
+0x3B75D623,
+0xDD4982E3,
+0xA2EC5A8C,
+0x6597E152,
+0xEA669DEF,
+0xA9EE63A1,
+0x8E00,
+0x95020190,
+0x21960217,
+0x1289A01,
+0xA4012EA1,
+0x26A50030,
+0x1FA800,
+0xA0010CA7,
+0x960200,
+0x18C01,
+0x83000185,
+0x1A880016,
+0x21E9501,
+0xAB001CA0,
+0x10AF011C,
+0xCAD00,
+0x9B0201A3,
+0x8F0002,
+0x1018501,
+0x8001007F,
+0x840000,
+0x1008E00,
+0x8F01008D,
+0x12940004,
+0x1199800,
+0x9D00209A,
+0x219E0121,
+0x11E9C00,
+0x8C011398,
+0x381010D,
+0x18006F08,
+0x5126005F,
+0x4B2A01,
+0x44054C3A,
+0x51521C4E,
+0x2E525F25,
+0x77355B6D,
+0x637D3C61,
+0x43647F41,
+0x8B446582,
+0x618C4563,
+0x3A588741,
+0x86395988,
+0x56873757,
+0x36558737,
+0x86325487,
+0x50823252,
+0x2D54842D,
+0x832F5287,
+0x52873050,
+0x2C52872F,
+0x7D305387,
+0x2168303F,
+0x101E6419,
+0x520B0848,
+0x1149140E,
+0x150F5F17,
+0x8B1D2B7E,
+0x1A661631,
+0x101D6811,
+0x820F1B69,
+0x154E192F,
+0x13219313,
+0x6D0F186C,
+0x964100E,
+0x12146914,
+0x82131780,
+0x299F1C11,
+0x202E9F1E,
+0x9323309C,
+0x2E9B222E,
+0x18287F23,
+0x7D1B1E76,
+0x2089201E,
+0x211D7827,
+0x8A1C258B,
+0x29952828,
+0x2D2A801C,
+0x91172078,
+0x20871F29,
+0x1A227920,
+0x7323136A,
+0x15483A23,
+0x662A5E51,
+0x64962A44,
+0x5D56D444,
+0xE77962EB,
+0x3CFF7C46,
+0xA84AF481,
+0xDA9543F6,
+0x40C6613C,
+0x6030D863,
+0xBA6258BB,
+0x76B16E56,
+0x516DB263,
+0xD78F61B6,
+0x1F7BF1E,
+0x8F18FDB5,
+0xFC881BFC,
+0x35FA9D0B,
+0xC713DEA6,
+0xFEDA01F8,
+0x3FEDC03,
+0xE602FDE0,
+0xF1E102FD,
+0xF7E201,
+0xED01FFE9,
+0xFCEF03FF,
+0x3EAE00D,
+0xCD0BF7DF,
+0xAEAA3FD1,
+0x858B40E,
+0xCF1A39AA,
+0x6FCD1866,
+0x3689E137,
+0xEB5584D5,
+0xB3F664A6,
+0x53A1ED53,
+0xFC5E9DF3,
+0x98EA51A4,
+0x1009201,
+0x93000690,
+0x1D960210,
+0x1269A01,
+0xA2002FA1,
+0x2CA70133,
+0x125A700,
+0xA4001CAA,
+0x9D0109,
+0x8E00,
+0x7E000187,
+0x17830011,
+0x21F8E02,
+0xA3011C99,
+0x19AC021A,
+0x110AF02,
+0xA20100A9,
+0x980000,
+0x18F01,
+0x8501008A,
+0x1870100,
+0x3008E00,
+0x92000190,
+0x3940000,
+0x2119801,
+0x9A001799,
+0x1E9A021A,
+0x229901,
+0x8E001C95,
+0xC850019,
+0x10007500,
+0x59250166,
+0x4E2A02,
+0x3B014933,
+0x4C4B0A4A,
+0x2751571B,
+0x6C2E5862,
+0x5E73365B,
+0x3E617C39,
+0x8541627F,
+0x5F883F61,
+0x395A883D,
+0x85355585,
+0x54853656,
+0x32538434,
+0x88315285,
+0x52853152,
+0x2D52852E,
+0x862F5183,
+0x50833051,
+0x2A4F832B,
+0x6F2C5188,
+0x1C405341,
+0x18237255,
+0x560A125F,
+0xA531208,
+0x120A670F,
+0x6C16186A,
+0x1F64171C,
+0x111B5D18,
+0x70151964,
+0x15830B1E,
+0x1C26831C,
+0x65121F82,
+0xB5C100B,
+0x13004D1E,
+0x7E1C0E68,
+0x16811B11,
+0x1B227E15,
+0x86162583,
+0x2D95162B,
+0x202F9C19,
+0x7112166C,
+0x21861D1A,
+0x1F238927,
+0x921F135F,
+0x216C172C,
+0x292B8C24,
+0x9422349D,
+0x2D9B242E,
+0x1E1C7227,
+0x4D2B226E,
+0x105B420C,
+0x6F2F6853,
+0x43AE3E63,
+0x6066DA49,
+0xF0774CE9,
+0x49FB8A50,
+0x7534F87A,
+0xF9923BFE,
+0x41CB884A,
+0x7C4BDE9E,
+0xDA6E4AD3,
+0x6ACC6F56,
+0x7D4DDB7A,
+0xFAA716E4,
+0x1BFCBD0D,
+0x8121FD9E,
+0xFE881BFB,
+0x2AFB9E0C,
+0xD40CE4AB,
+0xFDDA02FB,
+0xFBDA00,
+0xE405FBDE,
+0xF3DD01FE,
+0x1F9E502,
+0xE800FBE3,
+0xF6EA09FF,
+0x2EEE004,
+0xDB07F7E9,
+0xB7A34FD4,
+0x18B1D62A,
+0xC71462D3,
+0x75D3256C,
+0x52AEEC56,
+0xE750AAE4,
+0xA8ED56A9,
+0x519BEA53,
+0xE85998E2,
+0xA0EA6299,
+0x1009101,
+0x93010C91,
+0x1F96010F,
+0x289A02,
+0xA5002D9E,
+0x2BA60030,
+0x2DA801,
+0xA60225AA,
+0x2A10015,
+0x19602,
+0x7F01008A,
+0x1881010E,
+0x11F8500,
+0x9C011D92,
+0x1CA7021C,
+0x214AD02,
+0xA60102AC,
+0x9E0100,
+0x2019500,
+0x8D010192,
+0x18C0001,
+0x19001,
+0x94000091,
+0x940001,
+0x1089500,
+0x99011498,
+0x2097001B,
+0x11E9401,
+0x8B001A8F,
+0x14810219,
+0xB037700,
+0x5C210069,
+0x14E2801,
+0x38014930,
+0x48450348,
+0x1E4D5011,
+0x65275358,
+0x5A6E3157,
+0x395C7636,
+0x803B5E79,
+0x5C833D60,
+0x3859863B,
+0x82345483,
+0x54853454,
+0x2F508334,
+0x87325386,
+0x51863151,
+0x2B50842D,
+0x832D5386,
+0x53832A4E,
+0x2B50832D,
+0x6E265385,
+0x3222624A,
+0x712D4B9E,
+0x5C0C1B69,
+0xB5B0D11,
+0xB0E5A08,
+0x7015126A,
+0x1A6F1B13,
+0xB1B6813,
+0x6D0E1459,
+0x1D6D171C,
+0x111A7811,
+0x65151F7E,
+0xD5A1F16,
+0x1302661A,
+0x700D0757,
+0x176F1413,
+0x1A1D8513,
+0x8C142882,
+0x278C191F,
+0x141E8916,
+0x781D227A,
+0x11671C14,
+0x25259C1B,
+0x7D1B1C81,
+0x257A261D,
+0x2E198032,
+0x9C283094,
+0x25792D33,
+0x2629881E,
+0x72210A6C,
+0x16714D0D,
+0x8132736C,
+0x48B13B58,
+0x6E49E34E,
+0xF78148F3,
+0x46FB8543,
+0x7A33FB85,
+0xFF8F35F9,
+0x39FFB634,
+0xA734E89F,
+0xE46F3AFA,
+0x36F38255,
+0x8D1BFA7E,
+0xFDA025FD,
+0x10FBA60E,
+0x7C1EF882,
+0xFB8D17FB,
+0x27F09F11,
+0xDB00E8A3,
+0xFDDC01FF,
+0x4FBDA01,
+0xE301FDE6,
+0xF8D304FE,
+0xFDE804,
+0xE700FCE7,
+0xE9E009FF,
+0x2F8E907,
+0xDB00FAE7,
+0xC2AE4FD1,
+0x23DFCE36,
+0xCC2B77C1,
+0xAFE0389B,
+0x45AAE144,
+0xEA41A6E0,
+0xA6E84BAA,
+0x56A5F153,
+0xFC65A8F5,
+0xA4F063AA,
+0x9300,
+0x93010792,
+0x1B95000C,
+0x289800,
+0xA2002F9E,
+0x30A8002E,
+0x34A902,
+0xAA0127AB,
+0x18A6011D,
+0x59D00,
+0x7F010190,
+0x157A000E,
+0x21A7C00,
+0x95002188,
+0x1C9F011C,
+0x118AB00,
+0xA60000AB,
+0xA50000,
+0x9C00,
+0x95000098,
+0x950100,
+0x9500,
+0x96000196,
+0x1970000,
+0x9600,
+0x95000496,
+0x1C960116,
+0x1168E00,
+0x85001889,
+0x1B7B0219,
+0x5087601,
+0x5D18006B,
+0x2532600,
+0x33004B2C,
+0x463E0049,
+0xF484704,
+0x5B1C5153,
+0x58652453,
+0x335B6E2E,
+0x79385E74,
+0x5D7F355D,
+0x36568037,
+0x7F335382,
+0x52833150,
+0x30508431,
+0x82304F82,
+0x4F832F4F,
+0x2A4F832C,
+0x822A4F83,
+0x5184294E,
+0x314F832F,
+0x7E2A4F89,
+0x4336544E,
+0xA43612A8,
+0x674A0D52,
+0x125E0F10,
+0xE11640A,
+0x80130C61,
+0x1560161E,
+0x1621710C,
+0x7C15217E,
+0x1C7E0E25,
+0x1B157F14,
+0x66161975,
+0x11751B16,
+0x1C188E1D,
+0x891A2593,
+0x17750F21,
+0x1A1D8C0C,
+0x9C0E1C72,
+0x1E801D1B,
+0x141D6C1A,
+0x7E261866,
+0x147A2A1A,
+0x271B771B,
+0x6A1E2568,
+0x147C271B,
+0x1E1F7C1A,
+0x88272C92,
+0x33A31F29,
+0x18208824,
+0x5D3E1771,
+0x14645310,
+0x8D1E6F7A,
+0x35BF3D4F,
+0x743EEE57,
+0xFD7F43FA,
+0x3DFF8546,
+0x823DFA7D,
+0xFE9227FB,
+0x2CFEB42F,
+0xAC27FEC6,
+0xFE9039F8,
+0x29FF812A,
+0x8B25F884,
+0xF9921EFC,
+0xFFA9410,
+0x8920F971,
+0xF88F0DFE,
+0xF1B621,
+0xD805FCCC,
+0xFCDE00FC,
+0x3FDE200,
+0xC609FCE6,
+0xFAD500E7,
+0x1FBDF00,
+0xEB01FFED,
+0xEDDF04FC,
+0xF8E301,
+0xD314FBE7,
+0xC2B63ED7,
+0x33E4D928,
+0xD650B9D1,
+0xC5DC3FCC,
+0x3BAED736,
+0xD9349AD8,
+0x97DB3A97,
+0x58A6F452,
+0xF650ADFA,
+0xA6F5509F,
+0x9500,
+0x93000093,
+0x15970208,
+0x219600,
+0x9F002E9A,
+0x32A4012F,
+0x34A801,
+0xAC0026A9,
+0x18AB0020,
+0xA9E01,
+0x83010294,
+0x77B0101,
+0xC7802,
+0x8D001B7D,
+0x1297011B,
+0x20FA202,
+0xA60200A6,
+0xA50001,
+0x29D01,
+0x9802089C,
+0x7940009,
+0x1049A01,
+0x99000099,
+0x980000,
+0x9600,
+0x91010093,
+0x10900109,
+0xF8D01,
+0x7F001584,
+0xF730215,
+0x5006C00,
+0x59170063,
+0x521F01,
+0x2F005027,
+0x4A38014C,
+0x5473F00,
+0x5413504D,
+0x575E1D52,
+0x28586626,
+0x752C5A6C,
+0x59792D5D,
+0x32547B30,
+0x7F315080,
+0x4F803050,
+0x3051852F,
+0x822C4C7F,
+0x4E812F4F,
+0x2A4F822D,
+0x862A4F82,
+0x4D822C4F,
+0x2C508429,
+0x87295183,
+0x46414750,
+0xA7351A9E,
+0x69871A2C,
+0x65F430D,
+0x10146C17,
+0x67181776,
+0x1A79190B,
+0x160D5E15,
+0x871B2981,
+0x2A8E1223,
+0x10166D0D,
+0x8D1F2991,
+0x146F1D2F,
+0x18208016,
+0x7C101867,
+0x1C7F1B1E,
+0x1B1A8215,
+0x8A0C0D64,
+0x1F771626,
+0x2A1D6A1F,
+0x592D126C,
+0x1D762A0E,
+0x2D187131,
+0x7D1F1671,
+0x22851C19,
+0x1D137228,
+0x87222389,
+0x5492726,
+0x221A5F30,
+0x5E35096A,
+0xD404A00,
+0xB9224D8C,
+0x33DC4C39,
+0x7D49FA63,
+0xFA7A3AFC,
+0x31FA823E,
+0x8D31FB7C,
+0xF9A134F8,
+0x2EFBC334,
+0xA12FFDBB,
+0xF78F3DFB,
+0x2BFC7734,
+0x8125FA7E,
+0xF9841DFD,
+0x10FA880E,
+0x9D09FD80,
+0xEB9A1FFA,
+0x4F3C70C,
+0xE002FDDA,
+0xFCE200FB,
+0xFEE803,
+0xBE0AFBE2,
+0xF7D707E3,
+0x1FCDD00,
+0xE900FCE7,
+0xF6DF00FD,
+0xFFEB04,
+0xCC19F9E9,
+0xDACB38DC,
+0x14EBD92C,
+0xE260D6E6,
+0xD4E068CB,
+0x3BA6D44B,
+0xE33A99D1,
+0x9AE63EA3,
+0x4C8FE337,
+0xFA56A4F0,
+0xA7F75AA1,
+0x79703,
+0x95000094,
+0x12950105,
+0x209602,
+0x9D002899,
+0x32A0002E,
+0x31A700,
+0xAC002AA9,
+0x1CAB0026,
+0x5A200,
+0x8B020098,
+0x7C0001,
+0x67400,
+0x80001573,
+0x138F0118,
+0x49900,
+0xA50000A1,
+0x9F0000,
+0x1039D01,
+0x9A02119B,
+0x16980216,
+0x1139B00,
+0x9F010E9C,
+0x9A0200,
+0x19902,
+0x90010097,
+0xD8E0002,
+0x10D8500,
+0x79011681,
+0x36D0015,
+0x6006602,
+0x56140159,
+0x531E00,
+0x2C025024,
+0x4D37024E,
+0x24A3D02,
+0x54084E44,
+0x55591854,
+0x26566322,
+0x6F2B5A6B,
+0x59752A58,
+0x2E51772E,
+0x7D2F507E,
+0x507E2E4F,
+0x2C4D8130,
+0x812E4F84,
+0x4E7F2E4E,
+0x294E802A,
+0x842B4F83,
+0x4F822B50,
+0x284F832A,
+0x812B5081,
+0x47563850,
+0xA0352788,
+0x48A8371E,
+0xB637819,
+0x2F02554C,
+0x77220F6F,
+0xC5F2F09,
+0x1D005B28,
+0x68290A5D,
+0x1C62281C,
+0x2425812D,
+0x851C3395,
+0x2589172C,
+0x141B7417,
+0x6D171D76,
+0x24781910,
+0x1B218C20,
+0x6B21258C,
+0x17761D1D,
+0x240F7B1D,
+0x57260D6C,
+0x18653308,
+0x341C7A35,
+0x781D0F6F,
+0x1E941915,
+0x241D801F,
+0x612E2282,
+0x75D2615,
+0x4B00502B,
+0x4F3D1C8F,
+0x2D757112,
+0xDE454AA2,
+0x3DF15A3B,
+0x733DFD6C,
+0xFC7836F8,
+0x2AF87B32,
+0x912AFC82,
+0xFBAB32FD,
+0x26F9B024,
+0xA12FF9AD,
+0xF7762CFB,
+0x21F96E25,
+0x6F22FC73,
+0xF77625F7,
+0x1DF76F0D,
+0xA705FF92,
+0xF8C210F6,
+0xFCCB03,
+0xDF01FCDD,
+0xFCE900FE,
+0x1FDE801,
+0xDD01FBDD,
+0xFEE201FA,
+0x1FDE801,
+0xE100FAE5,
+0xFDE600FC,
+0x1FEEB01,
+0xCD1AF1E4,
+0xEDD314E0,
+0x10EDD723,
+0xE728ECEE,
+0xD0F354B6,
+0x5DC2F66E,
+0xCB30A0E1,
+0x8BDA2F93,
+0x3E96E738,
+0xF7528ADD,
+0xAEF1689D,
+0x179601,
+0x94000496,
+0xE950200,
+0x1A9501,
+0x9A011D98,
+0x339F012B,
+0x33A401,
+0xAB0130A8,
+0x1FAD022A,
+0x105A500,
+0x8E00009E,
+0x810100,
+0x2027300,
+0x7800116E,
+0x16830016,
+0x59100,
+0x9B020099,
+0x1980001,
+0x19700,
+0x97001095,
+0x2497011C,
+0x3229601,
+0x9F00209B,
+0x39D000B,
+0x29A01,
+0x90000196,
+0x78F0101,
+0x78600,
+0x75020D7E,
+0x2680010,
+0xC005D07,
+0x53120254,
+0x1511800,
+0x2702511E,
+0x51350151,
+0x504000,
+0x4C035043,
+0x55540D51,
+0x1C576015,
+0x6B225766,
+0x566F2855,
+0x2B51742A,
+0x7D30517B,
+0x517E2E4F,
+0x2D52842C,
+0x802A4E83,
+0x51822B4D,
+0x284D822B,
+0x83294E81,
+0x4F832B4F,
+0x2C4E812A,
+0x83295083,
+0x4F662A4D,
+0x8932357F,
+0x26B03A20,
+0x1137A534,
+0x6407437B,
+0x5E3A014F,
+0x574108,
+0x38025251,
+0x4B45004E,
+0x176B6716,
+0x3F1F7A54,
+0x9F232F9B,
+0x288A1B30,
+0xC19811B,
+0x7B0A1C6E,
+0x186E1F1B,
+0x191A7316,
+0x82271F92,
+0x2686211E,
+0x20087B1C,
+0x52290C56,
+0x6633402,
+0x3C1A7F2F,
+0x53280F6C,
+0x188C1606,
+0x2608642B,
+0x54360961,
+0x127C3904,
+0x4810803E,
+0xB9751145,
+0x2F65431C,
+0xDB4D4ECE,
+0x43FB6E44,
+0x6E31F970,
+0xFC712FFB,
+0x23FA7728,
+0x9520FE7F,
+0xF9AA27FB,
+0x22FCAD29,
+0x7E23FA9D,
+0xFC6F29F8,
+0x23FC6923,
+0x6226F964,
+0xF8611CF9,
+0x15F7730D,
+0xB50EFAA2,
+0xF5BA06F5,
+0xFBD602,
+0xE501FBDF,
+0xFEEB02FC,
+0x3F8DB03,
+0xDD00FBD7,
+0xFDE801FD,
+0x1FBEE00,
+0xDC02FDE4,
+0xFCE500FE,
+0x5FEEB03,
+0xBF27E6DD,
+0xF0CA14DD,
+0x3F5E900,
+0xD910F3EE,
+0x9ED939A7,
+0x72A6F35A,
+0xF24FB1FD,
+0x8DDB2EA4,
+0x3883DE36,
+0xEA5089D5,
+0xAAEB6397,
+0x31E9700,
+0x93000798,
+0x7920000,
+0x1109401,
+0x94001795,
+0x2D9A0022,
+0x2329F01,
+0xA90033A5,
+0x21AD012B,
+0x8A900,
+0x9301009F,
+0x830102,
+0x1007500,
+0x6E01096D,
+0x147B0215,
+0x38500,
+0x8F00008D,
+0x910100,
+0x19402,
+0x92001093,
+0x20930116,
+0x2259603,
+0x9D01249D,
+0x1B9E0321,
+0x69F00,
+0x93000099,
+0x18C0000,
+0x8503,
+0x7001047B,
+0x1640108,
+0xF015909,
+0x5015014F,
+0x4E1701,
+0x2501501C,
+0x54330054,
+0x543F00,
+0x49005445,
+0x55520250,
+0x14555A0C,
+0x671B555F,
+0x51692053,
+0x28517023,
+0x7C2C4D77,
+0x507E2D4E,
+0x2C50802B,
+0x7E2A4D7F,
+0x4F812A4F,
+0x2A4D8329,
+0x832A4D83,
+0x4F832B4F,
+0x294E812B,
+0x852C4F81,
+0x5675224F,
+0x843B4B77,
+0x1FAD402E,
+0x3716AB37,
+0xAD3520A4,
+0x5579162B,
+0x1584000,
+0x50025142,
+0x393F004E,
+0x1F538726,
+0x6B167484,
+0x8C601A77,
+0x278F3620,
+0x27227621,
+0x681C167B,
+0x1C941A13,
+0x1D1E8922,
+0x98122381,
+0x16711D2E,
+0x271D7610,
+0x7A26106B,
+0xC801C0C,
+0x23025723,
+0x692C0867,
+0x9702D0E,
+0x290C7026,
+0x62350A6B,
+0x96E3E09,
+0x40219A3B,
+0x7A89125B,
+0x3E5D9329,
+0xE55F3CAA,
+0x3CFB7040,
+0x6E2DF56F,
+0xFB732AFC,
+0x1DF67521,
+0x9623FC81,
+0xFDA41DF9,
+0x29F9A319,
+0x721EFB84,
+0xFB691CF7,
+0x26F8641F,
+0x5F26F45F,
+0xFA6718FA,
+0x1CFB8C09,
+0xB60BEF9A,
+0xFBCB03F1,
+0x1FDDA02,
+0xE701FEE1,
+0xFCE403FC,
+0x1F5D407,
+0xE101F9D4,
+0xFCE800FD,
+0x1FFEE01,
+0xE100FEE9,
+0xFEE502FC,
+0x1AF9E900,
+0xC625D7C4,
+0xFBDD00EA,
+0xF8ED03,
+0xE304F3ED,
+0xD4EC26CA,
+0x67A4EE5E,
+0xFD718EF5,
+0x81E83590,
+0x5780DE34,
+0xDE55A6F3,
+0x8CD23591,
+0x1169601,
+0x96000597,
+0x940000,
+0x1079300,
+0x93011493,
+0x2795011E,
+0x12D9900,
+0xA6002EA1,
+0x22AB012A,
+0xBAA01,
+0x970000A2,
+0x890101,
+0x7A00,
+0x6900056D,
+0x15700213,
+0x1097900,
+0x87000E82,
+0x1870007,
+0x68900,
+0x88001A87,
+0x248C001F,
+0x1289302,
+0x99002997,
+0x209C0128,
+0x109E01,
+0x99030B9D,
+0x391000A,
+0x1008401,
+0x6E02007A,
+0x600202,
+0x10005506,
+0x4912004D,
+0x4C1800,
+0x26004E1E,
+0x552D0152,
+0x1543800,
+0x4B015643,
+0x53500157,
+0xE505206,
+0x61125058,
+0x51651853,
+0x25526C1E,
+0x792A4C73,
+0x4F7B2C4D,
+0x2E517E2D,
+0x7E2C517F,
+0x4F812A50,
+0x294D8229,
+0x82294E81,
+0x4D82294E,
+0x264C812A,
+0x852A4F81,
+0x5170274E,
+0x92464261,
+0x32721A42,
+0x3620AD41,
+0xB03919AE,
+0x54AC3524,
+0x616F0C,
+0x50015B48,
+0x5B620655,
+0x1D414D02,
+0x7C105096,
+0x636B0C6C,
+0x1A737912,
+0x5D156671,
+0x5D511678,
+0x19744618,
+0x331A8133,
+0x89272998,
+0x2A90232B,
+0x280E811E,
+0x5E301781,
+0x29A7210A,
+0x16066229,
+0x7029147E,
+0xD702109,
+0x4010692A,
+0x733D0E63,
+0xC693811,
+0x741B7146,
+0x478031A1,
+0x5D5FDE40,
+0xF07C3FCE,
+0x28F26438,
+0x6E2DF86A,
+0xF87025FB,
+0x1AFA7122,
+0x9323FA77,
+0xF99016FA,
+0x25F78914,
+0x7A1FF97B,
+0xFC701BF9,
+0x27F86D28,
+0x5617F862,
+0xFB7613F8,
+0x1DF6A325,
+0xCD01E59D,
+0xFDD603FB,
+0xFCD403,
+0xE401FEDB,
+0xF6DA03FD,
+0x1F6D404,
+0xE101FEDE,
+0xFCE700FB,
+0xFDE800,
+0xF000FEEB,
+0xFCE600FE,
+0x23F9E502,
+0xC209D9BC,
+0xF4E100E5,
+0xF9E904,
+0xCD13F4EE,
+0xCAE1048F,
+0x51CEF319,
+0xF2797AD7,
+0x70FC487C,
+0x3D71E830,
+0xF06F86D9,
+0xAFEC9BA0,
+0x1129300,
+0x96010A97,
+0x950006,
+0x1009200,
+0x91010E91,
+0x23910015,
+0x2B9502,
+0xA2012B9A,
+0x1EA70026,
+0xBA800,
+0x990000A5,
+0x8D0101,
+0x2007D00,
+0x68000471,
+0x156B0011,
+0x1157000,
+0x7E011677,
+0xD7F0017,
+0x1138000,
+0x82001D80,
+0x27840120,
+0x2278900,
+0x97002794,
+0x23960126,
+0x11B9700,
+0x9B02189B,
+0xC970119,
+0x2058C01,
+0x7101097D,
+0x610100,
+0x10025402,
+0x4911014C,
+0x4B1500,
+0x28014D20,
+0x572D0055,
+0x15A3901,
+0x4901573E,
+0x504F0056,
+0x9515001,
+0x5E0F5056,
+0x51641351,
+0x254E6820,
+0x75264D6E,
+0x4E7C2A4A,
+0x2B4E7C2C,
+0x7D2E527E,
+0x517F2D50,
+0x294E7E2A,
+0x81254E7D,
+0x4C82294E,
+0x284C8129,
+0x832C5083,
+0x4A72284F,
+0x9B45384F,
+0x406C1B3D,
+0x3D2A7A28,
+0xB3381FB1,
+0x3AB13C1E,
+0x962A638,
+0x64066D71,
+0x69851350,
+0xD637018,
+0x8605486D,
+0x36911245,
+0x3D38B631,
+0xAB2C44C4,
+0x819C1B66,
+0x1F67791D,
+0x63167585,
+0xA5432489,
+0x18892B2D,
+0x4419802D,
+0x6C3C0B67,
+0x2388210F,
+0x162AA62C,
+0x992D085C,
+0xB75311F,
+0x4B116B41,
+0x78570F69,
+0x12745811,
+0x8B1F7D6C,
+0x559C2C83,
+0x6648DE60,
+0xEA643EE9,
+0x1EEF6129,
+0x6D2AFB66,
+0xF97123FB,
+0x1BF96A1F,
+0x881FF76C,
+0xFB8217F6,
+0x1BF87F17,
+0x8923FB7B,
+0xFB7C28FB,
+0x28FB752F,
+0x5B14FC67,
+0xF87A26FC,
+0x6EDA826,
+0xD500FAC9,
+0xFDD404FB,
+0x1FED101,
+0xDB04FCD6,
+0xF8D300FC,
+0xFEDB02,
+0xE702FCE1,
+0xFDEB00FD,
+0x1FFE901,
+0xEF01FBE8,
+0xFCE901FB,
+0x9F0D801,
+0xD101EBC8,
+0xF7DF03F7,
+0xF4EA03,
+0xE801E8E5,
+0xDEE800DB,
+0x19F3FB00,
+0xBC36DDF3,
+0x59CC365C,
+0x4071F342,
+0xD84084EA,
+0x81BF3C7E,
+0x2189300,
+0x95011294,
+0x194000A,
+0x1009101,
+0x8E000290,
+0x178E0109,
+0x1219100,
+0x9B002394,
+0x1DA30020,
+0xDA500,
+0x990000A2,
+0x8E0000,
+0x1008201,
+0x6A010077,
+0x1466000C,
+0x1186C03,
+0x74001A71,
+0x16750219,
+0x147702,
+0x7B001A77,
+0x277D0121,
+0x278300,
+0x8C002688,
+0x23900125,
+0x1C9201,
+0x97011A94,
+0x1C960220,
+0x159101,
+0x73001484,
+0x1630203,
+0x10005101,
+0x49150049,
+0x4A1A00,
+0x28015021,
+0x5C2E0156,
+0x15E3900,
+0x48005A3F,
+0x514C0157,
+0x3514E01,
+0x590B4E52,
+0x50600E4E,
+0x204D651C,
+0x70234B69,
+0x4A742849,
+0x2B4D782B,
+0x7C2E4F7C,
+0x4F7E2E4F,
+0x2B4D7D2E,
+0x7F2B4D80,
+0x4C812B4C,
+0x2F4E822B,
+0x822E4F82,
+0x48752951,
+0x99403843,
+0x378E3A24,
+0x3033742C,
+0xA131288F,
+0x22A73621,
+0x2F3AAF3F,
+0x941F5BA2,
+0x5AA92343,
+0x1F60981B,
+0xA11A469B,
+0x27BB3834,
+0x452CCB46,
+0xD8472DD7,
+0x59D44130,
+0x2E60BD36,
+0xA82B59C2,
+0x74951F61,
+0x1689701F,
+0x5F1E8860,
+0xA9531C87,
+0x46D3221,
+0x2838C42F,
+0x6C3C097E,
+0x12716117,
+0x721B6D58,
+0x65810E68,
+0x1A829A24,
+0xB42B707A,
+0x4BCF4D55,
+0x5449CF4F,
+0xEB5F29DE,
+0x24F26325,
+0x6621F763,
+0xF86E21F5,
+0x21F7681D,
+0x841CF46D,
+0xFD8A15F9,
+0x1AFB8C18,
+0x9A22F783,
+0xFB882EFC,
+0x20F9742D,
+0x7623F868,
+0xF08C21FE,
+0x1F8BC05,
+0xD404FCD7,
+0xFED302FA,
+0x2FDD201,
+0xCD00FDD6,
+0xFCCB01F7,
+0xFDD903,
+0xEC01FCE4,
+0xFDEB00FF,
+0x1FDE800,
+0xED00FDE7,
+0xF9E501FC,
+0x1EFD200,
+0xDA03F8D9,
+0xFDE402FB,
+0x17FFEB01,
+0xE821DCEE,
+0xFFF828CA,
+0x1CDDDE0F,
+0xA728A1BE,
+0x62C2346A,
+0x2B69BA30,
+0xD13374C0,
+0x79BF1582,
+0x129202,
+0x95011090,
+0x694010D,
+0x19001,
+0x8A00008E,
+0x88A0100,
+0x1188D03,
+0x91031C8B,
+0x1497001B,
+0x10B9F01,
+0x980000A1,
+0x910000,
+0x8600,
+0x6E01007A,
+0x1B68010F,
+0x11B6701,
+0x6D001B6A,
+0x166F0019,
+0x1167000,
+0x72021A71,
+0x29760124,
+0x1287B00,
+0x84042680,
+0x20820129,
+0x1E8801,
+0x91011B8B,
+0x1E900023,
+0x1C8F03,
+0x7A021784,
+0x866020D,
+0xF025301,
+0x4813004A,
+0x4B1D01,
+0x28015323,
+0x622E005B,
+0x2643500,
+0x42005E3A,
+0x58480059,
+0x554A00,
+0x51074F4B,
+0x4D58094E,
+0x154A5C15,
+0x681F4B63,
+0x486E2548,
+0x2D4D7428,
+0x7B2D4D78,
+0x4C7B2C4D,
+0x2B4D7B2D,
+0x7F2C4C7D,
+0x4C7D2B4B,
+0x2E4E8129,
+0x832C4C7F,
+0x4C7B2B4F,
+0x923B3E3A,
+0x29A03621,
+0x372EA743,
+0x8B2E2D99,
+0x21A1371F,
+0x3B23B040,
+0xA8343AA9,
+0x44AD4137,
+0x2740AC2D,
+0xBB4736A2,
+0x34C84932,
+0x4435C849,
+0xD64A30D0,
+0x34D84B38,
+0x4533D345,
+0xD04928D6,
+0x3DDC5747,
+0x246AD044,
+0x78168195,
+0x6B521FA3,
+0x10B69A22,
+0xBD36441F,
+0x2D371FB5,
+0x1D638A1B,
+0x9A235991,
+0x65A3235F,
+0x425DB030,
+0xAE3967BC,
+0x38D04849,
+0x5A35D44D,
+0xF16023E6,
+0x20EF5F20,
+0x6923F164,
+0xF36926F5,
+0x23F57224,
+0x8919F17D,
+0xFB9311FB,
+0x15FD9E08,
+0xA014FEB2,
+0xF69822FB,
+0x1DF96B20,
+0x8C1EFC6F,
+0xFDB61EFA,
+0xFAC602,
+0xD904FDD8,
+0xFBD400FD,
+0x1FCD401,
+0xD304FDD5,
+0xFACE00FC,
+0x1FBD900,
+0xE900FEEB,
+0xFEEB00FB,
+0xFDE001,
+0xEC03FDE8,
+0xF5D902FE,
+0x5FAD900,
+0xE100FBD8,
+0xF9EE03FE,
+0x3EFFF100,
+0xE551C0E1,
+0xFFF65ABC,
+0x31639A20,
+0xBF2C62AD,
+0x7BD24468,
+0x257CCA41,
+0xBE1472B7,
+0x62B9156E,
+0xE8E00,
+0x8D01118C,
+0xD940113,
+0x1029200,
+0x8801008C,
+0x1850001,
+0xC8401,
+0x87011582,
+0xF8E0017,
+0x2059900,
+0x9900009D,
+0x940200,
+0x2018701,
+0x6C010078,
+0x1B670211,
+0x1D6200,
+0x6D001C67,
+0x1C6C001C,
+0x11E6D01,
+0x72041F70,
+0x23750024,
+0x277501,
+0x77002476,
+0x227C0021,
+0x1227D00,
+0x83011E7D,
+0x20850023,
+0x1F8402,
+0x76031D7D,
+0x8660014,
+0xF015702,
+0x4C14014E,
+0x14E1D00,
+0x2A005724,
+0x662F0260,
+0x663302,
+0x40016139,
+0x5944015C,
+0x584602,
+0x4A025048,
+0x4C53054D,
+0x134B5811,
+0x631B4B5F,
+0x4A6A2449,
+0x284C7126,
+0x77284770,
+0x4979284B,
+0x2A4C7A29,
+0x7D2A4C7A,
+0x4C802A4D,
+0x2B4C7D28,
+0x832C4E7E,
+0x4B832C4D,
+0x863F4235,
+0x2E98351B,
+0x462AA642,
+0xAB402AAF,
+0x22AE3F24,
+0x3E2DAB39,
+0x9A2B33AD,
+0x55910E48,
+0x458720D,
+0x88134557,
+0x41B93337,
+0x543ECC50,
+0xD34F3ED2,
+0x36C74A42,
+0x5439C63C,
+0xDA4938D8,
+0x54C62D50,
+0x3F44D140,
+0xB03463C7,
+0x48AD3255,
+0x2396C036,
+0xC3342565,
+0x43A92471,
+0x3D36A724,
+0xBE315FD0,
+0x56CE4142,
+0x5346BE32,
+0xA4285ADA,
+0x2BE5543E,
+0x5725E55B,
+0xEB5D24E1,
+0x26F66B29,
+0x6B2AF76C,
+0xEF6C2CF4,
+0x23F67B2D,
+0x9811F58F,
+0xFBA30AF9,
+0x14FCA709,
+0x9F1DFBBA,
+0xFE891EF5,
+0x2BF96A23,
+0xA033FA77,
+0xFAC01FFC,
+0x1FCD805,
+0xDA01FBDE,
+0xFEDC00FD,
+0x1FCDA02,
+0xD500F8D4,
+0xFBD900FA,
+0xFEE203,
+0xE901FDE9,
+0xFAE200FE,
+0xFEE202,
+0xE801FEE9,
+0xF2D400FB,
+0xFBD803,
+0xE200FDDF,
+0xFCEC02F8,
+0x36F5F500,
+0xFC5FA9DC,
+0xAEC92DFE,
+0x1359A91E,
+0xBF2D559E,
+0x4DB23366,
+0x1975C439,
+0xBF1971BB,
+0x5FBF166C,
+0xB8A02,
+0x86000E89,
+0x158C0115,
+0x1089301,
+0x8600018D,
+0x810000,
+0x77E01,
+0x7E010F7B,
+0x16870018,
+0xB8E00,
+0x95010294,
+0x8C0000,
+0x8402,
+0x6C010277,
+0x1A650014,
+0x2206100,
+0x68002265,
+0x20680025,
+0x11F6A00,
+0x7202236D,
+0x22730223,
+0x3207000,
+0x71002672,
+0x1F720223,
+0x3207101,
+0x73011F73,
+0x1C77001D,
+0x11C7701,
+0x6E001670,
+0x2640010,
+0x11005605,
+0x5116014F,
+0x1561A01,
+0x24015B1E,
+0x68290065,
+0x1693000,
+0x38016633,
+0x5C3C0062,
+0x1584100,
+0x49005347,
+0x4B4C014C,
+0x114A5408,
+0x60174A59,
+0x49651E49,
+0x214A6B21,
+0x70284A6F,
+0x47772748,
+0x2B4B7827,
+0x7A2C4C7A,
+0x4B7B2C4C,
+0x2E50802C,
+0x842D4E7F,
+0x4F832F4F,
+0x7740562D,
+0x2E9C3320,
+0x43329938,
+0xA83B23AB,
+0x22A73C26,
+0x331EAB3C,
+0xB44433A4,
+0x58A9323B,
+0x12667F10,
+0x951F5C7B,
+0x5B94115C,
+0x2956880C,
+0xC13B55AF,
+0x3AB63039,
+0x2C56CF3C,
+0xBC1A5AC1,
+0x61CF2C40,
+0x4B3ACE31,
+0xD75030DF,
+0x48D1513C,
+0x293CC53D,
+0xC12F2DC6,
+0x38DE3B23,
+0x4B29C22F,
+0xDA3A4EEB,
+0x44D84450,
+0x284BCB3B,
+0xD34C33BA,
+0x27DC4B24,
+0x5C27E755,
+0xEA5D27EA,
+0x27EF692B,
+0x672DF066,
+0xF4733DEE,
+0x12F28329,
+0xB60DF49D,
+0xFCB90AFB,
+0x1BFBB717,
+0x9A22F7AC,
+0xF9651AFD,
+0x31FB6825,
+0xA431FC85,
+0xFDD017F8,
+0x3FDE000,
+0xD600FCE6,
+0xFDDB00FA,
+0x2FAD601,
+0xD603F9D4,
+0xFADD00FC,
+0x1FDE802,
+0xE100FDE9,
+0xF9DC00FA,
+0x1FDE101,
+0xE801FBE6,
+0xF9D803FF,
+0xF2CC00,
+0xE903F5D7,
+0xF5EF03FD,
+0x2FD5F008,
+0xEB43DAEE,
+0x539636E3,
+0x2C60B029,
+0xB73651A7,
+0x509C3E5A,
+0x224E9C27,
+0xB81966B3,
+0x51BC1569,
+0xC8300,
+0x84011583,
+0x17850017,
+0xC8B00,
+0x8600008C,
+0x7F0200,
+0x1057700,
+0x77011076,
+0x147A0015,
+0x1138401,
+0x8D010D89,
+0x4880005,
+0x1017E00,
+0x69020A74,
+0x19610016,
+0x205C00,
+0x65012260,
+0x22660126,
+0x1226600,
+0x6A00276A,
+0x226C0022,
+0x1256B00,
+0x6801266B,
+0x22640026,
+0x1236101,
+0x67001A63,
+0x1D680018,
+0x2196900,
+0x64011266,
+0x5E0107,
+0x1300590A,
+0x56180253,
+0x591C00,
+0x25016122,
+0x6E2A0067,
+0x6D2C01,
+0x34006A2D,
+0x62390167,
+0x15B4001,
+0x45005642,
+0x4B480150,
+0x94B4D04,
+0x5A0B4852,
+0x4B601849,
+0x1B48651D,
+0x6D214668,
+0x48722647,
+0x27497327,
+0x782A4B77,
+0x4B792A4B,
+0x2D4E7C2A,
+0x7E2D4E7C,
+0x4F832F4F,
+0x66456226,
+0x229E3425,
+0x32339136,
+0xA4402E90,
+0x20A53921,
+0x2D18A73A,
+0xB3442B9B,
+0x2ABA4D31,
+0x2D4AA93B,
+0xAE3249A3,
+0x58B22A45,
+0x2339A028,
+0xB63539A6,
+0x42BC2C4B,
+0x2A53B71F,
+0xBC2650BE,
+0x33D53C2E,
+0x3A1FD53D,
+0xDA4221D2,
+0x27D64124,
+0x4416D645,
+0xD83B1BD5,
+0x2BDF451A,
+0x5132D334,
+0xD54B41E0,
+0x3AC03343,
+0x472AD94E,
+0xD94E22D8,
+0x29E6502A,
+0x5E2AEC54,
+0xEC642CEE,
+0x2EF56C33,
+0x6B44F36B,
+0xEC7737EC,
+0x17F59528,
+0xC007F7B0,
+0xF9CB09F7,
+0x11F8C708,
+0x7A1BFEB3,
+0xFB5F21F4,
+0x2DFA6824,
+0xBC3CFC8C,
+0xF9DB11F9,
+0x2FCE200,
+0xDF00FBE4,
+0xFCDA00FE,
+0x1FCD201,
+0xD501FBCD,
+0xFDE202F8,
+0x1FDE900,
+0xDD00FDE5,
+0xFCE101FA,
+0xFBE300,
+0xE301F8E0,
+0xF1CB00FC,
+0x6F4CC07,
+0xDE00F6D4,
+0xF2E905F8,
+0x23B6DD13,
+0x8845EBEB,
+0x78C7464D,
+0x3559AF19,
+0x9A4041AF,
+0x4BA7482F,
+0x1965A92C,
+0xB81B5AA6,
+0x3CB92166,
+0xF7E00,
+0x7D02187B,
+0x1E7E001F,
+0x11B8102,
+0x86001188,
+0x7D0008,
+0x27400,
+0x6F020E6F,
+0x1B730318,
+0x11C7701,
+0x83001A7D,
+0x147E0115,
+0x10F7800,
+0x6600126E,
+0x1B620017,
+0x215B00,
+0x5F001F5C,
+0x205F0025,
+0x21F6000,
+0x65012564,
+0x22650124,
+0x1256501,
+0x5E012161,
+0x1B5B011B,
+0x2115603,
+0x58000A53,
+0x155C020F,
+0x125C00,
+0x5F000E5E,
+0x5D0205,
+0x1500570B,
+0x5A180158,
+0x611C00,
+0x21006820,
+0x7223016D,
+0x742400,
+0x2F007028,
+0x63330168,
+0x5E3901,
+0x4400593F,
+0x4B420152,
+0x34D4A01,
+0x54094D4F,
+0x45580D48,
+0x1B456115,
+0x6B1D4963,
+0x476C2147,
+0x27487123,
+0x75284873,
+0x4B78284A,
+0x2C4D7C29,
+0x7C2C4D7D,
+0x50842D4D,
+0x55496D29,
+0x1298392C,
+0x27238B30,
+0x85272E81,
+0x26AE3E2C,
+0x2F1AA93B,
+0xA331239D,
+0x30B54944,
+0x4B2EB646,
+0xB0442AB4,
+0x37AF3B2C,
+0x4531BA4E,
+0xC5462BC0,
+0x2ECC4C2B,
+0x492ACB41,
+0xD34226D0,
+0x29D84226,
+0x3F1DDC43,
+0xDB411FD8,
+0x22D74024,
+0x3F26DF40,
+0xD83F20E0,
+0x31DB4627,
+0x4B34DD50,
+0xDC4C27DF,
+0x24E14F2C,
+0x4922E051,
+0xDB4A21E1,
+0x2AE35121,
+0x602BE956,
+0xEE6E37E9,
+0x45F77346,
+0x803FEF70,
+0xF49926EB,
+0x1FEFA725,
+0xCA0AF7CE,
+0xFAD602F5,
+0xCFAC500,
+0x6922FCA7,
+0xFC6F23F8,
+0x2BF97827,
+0xCF29FA9F,
+0xFCE30BFC,
+0xFCE200,
+0xE000FCDE,
+0xFBD301FD,
+0x1FDD302,
+0xDB01FBD1,
+0xFEE502FB,
+0xFCE300,
+0xDF00F9DB,
+0xFDE504FD,
+0x2FCE603,
+0xD401FBE2,
+0xF4CE03F3,
+0x1ECC901,
+0xDA00E6D0,
+0xD9DE03E5,
+0x3D4E705,
+0x555D76A3,
+0x447C2F1C,
+0x3F57B526,
+0xA94532A7,
+0x5AA6413E,
+0x1A62B11A,
+0xB1196AB3,
+0x2AA2245A,
+0x1107800,
+0x73001C74,
+0x1D77011E,
+0x217B01,
+0x7F001A80,
+0x14790016,
+0x137202,
+0x6900136A,
+0x1C6C0017,
+0x11F6F01,
+0x78001C75,
+0x15750118,
+0x156F01,
+0x61001668,
+0x1D5B011A,
+0x1F5A00,
+0x5A011D59,
+0x215C0023,
+0x225C00,
+0x5C00215B,
+0x1F5B0021,
+0x21F5902,
+0x59031B56,
+0x11540019,
+0x4015100,
+0x4A05014D,
+0x4F0600,
+0x5025408,
+0x5B060158,
+0x15B0A01,
+0x18005B11,
+0x631A025E,
+0x2671E01,
+0x26016F21,
+0x78210074,
+0x782001,
+0x28017426,
+0x6730006B,
+0x2633501,
+0x3F005D38,
+0x50410257,
+0x4D4500,
+0x4F034C4A,
+0x45550848,
+0x16445C10,
+0x6518485F,
+0x496C1B48,
+0x22456C22,
+0x7122496E,
+0x4B75274C,
+0x294B7828,
+0x792A4C79,
+0x4C7D2C4D,
+0x40497B29,
+0x15953C36,
+0x22128926,
+0x7C1D1C86,
+0x26912D29,
+0x331BA337,
+0x9B2C15A2,
+0x2FA13823,
+0x3F3DAE3E,
+0xB54741AF,
+0x3FB94836,
+0x4C30C453,
+0xC94A36C5,
+0x2ECD4533,
+0x442ACF45,
+0xD63D1BD4,
+0x1AD73C1D,
+0x3E20DC40,
+0xDB401ED8,
+0x25D63F1D,
+0x4725D844,
+0xDD4B28DB,
+0x37E34D31,
+0x4C23E353,
+0xE24A21E0,
+0x22DE4A1A,
+0x4C1DDC4A,
+0xDF491DE4,
+0x3BE65228,
+0x6C3BEE67,
+0xF57540F1,
+0x3EE7774D,
+0xB42CEB88,
+0xEDAD21F9,
+0x8F6BD23,
+0xD600F2D5,
+0xF7D101FA,
+0x1BFABC08,
+0x7022F990,
+0xF97D26FA,
+0x24FA9E22,
+0xD30FFBBB,
+0xF8E108F7,
+0x2FADB01,
+0xDF00FDDB,
+0xFCD302FC,
+0x2FFD102,
+0xE401FDD8,
+0xFAE200FC,
+0xFBD803,
+0xE200FDDB,
+0xFBE302FA,
+0x2F9E001,
+0xD603FCE3,
+0xF5D201FA,
+0x1F0D402,
+0xDE08EFDA,
+0xB1C605DE,
+0x137E8D08,
+0xA85C83AF,
+0x53822856,
+0x40498F20,
+0x7B3C36A2,
+0x61AC2B31,
+0x126EAC1B,
+0xAC1C62AF,
+0x3CA62C52,
+0x11A7100,
+0x6E011F6F,
+0x206F001E,
+0x237200,
+0x7A012079,
+0x1D76011C,
+0x11A7101,
+0x66001B6C,
+0x2167011E,
+0x236800,
+0x6E01226C,
+0x1B6C0022,
+0x1A6500,
+0x5C001762,
+0x1E56011D,
+0x11D5900,
+0x58002259,
+0x22580124,
+0x215801,
+0x56022058,
+0x1953001F,
+0x165000,
+0x52031453,
+0x652040C,
+0x1100510A,
+0x4718014A,
+0x491B00,
+0x16004C17,
+0x57150152,
+0x15B1900,
+0x19005D17,
+0x651B0062,
+0x16B2000,
+0x1F017221,
+0x7C1F0078,
+0x27B1F03,
+0x28007227,
+0x682F006E,
+0x2653400,
+0x3B006034,
+0x57410059,
+0x534401,
+0x4E004E49,
+0x47530549,
+0xF42570D,
+0x5F16485E,
+0x47661848,
+0x1F496B1D,
+0x6D1C4A6C,
+0x4C752348,
+0x25497526,
+0x78284976,
+0x4D7C2A4A,
+0x34487B2D,
+0x198E3B38,
+0x2415902E,
+0x811E1680,
+0x24832521,
+0x35219E34,
+0xA23218A3,
+0x1EA03116,
+0x3526AD3D,
+0xA03234A8,
+0x48AB3A3D,
+0x4242AA35,
+0xC04335B8,
+0x21C93F29,
+0x381ACB3D,
+0xD03819CD,
+0x20CF3A1C,
+0x3C1DD23A,
+0xD53D24D4,
+0x25D84221,
+0x4C30DC45,
+0xE24C31E3,
+0x2CE45337,
+0x4F29E04F,
+0xDF4B23E3,
+0x21E04A21,
+0x471DDF4B,
+0xE34C1FDF,
+0x3EE8572B,
+0x764AF16F,
+0xF77548FB,
+0x2AF79139,
+0xBC23F7B1,
+0xF6C219F6,
+0x1F2C612,
+0xD004F1D1,
+0xF6C100F5,
+0x19FDAC05,
+0x7B18FC84,
+0xFB981EF8,
+0x1AFBBF24,
+0xD902FBCF,
+0xFCD903FB,
+0xFBD503,
+0xDB00F9D3,
+0xFDD101FA,
+0x1FBD001,
+0xE301FEDD,
+0xFAE001FE,
+0x1FBD103,
+0xDA03F6C8,
+0xFBE400F9,
+0x4FAE101,
+0xCC01F5DB,
+0xEEC905F1,
+0x2F3DC05,
+0xD204E9DF,
+0xC5CD08CC,
+0x15C4C706,
+0xB83385B1,
+0x55AE1C64,
+0x374E981B,
+0x96393B91,
+0x64981467,
+0x1756B014,
+0xA51F5EB3,
+0x7EB44744,
+0x1276C02,
+0x66002566,
+0x23670022,
+0x1276A01,
+0x74012770,
+0x24730025,
+0x236E01,
+0x65002468,
+0x25630226,
+0x276300,
+0x66002165,
+0x21620023,
+0x205E00,
+0x5A00205E,
+0x1D57011E,
+0x1215801,
+0x57012158,
+0x1E520121,
+0x11B5000,
+0x4A011A4C,
+0xB470016,
+0x1074A02,
+0x4D08064C,
+0x4F0F02,
+0x19004D15,
+0x4721004A,
+0x482101,
+0x22004B1E,
+0x57220052,
+0x5B1F00,
+0x1F006120,
+0x691F0065,
+0x701C02,
+0x1D01741C,
+0x7D1E0078,
+0x7C1E00,
+0x25007723,
+0x6A2A0172,
+0x16A3300,
+0x36026734,
+0x5A3E005F,
+0x1594001,
+0x48005345,
+0x484D024B,
+0xB445407,
+0x5E0C4659,
+0x4962114B,
+0x16486515,
+0x6C1C4A6A,
+0x4D711A4C,
+0x214D7420,
+0x76234C75,
+0x4C79244A,
+0x2B4C7D2A,
+0x1C73414F,
+0x25129F37,
+0x7D22178D,
+0x2C7A2923,
+0x31278E31,
+0xAB392999,
+0xEA02D14,
+0x3815A832,
+0xAE351BB1,
+0x2BB43A22,
+0x4324B63D,
+0xB8381CBD,
+0x18C2341A,
+0x371AC233,
+0xCC381ACA,
+0x23CC3C21,
+0x3F24CD3C,
+0xD54229D2,
+0x30DC4730,
+0x4B33DE4A,
+0xE04A2FDF,
+0x28DF4A2A,
+0x4822E04C,
+0xDC4923DB,
+0x24DC4823,
+0x4F25DF4B,
+0xE54F24E6,
+0x40ED6031,
+0x763FF576,
+0xF8772CFA,
+0x14FEA827,
+0xC517F6C2,
+0xF7C512F6,
+0x3F2C109,
+0xC501F2C4,
+0xF1AF13F1,
+0x19F39117,
+0x961CF884,
+0xFDB619FB,
+0x11F9BE16,
+0xDE02FBD4,
+0xF8D506FB,
+0x2FAD201,
+0xD000FDD1,
+0xFDD201FB,
+0xFBD401,
+0xDC00FDDC,
+0xF8D801FC,
+0x1F6C602,
+0xD700F8C5,
+0xFAE201F8,
+0x2F5DF02,
+0xC402EFCF,
+0xE9C103EA,
+0x2EDD101,
+0xD603E3DE,
+0xD1DB05D3,
+0x7BFCC00,
+0xBF0AB3C6,
+0x81B91496,
+0x2B3BA122,
+0x9C1D4F99,
+0x5E9A136E,
+0x2957AA1B,
+0xAF3A5FB6,
+0x91B74F64,
+0x2C6E01,
+0x61022A63,
+0x24640129,
+0x2256500,
+0x6C01296B,
+0x296D0029,
+0x12A6B01,
+0x64002969,
+0x255F0028,
+0x1285F02,
+0x60002462,
+0x1F5E0121,
+0x215B00,
+0x58001F5B,
+0x1C57001C,
+0x3235703,
+0x52022156,
+0x1A4E001F,
+0x2174A02,
+0x44071244,
+0x443020B,
+0xD004606,
+0x4A140249,
+0x14A1A00,
+0x1F004B1C,
+0x4C23014E,
+0x4B2201,
+0x25005022,
+0x5D290158,
+0x622601,
+0x26026927,
+0x6B22016A,
+0x702000,
+0x1F017321,
+0x791E0075,
+0x1781D01,
+0x2201781F,
+0x6F2B0073,
+0x6D2F01,
+0x34016A32,
+0x60390165,
+0x5E3E00,
+0x48015743,
+0x4A480150,
+0x6445202,
+0x5B0D4859,
+0x4D5E0A49,
+0x104A5D0B,
+0x6C175066,
+0x4D6B164F,
+0x1E4D6E1A,
+0x73214D71,
+0x49752349,
+0x254B7A25,
+0x255E4461,
+0x28179F3B,
+0x89261791,
+0x1D872F1D,
+0x2B24812D,
+0x93342E81,
+0x11A1351F,
+0x3417A32F,
+0xB23717AE,
+0x19B73A16,
+0x4A1CBD3F,
+0xC54320C8,
+0x19BD361C,
+0x361BBC33,
+0xCB3B21C3,
+0x22CA3F28,
+0x432BCA3D,
+0xDA4C38D0,
+0x32DA463D,
+0x422CCE37,
+0xDA4626D5,
+0x22DA4621,
+0x4620D944,
+0xDB4824D8,
+0x27DC4A25,
+0x4D26E44C,
+0xEB5529E7,
+0x37EE6030,
+0x7B32F56A,
+0xF9872CF6,
+0xFFDAE1A,
+0xBB0FF9BB,
+0xF5BF10F6,
+0xDF0B30D,
+0xB309F2B0,
+0xED9720EE,
+0x1BF4812A,
+0xA314FA91,
+0xFAC31EF9,
+0x6FAD216,
+0xDD01FAD7,
+0xFAD804FC,
+0xFAD601,
+0xCE0CFAD0,
+0xFBD104FF,
+0x1FDDC00,
+0xD300FEDD,
+0xFDD804F7,
+0xF6C501,
+0xE002F7C7,
+0xF8E204F9,
+0x3F5E105,
+0xBE01F1D3,
+0xE9C101E7,
+0x1E9D103,
+0xDD04DED5,
+0xBDC504DB,
+0x6ABC102,
+0xC704AABA,
+0xA9D105AD,
+0x4883C712,
+0x8D2B4D79,
+0x569E1979,
+0x3C4CA52F,
+0xBD4D6DA3,
+0x85B74997,
+0x386F00,
+0x60002E66,
+0x2760012A,
+0x2246100,
+0x6B012B69,
+0x2F6A002D,
+0x2306A03,
+0x65002F66,
+0x2C64002D,
+0x12A6201,
+0x5D01295F,
+0x225B0027,
+0x1225B01,
+0x5702205C,
+0x1E59021D,
+0x11F5603,
+0x4E012150,
+0x164A001C,
+0x4104402,
+0x3F060543,
+0x1430A02,
+0x1500440E,
+0x4A190247,
+0x4B1E00,
+0x25004E21,
+0x52260153,
+0x2532601,
+0x28005425,
+0x622B0059,
+0x1692801,
+0x2B006B27,
+0x6E26006E,
+0x6F2500,
+0x25017125,
+0x72230073,
+0x742300,
+0x26007623,
+0x6F270071,
+0x6F2D00,
+0x34006D31,
+0x65330269,
+0x1603800,
+0x4300593F,
+0x4C440152,
+0x3485202,
+0x59054655,
+0x4C5D044B,
+0x104D6009,
+0x64114D62,
+0x51661250,
+0x164F6814,
+0x6E1C4E6E,
+0x486F204A,
+0x204D751F,
+0x2D4C4564,
+0x2C169640,
+0x8D281591,
+0x1B8D2E17,
+0x2E178731,
+0x882E1F88,
+0x1497341D,
+0x32179C2F,
+0xAC3719A4,
+0x1BB13819,
+0x3B19B93C,
+0xC54423BD,
+0x24BD3B22,
+0x3722BD39,
+0xC43822C1,
+0x31CB4133,
+0x3E32CB41,
+0xBF292BCF,
+0x2EC32D2F,
+0x4222C83A,
+0xD4431ECE,
+0x20D4411A,
+0x4421D743,
+0xD5421DD7,
+0x1CD5411A,
+0x4E24DD44,
+0xF4522DE8,
+0x28F36D2F,
+0xA120F885,
+0xF6AE1DF5,
+0xEF7AF13,
+0xB214FCB2,
+0xF7AA14F7,
+0x1DF79919,
+0x8314F18F,
+0xEC7C14F6,
+0x29F78B2D,
+0xBD16F1A1,
+0xF9C211F7,
+0x7F8D90F,
+0xD603F8DB,
+0xFAD602F9,
+0x2FAD802,
+0xCE0FFBD3,
+0xFED80BFB,
+0xFDDE00,
+0xD401FDDD,
+0xF8CE02F9,
+0x3F7C102,
+0xE001FBCF,
+0xF5DB01F9,
+0x1F6D903,
+0xC104EAC7,
+0xE4C002ED,
+0x2E2D102,
+0xCC02E0D7,
+0xB0C304C5,
+0x3AABE04,
+0xA9039FBB,
+0x8CB4077B,
+0x4A7AA30E,
+0x7D355489,
+0x8A8C367F,
+0x5190B650,
+0xC84E9DB8,
+0xA2C549B8,
+0x1447300,
+0x6601376B,
+0x2464002E,
+0x246700,
+0x6A002967,
+0x306C012D,
+0x2326A01,
+0x64003167,
+0x2F63002E,
+0x1296201,
+0x5D002A61,
+0x245A0026,
+0x2235801,
+0x55032357,
+0x1B51021F,
+0x4184D01,
+0x4C041C4A,
+0x104C0317,
+0x70B4704,
+0x420D0145,
+0x411000,
+0x1A004215,
+0x4B1D0146,
+0x2522201,
+0x24015523,
+0x59270057,
+0x5C2701,
+0x2A005C28,
+0x652A005F,
+0x36B2A00,
+0x2B006B28,
+0x6F2A006F,
+0x712A00,
+0x28006E25,
+0x6E28016F,
+0x702600,
+0x2A007129,
+0x6F290070,
+0x6E2C00,
+0x30016E31,
+0x66310069,
+0x1603701,
+0x3F00583A,
+0x4C430152,
+0x1474D00,
+0x58034550,
+0x4B5B054A,
+0xA4F5F03,
+0x610B4F5F,
+0x51630E51,
+0x1050650E,
+0x6C15516C,
+0x4A6D164E,
+0x1D4A721D,
+0x343B4868,
+0x331C9042,
+0x932E1A99,
+0x138D2611,
+0x34198E2A,
+0x9F341598,
+0x1AA03517,
+0x2D12A538,
+0xA9321A9D,
+0x1DAF361C,
+0x3919B738,
+0xBF401FB8,
+0x23BD3B1F,
+0x3420BA39,
+0xC13928BB,
+0x2FB83129,
+0x2F21B632,
+0xC63A29BB,
+0x1BCA3E27,
+0x431ACA41,
+0xD7451FD1,
+0x1ED74420,
+0x3F1BD543,
+0xD83F1CD5,
+0x23DA411D,
+0x5127DE46,
+0xEF6B28DE,
+0x14F59528,
+0xB20DF6B1,
+0xF7B210F4,
+0x10F8B114,
+0xA51AF8A8,
+0xF38517F9,
+0x23F36E20,
+0x7620ED6F,
+0xF0841AF3,
+0x2DF09522,
+0xBD14FBC3,
+0xF6D70FF3,
+0x4F9DB06,
+0xDA03FADB,
+0xFAD600FB,
+0xFBD300,
+0xD900FCCE,
+0xFBDE00FB,
+0xFEE301,
+0xD202FBD9,
+0xFACA03FB,
+0x2F7C201,
+0xE201FCCE,
+0xF7D901FE,
+0x5F4C601,
+0xB60BE9B9,
+0xE2B703EC,
+0x1E6D700,
+0xC701D6D8,
+0xBBC702C3,
+0x8A6BD04,
+0xB10FABCE,
+0x4CA0156F,
+0x54398B31,
+0x9E49477E,
+0x58983B5A,
+0x53A3BF58,
+0xC14CB8C5,
+0xA9C33FB5,
+0x4B7701,
+0x6E003F71,
+0x2569002D,
+0x1236700,
+0x69012D6A,
+0x366B0034,
+0x3A6C00,
+0x67003768,
+0x32640036,
+0x22A6201,
+0x5F012B62,
+0x275B0029,
+0x2275500,
+0x4F012853,
+0x1F4B0321,
+0x5184703,
+0x47041746,
+0xA4A060E,
+0xC094E0B,
+0x4A11004D,
+0x1471601,
+0x1F03481D,
+0x531F004D,
+0x561D01,
+0x26005C22,
+0x6125015F,
+0x622700,
+0x28006029,
+0x68280166,
+0x1682C02,
+0x29006A28,
+0x6D2A006C,
+0x6E2C00,
+0x2A006C29,
+0x6C2A006C,
+0x6B2900,
+0x2C01702B,
+0x702F0170,
+0x6F2F01,
+0x32006E31,
+0x6831006B,
+0x5F3401,
+0x3F01583A,
+0x4C410153,
+0x1484C00,
+0x5603464F,
+0x4D5A0549,
+0x14F5C04,
+0x5C02505D,
+0x505F0451,
+0xC526207,
+0x67094D62,
+0x4E6B124D,
+0x1A4A6E1A,
+0x3C2A4B6A,
+0x351C7E41,
+0x952C1692,
+0x14912715,
+0x2D198923,
+0x9B361C8B,
+0x1BA7371A,
+0x3418AB3F,
+0xA22D15A2,
+0x1CAA331C,
+0x331DAD35,
+0xB5371DB0,
+0x1DB83B1E,
+0x3B1ABA39,
+0xB73717BB,
+0x16B9351A,
+0x3415BE34,
+0xCA3F18C2,
+0x1ECB421C,
+0x4320CD43,
+0xD1431CD0,
+0x1DD7441E,
+0x3F1FD541,
+0xD73F1ED6,
+0x2ADE4824,
+0x6A34E555,
+0xEC8528E6,
+0x17E49218,
+0xB113EAA4,
+0xF4B712F5,
+0x14F2B30B,
+0x7E1FF79B,
+0xF86417F6,
+0x19F35A14,
+0x8B1BEF67,
+0xF4A421F0,
+0x20F3A71F,
+0xD417F5BF,
+0xEFD906F7,
+0x2F7DA01,
+0xD204F7D6,
+0xFDD206F8,
+0xFCD207,
+0xDF01F7CA,
+0xFDE201FA,
+0x2FDDE00,
+0xCF01FAD4,
+0xF5C401F9,
+0x1F9CA03,
+0xDC00F8D0,
+0xFED905FA,
+0x5FBBD02,
+0xBA03FCC4,
+0xDFAB18ED,
+0x8E0C712,
+0xC902CFD3,
+0xADBE05BA,
+0x3A6BA01,
+0xAF06A1BF,
+0x8AB4198F,
+0x55508846,
+0x9A4372A5,
+0x4C9C2F6D,
+0x484FA63B,
+0x974C8B8A,
+0xD1B45FAF,
+0x14B7E00,
+0x75004579,
+0x256B0034,
+0x286A02,
+0x69003168,
+0x3C6C003A,
+0x3E6E01,
+0x6B013E6E,
+0x3566023B,
+0x2D6401,
+0x5D01295E,
+0x2D5B012B,
+0x3305801,
+0x4C013150,
+0x1F490228,
+0x41D4603,
+0x470A1845,
+0x44A0910,
+0xD034C0D,
+0x510E0050,
+0x501601,
+0x1C004F1A,
+0x5A1E0055,
+0x15E1F00,
+0x25015C22,
+0x62270060,
+0x642700,
+0x2800622A,
+0x68260164,
+0x1682B00,
+0x27006929,
+0x6B28006B,
+0x6A2601,
+0x2A016B28,
+0x6D2C006D,
+0x6D2C00,
+0x31006C2E,
+0x722F016F,
+0x733100,
+0x35007333,
+0x6A330071,
+0x1623502,
+0x3E005A39,
+0x4E410152,
+0x1494B00,
+0x5202474F,
+0x48570247,
+0x4F5804,
+0x5B035159,
+0x505D0151,
+0x4525E02,
+0x6305525E,
+0x4D630A50,
+0x134C6811,
+0x431F4A69,
+0x381F7946,
+0x922C1490,
+0x12922815,
+0x23129224,
+0x85291A85,
+0x1D9B341E,
+0x3F1CAF40,
+0xA3371AAB,
+0x15A23417,
+0x3118A62F,
+0xAD341BA8,
+0x1FB4381B,
+0x3D1DBC3D,
+0xBF401FBE,
+0x18BB3318,
+0x3B1AC138,
+0xCB401DC7,
+0x21CF451E,
+0x471ED145,
+0xD3461ED1,
+0x1DD9481E,
+0x3F1DD53E,
+0xDE4A27D5,
+0x38E4552F,
+0x743AE961,
+0xEB891FEC,
+0x15E98D19,
+0xA314DE92,
+0xEFA813E3,
+0x17F7A914,
+0x6D18FB87,
+0xF16219F0,
+0x21F36F18,
+0xA229F276,
+0xEFB91CF5,
+0x1CF3BB21,
+0xDE15ECB8,
+0xF1D405F7,
+0x1F8DB03,
+0xCB0AF8D9,
+0xFDCC0FF3,
+0x7F7CA0E,
+0xE000F6D6,
+0xFBDC00FA,
+0x1F8DA02,
+0xD203F5D1,
+0xFBCB02FD,
+0x2FDCC02,
+0xDC02F9D7,
+0xF3C103FB,
+0x2FBB901,
+0xD500FABF,
+0xEFC70BFF,
+0xEE0BD13,
+0xBE06D4BB,
+0xAEB602C9,
+0x96AF05,
+0xB2119FC2,
+0x887D3094,
+0x4CB67B56,
+0x9041A575,
+0x62A22688,
+0x3A54AC30,
+0x991F559C,
+0xA3A54758,
+0x24A8302,
+0x79004482,
+0x2B710032,
+0x12E6E02,
+0x69013C6A,
+0x496B0046,
+0x1486E00,
+0x6C004770,
+0x3A670140,
+0x1316400,
+0x5C003064,
+0x355C0031,
+0x3A5A01,
+0x4F013652,
+0x274D0031,
+0x3204A02,
+0x48062249,
+0xA4B0815,
+0x1004500B,
+0x58100154,
+0x591901,
+0x1D00591B,
+0x6020025C,
+0x1622301,
+0x26005F26,
+0x62270062,
+0x1652900,
+0x2B016428,
+0x662B0063,
+0x652C01,
+0x28006529,
+0x66260469,
+0x682702,
+0x2C016629,
+0x692A0169,
+0x16B2A01,
+0x2E006B2E,
+0x6F2F016C,
+0x713300,
+0x32017432,
+0x6C320072,
+0x653801,
+0x3F025C38,
+0x4E400052,
+0x1494700,
+0x4D02474C,
+0x4A520145,
+0x4D5300,
+0x54015057,
+0x4E5A004F,
+0x14F5B00,
+0x5E004E5A,
+0x4E5E014F,
+0xC4D6408,
+0x480B4B67,
+0x44276A49,
+0x94351B93,
+0x14922A15,
+0x2810942A,
+0x8B231093,
+0x208E2715,
+0x4321A738,
+0xAD4223AE,
+0x1DA93B21,
+0x341CAA37,
+0xAD351BA9,
+0x1DAE3319,
+0x3C21B73B,
+0xC03F25BA,
+0x1ABC3C1B,
+0x471FC242,
+0xCE4822CB,
+0x2AD04629,
+0x4624D146,
+0xD44525D0,
+0x25D74925,
+0x522FD746,
+0xE35936DE,
+0x38E66235,
+0x873BEC75,
+0xED8E27F0,
+0x1CED8C17,
+0x811DEA85,
+0xE36C1CE6,
+0x1EE6591C,
+0x881EF072,
+0xF98D22F5,
+0x1FF8901D,
+0xAB21F594,
+0xF3BE23F4,
+0x18F1CE20,
+0xD410F2CC,
+0xF5D20CF1,
+0x7EFCA0D,
+0xD00FF7D6,
+0xF5C611F8,
+0x2FBD60E,
+0xE100F7E1,
+0xF8DC01F7,
+0x4F5D200,
+0xC802F9CE,
+0xFACC00F7,
+0x1F9CA00,
+0xD701F7D4,
+0xF6C802F7,
+0x1F6BC00,
+0xCD03F8C0,
+0xFCE300F7,
+0x8F7DF06,
+0xB306E2C8,
+0xCBB804D5,
+0x9C4C601,
+0xA71BA1BC,
+0xA1874580,
+0x42CA714E,
+0x5D42C45D,
+0x96813DB8,
+0x246A6D23,
+0x8E2A558E,
+0x448B1C4B};
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h
new file mode 100644
index 000000000..7bf7180f9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/ft6x06_conf.h
@@ -0,0 +1,40 @@
+/**
+ ******************************************************************************
+ * @file ft6x06_conf.h
+ * @author MCD Application Team
+ * @brief This file contains specific configuration for the
+ * ft6x06.c that can be modified by user.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef FT6X06_CONF_H
+#define FT6X06_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Macros --------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+#define FT6X06_AUTO_CALIBRATION_ENABLED 1U
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* FT6X06_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h
new file mode 100644
index 000000000..3223b8679
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/main.h
@@ -0,0 +1,122 @@
+/**
+ ******************************************************************************
+ * @file DCMI/DCMI_CaptureMode/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MAIN_H
+#define MAIN_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "string.h"
+#include "stdlib.h"
+#include "stdio.h"
+#include "stm32g4xx_hal.h"
+#include "stm32g474e_eval_errno.h"
+#include "stm32g474e_eval_conf.h"
+#include "stm32g474e_eval.h"
+#include "stm32g474e_eval_bus.h"
+#include "stm32g474e_eval_idd.h"
+#include "stm32g474e_eval_lcd.h"
+#include "stm32g474e_eval_audio.h"
+#include "stm32g474e_eval_sd.h"
+#include "stm32g474e_eval_qspi.h"
+#include "stm32g474e_eval_sram.h"
+#include "stm32g474e_eval_env_sensor.h"
+
+#include "LCD/stm32_lcd.h"
+
+/* Exported variables --------------------------------------------------------*/
+extern SRAM_HandleTypeDef hSramHandle;
+extern const unsigned char stlogo[];
+extern uint32_t SdmmcTest;
+extern volatile uint8_t mfx_exti_received;
+extern uint32_t ButtonState;
+extern __IO uint32_t UserButtonPressed;
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+ int32_t (*DemoFunc)(void);
+ uint8_t DemoName[50];
+} BSP_DemoTypedef;
+
+typedef enum {
+ AUDIO_ERROR_NONE = 0,
+ AUDIO_ERROR_NOTREADY,
+ AUDIO_ERROR_IO,
+ AUDIO_ERROR_EOF,
+}AUDIO_ErrorTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* The Audio file is flashed with ST-Link Utility @ flash address = AUDIO_SRC_FILE_ADDRESS */
+#define AUDIO_SRC_FILE_ADDRESS 0x08023000 /* Audio file address in flash */
+
+/* LCD Frame Buffer address */
+#define LCD_FRAME_BUFFER 0xC0000000 /* LCD Frame buffer of size 800x480 in ARGB8888 */
+#define AUDIO_REC_START_ADDR 0x08024000
+
+#define SD_DMA_MODE 0U
+#define SD_IT_MODE 1U
+#define SD_POLLING_MODE 2U
+#define SD_BLOCK_LEN 512U
+
+/* Exported macro ------------------------------------------------------------*/
+#define COUNT_OF_EXAMPLE(x) (sizeof(x)/sizeof(BSP_DemoTypedef))
+
+/* Exported functions ------------------------------------------------------- */
+void LCD_demo (void);
+void Joystick_demo(void);
+int32_t AudioPlay_demo (void);
+int32_t AudioPlay_demo2 (void);
+void REC_INSTANCE1_HDMI_demo(void);
+void REC_INSTANCE1_SingleBuff_demo(void);
+void REC_INSTANCE1_MultiBuff_demo(void);
+void REC_INSTANCE1_Mute_demo(void);
+void REC_INSTANCE1_SetDevice_demo(void);
+
+//void AudioChangeDevice_demo (void);
+int32_t AudioRec_demo (void);
+int32_t AudioRecAnalog_demo (void);
+
+int32_t Led_demo(void);
+int32_t Button_demo(void);
+int32_t Pot_demo(void);
+int32_t Bus_demo(void);
+#if (USE_BSP_IO_CLASS == 1)
+int32_t Joy_demo(void);
+int32_t Io_demo(void);
+int32_t Idd_demo(void);
+int32_t Lcd_demo(void);
+#endif
+int32_t Com_demo(void);
+int32_t SRAM_demo(void);
+int32_t QSPI_demo(void);
+int32_t SD_demo(void);
+
+void Error_Handler(void);
+uint32_t CheckResult(void);
+void StartTest(void);
+uint8_t CheckForUserInput(void);
+uint8_t AUDIO_Process(void);
+
+void ButtonPendingCallback(void);
+
+void Error_Handler(void);
+
+#endif /* MAIN_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h
new file mode 100644
index 000000000..6b7085c79
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/mt25ql512abb_conf.h
@@ -0,0 +1,72 @@
+/**
+ ******************************************************************************
+ * @file mt25ql512abb_conf_template.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the MT25QL512ABB QSPI memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT(c) 2019 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef MT25QL512ABB_CONF_H
+#define MT25QL512ABB_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx.h"
+#include "stm32g4xx_hal.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+#define CONF_QSPI_ODS MT25QL512ABB_EVCR_ODS_30 /* MT25QL512ABB Output Driver Strength */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MT25QL512ABB_CONF_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h
new file mode 100644
index 000000000..4617f7d08
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stlogo.h
@@ -0,0 +1,577 @@
+__ALIGN_END const unsigned char stlogo[9174]=
+{
+0x42,0x4d,0xd6,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x28,0x00,
+0x00,0x00,0x50,0x00,0x00,0x00,0x39,0x00,0x00,0x00,0x01,0x00,0x10,0x00,0x03,0x00,
+0x00,0x00,0xa0,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x98,0xb5,0xa9,0x08,
+0x4b,0x29,0x27,0x00,0xd2,0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x7f,0xd7,0x5f,0xc7,0x1e,0xb7,0x9f,0xdf,0x3f,0xc7,0x5f,0xc7,0x3e,0xc7,0x3f,0xc7,
+0x5f,0xc7,0xff,0xff,0xdf,0xf7,0xbe,0x9e,0xbe,0xa6,0xff,0xff,0xff,0xff,0xff,0xf7,
+0x9e,0x96,0xff,0xff,0xff,0xff,0xff,0xff,0xd6,0x9c,0x14,0x84,0xdc,0xde,0xfa,0xc5,
+0xff,0xff,0xff,0xff,0xb5,0x9c,0x34,0x8c,0x3a,0xce,0x3d,0xef,0xa9,0x08,0x34,0x8c,
+0xd6,0x9c,0x1a,0xce,0x04,0x00,0xff,0xff,0xb8,0xbd,0xff,0xff,0xff,0xff,0xf9,0xc5,
+0xff,0xff,0xff,0xff,0x98,0xb5,0xbf,0xff,0xff,0xff,0x37,0xad,0xf3,0x7b,0xfd,0xe6,
+0xff,0xff,0xdc,0xde,0xdc,0xde,0xff,0xff,0xff,0xff,0x99,0xb5,0xff,0xff,0x9c,0xd6,
+0xdc,0xde,0xff,0xff,0xff,0xff,0x57,0xad,0xf3,0x7b,0xdc,0xde,0xff,0xff,0xff,0xff,
+0xdf,0xff,0x14,0x84,0x95,0x94,0xfd,0xe6,0x1a,0xc6,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xde,0xae,0xdb,0x14,0xdd,0x5d,0x1e,0xbf,0xfb,0x1c,0x5d,0x7e,0x9e,0x96,0xdb,0x14,
+0x9e,0x96,0xdf,0xf7,0xbb,0x04,0x7d,0x8e,0x3d,0x76,0xbb,0x04,0xff,0xff,0x3d,0x7e,
+0xbb,0x04,0x3d,0x7e,0xff,0xff,0xc9,0x10,0xcd,0x31,0xf3,0x73,0x07,0x00,0x06,0x00,
+0xff,0xff,0xc9,0x10,0x2d,0x3a,0x51,0x63,0x04,0x00,0x54,0x84,0x13,0x84,0x89,0x00,
+0xf3,0x7b,0x0a,0x11,0x06,0x00,0xd8,0xbd,0x06,0x00,0xff,0xff,0xff,0xff,0x06,0x00,
+0xff,0xff,0xff,0xff,0x05,0x00,0xbc,0xde,0x0d,0x3a,0x2a,0x19,0xd3,0x73,0x05,0x00,
+0x78,0xb5,0xb2,0x6b,0x51,0x6b,0xff,0xff,0xff,0xff,0x03,0x00,0xdf,0xff,0x0e,0x3a,
+0xb2,0x73,0xff,0xff,0x0d,0x3a,0x0a,0x11,0x14,0x7c,0x05,0x00,0x77,0xad,0xff,0xff,
+0x06,0x00,0x10,0x5b,0xf0,0x5a,0x04,0x00,0x4b,0x21,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x1c,0x25,0x5f,0xdf,0xff,0xff,0x3a,0x2d,0xdf,0xff,0xff,0xff,0x1c,0x25,
+0xff,0xff,0x1d,0x76,0x9e,0x96,0xff,0xff,0xff,0xff,0xff,0xae,0x5f,0xd7,0xff,0xff,
+0x7e,0x86,0xff,0xff,0x98,0xb5,0x88,0x08,0xff,0xff,0xff,0xff,0x5d,0xef,0x07,0x00,
+0x7e,0xef,0x06,0x00,0xff,0xff,0xff,0xff,0x11,0x5b,0x51,0x6b,0x06,0x00,0xff,0xff,
+0xff,0xff,0xff,0xff,0x05,0x00,0x1a,0xc6,0x27,0x00,0xff,0xff,0xff,0xff,0x69,0x08,
+0xff,0xff,0xff,0xff,0x27,0x00,0x37,0xa5,0x07,0x00,0xff,0xff,0xdf,0xff,0x3a,0xce,
+0xab,0x31,0x14,0x84,0xb2,0x73,0xff,0xff,0xff,0xff,0x06,0x00,0xff,0xff,0xaf,0x52,
+0x34,0x84,0x3a,0xce,0x06,0x00,0xff,0xff,0xdf,0xff,0xf9,0xc5,0x8b,0x31,0x12,0x5b,
+0x10,0x5b,0xff,0xff,0xff,0xff,0x95,0x94,0x4b,0x21,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xfc,0x1c,0x5f,0xd7,0xff,0xff,0x3b,0x2d,0xbf,0xef,0xff,0xff,0xfb,0x1c,
+0xff,0xff,0xfc,0x6d,0xbd,0x4d,0xfd,0x5d,0x1e,0x66,0x5c,0x2d,0xfd,0x65,0xff,0xff,
+0xff,0xff,0xff,0xff,0xd6,0x9c,0x4e,0x3a,0xff,0xff,0xff,0xff,0xff,0xff,0x07,0x00,
+0x5e,0xef,0x48,0x00,0xff,0xff,0xff,0xff,0x13,0x84,0x6e,0x4a,0x28,0x00,0xff,0xff,
+0xff,0xff,0xff,0xff,0x68,0x08,0xf9,0xbd,0x48,0x00,0xff,0xff,0xff,0xff,0x68,0x08,
+0xff,0xff,0xff,0xff,0x48,0x00,0x53,0x84,0x28,0x00,0x0a,0x11,0xca,0x10,0x0a,0x11,
+0x06,0x00,0x92,0x6b,0x14,0x84,0xff,0xff,0xff,0xff,0x05,0x00,0xff,0xff,0xaf,0x52,
+0x75,0x8c,0xb9,0xbd,0x07,0x00,0x2a,0x19,0xca,0x10,0x0a,0x11,0xa9,0x08,0x8b,0x29,
+0x74,0x8c,0xff,0xff,0xff,0xff,0x57,0xa5,0x4b,0x19,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x1c,0x25,0x5f,0xd7,0x7f,0xdf,0xfb,0x1c,0xdf,0xf7,0x1e,0xb7,0x1c,0x25,
+0x3f,0xc7,0x7f,0xd7,0x1c,0x25,0x3f,0xcf,0xde,0xae,0xfc,0x1c,0xbf,0xef,0xff,0xff,
+0xff,0xff,0xff,0xff,0xbf,0xff,0x05,0x00,0xd6,0x94,0xdc,0xde,0xed,0x31,0x07,0x00,
+0x5e,0xef,0x07,0x00,0xff,0xff,0xff,0xff,0xb2,0x73,0x14,0x7c,0x6b,0x21,0xf0,0x5a,
+0xbb,0xde,0xf3,0x7b,0x04,0x00,0x1a,0xc6,0x06,0x00,0x98,0xb5,0xf6,0x9c,0x05,0x00,
+0xb5,0x94,0x19,0xc6,0x04,0x00,0xff,0xff,0x47,0x00,0x37,0xa5,0x5e,0xef,0x4e,0x42,
+0xef,0x5a,0x74,0x8c,0x27,0x00,0x9b,0xd6,0xb5,0x94,0x07,0x00,0x5d,0xef,0xcd,0x31,
+0xaf,0x52,0x7b,0xd6,0x68,0x00,0xf6,0x9c,0x5d,0xef,0x2e,0x42,0x11,0x5b,0xfc,0xe6,
+0x06,0x00,0x1a,0xc6,0xf9,0xc5,0xa9,0x08,0xac,0x29,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xfb,0x1c,0x7f,0xdf,0x7d,0x8e,0xfd,0x65,0xdf,0xff,0xdd,0x5d,0x1b,0x25,
+0x5e,0x86,0xff,0xff,0x5f,0xcf,0x9c,0x45,0xfd,0x6d,0xbf,0xe7,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x3d,0xe7,0x2b,0x19,0x48,0x00,0xb2,0x73,0x2e,0x42,
+0x7e,0xf7,0xec,0x39,0xff,0xff,0xff,0xff,0xb5,0x9c,0xb5,0x94,0xff,0xff,0x8e,0x4a,
+0x48,0x00,0xef,0x52,0x0d,0x3a,0x7a,0xd6,0x0d,0x3a,0x4a,0x19,0x2b,0x19,0x5a,0xce,
+0x2b,0x21,0x68,0x00,0x19,0xc6,0xff,0xff,0x9e,0xf7,0x4a,0x19,0x68,0x00,0xb2,0x73,
+0xff,0xff,0xd5,0x9c,0xf0,0x5a,0x89,0x00,0x2b,0x21,0xde,0xf7,0x77,0xb5,0x89,0x00,
+0xea,0x10,0xd3,0x7b,0xff,0xff,0xed,0x31,0x68,0x00,0x91,0x6b,0xff,0xff,0xff,0xff,
+0xd9,0xbd,0x89,0x00,0xc9,0x10,0x51,0x63,0x6c,0x29,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x9e,0x96,0xdc,0x0c,0x3f,0xcf,0xff,0xff,0x1c,0x1d,0xff,0xff,0xff,0xff,0x3c,0x25,
+0x1c,0x6e,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x4f,0x42,
+0xf3,0x7b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x37,0xa5,0xa9,0x08,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x3f,0xcf,0xde,0xa6,0xdf,0xf7,0xff,0xff,0x1e,0x76,0xff,0xff,0xff,0xff,0xdf,0xf7,
+0xbd,0x9e,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x39,0xce,
+0xbb,0xd6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xde,0xd8,0xbd,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x14,0x54,0xf0,0x22,0x72,0x3b,
+0x72,0x33,0x72,0x3b,0x71,0x33,0x72,0x3b,0x72,0x33,0x51,0x2b,0x7b,0xbe,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x92,0x3b,0x51,0x33,0x72,0x3b,
+0x71,0x33,0xd3,0x43,0x37,0x85,0x3e,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb9,0x9d,0x0d,0x02,
+0x6d,0x12,0x6d,0x0a,0x8e,0x12,0x6e,0x0a,0x8e,0x0a,0x6e,0x02,0xf0,0x1a,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x95,0x64,0x6e,0x02,0x8f,0x0a,
+0xaf,0x12,0x8e,0x0a,0x8e,0x0a,0x2e,0x02,0x92,0x3b,0x5d,0xe7,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfa,0xa5,
+0x4e,0x02,0xaf,0x12,0xaf,0x12,0xd0,0x12,0xaf,0x12,0xd0,0x12,0x4e,0x02,0x7b,0xbe,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5e,0xe7,0x4e,0x02,0xf0,0x12,
+0xf0,0x12,0xf0,0x1a,0xd0,0x12,0xf0,0x12,0xaf,0x0a,0x0d,0x02,0xf9,0xb5,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x54,0x5c,0x6e,0x02,0xcf,0x12,0xcf,0x12,0xd0,0x12,0xcf,0x12,0xaf,0x12,0xd2,0x43,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x92,0x3b,0xcf,0x0a,
+0xf0,0x1a,0xf0,0x12,0xf0,0x1a,0xf0,0x12,0xf0,0x12,0xf0,0x12,0xab,0x01,0x9b,0xc6,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x8f,0x0a,0xcf,0x12,0xf0,0x1a,0xf0,0x12,0xf0,0x1a,0xf0,0x12,0x6f,0x02,
+0x5e,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5b,0xbe,0xb0,0x0a,
+0x11,0x1b,0x11,0x1b,0x11,0x13,0x11,0x1b,0x10,0x13,0x11,0x1b,0xf0,0x12,0xd0,0x0a,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xb2,0x3b,0xd0,0x0a,0xf0,0x12,0xf0,0x1a,0xf0,0x12,0x11,0x1b,0xd0,0x0a,
+0xd6,0x74,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xaf,0x12,
+0x31,0x1b,0x11,0x13,0x11,0x1b,0x11,0x13,0x31,0x1b,0x10,0x13,0x11,0x1b,0xb0,0x02,
+0xfb,0x95,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3a,0xb6,0x51,0x2b,0x92,0x3b,0xb2,0x3b,
+0x92,0x3b,0xb2,0x3b,0x92,0x3b,0xb2,0x3b,0x92,0x3b,0xb3,0x3b,0x92,0x3b,0xb2,0x3b,
+0x92,0x3b,0xb2,0x3b,0x92,0x3b,0xb2,0x3b,0x92,0x3b,0xb2,0x3b,0x92,0x3b,0xb2,0x3b,
+0x92,0x3b,0x92,0x3b,0x34,0x5c,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x98,0x95,0xaf,0x02,0x11,0x1b,0x11,0x13,0x31,0x1b,0x11,0x1b,0x32,0x1b,
+0x0c,0x02,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0x84,
+0xaf,0x0a,0x52,0x1b,0x31,0x1b,0x32,0x1b,0x31,0x1b,0x32,0x1b,0x11,0x1b,0xf1,0x12,
+0x57,0x24,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xef,0xcc,0x01,0x0c,0x1a,0x0b,0x12,
+0x0c,0x1a,0x0b,0x12,0x0c,0x1a,0x0c,0x12,0x2c,0x1a,0x2c,0x12,0x4d,0x12,0x4d,0x12,
+0x6d,0x12,0x6d,0x0a,0x8e,0x12,0x8e,0x0a,0x8f,0x0a,0x8f,0x0a,0xaf,0x12,0xaf,0x0a,
+0xd0,0x12,0xd0,0x0a,0x6f,0x02,0xd9,0x9d,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x19,0xb6,0x6f,0x02,0x11,0x13,0x31,0x1b,0x31,0x13,0x32,0x1b,0x31,0x13,
+0x8f,0x02,0x57,0x95,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9e,0xf7,
+0x4e,0x02,0x52,0x13,0x52,0x1b,0x31,0x13,0x52,0x1b,0x31,0x13,0x32,0x1b,0x11,0x13,
+0x53,0x0b,0x1e,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x92,0x3b,0x0c,0x1a,0x4d,0x22,
+0x2c,0x1a,0x4d,0x22,0x4c,0x1a,0x6d,0x22,0x6d,0x1a,0x8e,0x1a,0x6d,0x1a,0x8f,0x1a,
+0x8e,0x12,0xaf,0x1a,0xaf,0x12,0xcf,0x12,0xcf,0x12,0xd0,0x12,0xf0,0x12,0x10,0x1b,
+0xf0,0x12,0x11,0x13,0x2d,0x02,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x1a,0xae,0xaf,0x02,0x32,0x1b,0x32,0x1b,0x52,0x1b,0x32,0x13,0x53,0x1b,
+0x52,0x13,0xf1,0x0a,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x54,0x4c,0x32,0x13,0x52,0x1b,0x73,0x1b,0x52,0x1b,0x52,0x1b,0x52,0x13,0x52,0x1b,
+0x11,0x13,0xdb,0x85,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbb,0xc6,0xcb,0x01,0x2c,0x1a,
+0x4d,0x22,0x4c,0x1a,0x4d,0x1a,0x4d,0x1a,0x6e,0x1a,0x6d,0x12,0x8e,0x1a,0x8e,0x12,
+0xaf,0x1a,0xae,0x12,0xcf,0x12,0xaf,0x12,0xd0,0x12,0xcf,0x12,0xf0,0x1a,0xf0,0x12,
+0xd0,0x0a,0x4d,0x12,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xd7,0x54,0x11,0x13,0x31,0x13,0x52,0x1b,0x52,0x13,0x52,0x1b,0x52,0x1b,
+0x53,0x1b,0x12,0x03,0x1e,0xcf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x1d,0xd7,0x12,0x03,0x73,0x1b,0x52,0x1b,0x73,0x1b,0x52,0x1b,0x53,0x1b,0x52,0x13,
+0x32,0x13,0xd4,0x1b,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x0c,0x0a,0x2c,0x22,
+0x4c,0x1a,0x4d,0x22,0x4d,0x1a,0x6d,0x1a,0x6d,0x1a,0x8e,0x1a,0x8e,0x1a,0xaf,0x1a,
+0xae,0x12,0xcf,0x12,0xcf,0x12,0xd0,0x12,0xd0,0x12,0xf1,0x1a,0x10,0x1b,0xb0,0x0a,
+0xae,0x2a,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xf6,0x13,0x11,0x13,0x52,0x1b,0x52,0x13,0x73,0x1b,0x53,0x1b,0x73,0x1b,
+0x73,0x1b,0x53,0x1b,0x19,0x55,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x98,0x34,0x53,0x13,0x93,0x23,0x73,0x1b,0x73,0x23,0x73,0x1b,0x73,0x1b,
+0x52,0x1b,0x53,0x13,0xfb,0x8d,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x57,0x8d,0xcb,0x09,
+0x4d,0x22,0x4d,0x1a,0x6d,0x1a,0x6d,0x12,0x8e,0x1a,0x8e,0x12,0xaf,0x1a,0x8e,0x12,
+0xaf,0x12,0xaf,0x12,0xd0,0x12,0xcf,0x12,0xf0,0x12,0xf0,0x12,0x8f,0x02,0x71,0x3b,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x7c,0xae,0x73,0x23,0x73,0x2b,0x73,0x23,0x93,0x2b,0x93,0x23,0x94,0x2b,0x93,0x23,
+0x94,0x23,0x73,0x13,0xf5,0x23,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x7c,0xae,0x94,0x13,0x73,0x13,0x94,0x1b,0x73,0x1b,0x93,0x1b,0x73,0x1b,
+0x73,0x1b,0x32,0x13,0x74,0x03,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x4e,0x02,
+0x2c,0x1a,0x6d,0x1a,0x6d,0x1a,0x8e,0x1a,0x8e,0x1a,0xae,0x1a,0x8e,0x12,0xaf,0x12,
+0xaf,0x12,0xd0,0x12,0xf0,0x1a,0x11,0x23,0x11,0x23,0xf1,0x1a,0x96,0x64,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9f,0xef,
+0x76,0x4c,0xb3,0x33,0xd4,0x3b,0xf5,0x3b,0xd4,0x3b,0xf5,0x3b,0xf5,0x3b,0x15,0x3c,
+0xf5,0x3b,0x16,0x3c,0xf5,0x33,0x3c,0xa6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0x76,0x3c,0x74,0x13,0x94,0x13,0xb4,0x1b,0x93,0x1b,0x94,0x23,
+0x73,0x1b,0x73,0x23,0x12,0x03,0x5b,0xae,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd7,0x5c,
+0x2c,0x12,0x4d,0x1a,0x6e,0x1a,0x6d,0x12,0x8e,0x12,0x8e,0x12,0xcf,0x1a,0xef,0x22,
+0x31,0x33,0x51,0x33,0x71,0x3b,0x51,0x33,0x32,0x23,0x79,0x7d,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5e,0xdf,0x36,0x3c,
+0x93,0x33,0xb4,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf4,0x33,0xf5,0x3b,0xf5,0x3b,
+0x16,0x3c,0x15,0x3c,0xf5,0x3b,0xf6,0x2b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0x5c,0xa6,0xd5,0x2b,0xd5,0x2b,0xb4,0x1b,0xb4,0x1b,0x93,0x13,
+0x94,0x1b,0x73,0x1b,0x73,0x1b,0xf0,0x12,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xdf,
+0xb0,0x02,0x4d,0x1a,0x8e,0x1a,0xcf,0x2a,0xef,0x32,0x31,0x3b,0x30,0x33,0x51,0x3b,
+0x31,0x33,0x52,0x3b,0x31,0x33,0x53,0x23,0x3c,0x9e,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xce,0xb5,0x23,0xb4,0x33,
+0xd4,0x33,0xf5,0x3b,0xd4,0x3b,0xf5,0x3b,0xf5,0x3b,0x16,0x3c,0x15,0x3c,0x36,0x3c,
+0x16,0x3c,0x36,0x44,0x36,0x3c,0xd5,0x2b,0x3b,0xae,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xf6,0x2b,0x16,0x3c,0x36,0x44,0x16,0x3c,0x16,0x3c,
+0xd4,0x2b,0xb4,0x23,0x94,0x13,0x4f,0x02,0xdc,0xd6,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xf8,0x5c,0x8e,0x2a,0xf0,0x32,0xef,0x32,0x10,0x33,0x10,0x33,0x31,0x33,0x30,0x33,
+0x51,0x33,0x10,0x33,0xb4,0x2b,0xbd,0xb6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x5b,0xae,0x53,0x1b,0xb4,0x3b,0xd4,0x33,
+0xf4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x3b,0x15,0x3c,0x15,0x3c,0x16,0x3c,0x16,0x3c,
+0x36,0x3c,0x36,0x3c,0x37,0x3c,0x36,0x34,0xd4,0x3b,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xb7,0x54,0x16,0x34,0x16,0x3c,0x36,0x3c,0x15,0x3c,
+0x16,0x3c,0x15,0x3c,0x15,0x3c,0x94,0x1b,0xb1,0x5b,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x1e,0xcf,0x52,0x33,0xcf,0x32,0x10,0x3b,0x10,0x33,0x31,0x33,0x30,0x33,0x51,0x3b,
+0x31,0x33,0x93,0x33,0xbd,0xb6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x99,0x95,0x11,0x13,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,
+0xf5,0x3b,0x15,0x3c,0x15,0x3c,0x16,0x3c,0x16,0x3c,0x36,0x3c,0x36,0x3c,0x57,0x3c,
+0x37,0x3c,0x57,0x3c,0x57,0x3c,0x78,0x44,0x73,0x23,0xdc,0xce,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x1d,0xdf,0x94,0x23,0x57,0x44,0x36,0x3c,0x37,0x3c,
+0x16,0x3c,0x36,0x3c,0x15,0x3c,0x36,0x44,0xaf,0x1a,0xdf,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xb6,0x5c,0xae,0x2a,0x10,0x33,0x30,0x33,0x10,0x33,0x51,0x33,0x31,0x33,
+0x11,0x33,0x59,0x75,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xd6,0x7c,0xf1,0x12,0xd4,0x3b,0xd4,0x33,0xf4,0x3b,0xd4,0x33,
+0xf5,0x3b,0xf5,0x33,0x16,0x3c,0x16,0x3c,0x36,0x3c,0x36,0x3c,0x57,0x3c,0x37,0x3c,
+0x57,0x3c,0x57,0x3c,0x77,0x3c,0x57,0x3c,0x57,0x3c,0xd2,0x53,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x51,0x33,0x57,0x3c,0x57,0x3c,0x36,0x3c,
+0x37,0x3c,0x16,0x3c,0x36,0x3c,0x15,0x3c,0xb4,0x2b,0x77,0x95,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xdd,0xbe,0x10,0x33,0x10,0x33,0x10,0x33,0x31,0x3b,0x31,0x33,0x51,0x3b,
+0x72,0x33,0xfe,0xc6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0x13,0x64,0xf1,0x22,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xd5,0x3b,0x15,0x3c,
+0xf5,0x3b,0x16,0x3c,0x16,0x3c,0x36,0x3c,0x36,0x3c,0x57,0x44,0x57,0x3c,0x78,0x3c,
+0x57,0x3c,0x78,0x44,0x77,0x44,0x78,0x44,0x98,0x44,0xf0,0x22,0xbf,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x97,0xa5,0xb5,0x2b,0x77,0x3c,0x57,0x3c,
+0x37,0x3c,0x57,0x44,0x36,0x3c,0x36,0x3c,0x16,0x34,0xb3,0x43,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xd4,0x3b,0xcf,0x2a,0x30,0x33,0x30,0x33,0x51,0x33,0x31,0x33,
+0xb4,0x33,0xdf,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x2f,0x3b,0x11,0x23,0xd4,0x3b,0xb3,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x33,
+0x16,0x3c,0x15,0x3c,0x36,0x3c,0x36,0x3c,0x57,0x3c,0x57,0x3c,0x77,0x3c,0x57,0x3c,
+0x77,0x44,0x77,0x44,0x98,0x44,0x77,0x44,0x98,0x4c,0x15,0x34,0xd5,0x84,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x8e,0x1a,0x98,0x44,0x57,0x3c,
+0x57,0x3c,0x36,0x3c,0x57,0x3c,0x16,0x3c,0x36,0x3c,0xb4,0x33,0xdc,0xce,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0x9a,0x75,0xf0,0x32,0x30,0x33,0x51,0x33,0x51,0x33,0x52,0x3b,
+0xb4,0x2b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x95,0x74,
+0x11,0x23,0xb4,0x3b,0xb4,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x3b,0x16,0x3c,
+0x16,0x3c,0x36,0x3c,0x36,0x3c,0x57,0x3c,0x57,0x3c,0x78,0x3c,0x77,0x3c,0x78,0x44,
+0x77,0x44,0x98,0x4c,0x97,0x44,0x98,0x4c,0x98,0x4c,0xb8,0x4c,0xf3,0x43,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x74,0x74,0x57,0x3c,0x78,0x44,
+0x77,0x3c,0x77,0x3c,0x37,0x3c,0x37,0x3c,0x36,0x3c,0x16,0x34,0xf7,0x6c,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0x5e,0xdf,0x12,0x1b,0x30,0x33,0x31,0x33,0x51,0x33,0x51,0x33,
+0x94,0x2b,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x98,0x95,
+0x32,0x23,0x72,0x2b,0x93,0x2b,0x93,0x2b,0xb4,0x33,0xb4,0x2b,0xd5,0x33,0xd5,0x2b,
+0xf5,0x33,0xf5,0x2b,0x16,0x34,0x16,0x34,0x37,0x3c,0x36,0x34,0x57,0x3c,0x56,0x3c,
+0x57,0x44,0x56,0x3c,0x77,0x44,0x77,0x44,0x97,0x4c,0x77,0x44,0x56,0x44,0x9b,0xb6,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x9e,0xf7,0x11,0x1b,0x16,0x34,
+0x16,0x34,0x16,0x2c,0x16,0x34,0x16,0x34,0x16,0x34,0xf5,0x2b,0x36,0x3c,0x7e,0xe7,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x57,0x44,0x10,0x33,0x51,0x3b,0x51,0x33,0x72,0x3b,
+0x32,0x23,0x9f,0xef,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x1d,0xd7,0xdd,0xc6,0xdc,0xc6,0xdd,0xc6,0xdc,0xc6,0xdd,0xce,0xdc,0xc6,0xfd,0xce,
+0xdc,0xc6,0xfd,0xce,0xdd,0xce,0xfd,0xce,0xfd,0xc6,0xfd,0xce,0xfd,0xce,0xfd,0xce,
+0xfd,0xce,0xfd,0xce,0xfd,0xce,0xfd,0xce,0xfd,0xce,0xfd,0xce,0xdd,0xc6,0xbf,0xef,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3d,0xe7,0x3a,0xb6,
+0x5a,0xbe,0x9b,0xc6,0x9b,0xc6,0xbc,0xc6,0xdc,0xc6,0xfd,0xce,0xdd,0xc6,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0x3b,0xa6,0x11,0x23,0x31,0x33,0x52,0x3b,0x52,0x33,
+0x52,0x2b,0xb9,0x95,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x52,0x23,0x51,0x33,0x51,0x33,0x72,0x3b,
+0x72,0x33,0x93,0x33,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x37,0x85,0x10,0x23,0x72,0x3b,0x72,0x33,
+0x93,0x3b,0x31,0x23,0xf7,0x7c,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xd0,0x1a,0x72,0x33,0x73,0x3b,
+0x92,0x33,0xb3,0x3b,0xd0,0x1a,0x78,0x95,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xd2,0x4b,0x52,0x33,0x72,0x33,
+0x93,0x3b,0x93,0x33,0xd4,0x3b,0xf0,0x1a,0x91,0x4b,0x7e,0xef,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0xd6,0x6e,0x12,0x93,0x3b,
+0x93,0x33,0xb3,0x3b,0xb3,0x33,0xd4,0x3b,0xb4,0x33,0x8f,0x12,0xef,0x2a,0x94,0x74,
+0x36,0x95,0x57,0x9d,0x36,0x95,0x57,0x9d,0x36,0x95,0x56,0x95,0x36,0x95,0x36,0x95,
+0x36,0x95,0x36,0x95,0x36,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x16,0x8d,0x36,0x95,
+0x16,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x16,0x95,0x36,0x95,0x36,0x95,0x36,0x95,
+0x36,0x95,0x36,0x95,0x36,0x95,0x57,0x9d,0x36,0x95,0x57,0x9d,0x56,0x95,0x57,0x9d,
+0x56,0x95,0x57,0x9d,0x56,0x95,0x57,0x9d,0x57,0x9d,0x77,0x9d,0x57,0x9d,0x77,0x9d,
+0x77,0x9d,0x57,0x95,0xbe,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xb1,0x53,0x11,0x2b,
+0x93,0x3b,0x92,0x33,0xb3,0x3b,0xb3,0x33,0xd4,0x3b,0xf5,0x33,0x16,0x3c,0xd4,0x2b,
+0x94,0x2b,0x93,0x23,0xb4,0x2b,0xb4,0x2b,0xb5,0x2b,0xb4,0x2b,0xd5,0x33,0xd5,0x33,
+0xf5,0x3b,0xf5,0x33,0x15,0x3c,0x15,0x3c,0x35,0x44,0x35,0x44,0x56,0x4c,0x55,0x4c,
+0x76,0x4c,0x75,0x4c,0x96,0x54,0x76,0x54,0x96,0x54,0x76,0x54,0x76,0x54,0x56,0x4c,
+0x76,0x4c,0x55,0x44,0x56,0x4c,0x35,0x44,0x36,0x44,0x15,0x3c,0x15,0x3c,0xf5,0x33,
+0xf5,0x3b,0xf5,0x33,0xf5,0x33,0xd5,0x2b,0xd5,0x2b,0xb4,0x2b,0xb4,0x2b,0x93,0x2b,
+0x94,0x2b,0x32,0x1b,0xf6,0x84,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x30,0x33,
+0x52,0x2b,0x93,0x3b,0xb3,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x3b,0x16,0x3c,
+0x16,0x3c,0x57,0x3c,0x57,0x3c,0x78,0x44,0x77,0x3c,0x98,0x44,0x98,0x44,0xb8,0x4c,
+0xb8,0x4c,0xd9,0x54,0xd8,0x54,0xf9,0x5c,0xf8,0x5c,0x19,0x65,0x19,0x65,0x39,0x65,
+0x39,0x65,0x59,0x6d,0x59,0x6d,0x7a,0x75,0x59,0x6d,0x59,0x75,0x39,0x6d,0x39,0x6d,
+0x19,0x65,0x19,0x65,0xf8,0x5c,0xf9,0x5c,0xd8,0x54,0xd9,0x54,0xb8,0x54,0xb8,0x4c,
+0x98,0x4c,0x98,0x4c,0x77,0x44,0x78,0x44,0x57,0x3c,0x57,0x44,0x36,0x3c,0x36,0x3c,
+0x15,0x3c,0xf6,0x3b,0x72,0x33,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0x74,0x64,0x11,0x23,0x93,0x33,0xb3,0x33,0xd4,0x3b,0xd4,0x33,0xf5,0x3b,0xf5,0x33,
+0x16,0x3c,0x16,0x34,0x37,0x3c,0x57,0x3c,0x77,0x3c,0x57,0x3c,0x98,0x44,0x97,0x44,
+0x98,0x4c,0x98,0x4c,0xd8,0x54,0xd8,0x54,0xf8,0x5c,0xf8,0x5c,0x19,0x65,0x18,0x5d,
+0x39,0x65,0x39,0x6d,0x59,0x6d,0x59,0x6d,0x59,0x6d,0x39,0x6d,0x39,0x6d,0x18,0x65,
+0x19,0x65,0xf8,0x5c,0xf9,0x5c,0xd8,0x54,0xd8,0x54,0xb8,0x54,0xb8,0x4c,0x97,0x44,
+0x98,0x4c,0x77,0x44,0x78,0x44,0x57,0x3c,0x57,0x3c,0x16,0x3c,0x36,0x3c,0x15,0x34,
+0xf5,0x3b,0xd4,0x33,0xb4,0x33,0x7b,0xb6,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xdc,0xce,0xb6,0x64,0x93,0x33,0x93,0x2b,0xb4,0x33,0xb4,0x33,0xd5,0x33,
+0xd4,0x33,0xf5,0x33,0xf5,0x33,0x16,0x34,0x16,0x34,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x36,0x3c,0x56,0x44,0x56,0x44,0x77,0x4c,0x76,0x4c,0x97,0x4c,0x96,0x4c,0x97,0x54,
+0x97,0x54,0xb7,0x54,0xb7,0x54,0xd8,0x5c,0xb7,0x54,0xd7,0x5c,0xb7,0x54,0xb8,0x54,
+0x97,0x54,0x97,0x54,0x97,0x4c,0x97,0x4c,0x77,0x4c,0x97,0x4c,0x77,0x44,0x77,0x44,
+0x56,0x44,0x77,0x44,0x56,0x3c,0x57,0x3c,0x36,0x3c,0x36,0x3c,0x16,0x3c,0x36,0x3c,
+0x15,0x3c,0x15,0x3c,0xd4,0x33,0x18,0x6d,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7e,0xef,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x3d,0xdf,0x5d,0xdf,0x3d,0xdf,0x3e,0xe7,0x3d,0xdf,0x3d,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,0x5e,0xdf,0x3d,0xdf,
+0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,0x5e,0xe7,0x5d,0xdf,0x5e,0xe7,0x5e,0xdf,
+0x7e,0xe7,0x5e,0xdf,0x7e,0xe7,0x5e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,
+0x7f,0xe7,0x7e,0xe7,0x7e,0xe7,0x7e,0xe7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+0xff,0xff,0xff,0xff,0xff,0xff
+};
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..0663f19ea
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 1U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 1U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..558f8962d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,346 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_COMP_MODULE_ENABLED
+/* #define HAL_CORDIC_MODULE_ENABLED */
+#define HAL_CORTEX_MODULE_ENABLED
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+/* #define HAL_FDCAN_MODULE_ENABLED */
+#define HAL_FLASH_MODULE_ENABLED
+/* #define HAL_FMAC_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_HRTIM_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/* #define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_NAND_MODULE_ENABLED */
+/* #define HAL_NOR_MODULE_ENABLED */
+#define HAL_OPAMP_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED */
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+/* #define HAL_RNG_MODULE_ENABLED */
+/* #define HAL_RTC_MODULE_ENABLED */
+#define HAL_SAI_MODULE_ENABLED
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_USBPD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ * - External clock generated through external PLL component on EVAL1 303 (based on MCO or crystal)
+ * - External clock not generated on EVAL1 373
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+ #define EXTERNAL_CLOCK_VALUE (8000000UL) /*!< Value of the External clock source in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+ #include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+ #include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+ #include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+ #include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t *file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..b78c12d77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Inc/stm32g4xx_it.h
@@ -0,0 +1,60 @@
+/**
+ ******************************************************************************
+ * @file stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_IT_H
+#define STM32G4xx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void SRAM_DMAx_IRQHandler(void);
+void EXTI0_IRQHandler(void);
+void EXTI1_IRQHandler(void);
+void EXTI2_IRQHandler(void);
+void EXTI3_IRQHandler(void);
+void EXTI4_IRQHandler(void);
+void EXTI9_5_IRQHandler(void);
+void EXTI15_10_IRQHandler(void);
+void AUDIO_SAI1_DMAx_IRQHandler(void);
+void DMA2_Channel1_IRQHandler(void);
+void DMA2_Channel2_IRQHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_IT_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx
new file mode 100644
index 000000000..8961d7759
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvoptx
@@ -0,0 +1,1196 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ STM32G474E_EVAL1
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001D00263137510133333639 -O2254 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO19 -TC170000000 -TP21 -TDS800E -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 2
+ 10000000
+
+
+
+
+
+ Doc
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components/hx8347d
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c
+ hx8347d.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c
+ hx8347d_reg.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components/MFXSTM32L152
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components/MT25ql512abb
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/mt25ql512abb/mt25ql512abb.c
+ mt25ql512abb.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components/STTS751
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/stts751/stts751.c
+ stts751.c
+ 0
+ 0
+
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/stts751/stts751_reg.c
+ stts751_reg.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components/WM8994
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/wm8994/wm8994.c
+ wm8994.c
+ 0
+ 0
+
+
+ 6
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/Components/wm8994/wm8994_reg.c
+ wm8994_reg.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E_EVAL1
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+ 7
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_audio.c
+ stm32g474e_eval_audio.c
+ 0
+ 0
+
+
+ 7
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 7
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c
+ stm32g474e_eval_env_sensor.c
+ 0
+ 0
+
+
+ 7
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_idd.c
+ stm32g474e_eval_idd.c
+ 0
+ 0
+
+
+ 7
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 7
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c
+ stm32g474e_eval_lcd.c
+ 0
+ 0
+
+
+ 7
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c
+ stm32g474e_eval_qspi.c
+ 0
+ 0
+
+
+ 7
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c
+ stm32g474e_eval_sd.c
+ 0
+ 0
+
+
+ 7
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c
+ stm32g474e_eval_sram.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 9
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 9
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+ stm32g4xx_hal_adc.c
+ 0
+ 0
+
+
+ 9
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+ stm32g4xx_hal_adc_ex.c
+ 0
+ 0
+
+
+ 9
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c
+ stm32g4xx_hal_comp.c
+ 0
+ 0
+
+
+ 9
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+ 9
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 9
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 9
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 9
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 9
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 9
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 9
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c
+ stm32g4xx_hal_opamp.c
+ 0
+ 0
+
+
+ 9
+ 34
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c
+ stm32g4xx_hal_opamp_ex.c
+ 0
+ 0
+
+
+ 9
+ 35
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 9
+ 36
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 9
+ 37
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c
+ stm32g4xx_hal_qspi.c
+ 0
+ 0
+
+
+ 9
+ 38
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 9
+ 39
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 9
+ 40
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c
+ stm32g4xx_hal_rtc.c
+ 0
+ 0
+
+
+ 9
+ 41
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c
+ stm32g4xx_hal_rtc_ex.c
+ 0
+ 0
+
+
+ 9
+ 42
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c
+ stm32g4xx_hal_sai.c
+ 0
+ 0
+
+
+ 9
+ 43
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c
+ stm32g4xx_hal_sai_ex.c
+ 0
+ 0
+
+
+ 9
+ 44
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c
+ stm32g4xx_hal_smartcard.c
+ 0
+ 0
+
+
+ 9
+ 45
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c
+ stm32g4xx_hal_smartcard_ex.c
+ 0
+ 0
+
+
+ 9
+ 46
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c
+ stm32g4xx_hal_smbus.c
+ 0
+ 0
+
+
+ 9
+ 47
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 9
+ 48
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 9
+ 49
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c
+ stm32g4xx_hal_sram.c
+ 0
+ 0
+
+
+ 9
+ 50
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 9
+ 51
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 9
+ 52
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+ stm32g4xx_hal_uart.c
+ 0
+ 0
+
+
+ 9
+ 53
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+ stm32g4xx_hal_uart_ex.c
+ 0
+ 0
+
+
+ 9
+ 54
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c
+ stm32g4xx_ll_fmc.c
+ 0
+ 0
+
+
+
+
+ Drivers/Utilities
+ 0
+ 0
+ 0
+ 0
+
+ 10
+ 55
+ 1
+ 0
+ 0
+ 0
+ ../../../../../Utilities/LCD/stm32_lcd.c
+ stm32_lcd.c
+ 0
+ 0
+
+
+
+
+ Example/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 11
+ 56
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Example/User
+ 0
+ 0
+ 0
+ 0
+
+ 12
+ 57
+ 1
+ 0
+ 0
+ 0
+ ../Src/audio_play.c
+ audio_play.c
+ 0
+ 0
+
+
+ 12
+ 58
+ 1
+ 0
+ 0
+ 0
+ ../Src/audio_rec.c
+ audio_rec.c
+ 0
+ 0
+
+
+ 12
+ 59
+ 1
+ 0
+ 0
+ 0
+ ../Src/bus.c
+ bus.c
+ 0
+ 0
+
+
+ 12
+ 60
+ 1
+ 0
+ 0
+ 0
+ ../Src/button.c
+ button.c
+ 0
+ 0
+
+
+ 12
+ 61
+ 1
+ 0
+ 0
+ 0
+ ../Src/com.c
+ com.c
+ 0
+ 0
+
+
+ 12
+ 62
+ 1
+ 0
+ 0
+ 0
+ ../Src/idd.c
+ idd.c
+ 0
+ 0
+
+
+ 12
+ 63
+ 1
+ 0
+ 0
+ 0
+ ../Src/io.c
+ io.c
+ 0
+ 0
+
+
+ 12
+ 64
+ 1
+ 0
+ 0
+ 0
+ ../Src/joystick.c
+ joystick.c
+ 0
+ 0
+
+
+ 12
+ 65
+ 1
+ 0
+ 0
+ 0
+ ../Src/lcd.c
+ lcd.c
+ 0
+ 0
+
+
+ 12
+ 66
+ 1
+ 0
+ 0
+ 0
+ ../Src/led.c
+ led.c
+ 0
+ 0
+
+
+ 12
+ 67
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 12
+ 68
+ 1
+ 0
+ 0
+ 0
+ ../Src/potentiometer.c
+ potentiometer.c
+ 0
+ 0
+
+
+ 12
+ 69
+ 1
+ 0
+ 0
+ 0
+ ../Src/qspi.c
+ qspi.c
+ 0
+ 0
+
+
+ 12
+ 70
+ 1
+ 0
+ 0
+ 0
+ ../Src/sd.c
+ sd.c
+ 0
+ 0
+
+
+ 12
+ 71
+ 1
+ 0
+ 0
+ 0
+ ../Src/sram.c
+ sram.c
+ 0
+ 0
+
+
+ 12
+ 72
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 12
+ 73
+ 1
+ 0
+ 0
+ 0
+ .\Retarget.c
+ Retarget.c
+ 0
+ 0
+
+
+ 12
+ 74
+ 1
+ 0
+ 0
+ 0
+ .\Serial.c
+ Serial.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx
new file mode 100644
index 000000000..61285983f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Project.uvprojx
@@ -0,0 +1,832 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ STM32G474E_EVAL1
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474RETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.0
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x0-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474RETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ STM32G474E_EVAL1\Exe\
+ Project
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x10008000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,USE_STM32G474E_EVAL1,USE_IOEXPANDER,__DBG_ITM
+
+ ../Inc;../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../Drivers/BSP/Components/Common;../../../../../Drivers/BSP/Components;../../../../../Utilities;../../../../../Utilities/Log;../../../../../Utilities/Fonts;../../../../../Utilities/CPU
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/Components/hx8347d
+
+
+ hx8347d.c
+ 1
+ ../../../../../Drivers/BSP/Components/hx8347d/hx8347d.c
+
+
+ hx8347d_reg.c
+ 1
+ ../../../../../Drivers/BSP/Components/hx8347d/hx8347d_reg.c
+
+
+
+
+ Drivers/BSP/Components/MFXSTM32L152
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+
+
+ Drivers/BSP/Components/MT25ql512abb
+
+
+ mt25ql512abb.c
+ 1
+ ../../../../../Drivers/BSP/Components/mt25ql512abb/mt25ql512abb.c
+
+
+
+
+ Drivers/BSP/Components/STTS751
+
+
+ stts751.c
+ 1
+ ../../../../../Drivers/BSP/Components/stts751/stts751.c
+
+
+ stts751_reg.c
+ 1
+ ../../../../../Drivers/BSP/Components/stts751/stts751_reg.c
+
+
+
+
+ Drivers/BSP/Components/WM8994
+
+
+ wm8994.c
+ 1
+ ../../../../../Drivers/BSP/Components/wm8994/wm8994.c
+
+
+ wm8994_reg.c
+ 1
+ ../../../../../Drivers/BSP/Components/wm8994/wm8994_reg.c
+
+
+
+
+ Drivers/BSP/STM32G474E_EVAL1
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ stm32g474e_eval_audio.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_audio.c
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_env_sensor.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c
+
+
+ stm32g474e_eval_idd.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_idd.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval_lcd.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c
+
+
+ stm32g474e_eval_qspi.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c
+
+
+ stm32g474e_eval_sd.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c
+
+
+ stm32g474e_eval_sram.c
+ 1
+ ../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_adc.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ stm32g4xx_hal_adc_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ stm32g4xx_hal_comp.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_opamp.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c
+
+
+ stm32g4xx_hal_opamp_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_qspi.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_rtc.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c
+
+
+ stm32g4xx_hal_rtc_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c
+
+
+ stm32g4xx_hal_sai.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c
+
+
+ stm32g4xx_hal_sai_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c
+
+
+ stm32g4xx_hal_smartcard.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c
+
+
+ stm32g4xx_hal_smartcard_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c
+
+
+ stm32g4xx_hal_smbus.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_sram.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal_uart.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+
+
+ stm32g4xx_hal_uart_ex.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+
+
+ stm32g4xx_ll_fmc.c
+ 1
+ ../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c
+
+
+
+
+ Drivers/Utilities
+
+
+ stm32_lcd.c
+ 1
+ ../../../../../Utilities/LCD/stm32_lcd.c
+
+
+
+
+ Example/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Example/User
+
+
+ audio_play.c
+ 1
+ ../Src/audio_play.c
+
+
+ audio_rec.c
+ 1
+ ../Src/audio_rec.c
+
+
+ bus.c
+ 1
+ ../Src/bus.c
+
+
+ button.c
+ 1
+ ../Src/button.c
+
+
+ com.c
+ 1
+ ../Src/com.c
+
+
+ idd.c
+ 1
+ ../Src/idd.c
+
+
+ io.c
+ 1
+ ../Src/io.c
+
+
+ joystick.c
+ 1
+ ../Src/joystick.c
+
+
+ lcd.c
+ 1
+ ../Src/lcd.c
+
+
+ led.c
+ 1
+ ../Src/led.c
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ potentiometer.c
+ 1
+ ../Src/potentiometer.c
+
+
+ qspi.c
+ 1
+ ../Src/qspi.c
+
+
+ sd.c
+ 1
+ ../Src/sd.c
+
+
+ sram.c
+ 1
+ ../Src/sram.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ Retarget.c
+ 1
+ .\Retarget.c
+
+
+ Serial.c
+ 1
+ .\Serial.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c
new file mode 100644
index 000000000..821904400
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Retarget.c
@@ -0,0 +1,50 @@
+/*----------------------------------------------------------------------------
+ * Name: Retarget.c
+ * Purpose: 'Retarget' layer for target-dependent low level functions
+ * Note(s):
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2011 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#include
+#include
+#include "Serial.h"
+
+
+
+struct __FILE { int handle; /* Add whatever you need here */ };
+FILE __stdout;
+FILE __stdin;
+
+
+int fputc(int c, FILE *f) {
+ return (SER_PutChar(c));
+}
+
+
+int fgetc(FILE *f) {
+ return (SER_GetChar());
+}
+
+
+int ferror(FILE *f) {
+ /* Your implementation of ferror */
+ return EOF;
+}
+
+
+void _ttywrch(int c) {
+ SER_PutChar(c);
+}
+
+
+void _sys_exit(int return_code) {
+label: goto label; /* endless loop */
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c
new file mode 100644
index 000000000..ca5949fc6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.c
@@ -0,0 +1,43 @@
+/*----------------------------------------------------------------------------
+ * Name: Serial.c
+ * Purpose: Low Level Serial Routines
+ * Note(s): possible defines select the used communication interface:
+ * __DBG_ITM - ITM SWO interface
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2008-2011 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#include /* STM32G4xx Definitions */
+#include "Serial.h"
+
+#ifdef __DBG_ITM
+volatile int ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* CMSIS Debug Input */
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Write character to Serial Port
+ *----------------------------------------------------------------------------*/
+int SER_PutChar (int c) {
+
+ ITM_SendChar(c);
+ return (c);
+}
+
+
+/*----------------------------------------------------------------------------
+ Read character from Serial Port (blocking read)
+ *----------------------------------------------------------------------------*/
+int SER_GetChar (void) {
+
+ while (ITM_CheckChar() != 1) __NOP();
+ return (ITM_ReceiveChar());
+
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h
new file mode 100644
index 000000000..81e691df2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/Serial.h
@@ -0,0 +1,24 @@
+/*----------------------------------------------------------------------------
+ * Name: Serial.h
+ * Purpose: Low level serial definitions
+ * Note(s):
+ *----------------------------------------------------------------------------
+ * This file is part of the uVision/ARM development tools.
+ * This software may only be used under the terms of a valid, current,
+ * end user licence from KEIL for a compatible version of KEIL software
+ * development tools. Nothing else gives you the right to use this software.
+ *
+ * This software is supplied "AS IS" without warranties of any kind.
+ *
+ * Copyright (c) 2010 Keil - An ARM Company. All rights reserved.
+ *----------------------------------------------------------------------------*/
+
+#ifndef __SERIAL_H
+#define __SERIAL_H
+#include
+
+extern void SER_Init (void);
+extern int SER_GetChar (void);
+extern int SER_PutChar (int c);
+
+#endif
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..0c1ea6860
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x8000
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x4000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..43a5c6fbe
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.cproject
@@ -0,0 +1,194 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project
new file mode 100644
index 000000000..c7d110354
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/.project
@@ -0,0 +1,390 @@
+
+
+ BSP
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeExampleProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_adc_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_comp.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_opamp_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_qspi.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rtc_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sai_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smartcard.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smartcard_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_smbus.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_sram.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_uart_ex.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_fmc.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c
+
+
+ Drivers/Utilities/stm32_lcd.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Utilities/LCD/stm32_lcd.c
+
+
+ Example/User/audio_play.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/audio_play.c
+
+
+ Example/User/audio_rec.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/audio_rec.c
+
+
+ Example/User/bus.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/bus.c
+
+
+ Example/User/button.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/button.c
+
+
+ Example/User/com.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/com.c
+
+
+ Example/User/idd.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/idd.c
+
+
+ Example/User/io.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/io.c
+
+
+ Example/User/joystick.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/joystick.c
+
+
+ Example/User/lcd.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/lcd.c
+
+
+ Example/User/led.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/led.c
+
+
+ Example/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Example/User/potentiometer.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/potentiometer.c
+
+
+ Example/User/qspi.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/qspi.c
+
+
+ Example/User/sd.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/sd.c
+
+
+ Example/User/sram.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/sram.c
+
+
+ Example/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_audio.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_audio.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_env_sensor.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_env_sensor.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_idd.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_idd.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_lcd.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_lcd.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_qspi.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_qspi.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_sd.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sd.c
+
+
+ Drivers/BSP/STM32G474E_EVAL1/stm32g474e_eval_sram.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_sram.c
+
+
+ Drivers/BSP/Components/MFXSTM32L152/mfxstm32l152.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/MFXSTM32L152/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/Components/MT25ql512abb/mt25ql512abb.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/mt25ql512abb/mt25ql512abb.c
+
+
+ Drivers/BSP/Components/STTS751/stts751.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751.c
+
+
+ Drivers/BSP/Components/STTS751/stts751_reg.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/stts751/stts751_reg.c
+
+
+ Drivers/BSP/Components/WM8994/wm8994.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994.c
+
+
+ Drivers/BSP/Components/WM8994/wm8994_reg.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/wm8994/wm8994_reg.c
+
+
+ Drivers/BSP/Components/hx8347d/hx8347d.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d.c
+
+
+ Drivers/BSP/Components/hx8347d/hx8347d_reg.c
+ 1
+ $%7BPARENT-5-PROJECT_LOC%7D/Drivers/BSP/Components/hx8347d/hx8347d_reg.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/Startup/startup_stm32g474retx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/Example/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
new file mode 100644
index 000000000..9342ef9f0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/STM32CubeIDE/STM32G474RETX_FLASH.ld
@@ -0,0 +1,204 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from STM32G4 series
+** 510Kbytes ROM
+** 32Kbytes CCMSRAM
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x4000; /* required amount of heap */
+_Min_Stack_Size = 0x8000; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ CCMSRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ ROM (rx) : ORIGIN = 0x08000000, LENGTH = 510K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "ROM" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >ROM
+
+ /* The program code and other data into "ROM" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >ROM
+
+ /* Constant data into "ROM" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >ROM
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >ROM
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >ROM
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> ROM
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c
new file mode 100644
index 000000000..2c5796109
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_play.c
@@ -0,0 +1,652 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/audio_play.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the audio feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/* Private define ------------------------------------------------------------*/
+
+/*Since SysTick is set to 1ms (unless to set it quicker) */
+/* to run up to 48khz, a buffer around 1000 (or more) is requested*/
+/* to run up to 96khz, a buffer around 2000 (or more) is requested*/
+#define AUDIO_DEFAULT_VOLUME 60
+
+/* Audio file size and start address are defined here since the audio file is
+ stored in Flash memory as a constant table of 16-bit data */
+#define AUDIO_BUFFER_SIZE 4096
+#define AUDIO_FILE_SIZE (180*1024)
+#define AUDIO_START_OFFSET_ADDRESS 0 /* Offset relative to audio file header size */
+
+/* Private typedef -----------------------------------------------------------*/
+typedef enum {
+ AUDIO_STATE_IDLE = 0,
+ AUDIO_STATE_INIT,
+ AUDIO_STATE_PLAYING,
+}AUDIO_PLAYBACK_StateTypeDef;
+
+typedef enum {
+ BUFFER_OFFSET_NONE = 0,
+ BUFFER_OFFSET_HALF,
+ BUFFER_OFFSET_FULL,
+}BUFFER_StateTypeDef;
+
+typedef struct {
+ uint8_t buff[AUDIO_BUFFER_SIZE];
+ uint32_t fptr;
+ BUFFER_StateTypeDef state;
+ uint32_t AudioFileSize;
+ uint32_t *SrcAddress;
+}AUDIO_BufferTypeDef;
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static AUDIO_BufferTypeDef buffer_ctl;
+static AUDIO_PLAYBACK_StateTypeDef audio_state;
+__IO uint32_t uwVolume = 20;
+uint8_t ReadVol = 0;
+__IO uint32_t uwPauseEnabledStatus = 0;
+uint32_t updown = 1;
+
+uint32_t AudioFreq[8] = {96000, 48000, 44100, 32000, 22050, 16000, 11025, 8000};
+
+BSP_AUDIO_Init_t AudioPlayInit;
+static uint32_t JoyState = JOY_NONE;
+uint32_t OutputDevice = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void Audio_SetHint(uint32_t Index);
+static uint32_t GetData(void *pdata, uint32_t offset, uint8_t *pbuf, uint32_t NbrOfData);
+AUDIO_ErrorTypeDef AUDIO_Start(uint32_t *psrc_address, uint32_t file_size);
+AUDIO_ErrorTypeDef AUDIO_Stop(void);
+static void AudioDeviceUpdate(void);
+static void AudioChResUpdate(void);
+
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+ * @brief Audio Play demo
+ * @param None
+ * @retval None
+ */
+int32_t AudioPlay_demo (void)
+{
+ uint32_t *AudioFreq_ptr;
+ uint32_t y_size;
+
+ uint32_t AudioSize;
+
+ BSP_LCD_GetYSize(0, &y_size);
+
+ AudioFreq_ptr = &AudioFreq[0]; /*96K*/
+
+ uint8_t FreqStr[256] = {0};
+ Point Points2[] = {{10, 140}, {50, 160}, {10, 180}};
+
+ uwPauseEnabledStatus = 1; /* 0 when audio is running, 1 when Pause is on */
+ uwVolume = 40;
+ printf("\r\n Test of Audio Play \n");
+ printf("\r\n Use Joy key Press to Pause/Resume \n");
+ printf("\r\n Use Joy key up/down to change Volume \n");
+ printf("\r\n Use Joy keys left/right to set output device \n");
+ printf("\r\n Press User Button to go to next demo \n");
+
+
+ Audio_SetHint(0);
+ UTIL_LCD_SetFont(&Font20);
+
+ BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL);
+
+ AudioPlayInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+ AudioPlayInit.ChannelsNbr = 2; /* 16bit value offset=22 of wave file */
+ AudioPlayInit.SampleRate = AUDIO_FREQUENCY_8K; /* 32bit value offset=24 of wave file */
+ AudioPlayInit.BitsPerSample = AUDIO_RESOLUTION_16B; /* 16bit value offset=34 of wave file */
+ AudioPlayInit.Volume = uwVolume;
+
+ if(BSP_AUDIO_OUT_Init(0, &AudioPlayInit) == 0)
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(20, y_size - 95, (uint8_t *)" AUDIO CODEC OK ", CENTER_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO CODEC FAIL ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+ }
+
+ /*
+ Start playing the file from a circular buffer, once the DMA is enabled, it is
+ always in running state. Application has to fill the buffer with the audio data
+ using Transfer complete and/or half transfer complete interrupts callbacks
+ (BSP_AUDIO_OUT_TransferComplete_CallBack() or BSP_AUDIO_OUT_HalfTransfer_CallBack()...
+ */
+ AudioSize = (uint32_t )(*((uint32_t *)(AUDIO_SRC_FILE_ADDRESS+40)));
+
+ /* check if audio is present */
+ if ((uint32_t )(*((uint32_t *)(AUDIO_SRC_FILE_ADDRESS))) != 0x46464952)
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, LINE(8), (uint8_t *)" ERROR file not found", CENTER_MODE);
+ return -1;
+ }
+
+ AUDIO_Start((uint32_t *)AUDIO_SRC_FILE_ADDRESS, (uint32_t)AudioSize);
+ /* Display the state on the screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)" PLAYING... ", CENTER_MODE);
+
+ sprintf((char*)FreqStr, " VOL: %3ld ", uwVolume);
+ UTIL_LCD_DisplayStringAt(0, 180, (uint8_t *)FreqStr, CENTER_MODE);
+
+ sprintf((char*)FreqStr, " FREQ: %6ld ", *AudioFreq_ptr);
+ UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, y_size - 20, (uint8_t *)"Hear nothing? Have you copied ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 10, (uint8_t *)"the audio file with STM-LINK UTILITY?", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font20);
+
+ /* Audio is playing */
+ BSP_LCD_FillRect(0, 10, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+ BSP_LCD_FillRect(0, 35, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+
+ /* IMPORTANT:
+ AUDIO_Process() is called by the SysTick Handler, as it should be called
+ within a periodic process */
+
+ /* Infinite loop */
+ while (1)
+ {
+ if (UserButtonPressed == 1)
+ {
+ return 0;
+ }
+ /* IMPORTANT: AUDIO_Process() should be called within a periodic process */
+ AUDIO_Process();
+ AudioDeviceUpdate();
+
+ /* Get the Joystick State */
+ switch (BSP_JOY_GetState(JOY1))
+ {
+ case JOY_UP:
+ /* Increase volume by 5% */
+ if (uwVolume < 95)
+ uwVolume += 5;
+ else
+ uwVolume = 100;
+ UTIL_LCD_SetFont(&Font20);
+ sprintf((char*)FreqStr, " VOL: %3ld ", uwVolume);
+ BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+ UTIL_LCD_DisplayStringAt(0, 180, (uint8_t *)FreqStr, CENTER_MODE);
+ break;
+ case JOY_DOWN:
+ /* Decrease volume by 5% */
+ if (uwVolume > 5)
+ uwVolume -= 5;
+ else
+ uwVolume = 0;
+ UTIL_LCD_SetFont(&Font20);
+ sprintf((char*)FreqStr, " VOL: %3ld ", uwVolume);
+ BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+ UTIL_LCD_DisplayStringAt(0, 180, (uint8_t *)FreqStr, CENTER_MODE);
+ break;
+ case JOY_LEFT:
+ /*Decrease Frequency */
+ if (*AudioFreq_ptr != 8000)
+ {
+ AudioFreq_ptr++;
+ sprintf((char*)FreqStr, " FREQ: %6ld ", *AudioFreq_ptr);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetSampleRate(0, *AudioFreq_ptr);
+ BSP_AUDIO_OUT_Resume(0);
+ BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+ }
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+ break;
+ case JOY_RIGHT:
+ /* Increase Frequency */
+ if (*AudioFreq_ptr != 96000)
+ {
+ AudioFreq_ptr--;
+ sprintf((char*)FreqStr, " FREQ: %6ld ", *AudioFreq_ptr);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetSampleRate(0, *AudioFreq_ptr);
+ BSP_AUDIO_OUT_Resume(0);
+ BSP_AUDIO_OUT_SetVolume(0, uwVolume);
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(0, 200, (uint8_t *)FreqStr, CENTER_MODE);
+ }
+ break;
+ case JOY_SEL:
+ /* Set Pause / Resume */
+ if (uwPauseEnabledStatus == 1)
+ { /* Pause is enabled, call Resume */
+ BSP_AUDIO_OUT_Resume(0);
+ uwPauseEnabledStatus = 0;
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)" PLAYING... ", CENTER_MODE);
+ UTIL_LCD_FillPolygon(Points2, 3, UTIL_LCD_COLOR_WHITE);
+ BSP_LCD_FillRect(0, 10, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+ BSP_LCD_FillRect(0, 35, 140, 15 , 40, LCD_COLOR_RGB565_BLACK);
+ }
+ else
+ { /* Pause the playback */
+ BSP_AUDIO_OUT_Pause(0);
+ uwPauseEnabledStatus = 1;
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(0, 160, (uint8_t *)" PAUSE ... ", CENTER_MODE);
+ BSP_LCD_FillRect(0, 10, 140, 40 , 40, LCD_COLOR_RGB565_WHITE);
+ UTIL_LCD_FillPolygon(Points2, 3, UTIL_LCD_COLOR_GREEN);
+ }
+ HAL_Delay(200);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+int32_t AudioPlay_demo2 (void)
+{
+ uint32_t *AudioFreq_ptr;
+ uint32_t y_size;
+
+ BSP_LCD_GetYSize(0, &y_size);
+ AudioFreq_ptr = &AudioFreq[0]; /*96K*/
+
+ uint8_t FreqStr[256] = {0};
+
+ uwVolume = 40;
+
+ Audio_SetHint(1);
+ UTIL_LCD_SetFont(&Font20);
+
+
+ BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL);
+
+ AudioPlayInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+ AudioPlayInit.ChannelsNbr = 2;
+ AudioPlayInit.SampleRate = AUDIO_FREQUENCY_96K;
+ AudioPlayInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+ AudioPlayInit.Volume = uwVolume;
+
+ if(BSP_AUDIO_OUT_Init(0, &AudioPlayInit) == 0)
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO CODEC OK ", CENTER_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO CODEC FAIL ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+ }
+
+ /*
+ Start playing the file from a circular buffer, once the DMA is enabled, it is
+ always in running state. Application has to fill the buffer with the audio data
+ using Transfer complete and/or half transfer complete interrupts callbacks
+ (BSP_AUDIO_OUT_TransferComplete_CallBack() or BSP_AUDIO_OUT_HalfTransfer_CallBack()...
+ */
+ AUDIO_Start((uint32_t *)AUDIO_SRC_FILE_ADDRESS, (uint32_t)AUDIO_FILE_SIZE);
+
+ /* Display the state on the screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, LINE(8), (uint8_t *)" PLAYING... ", CENTER_MODE);
+
+ sprintf((char*)FreqStr, " VOL: %3ld ", uwVolume);
+ UTIL_LCD_DisplayStringAt(0, LINE(9), (uint8_t *)FreqStr, CENTER_MODE);
+
+ sprintf((char*)FreqStr, " FREQ: %6ld ", *AudioFreq_ptr);
+ UTIL_LCD_DisplayStringAt(0, LINE(10), (uint8_t *)FreqStr, CENTER_MODE);
+
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"Hear nothing ? Have you copied the audio file with STM-LINK UTILITY ?", CENTER_MODE);
+
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT STEREO MODE ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_16b ", CENTER_MODE);
+
+ /* IMPORTANT:
+ AUDIO_Process() is called by the SysTick Handler, as it should be called
+ within a periodic process */
+
+ /* Infinite loop */
+ while (1)
+ {
+ /* IMPORTANT: AUDIO_Process() should be called within a periodic process */
+ AUDIO_Process();
+ AudioChResUpdate();
+ }
+}
+
+/**
+ * @brief Display Audio demo hint
+ * @param None
+ * @retval None
+ */
+static void Audio_SetHint(uint32_t Index)
+{
+ uint32_t x_size, y_size;
+ uint32_t texte[30];
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Clear the LCD */
+ BSP_LCD_Clear(0, LCD_COLOR_RGB565_WHITE);
+
+ /* Set Audio Demo description */
+ BSP_LCD_FillRect(0, 0, 0, x_size, 120, LCD_COLOR_RGB565_BLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font12);
+ if(Index == 0)
+ {
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SET MUTE / SET VOLUME / SET SAMPLE RATE", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)" ", CENTER_MODE);
+ sprintf((char *)texte, "copy audio file at @ 0x%x", AUDIO_SRC_FILE_ADDRESS);
+ UTIL_LCD_DisplayStringAt( 50, 145, (uint8_t *)texte, LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"Use Joy keys left/right to set output device ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 75, (uint8_t *)"Use Joy key Press to Pause/Resume", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 90, (uint8_t *)"Use Joy key up/down to change Volume", CENTER_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SET CHANNEL NUMBER/ SET BIT PER SAMPLE", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"Use Joy keys UP/DOWN to set Channels Number ", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"Use Joy keys LEFT/RIGHT to set resolution ", CENTER_MODE);
+ }
+}
+
+
+/**
+ * @brief Starts Audio streaming.
+ * @param None
+ * @retval Audio error
+ */
+AUDIO_ErrorTypeDef AUDIO_Start(uint32_t *psrc_address, uint32_t file_size)
+{
+ uint32_t bytesread;
+
+ buffer_ctl.state = BUFFER_OFFSET_NONE;
+ buffer_ctl.AudioFileSize = file_size;
+ buffer_ctl.SrcAddress = psrc_address;
+
+ /* actual wave file starts at offset=44*/
+ bytesread = GetData( (void *)psrc_address,
+ 0,
+ &buffer_ctl.buff[0],
+ AUDIO_BUFFER_SIZE);
+ if(bytesread > 0)
+ {
+ BSP_AUDIO_OUT_Play(0, (uint8_t *)&buffer_ctl.buff[0], AUDIO_BUFFER_SIZE);
+ audio_state = AUDIO_STATE_PLAYING;
+ buffer_ctl.fptr = bytesread;
+ return AUDIO_ERROR_NONE;
+ }
+ return AUDIO_ERROR_IO;
+}
+
+/**
+ * @brief Manages Audio process.
+ * @param None
+ * @retval Audio error
+ */
+uint8_t AUDIO_Process(void)
+{
+ uint32_t bytesread;
+ AUDIO_ErrorTypeDef error_state = AUDIO_ERROR_NONE;
+
+ switch(audio_state)
+ {
+ case AUDIO_STATE_PLAYING:
+
+ if(buffer_ctl.fptr >= buffer_ctl.AudioFileSize)
+ {
+ /* Play audio sample again ... */
+ buffer_ctl.fptr = 0;
+ error_state = AUDIO_ERROR_EOF;
+ }
+
+ /* 1st half buffer played; so fill it and continue playing from bottom*/
+ if(buffer_ctl.state == BUFFER_OFFSET_HALF)
+ {
+ bytesread = GetData((void *)buffer_ctl.SrcAddress,
+ buffer_ctl.fptr,
+ &buffer_ctl.buff[0],
+ AUDIO_BUFFER_SIZE /2);
+
+ if( bytesread >0)
+ {
+ buffer_ctl.state = BUFFER_OFFSET_NONE;
+ buffer_ctl.fptr += bytesread;
+ }
+ }
+
+ /* 2nd half buffer played; so fill it and continue playing from top */
+ if(buffer_ctl.state == BUFFER_OFFSET_FULL)
+ {
+ bytesread = GetData((void *)buffer_ctl.SrcAddress,
+ buffer_ctl.fptr,
+ &buffer_ctl.buff[AUDIO_BUFFER_SIZE /2],
+ AUDIO_BUFFER_SIZE /2);
+ if( bytesread > 0)
+ {
+ buffer_ctl.state = BUFFER_OFFSET_NONE;
+ buffer_ctl.fptr += bytesread;
+ }
+ }
+ break;
+
+ default:
+ error_state = AUDIO_ERROR_NOTREADY;
+ break;
+ }
+ return (uint8_t) error_state;
+}
+
+/**
+ * @brief Gets Data from storage unit.
+ * @param None
+ * @retval None
+ */
+static uint32_t GetData(void *pdata, uint32_t offset, uint8_t *pbuf, uint32_t NbrOfData)
+{
+ uint8_t *lptr = pdata;
+ uint32_t ReadDataNbr;
+
+ ReadDataNbr = 0;
+ while(((offset + ReadDataNbr) < buffer_ctl.AudioFileSize) && (ReadDataNbr < NbrOfData))
+ {
+ pbuf[ReadDataNbr]= lptr [offset + ReadDataNbr];
+ ReadDataNbr++;
+ }
+ return ReadDataNbr;
+}
+
+/*------------------------------------------------------------------------------
+ Callbacks implementation:
+ the callbacks API are defined __weak in the stm32769i_discovery_audio.c file
+ and their implementation should be done the user code if they are needed.
+ Below some examples of callback implementations.
+ ----------------------------------------------------------------------------*/
+/**
+ * @brief Manages the full Transfer complete event.
+ * @param Instance
+ * @retval None
+ */
+void BSP_AUDIO_OUT_TransferComplete_CallBack(uint32_t Instance)
+{
+ if(audio_state == AUDIO_STATE_PLAYING)
+ {
+ /* allows AUDIO_Process() to refill 2nd part of the buffer */
+ buffer_ctl.state = BUFFER_OFFSET_FULL;
+ }
+}
+
+/**
+ * @brief Manages the DMA Half Transfer complete event.
+ * @param Instance
+ * @retval None
+ */
+void BSP_AUDIO_OUT_HalfTransfer_CallBack(uint32_t Instance)
+{
+ if(audio_state == AUDIO_STATE_PLAYING)
+ {
+ /* allows AUDIO_Process() to refill 1st part of the buffer */
+ buffer_ctl.state = BUFFER_OFFSET_HALF;
+ }
+}
+
+/**
+ * @brief Manages the DMA FIFO error event.
+ * @param Instance
+ * @retval None
+ */
+void BSP_AUDIO_OUT_Error_CallBack(uint32_t Instance)
+{
+ /* Display message on the LCD screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, LINE(14), (uint8_t *)" DMA ERROR ", CENTER_MODE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+
+ /* Stop the program with an infinite loop */
+ while (BSP_PB_GetState(BUTTON_USER) != RESET)
+ {
+ return;
+ }
+
+ /* could also generate a system reset to recover from the error */
+ /* .... */
+}
+
+static void AudioChResUpdate(void)
+{
+ JoyState = BSP_JOY_GetState(JOY1);
+
+ switch(JoyState)
+ {
+ case JOY_UP:
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetChannelsNbr(0, 1);
+ BSP_AUDIO_OUT_Resume(0);
+
+ UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT MONO MODE ", CENTER_MODE);
+ break;
+ case JOY_DOWN:
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetChannelsNbr(0, 2);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_DisplayStringAt(0, LINE(11), (uint8_t *)"AUDIO OUT STEREO MODE ", CENTER_MODE);
+ break;
+ case JOY_LEFT:
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetBitsPerSample(0, AUDIO_RESOLUTION_16B);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_16b ", CENTER_MODE);
+ break;
+ case JOY_RIGHT:
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetBitsPerSample(0, AUDIO_RESOLUTION_32B);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_DisplayStringAt(0, LINE(12), (uint8_t *)"AUDIO_RESOLUTION_32b ", CENTER_MODE);
+ break;
+ default:
+ break;
+ }
+}
+
+static void AudioDeviceUpdate(void)
+{
+ JoyState = BSP_JOY_GetState(JOY1);
+
+ switch(JoyState)
+ {
+ case JOY_UP:
+ BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)" AUDIO_OUT_DEVICE_HEADPHONE ", LEFT_MODE);
+ break;
+ case JOY_DOWN:
+ BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)" AUDIO_OUT_DEVICE_SPEAKER ", LEFT_MODE);
+ break;
+ case JOY_LEFT:
+ BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)" AUDIO_OUT_DEVICE_SPK_HP ", LEFT_MODE);
+ break;
+ case JOY_RIGHT:
+ BSP_LCD_FillRect(0, 0, 240, 320 , 10, LCD_COLOR_RGB565_WHITE);
+ BSP_AUDIO_OUT_Pause(0);
+ BSP_AUDIO_OUT_SetDevice(0, AUDIO_OUT_DEVICE_HEADPHONE);
+ BSP_AUDIO_OUT_Resume(0);
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(0, 220, (uint8_t *)" AUDIO_OUT_DEVICE_AUTO ", LEFT_MODE);
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c
new file mode 100644
index 000000000..3881c044c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/audio_rec.c
@@ -0,0 +1,390 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/audio_rec.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the audio feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include
+#include "string.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+typedef enum
+{
+ BUFFER_OFFSET_NONE = 0,
+ BUFFER_OFFSET_HALF = 1,
+ BUFFER_OFFSET_FULL = 2,
+}BUFFER_StateTypeDef;
+
+extern AUDIO_ErrorTypeDef AUDIO_Start(uint32_t audio_start_address, uint32_t audio_file_size);
+
+#define AUDIO_BLOCK_SIZE ((uint32_t)0xFFFE)
+#define AUDIO_NB_BLOCKS ((uint32_t)4)
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static uint16_t internal_buffer[AUDIO_BLOCK_SIZE];
+
+/* Global variables ---------------------------------------------------------*/
+uint32_t audio_rec_buffer_state;
+BSP_AUDIO_Init_t AnalogInInit;
+ BSP_AUDIO_Init_t AudioInInit;
+ BSP_AUDIO_Init_t AudioOutInit;
+uint32_t AudioBufferOffset;
+uint32_t InputVolume = 0, InputDevice, BitPerSample, ChannelNbr;
+
+/* Private function prototypes -----------------------------------------------*/
+static void AudioRec_SetHint(void);
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Audio Play demo
+ * @param None
+ * @retval None
+ */
+int32_t AudioRec_demo (void)
+{
+ uint32_t block_number;
+ uint32_t y_size;
+
+ BSP_LCD_GetYSize(0, &y_size);
+
+ AudioRec_SetHint();
+
+ AudioOutInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+ AudioOutInit.ChannelsNbr = 2;
+ AudioOutInit.SampleRate = AUDIO_FREQUENCY_16K;
+ AudioOutInit.BitsPerSample = AUDIO_RESOLUTION_32B;
+ AudioOutInit.Volume = 100;
+
+ AudioInInit.Device = AUDIO_IN_DEVICE_ANALOG_MIC;
+ AudioInInit.ChannelsNbr = 2;
+ AudioInInit.SampleRate = AUDIO_FREQUENCY_16K;
+ AudioInInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+ AudioInInit.Volume = 30;
+
+ /* Initialize Audio Recorder */
+ if (BSP_AUDIO_IN_Init(0, &AudioInInit) == BSP_ERROR_NONE)
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO RECORD INIT OK ", CENTER_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO RECORD INIT FAIL", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+ }
+
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+
+ /* Display the state on the screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" RECORDING... ", CENTER_MODE);
+
+ BSP_AUDIO_IN_GetVolume(0, &InputVolume);
+ BSP_AUDIO_IN_GetDevice(0, &InputDevice);
+ BSP_AUDIO_IN_GetChannelsNbr(0, &ChannelNbr);
+ BSP_AUDIO_IN_GetBitsPerSample(0, &BitPerSample);
+
+ BSP_AUDIO_IN_SetVolume(0, 80);
+ BSP_AUDIO_IN_SetDevice(0, AUDIO_IN_DEVICE_ANALOG_MIC);
+ BSP_AUDIO_IN_SetChannelsNbr(0, 1);
+ BSP_AUDIO_IN_SetBitsPerSample(0, AUDIO_RESOLUTION_32B);
+
+ BSP_AUDIO_IN_GetVolume(0, &InputVolume);
+ BSP_AUDIO_IN_GetDevice(0, &InputDevice);
+ BSP_AUDIO_IN_GetChannelsNbr(0, &ChannelNbr);
+ BSP_AUDIO_IN_GetBitsPerSample(0, &BitPerSample);
+
+ /* Start Recording: Size in number of bytes */
+ BSP_AUDIO_IN_Record(0, (uint8_t*)&internal_buffer, 2*AUDIO_BLOCK_SIZE);
+
+ for (block_number = 0; block_number < AUDIO_NB_BLOCKS; block_number++)
+ {
+ /* Wait end of half block recording */
+ while(AudioBufferOffset != BUFFER_OFFSET_HALF)
+ {
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Recorder before close Test */
+ BSP_AUDIO_IN_Stop(0);
+ return 0;
+ }
+ }
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+ /* Copy recorded 1st half block in SDRAM */
+ memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2)),
+ internal_buffer,
+ AUDIO_BLOCK_SIZE);
+
+ /* Wait end of one block recording */
+ while(AudioBufferOffset != BUFFER_OFFSET_FULL)
+ {
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Recorder before close Test */
+ BSP_AUDIO_IN_Stop(0);
+ return 0;
+ }
+ }
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+ /* Copy recorded 2nd half block in SDRAM */
+ memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2) + (AUDIO_BLOCK_SIZE)),
+ (uint16_t *)(&internal_buffer[AUDIO_BLOCK_SIZE/2]),
+ AUDIO_BLOCK_SIZE);
+ }
+
+ /* Stop recorder */
+ BSP_AUDIO_IN_Stop(0);
+ BSP_AUDIO_IN_DeInit(0);
+
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 65, (uint8_t *)"RECORDING DONE, START PLAYBACK...", CENTER_MODE);
+
+ /* -----------Start Playback -------------- */
+ /* Initialize audio IN at REC_FREQ*/
+ BSP_AUDIO_OUT_Init(0, &AudioOutInit);
+
+ /* Play the recorded buffer*/
+ AUDIO_Start(AUDIO_REC_START_ADDR, AUDIO_BLOCK_SIZE * AUDIO_NB_BLOCKS * 2);
+ UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"PLAYBACK DONE", CENTER_MODE);
+
+ while (1)
+ {
+ AUDIO_Process();
+
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Player before close Test */
+ BSP_AUDIO_OUT_Stop(0);
+ BSP_AUDIO_OUT_DeInit(0);
+ return 0;
+ }
+ }
+}
+
+/**
+ * @brief Audio Play demo
+ * @param None
+ * @retval None
+ */
+int32_t AudioRecAnalog_demo (void)
+{
+ uint32_t block_number;
+ uint32_t y_size;
+
+ BSP_LCD_GetYSize(0, &y_size);
+
+ AudioRec_SetHint();
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"AUDIO RECORD ANALOG", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+
+ AudioOutInit.Device = AUDIO_OUT_DEVICE_HEADPHONE;
+ AudioOutInit.ChannelsNbr = 2;
+ AudioOutInit.SampleRate = AUDIO_FREQUENCY_48K;
+ AudioOutInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+ AudioOutInit.Volume = 95;
+
+ AnalogInInit.Device = AUDIO_IN_DEVICE_ANALOG_MIC;
+ AnalogInInit.ChannelsNbr = 1;
+ AnalogInInit.SampleRate = AUDIO_FREQUENCY_48K;
+ AnalogInInit.BitsPerSample = AUDIO_RESOLUTION_16B;
+ AnalogInInit.Volume = 100;
+
+ /* Initialize Audio Recorder */
+ if (BSP_AUDIO_IN_Init(0, &AnalogInInit) == BSP_ERROR_NONE)
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO RECORD INIT OK ", CENTER_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, y_size - 95, (uint8_t *)" AUDIO RECORD INIT FAIL", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" Try to reset board ", CENTER_MODE);
+ }
+
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+
+ /* Display the state on the screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 80, (uint8_t *)" RECORDING... ", CENTER_MODE);
+
+
+ /* Start Recording */
+ BSP_AUDIO_IN_Record(0, (uint8_t*)internal_buffer, 2*AUDIO_BLOCK_SIZE);
+
+ for (block_number = 0; block_number < AUDIO_NB_BLOCKS; block_number++)
+ {
+ /* Wait end of half block recording */
+ while(AudioBufferOffset != BUFFER_OFFSET_HALF)
+ {
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Recorder before close Test */
+ BSP_AUDIO_IN_Stop(0);
+ return 0;
+ }
+ }
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+ /* Copy recorded 1st half block in SDRAM */
+ memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2)),
+ internal_buffer,
+ AUDIO_BLOCK_SIZE);
+
+ /* Wait end of one block recording */
+ while(AudioBufferOffset != BUFFER_OFFSET_FULL)
+ {
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Recorder before close Test */
+ BSP_AUDIO_IN_Stop(0);
+ return 0;
+ }
+ }
+ AudioBufferOffset = BUFFER_OFFSET_NONE;
+ /* Copy recorded 2nd half block in SDRAM */
+ memcpy((uint32_t *)(AUDIO_REC_START_ADDR + (block_number * AUDIO_BLOCK_SIZE * 2) + (AUDIO_BLOCK_SIZE)),
+ (uint16_t *)(&internal_buffer[AUDIO_BLOCK_SIZE/2]),
+ AUDIO_BLOCK_SIZE);
+ }
+
+ /* Stop recorder */
+ BSP_AUDIO_IN_Stop(0);
+ BSP_AUDIO_IN_DeInit(0);
+
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt(0, y_size - 65, (uint8_t *)"RECORDING DONE, START PLAYBACK...", CENTER_MODE);
+
+ /* -----------Start Playback -------------- */
+ /* Initialize audio IN at REC_FREQ*/
+ BSP_AUDIO_OUT_Init(0, &AudioOutInit);
+
+ /* Play the recorded buffer*/
+ AUDIO_Start(AUDIO_REC_START_ADDR, AUDIO_BLOCK_SIZE * AUDIO_NB_BLOCKS * 2);
+ UTIL_LCD_DisplayStringAt(0, y_size - 40, (uint8_t *)"PLAYBACK DONE", CENTER_MODE);
+
+ while (1)
+ {
+ AUDIO_Process();
+
+ if (CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ /* Stop Player before close Test */
+ BSP_AUDIO_OUT_Stop(0);
+ BSP_AUDIO_OUT_DeInit(0);
+ return 0;
+ }
+ }
+}
+
+/**
+ * @brief Display Audio Record demo hint
+ * @param None
+ * @retval None
+ */
+static void AudioRec_SetHint(void)
+{
+ uint32_t x_size, y_size;
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Clear the LCD */
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+ /* Set Audio Demo description */
+ BSP_LCD_FillRect(0, 0, 0, x_size, 90, LCD_COLOR_RGB565_BLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"AUDIO RECORD EXAMPLE", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"Press User button for next menu", CENTER_MODE);
+
+ /* Set the LCD Text Color */
+ UTIL_LCD_DrawRect(10, 100, x_size - 20, y_size - 110, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DrawRect(11, 101, x_size - 22, y_size - 112, UTIL_LCD_COLOR_BLUE);
+
+}
+
+/*------------------------------------------------------------------------------
+ Callbacks implementation:
+ the callbacks API are defined __weak in the stm32746g_discovery_audio.c file
+ and their implementation should be done the user code if they are needed.
+ Below some examples of callback implementations.
+ ----------------------------------------------------------------------------*/
+
+/**
+ * @brief Audio IN Error callback function.
+ * @param None
+ * @retval None
+ */
+void BSP_AUDIO_IN_Error_CallBack(uint32_t Instance)
+{
+ /* This function is called when an Interrupt due to transfer error on or peripheral
+ error occurs. */
+ /* Display message on the LCD screen */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(0, LINE(14), (uint8_t *)" DMA ERROR ", CENTER_MODE);
+
+ /* Stop the program with an infinite loop */
+ while (BSP_PB_GetState(BUTTON_USER) != RESET)
+ {
+ return;
+ }
+ /* could also generate a system reset to recover from the error */
+ /* .... */
+}
+
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c
new file mode 100644
index 000000000..0ff8aeef3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/bus.c
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/bus.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the bus feature in the
+ * STM32G474 EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Bus demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Bus_demo(void)
+{
+ int32_t result = 0;
+ uint32_t i;
+ uint8_t data[2] = {0xFFU, 0xFFU};
+ uint8_t value;
+
+ printf("TEST OF BUS\n");
+
+ /* Initialize I2C3 bus */
+ if (BSP_I2C3_Init() != BSP_ERROR_NONE) result--;
+
+ /******************************/
+ /* Check if devices are ready */
+ /******************************/
+ /* IO expander */
+ if (BSP_I2C3_IsReady(IO_I2C_ADDRESS, 1) != BSP_ERROR_NONE) result--;
+ /* PNA : To complete with other devices */
+
+ /***************************/
+ /* Check read/write access */
+ /***************************/
+ /* IO Expander (only 8bits registers) */
+ if (BSP_I2C3_ReadReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_SYS_CTRL, &value, 1) != BSP_ERROR_NONE) result--;
+ /* Enable GPIO expander function */
+ value = value | 0x1U;
+ if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_SYS_CTRL, &value, 1) != BSP_ERROR_NONE) result--;
+
+ /* Write/read registers GPIO_PUPDx */
+ if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+ HAL_Delay(100);
+ if (BSP_I2C3_ReadReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+ for (i = 0; i < 2; i++)
+ {
+ if (data[i] != 0xFFU) result--;
+ data[i] = 0U;
+ }
+ /* Restore default value of registers GPIO_PUPDx */
+ if (BSP_I2C3_WriteReg(IO_I2C_ADDRESS, MFXSTM32L152_REG_ADR_GPIO_PUPD1, data, 2) != BSP_ERROR_NONE) result--;
+ HAL_Delay(100);
+
+ /* PNA : To complete with other devices */
+
+ /* De-initialize I2C3 bus */
+ if (BSP_I2C3_DeInit() != BSP_ERROR_NONE) result--;
+
+ if (result == 0) printf(" Passed\n");
+ else printf(" Failed\n");
+
+ return result;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c
new file mode 100644
index 000000000..9fd9e2608
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/button.c
@@ -0,0 +1,111 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/button.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the button feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Button demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Button_demo(void)
+{
+ int32_t result = 0;
+
+ printf("TEST OF BUTTONS\n");
+
+ /* ----------------- */
+ /* Test in GPIO mode */
+ /* ----------------- */
+ /* Initialize buttons */
+ if (BSP_PB_Init(BUTTON_USER, BUTTON_MODE_GPIO) != BSP_ERROR_NONE) result--;
+
+ /* Check buttons state */
+ if (BSP_PB_GetState(BUTTON_USER) != 0) result--;
+
+ /* Ask user to press buttons and check results */
+ printf("Please press user button\n");
+ while (BSP_PB_GetState(BUTTON_USER) != 1);
+ printf("User button pressed\n");
+
+ /* De-initialize buttons */
+ if (BSP_PB_DeInit(BUTTON_USER) != BSP_ERROR_NONE) result--;
+
+ HAL_Delay(1000);
+
+ /* ----------------- */
+ /* Test in EXTI mode */
+ /* ----------------- */
+ /* Initialize buttons */
+ UserButtonPressed = 0;
+ if (BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI) != BSP_ERROR_NONE) result--;
+
+ /* Check buttons state */
+ if (BSP_PB_GetState(BUTTON_USER) != 0) result--;
+
+ /* Ask user to press buttons and check results */
+ printf("Please press User button\n");
+ while (UserButtonPressed == 0);
+ printf("User button pressed\n");
+
+ HAL_Delay(1000);
+ UserButtonPressed = 0;
+
+ /* Re-ask user to press buttons and check results */
+ printf("Please press one more time User button\n");
+ while (UserButtonPressed == 0);
+ printf("User button pressed\n");
+
+ HAL_Delay(1000);
+ UserButtonPressed = 0;
+
+ /* De-initialize buttons */
+ if (BSP_PB_DeInit(BUTTON_USER) != BSP_ERROR_NONE) result--;
+
+ /*restore button now, else next keypress is not detected anymore */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c
new file mode 100644
index 000000000..04a3c0363
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/com.c
@@ -0,0 +1,84 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/com.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the com feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Com demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Com_demo(void)
+{
+ int32_t result = 0;
+#if (USE_BSP_COM_FEATURE > 0 )
+ COM_InitTypeDef COM_Init;
+
+ /* Initialize COM init structure */
+ COM_Init.BaudRate = 38400;
+ COM_Init.WordLength = UART_WORDLENGTH_8B;
+ COM_Init.StopBits = COM_STOPBITS_1;
+ COM_Init.Parity = COM_PARITY_NONE;
+ COM_Init.HwFlowCtl = COM_HWCONTROL_NONE;
+
+ /****************/
+ /* Test of COM1 */
+ /****************/
+ /* Initialize COM */
+ if (BSP_COM_Init(COM1, &COM_Init) != BSP_ERROR_NONE) result--;
+
+#if (USE_COM_LOG == 1)
+ /* Set COM used for log */
+ if (BSP_COM_SelectLogPort(COM1) != BSP_ERROR_NONE) result--;
+#endif
+
+ /* Print data on COM */
+ printf("TEST OF COM1\n");
+
+ /* De-initialize COM */
+ if (BSP_COM_DeInit(COM1) != BSP_ERROR_NONE) result--;
+#endif /* USE_BSP_COM_FEATURE */
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c
new file mode 100644
index 000000000..ff7fc709f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/idd.c
@@ -0,0 +1,304 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/idd.c
+ * @author MCD Application Team
+ * @brief This example describe how to configure the IDD current measurement
+ * in the STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+#if (USE_BSP_IO_CLASS == 1)
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+#define IDD_VALUE_STRING_SIZE 4
+#define IDD_UNIT_STRING_SIZE 2
+
+typedef struct
+{
+ char value[IDD_VALUE_STRING_SIZE + 1]; /* 3 significant digit only */
+ char unit[IDD_UNIT_STRING_SIZE + 1]; /* 2 letters */
+ uint32_t value_na; /* value in nano amps */
+ uint8_t error_code; /* 0 means no error else see mfx documentation
+ In case of error please retry */
+} Iddvalue_t;
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+__IO uint32_t IddOnGoing = 0;
+
+/* Private functions ---------------------------------------------------------*/
+static void Idd_Convert(uint32_t Value, Iddvalue_t * idd);
+
+/**
+ * @brief Main program
+ * @param None
+ * @retval None
+ */
+int32_t Idd_demo(void)
+{
+ uint32_t IddValue;
+ int32_t status;
+ Iddvalue_t idd;
+ uint32_t sav_systick;
+
+ printf("--- Test IDD in WFI mode ---, Check JP13 is on 1-2 IDD.\n");
+ printf("Expected value ~ 5 mA, please wait 3 seconds...\n");
+
+ /*## IDD Initialization ############################*/
+ if(BSP_IDD_Init(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_EnableIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_StartMeasurement(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ /* Enable Power Control clock */
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* Suspend HAL tick irq */
+ HAL_SuspendTick();
+
+ IddOnGoing = 1;
+
+ __WFI();
+
+ /* Resume HAL tick irq */
+ HAL_ResumeTick();
+
+ while(IddOnGoing == 1);
+
+ if(BSP_IDD_ClearIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_GetValue(0, &IddValue) < 0)
+ {
+ Error_Handler();
+ }
+
+ /* Fill value in Nano amps */
+ idd.value_na = 10 * IddValue;
+
+ /* Convert Idd value in order to display it on LCD glass */
+ Idd_Convert(IddValue, &idd);
+
+ printf("Measured value = %s %s\n", idd.value, idd.unit);
+
+ if(BSP_IDD_DisableIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_DeInit(0) < 0)
+ {
+ Error_Handler();
+ }
+
+
+ /*## IDD Config ############################*/
+ printf("--- Test IDD config in RUN Mode ---\n");
+
+ if(BSP_IDD_Init(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_EnableIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ for (uint32_t j= 0; j<3; j++)
+ {
+ for (uint32_t i= 0; i<8; i++)
+ {
+ BSP_IDD_Config_t IddConfig;
+
+ switch (j)
+ {
+ case 0:
+ IddConfig.PreDelay = 10 * i * i * i;
+ IddConfig.AcquisitionDuration = 10 * i * i * i;
+ break;
+ case 1:
+ IddConfig.PreDelay = 10 * i * i * i;
+ IddConfig.AcquisitionDuration = 0;
+ break;
+ case 2:
+ IddConfig.PreDelay = 0;
+ IddConfig.AcquisitionDuration = 20 * i * i * i;
+ break;
+ default:
+ Error_Handler();
+ break;
+ }
+
+ printf("PreDelay = %04ld ms; AcquisitionDuration = %04ld ms ", IddConfig.PreDelay, IddConfig.AcquisitionDuration);
+
+ status = BSP_IDD_Config(0, &IddConfig);
+
+ if(status < 0)
+ {
+ if (status == BSP_ERROR_WRONG_PARAM)
+ {
+ printf("BSP_IDD_Config Bad parameter\n");
+ }
+ else
+ {
+ Error_Handler();
+ }
+ }
+
+ HAL_Delay(200);
+
+ sav_systick = HAL_GetTick();
+
+ if(BSP_IDD_StartMeasurement(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(status == BSP_ERROR_NONE)
+ {
+ IddOnGoing = 1;
+
+ while(IddOnGoing == 1);
+
+ if(BSP_IDD_ClearIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_GetValue(0, &IddValue) < 0)
+ {
+ Error_Handler();
+ }
+
+ /* Fill value in Nano amps */
+ idd.value_na = 10 * IddValue;
+
+ /* Convert Idd value in order to display it on LCD glass */
+ Idd_Convert(IddValue, &idd);
+
+ printf("Measured value = %s %s ", idd.value, idd.unit);
+ printf("Expected time = %04ld ms; Elapsed Time = %04ld ms\n", \
+ IddConfig.PreDelay + IddConfig.AcquisitionDuration, \
+ HAL_GetTick() - sav_systick \
+ );
+ }
+ }
+ }
+
+ if(BSP_IDD_DisableIT(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ if(BSP_IDD_DeInit(0) < 0)
+ {
+ Error_Handler();
+ }
+
+ printf("--- End of Test IDD ---\n\n");
+
+
+ return 0;
+}
+
+/**
+ * @brief Convert value to display correct amper unit.
+ * @param None
+ * @retval None
+ */
+static void Idd_Convert(uint32_t Value, Iddvalue_t * idd)
+{
+ float TempIddDisplay = 0;
+ idd->value[0]=0;
+ idd->unit[0]=0;
+
+ TempIddDisplay = (float) Value * 10;
+
+ if (TempIddDisplay < 1000){ /* Value in nano amps */
+ sprintf(idd->value, "%.0f", TempIddDisplay);
+ sprintf(idd->unit, "nA");
+ }else{ /* Value in micro amps */
+ TempIddDisplay = TempIddDisplay / 1000;
+ if (TempIddDisplay < 10){
+ sprintf(idd->value, "%.2f", TempIddDisplay);
+ sprintf(idd->unit, "uA");
+ }else if (TempIddDisplay < 100){
+ sprintf(idd->value, "%.1f", TempIddDisplay);
+ sprintf(idd->unit, "uA");
+ }else if (TempIddDisplay < 1000){
+ sprintf(idd->value, "%.0f", TempIddDisplay);
+ sprintf(idd->unit, "uA");
+ }else{ /* Value in milli Amp */
+ TempIddDisplay = TempIddDisplay/1000;
+ if (TempIddDisplay < 10){
+ sprintf(idd->value, "%.2f", TempIddDisplay);
+ sprintf(idd->unit, "mA");
+ }else if (TempIddDisplay < 100){
+ sprintf(idd->value, "%.1f", TempIddDisplay);
+ sprintf(idd->unit, "mA");
+ }else if (TempIddDisplay < 1000){
+ sprintf(idd->value, "%.0f", TempIddDisplay);
+ sprintf(idd->unit, "mA");
+ }
+ }
+ }
+}
+
+
+/**
+ * @brief EXTI line detection callbacks.
+ * @param GPIO_Pin: Specifies the pins connected EXTI line
+ * @retval None
+ */
+void BSP_IDD_Callback()
+{
+ IddOnGoing = 0;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c
new file mode 100644
index 000000000..3b4fea36b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/io.c
@@ -0,0 +1,129 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/io.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the IO feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+#if (USE_BSP_IO_CLASS == 1)
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief IO demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Io_demo(void)
+{
+ int32_t result = 0;
+ BSP_IO_Init_t Init;
+
+ printf("TEST OF IO\n");
+
+ /*****************/
+ /* Initialize IO */
+ /*****************/
+ Init.Pin = IO_PIN_7;
+ Init.Mode = IO_MODE_OUTPUT_PP;
+ Init.Pull = IO_PULLUP;
+ /* Test with wrong parameters */
+ if (BSP_IO_Init(1, &Init) != BSP_ERROR_WRONG_PARAM) result--;
+ if (BSP_IO_Init(0, NULL) != BSP_ERROR_WRONG_PARAM) result--;
+
+ /* Test with correct parameters */
+ if (BSP_IO_Init(0, &Init) != BSP_ERROR_NONE) result--; /* LED6 */
+ Init.Pin = IO_PIN_0;
+ Init.Mode = IO_MODE_IT_LOW_LEVEL;
+ Init.Pull = IO_PULLUP;
+ if (BSP_IO_Init(0, &Init) != BSP_ERROR_NONE) result--; /* JOY_SEL */
+
+ /**************************/
+ /* Write, read, toggle IO */
+ /**************************/
+ /* Test with wrong parameters */
+ if (BSP_IO_WritePin(1, IO_PIN_7, IO_PIN_RESET) != BSP_ERROR_WRONG_PARAM) result--;
+ if (BSP_IO_ReadPin(1, IO_PIN_7) != BSP_ERROR_WRONG_PARAM) result--;
+ if (BSP_IO_TogglePin(1, IO_PIN_7) != BSP_ERROR_WRONG_PARAM) result--;
+
+ /* Test with correct parameters */
+ if (BSP_IO_WritePin(0, IO_PIN_7, IO_PIN_RESET) != BSP_ERROR_NONE) result--;
+ printf("Check that LED4 is ON\n");
+ if (CheckResult() != 0U) result--;
+ if (BSP_IO_ReadPin(0, IO_PIN_7) != IO_PIN_RESET) result--;
+
+ if (BSP_IO_TogglePin(0, IO_PIN_7) != BSP_ERROR_NONE) result--;
+ printf("Check that LED4 is OFF\n");
+ if (CheckResult() != 0U) result--;
+ if (BSP_IO_ReadPin(0, IO_PIN_7) != IO_PIN_SET) result--;
+
+ /********************/
+ /* Get and clear IT */
+ /********************/
+ /* Test with wrong parameters */
+ if (BSP_IO_GetIT(1, IO_PIN_0) != BSP_ERROR_WRONG_PARAM) result--;
+ if (BSP_IO_ClearIT(1, IO_PIN_0) != BSP_ERROR_WRONG_PARAM) result--;
+
+ /* Test with correct parameters */
+ if (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_RESET) result--;
+ printf("Please press JOY_SEL\n");
+ while (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_SET);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ if (BSP_IO_ClearIT(0, IO_PIN_0) != BSP_ERROR_NONE) result--;
+ if (BSP_IO_GetIT(0, IO_PIN_0) != IO_PIN_IT_RESET) result--;
+
+ /********************/
+ /* De-Initialize IO */
+ /* Test with wrong parameters */
+ if (BSP_IO_DeInit(1) != BSP_ERROR_WRONG_PARAM) result--;
+
+ /* Test with correct parameters */
+ if (BSP_IO_DeInit(0) != BSP_ERROR_NONE) result--;
+
+ if (result==0) printf(" Passed\n");
+ else printf(" Failed\n");
+
+ return result;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c
new file mode 100644
index 000000000..f8a30585c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/joystick.c
@@ -0,0 +1,150 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/joystick.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the joystick feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+
+#if (USE_BSP_IO_CLASS == 1)
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+__IO JOYPin_TypeDef JoyPinPressed = JOY_NONE;
+uint32_t JoyStickDemo = 0;
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+ * @brief JOY demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Joy_demo(void)
+{
+ int32_t result = 0;
+
+ printf("TEST OF JOYSTICK\n");
+ printf(" mode GPIO\n");
+
+ /*********************/
+ /* Test in GPIO mode */
+ /*********************/
+ /* Initialize joystick */
+ if (BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+ /* Test of BSP_JOY_GetState function */
+ printf("Please press JOY_SEL\n");
+ while (BSP_JOY_GetState(JOY1) != JOY_SEL);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+
+ printf("Please press JOY_UP\n");
+ while (BSP_JOY_GetState(JOY1) != JOY_UP);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+
+ printf("Please press JOY_DOWN\n");
+ while (BSP_JOY_GetState(JOY1) != JOY_DOWN);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+
+ printf("Please press JOY_RIGHT\n");
+ while (BSP_JOY_GetState(JOY1) != JOY_RIGHT);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+
+ printf("Please press JOY_LEFT\n");
+ while (BSP_JOY_GetState(JOY1) != JOY_LEFT);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+
+ /* De-Initialize joystick */
+ if (BSP_JOY_DeInit(JOY1, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+ /*********************/
+ /* Test in EXTI mode */
+ /*********************/
+ printf(" mode EXTI (IRQ)\n");
+ /* Initialize joystick */
+ if (BSP_JOY_Init(JOY1, JOY_MODE_EXTI, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+ printf("Please press JOY_SEL\n");
+ while (JoyPinPressed != JOY_SEL);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ JoyPinPressed = JOY_NONE;
+
+ printf("Please press JOY_UP\n");
+ while (JoyPinPressed != JOY_UP);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ JoyPinPressed = JOY_NONE;
+
+ printf("Please press JOY_DOWN\n");
+ while (JoyPinPressed != JOY_DOWN);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ JoyPinPressed = JOY_NONE;
+
+ printf("Please press JOY_RIGHT\n");
+ while (JoyPinPressed != JOY_RIGHT);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ JoyPinPressed = JOY_NONE;
+
+ printf("Please press JOY_LEFT\n");
+ while (JoyPinPressed != JOY_LEFT);
+ printf("OK\n");
+ HAL_Delay(1000); /* Debounce time */
+ JoyPinPressed = JOY_NONE;
+
+ /* De-Initialize joystick */
+ if (BSP_JOY_DeInit(JOY1, JOY_ALL) != BSP_ERROR_NONE) result--;
+
+ if (result == 0) printf(" Passed\n");
+ else printf(" Failed\n");
+
+ return result;
+}
+
+void BSP_JOY_Callback(JOY_TypeDef JOY, JOYPin_TypeDef JoyPin)
+{
+ JoyPinPressed = JoyPin;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+#endif /* #if (USE_BSP_IO_CLASS == 1) */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c
new file mode 100644
index 000000000..15f3f79c6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/lcd.c
@@ -0,0 +1,553 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/lcd.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use LCD drawing features in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define LCD_FEATURES_NUM 6
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static uint8_t LCD_Feature = 0;
+/* Private function prototypes -----------------------------------------------*/
+static void LCD_SetHint(void);
+static void LCD_Show_Feature(uint8_t feature);
+static void ReadPixelTest(void);
+static void BrightnessTest(void);
+/* Private functions ---------------------------------------------------------*/
+
+
+/**
+ * @brief LCD demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Lcd_demo(void)
+{
+ int32_t result = 0;
+ uint32_t Brightness;
+ uint32_t Xsize, Ysize;
+ uint32_t k;
+ uint32_t Orientation[4] = {LCD_ORIENTATION_PORTRAIT, LCD_ORIENTATION_LANDSCAPE, LCD_ORIENTATION_PORTRAIT_ROT180, LCD_ORIENTATION_LANDSCAPE_ROT180};
+ char* Text[4] = {"portrait", "landscape", "portrait with 180 degree rotation", "landscape with 180 degree rotation"};
+
+ Point triangle1[3] = {{145, 5}, {145, 45}, {185, 45}};
+ Point triangle2[3] = {{190, 45}, {230, 45}, {230, 5}};
+ uint32_t Pixel;
+
+ for (k = 0; k < 4; k++)
+ {
+ /********************/
+ /* TEST WITHOUT GUI */
+ /********************/
+ printf("\r\nTest with orientation %s\n", Text[k]);
+
+ /* Initialize LCD */
+ if (BSP_LCD_Init(0, Orientation[k]) != BSP_ERROR_NONE) result--;
+
+ /* Set the brightness */
+ if (BSP_LCD_SetBrightness(0, 50) != BSP_ERROR_COMPONENT_FAILURE) result--;
+
+ /* Get the brightness */
+ if (BSP_LCD_GetBrightness(0, &Brightness) != BSP_ERROR_COMPONENT_FAILURE) result--;
+
+ /* Get the display Xsize */
+ if (BSP_LCD_GetXSize(0, &Xsize) != BSP_ERROR_NONE) result--;
+ if ((Orientation[k] == LCD_ORIENTATION_PORTRAIT) || (Orientation[k] == LCD_ORIENTATION_PORTRAIT_ROT180))
+ {
+ if (Xsize != 240U) result--;
+ }
+ else
+ {
+ if (Xsize != 320U) result--;
+ }
+
+ /* Get the display Ysize */
+ if (BSP_LCD_GetYSize(0, &Ysize) != BSP_ERROR_NONE) result--;
+ if ((Orientation[k] == LCD_ORIENTATION_PORTRAIT) || (Orientation[k] == LCD_ORIENTATION_PORTRAIT_ROT180))
+ {
+ if (Ysize != 320U) result--;
+ }
+ else
+ {
+ if (Ysize != 240U) result--;
+ }
+
+ /* Clean display */
+ uint32_t i, j;
+
+ for (i = 0; i < Xsize; i++)
+ {
+ for (j = 0; j < Ysize; j++)
+ {
+ if (BSP_LCD_WritePixel(0, i, j, LCD_COLOR_RGB565_WHITE) != BSP_ERROR_NONE) result--;
+ }
+ }
+
+ /* Set the display on */
+ if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+ /* Display a brown rectangle pixel by pixel */
+ for (i = 0; i < 60; i++)
+ {
+ for (j = 0; j < 120; j++)
+ {
+ if (BSP_LCD_WritePixel(0, i, j, LCD_COLOR_RGB565_DARKGREEN) != BSP_ERROR_NONE) result--;
+ }
+ }
+
+ /* Get pixel */
+ if (BSP_LCD_ReadPixel(0, 20, 21, &Pixel) != BSP_ERROR_NONE) result--;
+ if (Pixel != LCD_COLOR_RGB565_DARKGREEN) result--;
+
+ /* Display a red rectangle */
+ if (BSP_LCD_FillRect(0, 80, 20, 80, 60, LCD_COLOR_RGB565_RED) != BSP_ERROR_NONE) result--;
+
+ /* Display a green horizontal line */
+ if (BSP_LCD_DrawHLine(0, 80, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+ /* Display a green vertical line */
+ if (BSP_LCD_DrawVLine(0, 80, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+ /* Display a green horizontal line */
+ if (BSP_LCD_DrawHLine(0, 80, 210, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+ /* Display a green vertical line */
+ if (BSP_LCD_DrawVLine(0, 170, 120, 90, LCD_COLOR_RGB565_GREEN) != BSP_ERROR_NONE) result--;
+
+ /* Display a bitmap */
+ if (BSP_LCD_DrawBitmap(0, 85, 135, (uint8_t *)stlogo) != BSP_ERROR_NONE) result--;
+
+ HAL_Delay(1000);
+
+ /* Set the display off */
+ if (BSP_LCD_DisplayOff(0) != BSP_ERROR_NONE) result--;
+
+ HAL_Delay(1000);
+
+ /* Set the display on */
+ if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* De-initialize LCD */
+ if (BSP_LCD_DeInit(0) != BSP_ERROR_NONE) result--;
+
+ HAL_Delay(1000);
+
+ /*****************/
+ /* TEST WITH GUI */
+ /*****************/
+ printf("\r\nTest with orientation %s and GUI\n", Text[k]);
+
+ /* Initialize LCD */
+ if (BSP_LCD_Init(0, Orientation[k]) != BSP_ERROR_NONE) result--;
+
+ /* Set GUI functions */
+ UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+ UTIL_LCD_SetDevice(0);/* SetDevice after funcDriver is set */
+
+ /* Clear screen */
+ BSP_LCD_Clear(0, LCD_COLOR_RGB565_WHITE);
+
+ /* Set the display on */
+ if (BSP_LCD_DisplayOn(0) != BSP_ERROR_NONE) result--;
+
+ /* Draw a black pixel */
+ UTIL_LCD_SetPixel(25, 25, UTIL_LCD_COLOR_BLACK);
+
+ /* Draw a yellow circle */
+ UTIL_LCD_DrawCircle(25, 25, 20, UTIL_LCD_COLOR_YELLOW);
+
+ /* Fill a magenta circle */
+ UTIL_LCD_FillCircle(70, 25, 20, UTIL_LCD_COLOR_MAGENTA);
+
+ /* Draw a blue vertical line */
+ UTIL_LCD_DrawVLine(95, 5, 40, UTIL_LCD_COLOR_BLUE);
+
+ /* Draw a red horizontal line */
+ UTIL_LCD_DrawHLine(100, 25, 40, UTIL_LCD_COLOR_RED);
+
+ /* Draw a green triangle */
+ UTIL_LCD_DrawPolygon(triangle1, 3, UTIL_LCD_COLOR_GREEN);
+
+ /* Fill a cyan triangle */
+ UTIL_LCD_FillPolygon(triangle2, 3, UTIL_LCD_COLOR_CYAN);
+
+ /* Draw a gray rectangle */
+ UTIL_LCD_DrawRect(5, 50, 40, 20, UTIL_LCD_COLOR_GRAY);
+
+ /* Fill a brown rectangle */
+ UTIL_LCD_FillRect(50, 50, 40, 20, UTIL_LCD_COLOR_BROWN);
+
+ /* Draw a orange ellipse */
+ UTIL_LCD_DrawEllipse(115, 60, 20, 10, UTIL_LCD_COLOR_ORANGE);
+
+ /* Fill a dark blue ellipse */
+ UTIL_LCD_FillEllipse(170, 60, 20, 10, UTIL_LCD_COLOR_DARKBLUE);
+
+ /* Display text */
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAtLine(3, (uint8_t*)"Test of LCD");
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_ORANGE);
+ UTIL_LCD_DisplayStringAt(0, 112, (uint8_t*)"Test of LCD", CENTER_MODE);
+
+ /* Draw bitmap */
+ UTIL_LCD_DrawBitmap(5, 130, (uint8_t *)stlogo);
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* De-initialize LCD */
+ if (BSP_LCD_DeInit(0) != BSP_ERROR_NONE) result--;
+ }
+
+ BSP_LCD_Init(0, Orientation[1]);
+ return result;
+}
+
+/**
+ * @brief LCD demo
+ * @param None
+ * @retval None
+ */
+void LCD_demo (void)
+{
+ LCD_SetHint();
+ LCD_Feature = 0;
+ LCD_Show_Feature (LCD_Feature);
+
+ while (1)
+ {
+
+ if(CheckForUserInput() > 0)
+ {
+ if(++LCD_Feature < LCD_FEATURES_NUM)
+ {
+ LCD_Show_Feature (LCD_Feature);
+ }
+ else
+ {
+ return;
+ }
+ }
+ HAL_Delay(100);
+ }
+}
+
+/**
+ * @brief Display LCD demo hint
+ * @param None
+ * @retval None
+ */
+static void LCD_SetHint(void)
+{
+ uint32_t x_size, y_size;
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Clear the LCD */
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+ /* Set LCD Demo description */
+
+ BSP_LCD_FillRect(0, 0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE );
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"LCD", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example shows the different", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"LCD Features, use Tamper push-button to display", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"next page", CENTER_MODE);
+
+ /* Set the LCD Text Color */
+ UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+ }
+
+/**
+ * @brief Show LCD Features
+ * @param feature : feature index
+ * @retval None
+ */
+static void LCD_Show_Feature(uint8_t feature)
+{
+ Point Points[]= {{220, 220}, {280, 180}, {320, 180}, {370, 220}, {370, 260}, {320, 310}, {280, 310}, {220, 260}};
+ Point Points2[3];
+ uint32_t x_size, y_size;
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ Points2[0].X = x_size - 80;
+ Points2[0].Y = 150;
+ Points2[1].X = x_size - 20;
+ Points2[1].Y = 150;
+ Points2[2].X = x_size - 20;
+ Points2[2].Y = 200;
+
+ BSP_LCD_FillRect(0, 12, 92, x_size - 24, y_size- 104, LCD_COLOR_RGB565_WHITE );
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+
+ switch (feature)
+ {
+ case 0:
+ /* Text Feature */
+ UTIL_LCD_DisplayStringAt(14, 100, (uint8_t *)"Left aligned Text", LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(0, 115, (uint8_t *)"Center aligned Text", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(14, 130, (uint8_t*)"Right aligned Text", RIGHT_MODE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(14, 180, (uint8_t *)"Font24", LEFT_MODE);
+ UTIL_LCD_SetFont(&Font20);
+ UTIL_LCD_DisplayStringAt(x_size/2 -20, 180, (uint8_t *)"Font20", LEFT_MODE);
+ UTIL_LCD_SetFont(&Font16);
+ UTIL_LCD_DisplayStringAt(x_size - 80, 184, (uint8_t *)"Font16", LEFT_MODE);
+ HAL_Delay(2000);
+ break;
+
+ case 1:
+
+ /* Draw misc. Shapes */
+ UTIL_LCD_DrawRect ( 20, 100, 60 , 40, UTIL_LCD_COLOR_BLACK);
+ BSP_LCD_FillRect(0, 100, 100, 60 , 40, LCD_COLOR_RGB565_BLACK);
+
+// UTIL_LCD_DrawCircle( x_size - 120, 120, 20);
+// UTIL_LCD_FillCircle( x_size - 40, 120, 20, UTIL_LCD_COLOR_GRAY);
+
+ UTIL_LCD_FillPolygon(Points, 8, UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DrawEllipse(130, 170, 30, 20, UTIL_LCD_COLOR_RED);
+ UTIL_LCD_FillEllipse(200, 170, 30, 20, UTIL_LCD_COLOR_RED);
+
+ BSP_LCD_DrawHLine(0, 20, y_size - 30, x_size / 5, LCD_COLOR_RGB565_BLACK);
+ UTIL_LCD_DrawLine ( 100, y_size - 20, 230, y_size- 50, UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DrawLine ( 100, y_size- 50, 230, y_size- 20, UTIL_LCD_COLOR_BLACK);
+
+ UTIL_LCD_DrawPolygon(Points2, 3, UTIL_LCD_COLOR_YELLOW);
+ HAL_Delay(2000);
+ break;
+
+ case 2:
+ /* Draw Bitmap */
+ BSP_LCD_DrawBitmap(0, 20, 100, (uint8_t *)stlogo);
+ HAL_Delay(500);
+
+ BSP_LCD_DrawBitmap(0, x_size/2 - 40, 100, (uint8_t *)stlogo);
+ HAL_Delay(500);
+
+ BSP_LCD_DrawBitmap(0, x_size-100, 100, (uint8_t *)stlogo);
+ HAL_Delay(500);
+
+ BSP_LCD_DrawBitmap(0, 20, y_size- 80, (uint8_t *)stlogo);
+ HAL_Delay(500);
+
+ BSP_LCD_DrawBitmap(0, x_size/2 - 40, y_size- 80, (uint8_t *)stlogo);
+ HAL_Delay(500);
+
+ BSP_LCD_DrawBitmap(0, x_size-100, y_size- 80, (uint8_t *)stlogo);
+ HAL_Delay(500);
+ break;
+
+ case 3:
+ /* Set LCD Brightness */
+ BrightnessTest();
+ break;
+
+ case 4:
+ /* LCD Read Pixel */
+ ReadPixelTest();
+ break;
+ case 5:
+
+ //LCD_SetFuncDriver(&LCD_Driver);
+ UTIL_LCD_SetFont(&Font20);
+ /* Clear the LCD */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+ BSP_LCD_GetXSize(0, &x_size);
+
+ BSP_LCD_FillRect(0,0, 0, x_size, 80, UTIL_LCD_COLOR_WHITE);
+
+ /* Set the LCD Text Color */
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: LANDSCAPE", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB565", CENTER_MODE);
+ HAL_Delay(2000);
+ //LCD_SetFuncDriver(&LCD_Driver);
+ UTIL_LCD_SetFont(&Font20);
+ /* Clear the LCD */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+ BSP_LCD_GetXSize(0, &x_size);
+
+#if 0
+ BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGB565_WHITE);
+ /* Set the LCD Text Color */
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: PORTRAIT", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB565", CENTER_MODE);
+ HAL_Delay(2000);
+
+ BSP_LCD_DeInit(0);
+ BSP_LCD_Init(0, LCD_ORIENTATION_PORTRAIT);
+ //LCD_SetFuncDriver(&LCD_Driver);
+ UTIL_LCD_SetFont(&LCD_DEFAULT_FONT);
+ /* Clear the LCD */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+ BSP_LCD_GetXSize(0, &x_size);
+
+ BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGD565_WHITE);
+ /* Set the LCD Text Color */
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: PORTRAIT", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB888", CENTER_MODE);
+ HAL_Delay(2000);
+#endif
+ BSP_LCD_DeInit(0);
+ BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE);
+ //LCD_SetFuncDriver(&LCD_Driver);
+ UTIL_LCD_SetFont(&Font20);
+ /* Clear the LCD */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_BLUE);
+ BSP_LCD_GetXSize(0, &x_size);
+
+ BSP_LCD_FillRect(0, 0, 0, x_size, 80, LCD_COLOR_RGB565_WHITE);
+ /* Set the LCD Text Color */
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2, (uint8_t *)"Orientation: LANDSCAPE", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)"Pixel Format: RGB888", CENTER_MODE);
+ HAL_Delay(2000);
+
+ break;
+ }
+}
+
+/**
+ * @brief LCD Read Pixel test
+ * @param None
+ * @retval None
+ */
+static void ReadPixelTest(void)
+{
+ uint16_t i, j, k;
+ uint32_t x_size, y_size, read_pixel;
+ uint32_t colors[23] = {UTIL_LCD_COLOR_BLUE, UTIL_LCD_COLOR_GREEN, UTIL_LCD_COLOR_RED, UTIL_LCD_COLOR_CYAN, UTIL_LCD_COLOR_MAGENTA, UTIL_LCD_COLOR_YELLOW,
+ UTIL_LCD_COLOR_LIGHTBLUE, UTIL_LCD_COLOR_LIGHTGREEN, UTIL_LCD_COLOR_LIGHTRED, UTIL_LCD_COLOR_LIGHTMAGENTA,
+ UTIL_LCD_COLOR_LIGHTYELLOW, UTIL_LCD_COLOR_DARKBLUE, UTIL_LCD_COLOR_DARKGREEN, UTIL_LCD_COLOR_DARKRED, UTIL_LCD_COLOR_DARKCYAN,
+ UTIL_LCD_COLOR_DARKMAGENTA, UTIL_LCD_COLOR_DARKYELLOW, UTIL_LCD_COLOR_LIGHTGRAY, UTIL_LCD_COLOR_GRAY, UTIL_LCD_COLOR_DARKGRAY,
+ UTIL_LCD_COLOR_BLACK, UTIL_LCD_COLOR_BROWN, UTIL_LCD_COLOR_ORANGE };
+
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+#if (LCD_HX8347D == 1)
+ for(k = 0; k < 23; k++)
+ {
+ UTIL_LCD_Clear(colors[k]);
+
+ BSP_LCD_ReadPixel(0, i++, j++, &read_pixel);
+ if(read_pixel != colors[k])
+ {
+ BSP_LED_On(LED_RED);
+ }
+ }
+#else
+ for(k = 0; k < 23; k++)
+ {
+ UTIL_LCD_Clear(colors[k]);
+ for(j = 0; j < y_size; j++)
+ {
+ for(i = 0; i < x_size; i++)
+ {
+ BSP_LCD_ReadPixel(0, i,j, &read_pixel);
+ if(read_pixel != colors[k])
+ {
+ BSP_LED_On(LED_RED);
+ }
+ }
+ }
+ }
+#endif /* (LCD_HX8347D == 1)*/
+}
+
+/**
+ * @brief Show LCD Brightness Feature
+ * @param None
+ * @retval None
+ */
+static void BrightnessTest(void)
+{
+ uint8_t counter = 100;
+ uint8_t text[30];
+ uint32_t y_size;
+
+ BSP_LCD_GetXSize(0, &y_size);
+
+#if (LCD_HX8347D == 1)
+ /* brightness control is not supported by controller */
+ BSP_LCD_SetBrightness(0, counter);
+ sprintf((char*)text," Brightness = %d ",counter);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+ HAL_Delay(50);
+#else
+ while(counter > 0)
+ {
+ BSP_LCD_SetBrightness(0, counter);
+ sprintf((char*)text," Brightness = %d ",counter);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+ counter = counter - 10/*counter--*/;
+ HAL_Delay(50);
+ }
+ while(counter <= 100)
+ {
+ BSP_LCD_SetBrightness(0, counter);
+ sprintf((char*)text," Brightness = %d ",counter);
+ UTIL_LCD_DisplayStringAt(0, y_size/2 + 45, (uint8_t *)text, CENTER_MODE);
+ counter = counter + 10/*counter++*/;
+ HAL_Delay(50);
+ }
+#endif /* LCD_HX8347D*/
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c
new file mode 100644
index 000000000..30e30a2e9
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/led.c
@@ -0,0 +1,157 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/led.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the led feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Led demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Led_demo(void)
+{
+ int32_t result = 0;
+
+ printf("TEST OF LEDs\n");
+
+ /* Initialize the LEDs */
+ if (BSP_LED_Init(LED1) != BSP_ERROR_NONE) result--;
+ if (BSP_LED_Init(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ if (BSP_LED_Init(LED2) != BSP_ERROR_NONE) result--;
+ if (BSP_LED_Init(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+ /* Switch on the LEDs */
+ printf("Switch on LED1\n");
+ if (BSP_LED_On(LED1) != BSP_ERROR_NONE) result--;
+ printf("Switch on LED3\n");
+ if (BSP_LED_On(LED3) != BSP_ERROR_NONE) result--;
+
+#if (USE_BSP_IO_CLASS == 1)
+ printf("Switch on LED2\n");
+ if (BSP_LED_On(LED2) != BSP_ERROR_NONE) result--;
+ printf("Switch on LED4\n");
+ if (BSP_LED_On(LED4) != BSP_ERROR_NONE) result--;
+#endif
+ /* Check LEDs states */
+ if (BSP_LED_GetState(LED1) != 1) result--;
+ if (BSP_LED_GetState(LED3) != 1) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ if (BSP_LED_GetState(LED2) != 1) result--;
+ if (BSP_LED_GetState(LED4) != 1) result--;
+#endif
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* Toggle the LEDs */
+ printf("Switch off LED1\n");
+ if (BSP_LED_Toggle(LED1) != BSP_ERROR_NONE) result--;
+ printf("Switch off LED3\n");
+ if (BSP_LED_Toggle(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ printf("Switch off LED2\n");
+ if (BSP_LED_Toggle(LED2) != BSP_ERROR_NONE) result--;
+ printf("Switch off LED4\n");
+ if (BSP_LED_Toggle(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+ /* Check LEDs states */
+ if (BSP_LED_GetState(LED1) != 0) result--;
+ if (BSP_LED_GetState(LED3) != 0) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ if (BSP_LED_GetState(LED2) != 0) result--;
+ if (BSP_LED_GetState(LED4) != 0) result--;
+#endif
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* Toggle the LEDs */
+ printf("Switch on LED1\n");
+ if (BSP_LED_Toggle(LED1) != BSP_ERROR_NONE) result--;
+ printf("Switch on LED3\n");
+ if (BSP_LED_Toggle(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ printf("Switch on LED2\n");
+ if (BSP_LED_Toggle(LED2) != BSP_ERROR_NONE) result--;
+ printf("Switch on LED4\n");
+ if (BSP_LED_Toggle(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* Switch off the LEDs */
+ printf("Switch off LED1\n");
+ if (BSP_LED_Off(LED1) != BSP_ERROR_NONE) result--;
+ printf("Switch off LED3\n");
+ if (BSP_LED_Off(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ printf("Switch off LED2\n");
+ if (BSP_LED_Off(LED2) != BSP_ERROR_NONE) result--;
+ printf("Switch off LED4\n");
+ if (BSP_LED_Off(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+ /* Check result */
+ if (CheckResult() != 0U) result--;
+
+ /* De-Initialize the LEDs */
+ if (BSP_LED_DeInit(LED1) != BSP_ERROR_NONE) result--;
+ if (BSP_LED_DeInit(LED3) != BSP_ERROR_NONE) result--;
+#if (USE_BSP_IO_CLASS == 1)
+ if (BSP_LED_DeInit(LED2) != BSP_ERROR_NONE) result--;
+ if (BSP_LED_DeInit(LED4) != BSP_ERROR_NONE) result--;
+#endif
+
+#if (USE_BSP_IO_CLASS == 1)
+ /* Add a call of BSP_IO_DeInit for a clean exit of this test */
+ if (BSP_IO_DeInit(0) != BSP_ERROR_NONE) result--;
+#endif
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c
new file mode 100644
index 000000000..a79785a27
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/log.c
@@ -0,0 +1,109 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/log.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the LCD Log firmware functions
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "lcd_log.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief LCD Log demo
+ * @param None
+ * @retval None
+ */
+void Log_demo(void)
+{
+ JOYState_TypeDef JoyState = JOY_NONE;
+ uint8_t i = 0;
+
+ /* Wait For User inputs */
+ while(CheckForUserInput() == 0);
+
+ BSP_JOY_Init(JOY_MODE_GPIO);
+
+ /* Initialize LCD Log module */
+ LCD_LOG_Init();
+
+ /* Show Header and Footer texts */
+ LCD_LOG_SetHeader((uint8_t *)"Log Example");
+ LCD_LOG_SetFooter((uint8_t *)"Use Joystick to scroll up/down");
+
+ /* Output User logs */
+ for (i = 0; i < 35; i++)
+ {
+ LCD_UsrLog ("This is Line %d \n", i);
+ }
+
+ HAL_Delay(2000);
+
+ /* Clear Old logs */
+ LCD_LOG_ClearTextZone();
+
+ /* Output new user logs */
+ for (i = 0; i < 70; i++)
+ {
+ LCD_UsrLog ("This is Line %d \n", i);
+ }
+
+ /* Check for joystick user input for scroll (back and forward) */
+ while (1)
+ {
+ JoyState = BSP_JOY_GetState();
+ switch(JoyState)
+ {
+ case JOY_UP:
+ LCD_LOG_ScrollBack();
+ break;
+ case JOY_DOWN:
+ LCD_LOG_ScrollForward();
+ break;
+
+ default:
+ break;
+ }
+ if(CheckForUserInput() > 0)
+ {
+ return;
+ }
+ HAL_Delay (10);
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c
new file mode 100644
index 000000000..f912863b0
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/main.c
@@ -0,0 +1,402 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/main.c
+ * @author MCD Application Team
+ * @brief This example describes how to test the BSP of the STM32G474E-EVAL1 board.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include
+#include "stlogo.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP_Mode
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/***********************************************/
+/* Please uncomment lines to execute more demo */
+/***********************************************/
+BSP_DemoTypedef BSP_examples[]=
+{
+ {Led_demo, "LED"},
+ {Button_demo, "BUTTON"},
+#if (USE_BSP_IO_CLASS == 1)
+ {Io_demo, "IO"},
+// {Joy_demo, "JOYSTICK"},
+ {Lcd_demo, "LCD"},
+// {Idd_demo, "IDD"},
+#endif
+// {Pot_demo, "POTENTIOMETER"}, /* Please test POT without other tests to avoid perturbation from MFX on PA0 */
+
+#if defined(__GNUC__) || defined(__ICCARM__)
+ {AudioPlay_demo, "AUDIO PLAY"},
+#endif
+
+// {AudioRecAnalog_demo, "ANALOG REC"},
+// {SD_demo, "SD polling"},
+// {Com_demo, "COM"}, /* Please test COM without other tests and with USE_COM_LOG = 1 */
+// {SRAM_demo, "SRAM"},
+ {Bus_demo, "BUS"},
+// {QSPI_demo, "QSPI"},
+};
+
+__IO uint32_t UserButtonPressed = 0;
+
+/* Private define ------------------------------------------------------------*/
+#define KEYS_NUMBER 6 /* Button + joystick */
+#define DEBOUNCE 100 /* 100ms */
+#if defined(__GNUC__)
+extern void initialise_monitor_handles(void);
+#endif
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint8_t DemoIndex = 0;
+__IO uint8_t NbLoop = 1;
+uint32_t ButtonState = 0;
+/*
+BSP_SD_CardInfo SD_CardInfo = {0};
+uint8_t SDcard_present = SD_NOT_PRESENT;
+
+uint8_t DataBloc[SD_BLOCK_LEN];
+uint8_t DataBloc4[4*SD_BLOCK_LEN];
+*/
+
+/* Private function prototypes -----------------------------------------------*/
+static void SystemClock_Config(void);
+static void Display_DemoDescription(void);
+static void Flush_scanf(void);
+/* Private functions ---------------------------------------------------------*/
+/**
+ * @brief Main program
+ * @param None
+ * @retval None
+ */
+int main(void)
+{
+#if defined(__GNUC__)
+ initialise_monitor_handles();
+#endif
+ HAL_Init();
+
+ /* Configure the system clock to 170 MHz */
+ SystemClock_Config();
+
+ BSP_LED_Init(LED_RED);
+ BSP_LED_Init(LED1);
+
+ /* Configure JOY Button */
+ if (BSP_JOY_Init(JOY1, JOY_MODE_EXTI, JOY_ALL) != BSP_ERROR_NONE) BSP_LED_On(LED_RED);
+
+ /* LCD initialization */
+ if (BSP_LCD_Init(0, LCD_ORIENTATION_LANDSCAPE) == BSP_ERROR_NONE)
+ {
+ Display_DemoDescription();
+ }
+ else
+ {
+ BSP_LED_On(LED_RED);
+ }
+ /* Configure USER Button */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ /* Run Application */
+ while(1)
+ {
+ if(UserButtonPressed == 1)
+ {
+ UserButtonPressed = 0;
+ BSP_LED_On(LED1);
+ BSP_examples[DemoIndex++].DemoFunc();
+
+ if(DemoIndex >= COUNT_OF_EXAMPLE(BSP_examples))
+ {
+ NbLoop++;
+ DemoIndex = 0;
+ }
+ Display_DemoDescription();
+ }
+ HAL_Delay(400);
+ }
+}
+
+/**
+ * @brief System Clock Configuration
+ * The system Clock is configured as follow :
+ * System Clock source = PLL (HSE)
+ * SYSCLK(Hz) = 170000000
+ * HCLK(Hz) = 170000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 1
+ * APB2 Prescaler = 1
+ * HSI Frequency(Hz) = 16000000
+ * PLL_M = 4
+ * PLL_N = 85
+ * PLL_P = 2
+ * PLL_Q = 2
+ * PLL_R = 2
+ * Flash Latency(WS) = 8
+ * @param None
+ * @retval None
+ */
+static void SystemClock_Config(void)
+{
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+ /* Enable voltage range 1 boost mode for frequency above 150 Mhz */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+ __HAL_RCC_PWR_CLK_DISABLE();
+
+ /* Activate PLL with HSI as source */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ /* Initialization Error */
+ while(1);
+ }
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+ clocks dividers */
+ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
+ RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK)
+ {
+ /* Initialization Error */
+ while(1);
+ }
+
+ /**Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /**Configure the Systick
+ */
+ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+ /* SysTick_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+/**
+ * @brief Display main demo messages
+ * @param None
+ * @retval None
+ */
+static void Display_DemoDescription(void)
+{
+ char desc[58];
+ uint32_t x_size;
+ uint32_t y_size;
+
+ UTIL_LCD_SetFuncDriver(&LCD_Driver); /* SetFunc before setting device */
+ UTIL_LCD_SetDevice(0); /* SetDevice after funcDriver is set */
+
+ BSP_LCD_Clear(0, LCD_COLOR_RGB565_CYAN);
+ BSP_LCD_DisplayOn(0);
+
+ UTIL_LCD_SetFont(&Font20);
+ /* Set the LCD Text Color */
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_LIGHTBLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_DARKBLUE);
+
+ /* Display LCD messages */
+ UTIL_LCD_DisplayStringAt( 0, 10, (uint8_t *)"STM32G474E BSP", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt( 0, 35, (uint8_t *)"Drivers examples", CENTER_MODE);
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Draw Bitmap */
+ BSP_LCD_DrawBitmap(0, (x_size - 80)/2, 65, (uint8_t *)stlogo);
+
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt( 0, y_size - 20, (uint8_t *)"Copyright (c) STMicroelectronics 2019", CENTER_MODE);
+
+ UTIL_LCD_SetFont(&Font16);
+ BSP_LCD_FillRect(0, 0, y_size/2 + 15, x_size, 60, LCD_COLOR_RGB565_BLUE);
+ UTIL_LCD_SetTextColor( UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor( UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DisplayStringAt( 0, y_size / 2 + 30, (uint8_t *)"Press User button to start :", CENTER_MODE);
+ sprintf(desc,"%s example", BSP_examples[DemoIndex].DemoName);
+ UTIL_LCD_DisplayStringAt( 0, y_size/2 + 45, (uint8_t *)desc, CENTER_MODE);
+}
+
+/**
+ * @brief Check for user input
+ * @param None
+* @retval Input state (1 : active / 0 : Inactive)
+ */
+uint8_t CheckForUserInput(void)
+{
+ if(BSP_PB_GetState(BUTTON_USER) == GPIO_PIN_RESET)
+ {
+ while (BSP_PB_GetState(BUTTON_USER) == GPIO_PIN_RESET);
+ return 1 ;
+ }
+ return 0;
+
+}
+
+/**
+ * @brief Ask user for result.
+ * @param None
+ * @retval None
+ */
+uint32_t CheckResult(void)
+{
+ uint32_t result = 0;
+ BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_RIGHT);
+ BSP_JOY_Init(JOY1, JOY_MODE_GPIO, JOY_LEFT);
+
+ printf("If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail) \n");
+
+ while ((BSP_JOY_GetState(JOY1) == JOY_RIGHT) || (BSP_JOY_GetState(JOY1) != JOY_RIGHT));
+ if (BSP_JOY_GetState(JOY1) == JOY_LEFT)
+ {
+ printf("Test is FAIL!!!\n");
+ HAL_Delay(1000);
+ result = 1;
+ }
+ else
+ {
+ printf("Test is PASS\n");
+ HAL_Delay(1000);
+ result = 0;
+ }
+ BSP_JOY_DeInit(JOY1, JOY_RIGHT);
+ BSP_JOY_DeInit(JOY1, JOY_LEFT);
+ return result;
+
+}
+
+/**
+ * @brief Ask user to start the test.
+ * @param None
+ * @retval None
+ */
+void StartTest(void)
+{
+ uint8_t tmp = 0;
+ do {
+ printf("Press s to start the test\n");
+ scanf("%c", &tmp);
+ Flush_scanf();
+ } while (tmp != 's');
+}
+
+/**
+ * @brief Flush scanf buffer until "\n".
+ * @param None
+ * @retval None
+ */
+static void Flush_scanf(void)
+{
+ while ( getchar() != '\n' );
+}
+
+/**
+ * @brief Button Callback
+ * @param Button Specifies the pin connected EXTI line
+ * @retval None
+ */
+void BSP_PB_Callback(Button_TypeDef Button)
+{
+ if(Button == BUTTON_USER)
+ {
+ //if(check_switches(0))
+ {
+ UserButtonPressed = 1;
+ }
+ }
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ BSP_PB_Callback(BUTTON_USER);
+}
+
+void ButtonPendingCallback(void)
+{
+ BSP_PB_Callback(BUTTON_USER);
+}
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @param file: The file name as string.
+ * @param line: The line in file as a number.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ while(1)
+ {
+ /* Toggle LED4 with a period of one second */
+ BSP_LED_Toggle(LED4);
+ HAL_Delay(1000);
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
+}
+#endif /* USE_FULL_ASSERT */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c
new file mode 100644
index 000000000..326a6cf77
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/potentiometer.c
@@ -0,0 +1,94 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/potentiometer.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the potentiometer feature in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Potentiometer demo
+ * @param None
+ * @retval 0 if ok, else value < 0.
+ */
+int32_t Pot_demo(void)
+{
+ int32_t result = 0;
+ int32_t PotValue;
+ uint32_t i;
+
+ printf("TEST OF POTENTIOMETER\n");
+
+ printf("Please put JP5 in position 1-2 (POT))\n");
+
+ StartTest();
+
+ /* Initialize potentiometer */
+ if (BSP_POT_Init(POT1) != BSP_ERROR_NONE) result--;
+
+ printf("Please turn potentiometer button (10 measures will be performed)\n");
+
+ for (i = 0; i < 10; i++)
+ {
+ /* Get potentiometer value */
+ PotValue = BSP_POT_GetLevel(POT1);
+
+ /* Display value or error */
+ if (PotValue < 0)
+ {
+ printf("Error returned by BSP_POT_GetLevel\n");
+ result--;
+ }
+ else
+ {
+ printf("Potentiometer value is %ld percent\n", PotValue);
+ }
+
+ /* Wait 1 second for next measure */
+ HAL_Delay(1000);
+ }
+
+ /* De-initialize potentiometer */
+ if (BSP_POT_DeInit(POT1) != BSP_ERROR_NONE) result--;
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c
new file mode 100644
index 000000000..ade8651dc
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/qspi.c
@@ -0,0 +1,590 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/qspi.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the QSPI in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include
+
+/** @addtogroup STM32G4xx_HAL_Examples
+* @{
+*/
+
+/** @addtogroup BSP
+* @{
+*/
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define BUFFER_SIZE 256U // = MT25QL512ABB_PAGE_SIZE
+#define BLOCK_SIZE MT25QL512ABB_SECTOR_64K
+#define NB_BLOCK 1U
+
+#define QPI_MMP_ADDRESS ((uint32_t *) 0x90000000)
+#define TEST_VALUE_START 0x43 // Test pattern start value. Following data ++...
+
+#define INTERFACE_MODE_NUMBER 7
+#define TRANSFER_RATE_NUMBER 2
+#define DUALFLASH_MODE_NUMBER 2
+#define FLASH_ID_NUMBER 2
+
+/* Private macro -------------------------------------------------------------*/
+#define Xpos_START 20
+#define Ypos_START 80
+#define FONT Font12
+#define CHAR_LINE Font12.Height
+#define CHAR_WIDE Font12.Width
+#define NEXT_LINE {Xpos = Xpos_START; Ypos += CHAR_LINE;}
+
+/* Private variables ---------------------------------------------------------*/
+uint8_t qspi_aTxBuffer[BUFFER_SIZE];
+uint8_t qspi_aRxBuffer[BUFFER_SIZE];
+uint8_t qspi_aErasedBuffer[BUFFER_SIZE];
+uint32_t qspi_MMPBuffer[BUFFER_SIZE];
+
+static BSP_QSPI_Info_t pQSPI_Info; // Flash information
+
+static uint16_t Xpos = Xpos_START, Ypos = Ypos_START;
+
+BSP_QSPI_Init_t Flash;
+
+BSP_QSPI_Interface_t InterfaceMode[INTERFACE_MODE_NUMBER] = {
+ BSP_QSPI_SPI_MODE,
+ BSP_QSPI_SPI_1I2O_MODE,
+ BSP_QSPI_SPI_2IO_MODE,
+ BSP_QSPI_SPI_1I4O_MODE,
+ BSP_QSPI_SPI_4IO_MODE,
+ BSP_QSPI_DPI_MODE,
+ BSP_QSPI_QPI_MODE
+};
+
+char* InterfaceModeText[INTERFACE_MODE_NUMBER] =
+{
+ "SPI_MODE",
+ "SPI_1I2O_MODE",
+ "SPI_2IO_MODE",
+ "SPI_1I4O_MODE",
+ "SPI_4IO_MODE",
+ "DPI_MODE",
+ "QPI_MODE"
+};
+
+BSP_QSPI_Transfer_t TransferRate[TRANSFER_RATE_NUMBER] = {
+ BSP_QSPI_STR_TRANSFER,
+ BSP_QSPI_DTR_TRANSFER
+};
+
+char* TransferRateText[TRANSFER_RATE_NUMBER] =
+{
+ "STR",
+ "DTR"
+};
+
+BSP_QSPI_DualFlash_t DualFlashMode[DUALFLASH_MODE_NUMBER] = {
+ BSP_QSPI_DUALFLASH_DISABLE,
+ BSP_QSPI_DUALFLASH_ENABLE
+};
+
+char* DualFlashModeText[DUALFLASH_MODE_NUMBER] =
+{
+ "SingleFlash",
+ "DualFlash"
+};
+
+uint32_t FlashId[FLASH_ID_NUMBER] = {
+ BSP_QSPI_FLASH_ID_1,
+ BSP_QSPI_FLASH_ID_2
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static void QSPI_SetHint(void);
+static void QSPI_Indirect_Mode(void);
+static void QSPI_MemoryMapped_Mode(void);
+static void QSPI_FlashId(void);
+static void Fill_Buffer(uint8_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset);
+static uint8_t RMABuffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint32_t BufferLength, uint32_t *ErrorAd);
+
+
+/* Private functions ---------------------------------------------------------*/
+/**
+* @brief QSPI tests
+* @param None
+* @retval None
+*/
+int32_t QSPI_demo(void)
+{
+ QSPI_SetHint();
+ UTIL_LCD_SetFont(&FONT);
+ Xpos = Xpos_START;
+ Ypos = Ypos_START;
+
+ /* Read & check the QSPI info */
+ /* Initialize the structure */
+ pQSPI_Info.FlashSize = (uint32_t)0x00;
+ pQSPI_Info.EraseSectorSize = (uint32_t)0x00;
+ pQSPI_Info.EraseSectorsNumber = (uint32_t)0x00;
+ pQSPI_Info.ProgPageSize = (uint32_t)0x00;
+ pQSPI_Info.ProgPagesNumber = (uint32_t)0x00;
+ BSP_QSPI_GetInfo(0, &pQSPI_Info);
+
+ QSPI_Indirect_Mode();
+ QSPI_MemoryMapped_Mode();
+ QSPI_FlashId();
+
+ while(1)
+ {
+ if(CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ return 0;
+ }
+ }
+}
+
+static void QSPI_Indirect_Mode(void)
+{
+ uint32_t Offset;
+ uint32_t i, j, k, l;
+ uint8_t flash_id[6];
+ uint32_t error_code = 0;
+
+ /* Fill the buffer for write operation **************************************/
+ Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+ memset(qspi_aRxBuffer, 0, BUFFER_SIZE);
+
+ /* Loop over dualflash modes ************************************************/
+ for(l = 0; l < DUALFLASH_MODE_NUMBER; l++)
+ {
+ /* Loop over transfer rates ***********************************************/
+ for(k = 0; k < TRANSFER_RATE_NUMBER; k++)
+ {
+ /* Loop over interface modes ********************************************/
+ for(j = 0; j < INTERFACE_MODE_NUMBER; j++)
+ {
+ /* QSPI device configuration */
+ Flash.InterfaceMode = InterfaceMode[j];
+ Flash.TransferRate = TransferRate[k];
+ Flash.DualFlashMode = DualFlashMode[l];
+
+ BSP_QSPI_DeInit(0);
+
+ if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+ }
+ else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+ }
+ else if(BSP_QSPI_ReadID(0, flash_id) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ if(Flash.DualFlashMode == MT25QL512ABB_DUALFLASH_DISABLE)
+ {
+ if((flash_id[0] != 0x20) || (flash_id[1] != 0xBA) || (flash_id[2] != 0x20))
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+ }
+ }
+ else
+ {
+ if((flash_id[0] != 0x20) || (flash_id[1] != 0x20) || (flash_id[2] != 0xBA) ||
+ (flash_id[3] != 0xBA) || (flash_id[4] != 0x20) || (flash_id[5] != 0x20))
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read ID: FAILED.", LEFT_MODE);
+ }
+ }
+ }
+
+ for(i = 0; i < NB_BLOCK; i++)
+ {
+ if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase: FAILED.", LEFT_MODE);
+ }
+ while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+ }
+
+ if(BSP_QSPI_ConfigFlash(0, InterfaceMode[(j+1)%INTERFACE_MODE_NUMBER], TransferRate[(k+1)%TRANSFER_RATE_NUMBER]) != BSP_ERROR_NONE) Error_Handler();
+
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+ }
+
+ if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+ }
+
+ if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+ {
+ error_code++;
+ }
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Indirect", LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(10*CHAR_WIDE), Ypos, (uint8_t*)TransferRateText[k], LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(14*CHAR_WIDE), Ypos, (uint8_t*)DualFlashModeText[l], LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+ if(error_code == 0)
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+ error_code = 0;
+ }
+ NEXT_LINE
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+}
+
+static void QSPI_MemoryMapped_Mode(void)
+{
+ uint32_t Offset;
+ uint32_t i, j, k, l;
+ uint32_t *QSPI_MMP_pointer;
+ uint32_t error_code = 0;
+
+ /* Fill the buffer for write operation *************************************/
+ Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+ memset(qspi_aRxBuffer, 0, BUFFER_SIZE);
+
+ /* Loop over dualflash modes ************************************************/
+ for(l = 0; l < DUALFLASH_MODE_NUMBER; l++)
+ {
+ /* Loop over transfer rates ***********************************************/
+ for(k = 0; k < TRANSFER_RATE_NUMBER; k++)
+ {
+ /* Loop over interface modes ********************************************/
+ for(j = 0; j < INTERFACE_MODE_NUMBER; j++)
+ {
+ /* QSPI device configuration */
+ Flash.InterfaceMode = InterfaceMode[j];
+ Flash.TransferRate = TransferRate[k];
+ Flash.DualFlashMode = DualFlashMode[l];
+
+ BSP_QSPI_DeInit(0);
+
+ if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+ }
+ else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+ }
+
+ for(i = 0; i < NB_BLOCK; i++)
+ {
+ if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase: FAILED.", LEFT_MODE);
+ }
+ while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+ }
+
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+ }
+ }
+
+ if(BSP_QSPI_EnableMemoryMappedMode(0) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap enable: FAILED.", LEFT_MODE);
+ }
+
+ QSPI_MMP_pointer = (uint32_t*)(QPI_MMP_ADDRESS);
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ for(int k = 0; k < BUFFER_SIZE/4; k++)
+ {
+ qspi_MMPBuffer[k] = *(QSPI_MMP_pointer++);
+ qspi_aRxBuffer[4*k] = qspi_MMPBuffer[k] & 0xFF;
+ qspi_aRxBuffer[4*k + 1] = (qspi_MMPBuffer[k] >> 8) & 0xFF;
+ qspi_aRxBuffer[4*k + 2] = (qspi_MMPBuffer[k] >>16) & 0xFF;
+ qspi_aRxBuffer[4*k + 3] = (qspi_MMPBuffer[k] >>24) & 0xFF;
+ }
+
+ if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+ {
+ error_code++;
+ }
+ }
+ if(BSP_QSPI_DisableMemoryMappedMode(0) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap disable: FAILED.", LEFT_MODE);
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"MemoryMap", LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(10*CHAR_WIDE), Ypos, (uint8_t*)TransferRateText[k], LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(14*CHAR_WIDE), Ypos, (uint8_t*)DualFlashModeText[l], LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+ if(error_code == 0)
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+ error_code = 0;
+ }
+ NEXT_LINE
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+}
+
+static void QSPI_FlashId(void)
+{
+ uint32_t Offset;
+ uint32_t i, j;
+ uint32_t error_code = 0;
+
+ /* Fill the buffer for write operation **************************************/
+ Fill_Buffer(qspi_aTxBuffer, BUFFER_SIZE, TEST_VALUE_START);
+ memset(qspi_aErasedBuffer, 0xFF, BUFFER_SIZE);
+
+ /* QSPI device configuration */
+ Flash.InterfaceMode = BSP_QSPI_SPI_MODE;
+ Flash.TransferRate = BSP_QSPI_STR_TRANSFER;
+ Flash.DualFlashMode = BSP_QSPI_DUALFLASH_DISABLE;
+
+ BSP_QSPI_DeInit(0);
+
+ /* By default FLASH_ID_1 is selected */
+ if(BSP_QSPI_Init(0, &Flash) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Init: FAILED.", LEFT_MODE);
+ }
+
+ /* Loop over Flash Id *******************************************************/
+ for(j = 0; j < FLASH_ID_NUMBER; j++)
+ {
+ if(BSP_QSPI_SelectFlashID(0, FlashId[j]) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"SelectFlashID: FAILED.", LEFT_MODE);
+ }
+ else if(BSP_QSPI_GetStatus(0) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Get Status: FAILED.", LEFT_MODE);
+ }
+
+ for(i = 0; i < NB_BLOCK; i++)
+ {
+ /* Erase blocks *********************************************************/
+ if(BSP_QSPI_EraseBlock(0, i*BLOCK_SIZE, MT25QL512ABB_ERASE_64K) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Erase: FAILED.", LEFT_MODE);
+ }
+ while(BSP_QSPI_GetStatus(0) == BSP_ERROR_BUSY);
+ }
+
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ /* Read blocks **********************************************************/
+ if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+ }
+
+ /* Check blocks empty ***************************************************/
+ if(RMABuffercmp(qspi_aRxBuffer, qspi_aErasedBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+ {
+ error_code++;
+ }
+ }
+ }
+
+ /* Select Flash Id 1 ********************************************************/
+ if(BSP_QSPI_SelectFlashID(0, BSP_QSPI_FLASH_ID_1) != BSP_ERROR_NONE) Error_Handler();
+
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ /* Write blocks ***********************************************************/
+ if(BSP_QSPI_Write(0, qspi_aTxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Write: FAILED.", LEFT_MODE);
+ }
+
+ /* Read blocks ************************************************************/
+ if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+ }
+
+ /* Check blocks written ***************************************************/
+ if(RMABuffercmp(qspi_aRxBuffer, qspi_aTxBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+ {
+ error_code++;
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Flash ID 1", LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+ if(error_code == 0)
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+ error_code = 0;
+ }
+ NEXT_LINE
+
+ /* Select Flash Id 2 ********************************************************/
+ if(BSP_QSPI_SelectFlashID(0, BSP_QSPI_FLASH_ID_2) != BSP_ERROR_NONE) Error_Handler();
+
+ for(i = 0; i < (NB_BLOCK*BLOCK_SIZE/BUFFER_SIZE); i++)
+ {
+ /* Read blocks ************************************************************/
+ if(BSP_QSPI_Read(0, qspi_aRxBuffer, i*BUFFER_SIZE, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Read: FAILED.", LEFT_MODE);
+ }
+
+ /* Check blocks empty *****************************************************/
+ if(RMABuffercmp(qspi_aRxBuffer, qspi_aErasedBuffer, (uint32_t)BUFFER_SIZE, &Offset) != 0)
+ {
+ error_code++;
+ }
+ }
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(Xpos, Ypos, (uint8_t*)"Flash ID 2", LEFT_MODE);
+ UTIL_LCD_DisplayStringAt(Xpos+(26*CHAR_WIDE), Ypos, (uint8_t*)":", LEFT_MODE);
+ if(error_code == 0)
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"OK", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(Xpos+(28*CHAR_WIDE), Ypos, (uint8_t*)"FAILED", LEFT_MODE);
+ error_code = 0;
+ }
+ NEXT_LINE
+}
+
+/**
+* @brief Display QSPI Demo Hint
+* @param None
+* @retval None
+*/
+static void QSPI_SetHint(void)
+{
+ uint32_t x_size, y_size;
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Clear the LCD */
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+ /* Set LCD Demo description */
+ UTIL_LCD_FillRect(0, 0, x_size, 60, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t*)"QSPI", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t*)"This example tests the modes", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t*)"of read/write access on QSPI memory", CENTER_MODE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+}
+
+/**
+* @brief Fills buffer with user predefined data.
+* @param pBuffer: pointer on the buffer to fill
+* @param uwBufferLenght: size of the buffer to fill
+* @param uwOffset: first value to fill on the buffer
+* @retval None
+*/
+static void Fill_Buffer(uint8_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset)
+{
+ uint32_t tmpIndex = 0;
+
+ /* Put in global buffer different values */
+ for (tmpIndex = 0; tmpIndex < uwBufferLenght; tmpIndex++ )
+ {
+ pBuffer[tmpIndex] = tmpIndex + uwOffset;
+ }
+}
+
+/**
+* @brief Compares two buffers.
+* @param pBuffer1, pBuffer2: buffers to be compared.
+* @param BufferLength: buffer's length
+* ErrorAd: Difference address
+* @retval 0: pBuffer identical to pBuffer1
+* 1: pBuffer differs from pBuffer1
+*/
+static uint8_t RMABuffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint32_t BufferLength, uint32_t *ErrorAd)
+{
+ (*ErrorAd) = 0;
+
+ while (BufferLength--)
+ {
+ if (*pBuffer1 != *pBuffer2)
+ {
+ return 1;
+ }
+
+ (*ErrorAd)++;
+ pBuffer1++;
+ pBuffer2++;
+ }
+
+ return 0;
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c
new file mode 100644
index 000000000..ec1a061ed
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sd.c
@@ -0,0 +1,334 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/sd.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the SD Driver in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define SD_CARD_PRESENCE_POLLING_MODE 0
+#define SD_CARD_PRESENCE_INTERRUPT_MODE 1
+
+#define SD_CARD_PRESENCE_VALIDATION_MODE SD_CARD_PRESENCE_INTERRUPT_MODE
+
+#define BLOCK_START_ADDR 0 /* Block start address */
+#define NUM_OF_BLOCKS 5 /* Total number of blocks */
+#define BLOCKSIZE SD_BLOCKSIZE
+#define BUFFER_WORDS_SIZE ((BLOCKSIZE * NUM_OF_BLOCKS) >> 2) /* Total data size in bytes */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint32_t aTxBuffer[BUFFER_WORDS_SIZE];
+uint32_t aRxBuffer[BUFFER_WORDS_SIZE];
+__IO uint32_t SDWriteStatus = 0, SDReadStatus = 0, SDDetectStatus = 0, SDDetectIT = 0;
+
+extern __IO uint32_t UserButtonPressed;
+
+/* Private function prototypes -----------------------------------------------*/
+static void SD_SetHint(void);
+static void Fill_Buffer(uint32_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset);
+static uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint16_t BufferLength);
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief SD Demo
+ * @param None
+ * @retval None
+ */
+int32_t SD_demo (void)
+{
+ int32_t result = 0;
+ int32_t SD_state = BSP_ERROR_NONE;
+ static uint8_t prev_status = 2; /* Undefined state */
+
+ SD_SetHint();
+
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ SD_state = BSP_SD_Init(0);
+
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+ BSP_SD_DetectITConfig(0);
+#endif
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_LIGHTBLUE);
+
+ if (SD_state != BSP_ERROR_NONE)
+ {
+ SD_state = BSP_SD_IsDetected(0);
+ if(SD_state == SD_NOT_PRESENT)
+ {
+ printf ("\r\nSD shall be inserted before running test");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"Insert SD card", LEFT_MODE);
+ }
+ else
+ {
+ printf ("\r\nSD Initialization : FAIL.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(20, 120, (uint8_t *)"SD card init failed", LEFT_MODE);
+ }
+ printf ("\r\nSD Test Aborted.");
+ result --;
+ }
+ else
+ {
+ printf ("\r\nSD Initialization : OK.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(20, 120, (uint8_t *)"SD card init OK ", LEFT_MODE);
+ prev_status = SD_PRESENT;
+
+ /* Fill the buffer to write */
+ Fill_Buffer(aTxBuffer, BUFFER_WORDS_SIZE, 0x22FF);
+ SD_state = BSP_SD_WriteBlocks(0, aTxBuffer, BLOCK_START_ADDR, NUM_OF_BLOCKS);
+ HAL_Delay(500);
+
+ /* Wait until SD cards are ready to use for new operation */
+ while((BSP_SD_GetCardState(0) != SD_TRANSFER_OK))
+ {
+ }
+
+ if (SD_state != BSP_ERROR_NONE)
+ {
+ printf ("\r\nSD WRITE : FAILED.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(20, 140, (uint8_t *)"SD card write failed", LEFT_MODE);
+ result --;
+ }
+ else
+ {
+ printf ("\r\nSD WRITE : OK.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(20, 140, (uint8_t *)"SD card write OK ", LEFT_MODE);
+
+ SD_state = BSP_SD_ReadBlocks(0, aRxBuffer, BLOCK_START_ADDR, NUM_OF_BLOCKS);
+ HAL_Delay(500);
+
+ /* Wait until SD card is ready to use for new operation */
+ while(BSP_SD_GetCardState(0) != SD_TRANSFER_OK)
+ {
+ }
+
+ if (SD_state != BSP_ERROR_NONE)
+ {
+ printf ("\r\nSD READ : FAILED.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(20, 160, (uint8_t *)"SD card read failed", LEFT_MODE);
+ result --;
+ }
+ else
+ {
+ printf ("\r\nSD READ : OK.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(20, 160, (uint8_t *)"SD card read OK ", LEFT_MODE);
+ if (Buffercmp(aTxBuffer, aRxBuffer, BUFFER_WORDS_SIZE) > 0)
+ {
+ printf ("\r\nSD COMPARE : FAILED.");
+ result --;
+ }
+ else
+ {
+ printf ("\r\nSD COMPARE : OK.");
+ }
+ SD_state = BSP_SD_Erase(0, BLOCK_START_ADDR, (BLOCK_START_ADDR + (BLOCKSIZE * NUM_OF_BLOCKS)));
+ HAL_Delay(500);
+
+ if (SD_state != BSP_ERROR_NONE)
+ {
+ printf ("\r\nSD ERASE : FAILED.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_RED);
+ UTIL_LCD_DisplayStringAt(20, 180, (uint8_t *)"SD card erase failed", LEFT_MODE);
+ result --;
+ }
+ else
+ {
+ printf ("\r\nSD ERASE : OK.");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_GREEN);
+ UTIL_LCD_DisplayStringAt(20, 180, (uint8_t *)"SD card erase OK ", LEFT_MODE);
+ }
+ }
+ }
+ }
+
+ printf ("\r\nSD Test done.");
+ printf ("\r\nSD can be removed.\n");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card test Done ", LEFT_MODE);
+
+ while (1)
+ {
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+ if(SDDetectIT != 0)
+ {
+#endif
+ /* Check if the SD card is plugged in the slot */
+ if (SDDetectStatus != SD_PRESENT)
+ {
+ if(prev_status != SD_NOT_PRESENT)
+ {
+ BSP_SD_Init(0);
+ printf ("\r\nSD Not Connected");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card not connected", LEFT_MODE);
+ prev_status = SD_NOT_PRESENT;
+ }
+ }
+ else if (prev_status != SD_PRESENT)
+ {
+ printf ("\r\nSD Connected");
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_DisplayStringAt(20, 200, (uint8_t *)"SD card connected ", LEFT_MODE);
+ prev_status = SD_PRESENT;
+ }
+#if (SD_CARD_PRESENCE_VALIDATION_MODE == SD_CARD_PRESENCE_INTERRUPT_MODE)
+ SDDetectIT = 0;
+ }
+#endif
+
+ if (UserButtonPressed != 0)
+ {
+ /* Add delay to avoid rebound and reset it status */
+ HAL_Delay(500);
+ UserButtonPressed = 0;
+
+ return result;
+ }
+ }
+}
+
+/**
+ * @brief Display SD Demo Hint
+ * @param None
+ * @retval None
+ */
+static void SD_SetHint(void)
+{
+ uint32_t x_size, y_size;
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ printf("TEST OF SD card\n");
+
+ /* Clear the LCD */
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+ /* Set LCD Demo description */
+ BSP_LCD_FillRect(0, 0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE );
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SD", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example shows how to write", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"and read data on the microSD and also", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 60, (uint8_t *)"how to detect the presence of the card", CENTER_MODE);
+
+ /* Set the LCD Text Color */
+ UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+}
+
+/**
+ * @brief Fills buffer with user predefined data.
+ * @param pBuffer: pointer on the buffer to fill
+ * @param uwBufferLenght: size of the buffer to fill
+ * @param uwOffset: first value to fill on the buffer
+ * @retval None
+ */
+static void Fill_Buffer(uint32_t *pBuffer, uint32_t uwBufferLenght, uint32_t uwOffset)
+{
+ uint32_t tmpIndex = 0;
+
+ /* Put in global buffer different values */
+ for (tmpIndex = 0; tmpIndex < uwBufferLenght; tmpIndex++ )
+ {
+ pBuffer[tmpIndex] = tmpIndex + uwOffset;
+ }
+}
+
+/**
+ * @brief Compares two buffers.
+ * @param pBuffer1, pBuffer2: buffers to be compared.
+ * @param BufferLength: buffer's length
+ * @retval 1: pBuffer identical to pBuffer1
+ * 0: pBuffer differs from pBuffer1
+ */
+static uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint16_t BufferLength)
+{
+ while (BufferLength--)
+ {
+ if (*pBuffer1 != *pBuffer2)
+ {
+ return 1;
+ }
+
+ pBuffer1++;
+ pBuffer2++;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Tx Transfer completed callback
+ * @param Instance SD Instance
+ * @retval None
+ */
+void BSP_SD_WriteCpltCallback(uint32_t Instance)
+{
+ SDWriteStatus = 1;
+}
+
+/**
+ * @brief Rx Transfer completed callback
+ * @param Instance SD Instance
+ * @retval None
+ */
+void BSP_SD_ReadCpltCallback(uint32_t Instance)
+{
+ SDReadStatus = 1;
+}
+
+/**
+ * @brief BSP SD Callback.
+ * @param Instance SD Instance
+ * @param Status Pin status
+ * @retval None.
+ */
+void BSP_SD_DetectCallback(uint32_t Instance, uint32_t Status)
+{
+ SDDetectIT = 1;
+ SDDetectStatus = Status;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c
new file mode 100644
index 000000000..1b2356130
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/sram.c
@@ -0,0 +1,305 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/sram.c
+ * @author MCD Application Team
+ * @brief This example code shows how to use the SRAM Driver in the
+ * STM32G474E EVAL1 driver
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/** @addtogroup STM32G4xx_HAL_Examples
+ * @{
+ */
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define BUFFER_SIZE ((uint32_t)0x1000)
+#define WRITE_READ_ADDR ((uint32_t)0x0800)
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint16_t sram_aTxBuffer[BUFFER_SIZE];
+uint16_t sram_aRxBuffer[BUFFER_SIZE];
+uint8_t ubSramWrite = 0, ubSramRead = 0, ubSramInit = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void SRAM_SetHint(void);
+static void SRAM_polling(void);
+static void SRAM_DMA(void);
+static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset);
+static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+* @brief SRAM tests
+* @param None
+* @retval None
+*/
+int32_t SRAM_demo(void)
+{
+ SRAM_polling();
+ SRAM_DMA();
+ return 0;
+}
+
+/**
+ * @brief SRAM polling access
+ * @param None
+ * @retval None
+ */
+void SRAM_polling(void)
+{
+ SRAM_SetHint();
+
+ /*##-1- Configure the SRAM device ##########################################*/
+ /* SRAM device configuration */
+ if(BSP_SRAM_Init(0) != BSP_ERROR_NONE)
+ {
+ ubSramInit++;
+ }
+
+ /*##-2- SRAM memory read/write access ######################################*/
+ /* Fill the buffer to write */
+ Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
+
+ /* Write data to the SRAM memory */
+ if(HAL_SRAM_Write_16b(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), sram_aTxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ ubSramWrite++;
+ }
+
+ /* Read back data from the SRAM memory */
+ if(HAL_SRAM_Read_16b(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), sram_aRxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ ubSramRead++;
+ }
+
+ BSP_SRAM_DeInit(0);
+
+ /*##-3- Checking data integrity ############################################*/
+ if(ubSramInit != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization : FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization : OK.", LEFT_MODE);
+ }
+ if(ubSramWrite != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE : FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE : OK.", LEFT_MODE);
+ }
+ if(ubSramRead != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ : FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ : OK.", LEFT_MODE);
+ }
+
+ if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM COMPARE : FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM Test : OK.", LEFT_MODE);
+ }
+
+ while (1)
+ {
+ if(CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ return;
+ }
+ }
+}
+
+/**
+ * @brief SRAM DMA
+ * @param None
+ * @retval None
+ */
+void SRAM_DMA(void)
+{
+ SRAM_SetHint();
+
+ /*##-1- Configure the SRAM device ##########################################*/
+ /* SRAM device configuration */
+ if(BSP_SRAM_Init(0) != BSP_ERROR_NONE)
+ {
+ ubSramInit++;
+ }
+
+ /*##-2- SRAM memory read/write access ######################################*/
+ /* Fill the buffer to write */
+ Fill_Buffer(sram_aTxBuffer, BUFFER_SIZE, 0xC20F);
+
+ /* Write data to the SRAM memory */
+ if(HAL_SRAM_Write_DMA(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), (uint32_t *)sram_aTxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ ubSramWrite++;
+ }
+
+ /* Wait SRAM controller is READY */
+ while (HAL_SRAM_GetState(&hsram) != HAL_SRAM_STATE_READY) {}
+
+ /* Read back data from the SRAM memory */
+ if(HAL_SRAM_Read_DMA(&hsram, (uint32_t *)(SRAM_DEVICE_ADDR + WRITE_READ_ADDR), (uint32_t *)sram_aRxBuffer, BUFFER_SIZE) != BSP_ERROR_NONE)
+ {
+ ubSramRead++;
+ }
+
+ BSP_SRAM_DeInit(0);
+
+ /*##-3- Checking data integrity ############################################*/
+ if(ubSramInit != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization (DMA): FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 100, (uint8_t *)"SRAM Initialization (DMA): OK.", LEFT_MODE);
+ }
+ if(ubSramWrite != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE (DMA): FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 115, (uint8_t *)"SRAM WRITE (DMA): OK.", LEFT_MODE);
+ }
+ if(ubSramRead != 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ (DMA): FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 130, (uint8_t *)"SRAM READ (DMA): OK.", LEFT_MODE);
+ }
+
+ if(Buffercmp(sram_aRxBuffer, sram_aTxBuffer, BUFFER_SIZE) > 0)
+ {
+ UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM COMPARE (DMA): FAILED.", LEFT_MODE);
+ }
+ else
+ {
+ UTIL_LCD_DisplayStringAt(20, 145, (uint8_t *)"SRAM Test (DMA): OK.", LEFT_MODE);
+ }
+
+ while (1)
+ {
+ if(CheckForUserInput() > 0)
+ {
+ ButtonState = 0;
+ return;
+ }
+ }
+}
+
+/**
+ * @brief Display SRAM Demo Hint
+ * @param None
+ * @retval None
+ */
+static void SRAM_SetHint(void)
+{
+ uint32_t x_size, y_size;
+
+ BSP_LCD_GetXSize(0, &x_size);
+ BSP_LCD_GetYSize(0, &y_size);
+
+ /* Clear the LCD */
+ UTIL_LCD_Clear(UTIL_LCD_COLOR_WHITE);
+
+ /* Set LCD Demo description */
+ UTIL_LCD_FillRect(0, 0, x_size, 80, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_WHITE);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_SetFont(&Font24);
+ UTIL_LCD_DisplayStringAt(0, 0, (uint8_t *)"SRAM", CENTER_MODE);
+ UTIL_LCD_SetFont(&Font12);
+ UTIL_LCD_DisplayStringAt(0, 30, (uint8_t *)"This example tests", CENTER_MODE);
+ UTIL_LCD_DisplayStringAt(0, 45, (uint8_t *)"read/write access on SRAM", CENTER_MODE);
+
+ /* Set the LCD Text Color */
+ UTIL_LCD_DrawRect(10, 90, x_size - 20, y_size- 100, UTIL_LCD_COLOR_BLUE);
+ UTIL_LCD_DrawRect(11, 91, x_size - 22, y_size- 102, UTIL_LCD_COLOR_BLUE);
+
+ UTIL_LCD_SetTextColor(UTIL_LCD_COLOR_BLACK);
+ UTIL_LCD_SetBackColor(UTIL_LCD_COLOR_WHITE);
+}
+
+/**
+ * @brief Fills buffer with user predefined data.
+ * @param pBuffer: pointer on the buffer to fill
+ * @param uwBufferLength: size of the buffer to fill
+ * @param uwOffset: first value to fill on the buffer
+ * @retval None
+ */
+static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint32_t uwOffset)
+{
+ uint32_t tmpindex = 0;
+
+ /* Put in global buffer different values */
+ for (tmpindex = 0; tmpindex < uwBufferLength; tmpindex++ )
+ {
+ pBuffer[tmpindex] = tmpindex + uwOffset;
+ }
+}
+
+/**
+ * @brief Compares two buffers.
+ * @param pBuffer1, pBuffer2: buffers to be compared.
+ * @param BufferLength: buffer's length
+ * @retval 1: pBuffer identical to pBuffer1
+ * 0: pBuffer differs from pBuffer1
+ */
+static uint8_t Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength)
+{
+ while (BufferLength--)
+ {
+ if (*pBuffer1 != *pBuffer2)
+ {
+ return 1;
+ }
+
+ pBuffer1++;
+ pBuffer2++;
+ }
+
+ return 0;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..a1a6ddda1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/stm32g4xx_it.c
@@ -0,0 +1,190 @@
+/**
+ ******************************************************************************
+ * @file BSP/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+
+/* USER CODE BEGIN 0 */
+extern SAI_HandleTypeDef haudio_out_sai;
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+#if (USE_BSP_IO_CLASS == 1)
+extern __IO uint32_t IddOnGoing;
+#endif
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+
+/**
+* @brief This function handles System service call via SWI instruction.
+*/
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+* @brief This function handles Pendable request for system service.
+*/
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+* @brief This function handles System tick timer.
+*/
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ HAL_SYSTICK_IRQHandler();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles DMA1 Channel 1 interrupt request.
+ * @param None
+ * @retval None
+ */
+void SRAM_DMAx_IRQHandler(void)
+{
+ HAL_DMA_IRQHandler(hsram.hdma);
+}
+
+/* this IRQ is for MFX */
+void EXTI0_IRQHandler(void)
+{
+#if (USE_BSP_IO_CLASS == 1)
+ if (IddOnGoing ==1)
+ {
+ BSP_IDD_IRQHandler();
+ }
+ else
+ {
+ BSP_JOY_IRQHandler();
+ }
+#endif
+}
+
+void EXTI1_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+}
+
+void EXTI2_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+}
+
+void EXTI3_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+}
+
+void EXTI4_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+}
+
+void EXTI9_5_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
+}
+
+/**
+ * @brief This function handles EXT 10 to 15 interrupt request.
+ * @param None
+ * @retval None
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ BSP_PB_IRQHandler(BUTTON_USER);
+}
+
+/**
+ * @brief This function handles SAI DMA interrupt request.
+ * @param None
+ * @retval None
+ */
+void AUDIO_SAI1_DMAx_IRQHandler(void)
+{
+ HAL_DMA_IRQHandler(haudio_out_sai.hdmatx);
+}
+
+/**
+ * @brief This function handles SAI Tx DMA interrupt request.
+ * @param None
+ * @retval None
+ */
+void DMA2_Channel1_IRQHandler(void)
+{
+ BSP_AUDIO_OUT_DMA_IRQHandler(0);
+}
+
+/**
+ * @brief This function handles SAI Rx DMA interrupt request.
+ * @param None
+ * @retval None
+ */
+void DMA2_Channel2_IRQHandler(void)
+{
+ BSP_AUDIO_IN_DMA_IRQHandler(0, AUDIO_IN_DEVICE_ANALOG_MIC);
+}
+
+/**
+ * @brief This function handles PPP interrupt request.
+ * @param None
+ * @retval None
+ */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+/* USER CODE END 1 */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..c0e51359e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/Src/system_stm32g4xx.c
@@ -0,0 +1,280 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (8 MHz then 16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * HSI Division factor | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 8
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+#if defined( USE_FPGA_BOARD)
+#define HSE_VALUE ((uint32_t)48000000) /*!< Value of the External oscillator in Hz */
+#else
+#define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
+#endif /* USE_FPGA_BOARD */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+ const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp = 0, pllvco = 0, pllr = 2, pllsource = 0, pllm = 2;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1 ;
+
+ switch (pllsource)
+ {
+ case 0x02: /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm);
+ break;
+
+ case 0x03: /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm);
+ break;
+
+ default: /* MSI used as PLL clock source */
+ break;
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1) * 2;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin b/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin
new file mode 100644
index 000000000..ab4529d88
Binary files /dev/null and b/Projects/STM32G474E-EVAL1/Examples/BSP/audio8kStereo16bps.bin differ
diff --git a/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt b/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt
new file mode 100644
index 000000000..6679cbc58
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/BSP/readme.txt
@@ -0,0 +1,124 @@
+/**
+ @page BSP Mode example
+
+ @verbatim
+ ******************** (C) COPYRIGHT 2019 STMicroelectronics *******************
+ * @file BSP/BSP_Test/readme.txt
+ * @author MCD Application Team
+ * @brief Description of the STM32G4xx BSP example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+This example provides a short description of how to use the BSP to interface with
+the EVAL1 board
+
+At the beginning of the main program the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK) to run at 170 MHz.
+
+Terminal IO is required to view messages of examples.
+Once the message "Press User button to start :
+ LED example" is displayed on the screen, press user button to start running the first demo
+
+1_ Led_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)" is displayed on the Terminal I/O,
+ press joy_right if the four leds are toggling correctly, else, press joy_left.
+
+Once the message "Press User button to start :
+ BUTTON example" is displayed on the screen, press user button.
+
+2_ Button_demo: Press user button twice following the messages displayed in the Terminal I/O.
+Once the message "Press User button to start :
+ IO example" is displayed on the screen, press user button.
+
+3_ Io_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)" is displayed on the Terminal I/O,
+ press joy_right if the led4 (blue) is toggling correctly, else, press joy_left.
+ press joy_sel button once the message "Please press JOY_SEL" is displayed on the Terminal I/O.
+
+4_ Lcd_demo: Every time the message "If result is OK press JOY_RIGHT (pass), otherwise press JOY_LEFT (fail)' is displayed on the Terminal I/O,
+ press joy_right if the screen orientation is correct, else, press joy_left.
+Once the message "Press User button to start :
+ AUDIO PLAY example" is displayed on the screen, press user button.
+
+5_ AudioPlay_demo: press joy_sel key to play and pause the audio
+ press joy up/down keys to increase/decrease volume
+ press joy right/left keys to increase/decrease frequency
+ press user button again to quit AUDIO PLAY demo
+
+6_ Bus_demo: The message "TEST OF BUS Passed" is displayed on the Terminal I/O.
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The application need to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@note When running the audio, the sample file (audio8kStereo16bps.bin) must be loaded in the flash memory
+ at address 0x08023000 as specified in the main.h
+ The recorded file is stored in the flash memory at the address 0x08024000 as specified in the main.h
+
+@par Keywords
+
+Display, LCD, SD card, SRAM, QUADSPI, LED, Push Button, Joystick, audio
+
+
+@par Directory contents
+
+ - Example/BSP/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - Example/BSP/Inc/stm32g474e_eval_conf.h EVAL1 board configuration file
+ - Example/BSP/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - Example/BSP/Inc/main.h Header for main.c module
+ - Example/BSP/Src/stm32g4xx_it.c Interrupt handlers
+ - Example/BSP/Src/main.c Main program
+ - Example/BSP/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474xxx devices.
+
+ - This example has been tested with STM32G474E-EVAL1 board and can be
+ easily tailored to any other supported device and development board.
+
+ - STM32G474E-EVAL1 Set-up :
+ - JP10 must be closed
+
+- When resorting to EWARM IAR IDE:
+Command Code is displayed on debugger as follows: View --> Terminal I/O
+
+- When resorting to MDK-ARM KEIL IDE:
+Command Code is displayed on debugger as follows: View --> Serial Viewer --> Debug (printf) Viewer
+The Audio play demo is not supported on MDK-ARM IDE.
+
+- When resorting to STM32CubeIDE:
+Command Code is displayed on debugger as follows: Window--> Show View--> Console.
+In Debug configuration :
+- Window\Debugger, select the Debug probe : ST-LINK(OpenOCD)
+- Window\Startup,add the command "monitor arm semihosting enable"
+
+@par How to use it ?
+
+In order to make the program work, you must do the following :
+ - Open your preferred toolchain
+ - Rebuild all files: Project->Rebuild all
+ - Load project image: Project->Download and Debug
+ - Run program: Debug->Go(F5)
+
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings
new file mode 100644
index 000000000..93f649300
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/.extSettings
@@ -0,0 +1,10 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\CMSIS\DSP\Include;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=ARM_MATH_CM4
+HALModule=I2C;EXTI;SPI
+LinkAdditionalLibs=../../../../../../Drivers/CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc
new file mode 100644
index 000000000..7793dbf32
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/CORDIC_SinCos_DMA_Perf.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.CORDIC_READ.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.CORDIC_READ.1.EventEnable=DISABLE
+Dma.CORDIC_READ.1.Instance=DMA1_Channel2
+Dma.CORDIC_READ.1.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_READ.1.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_READ.1.Mode=DMA_NORMAL
+Dma.CORDIC_READ.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_READ.1.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_READ.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_READ.1.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_READ.1.RequestNumber=1
+Dma.CORDIC_READ.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_READ.1.SignalID=NONE
+Dma.CORDIC_READ.1.SyncEnable=DISABLE
+Dma.CORDIC_READ.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_READ.1.SyncRequestNumber=1
+Dma.CORDIC_READ.1.SyncSignalID=NONE
+Dma.CORDIC_WRITE.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.CORDIC_WRITE.0.EventEnable=DISABLE
+Dma.CORDIC_WRITE.0.Instance=DMA1_Channel1
+Dma.CORDIC_WRITE.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_WRITE.0.Mode=DMA_NORMAL
+Dma.CORDIC_WRITE.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_WRITE.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_WRITE.0.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_WRITE.0.RequestNumber=1
+Dma.CORDIC_WRITE.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_WRITE.0.SignalID=NONE
+Dma.CORDIC_WRITE.0.SyncEnable=DISABLE
+Dma.CORDIC_WRITE.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_WRITE.0.SyncRequestNumber=1
+Dma.CORDIC_WRITE.0.SyncSignalID=NONE
+Dma.Request0=CORDIC_WRITE
+Dma.Request1=CORDIC_READ
+Dma.RequestsNb=2
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CORDIC
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CORDIC_VS_CORDIC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CORDIC_SinCos_DMA_Perf.ioc
+ProjectManager.ProjectName=CORDIC_SinCos_DMA_Perf
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORDIC_Init-CORDIC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CORDIC_VS_CORDIC.Mode=CORDIC_Activate
+VP_CORDIC_VS_CORDIC.Signal=CORDIC_VS_CORDIC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CORDIC_SinCos_DMA_Perf
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd
new file mode 100644
index 000000000..6cd370d85
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ CORDIC_SinCos_DMA_Perf
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp
new file mode 100644
index 000000000..9fe4fe34a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/CORDIC_SinCos_DMA_Perf.ewp
@@ -0,0 +1,1152 @@
+
+
+ 3
+
+ CORDIC_SinCos_DMA_Perf
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ CORDIC_SinCos_DMA_Perf/Exe
+
+
+ ObjPath
+ CORDIC_SinCos_DMA_Perf/Obj
+
+
+ ListPath
+ CORDIC_SinCos_DMA_Perf/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ ARM_MATH_CM4
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/DSP/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ CORDIC_SinCos_DMA_Perf.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ CORDIC_SinCos_DMA_Perf.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww
new file mode 100644
index 000000000..fd1d4f680
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\CORDIC_SinCos_DMA_Perf.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
new file mode 100644
index 000000000..9de054276
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
@@ -0,0 +1,82 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Pass/Fail Status */
+#define PASS 0
+#define FAIL 1
+
+/* Number of calculation loops (depends on clock config) */
+#define LOOP_NB (uint32_t)((170000000 / 150) / ARRAY_SIZE)
+
+/* Size of data array */
+#define ARRAY_SIZE 64U
+
+/* Reference values in Q1.31 format */
+#define DELTA (int32_t)0x00001000 /* Max residual error for sines, with 6 cycle precision:
+ 2^-19 max residual error, ie 31-19=12 LSB, ie <0x1000 */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..426b7a1f2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+#define HAL_CORDIC_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..1bd22b1a3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+void EXTI15_10_IRQHandler(void);
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx
new file mode 100644
index 000000000..af4d70427
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvoptx
@@ -0,0 +1,652 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ CORDIC_SinCos_DMA_Perf
+ 0x4
+ ARM-ADS
+
+ 170000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$CMSIS\Flash\STM32G4xx_512.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+ 1
+ 1
+ 0
+ 2
+ 10000000
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 0
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+ stm32g4xx_hal_cordic.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+ stm32g4xx_ll_pwr.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS/DSP/Lib
+ 0
+ 0
+ 0
+ 0
+
+ 8
+ 33
+ 4
+ 0
+ 0
+ 0
+ ..\..\..\..\..\..\Drivers\CMSIS\DSP\Lib\ARM\arm_cortexM4l_math.lib
+ arm_cortexM4l_math.lib
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx
new file mode 100644
index 000000000..9a592185e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/CORDIC_SinCos_DMA_Perf.uvprojx
@@ -0,0 +1,607 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ CORDIC_SinCos_DMA_Perf
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.0
+ http://www.keil.com/pack
+ IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ CORDIC_SinCos_DMA_Perf\
+ CORDIC_SinCos_DMA_Perf
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ ARM_MATH_CM4,USE_HAL_DRIVER,STM32G474xx
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/CMSIS/DSP/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_cordic.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_ll_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ Drivers/CMSIS/DSP/Lib
+
+
+ arm_cortexM4l_math.lib
+ 4
+ ..\..\..\..\..\..\Drivers\CMSIS\DSP\Lib\ARM\arm_cortexM4l_math.lib
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..a50a76da4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.cproject
@@ -0,0 +1,196 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project
new file mode 100644
index 000000000..de8cf5853
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+
+
+ CORDIC_SinCos_DMA_Perf
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ CORDIC_SinCos_DMA_Perf.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/CORDIC_SinCos_DMA_Perf.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cordic.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
new file mode 100644
index 000000000..5a2fe2508
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
@@ -0,0 +1,483 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/Src/main.c
+ * @author MCD Application Team
+ * @brief This sample code shows how to use the STM32G4xx CORDIC HAL API
+ * to compute Sine and Cosine on arrays of data (Q1.31 format) in DMA mode.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CORDIC_HandleTypeDef hcordic;
+DMA_HandleTypeDef hdma_cordic_write;
+DMA_HandleTypeDef hdma_cordic_read;
+
+/* USER CODE BEGIN PV */
+/* CORDIC configuration structure */
+CORDIC_ConfigTypeDef sCordicConfig;
+
+/* Array of angles for CORDIC Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAnglesCordic[ARRAY_SIZE] =
+{
+ 0x00000000, 0x04000000, 0x08000000, 0x0C000000,
+ 0x10000000, 0x14000000, 0x18000000, 0x1C000000,
+ 0x20000000, 0x24000000, 0x28000000, 0x2C000000,
+ 0x30000000, 0x34000000, 0x38000000, 0x3C000000,
+ 0x40000000, 0x44000000, 0x48000000, 0x4C000000,
+ 0x50000000, 0x54000000, 0x58000000, 0x5C000000,
+ 0x60000000, 0x64000000, 0x68000000, 0x6C000000,
+ 0x70000000, 0x74000000, 0x78000000, 0x7C000000,
+ 0x80000000, 0x84000000, 0x88000000, 0x8C000000,
+ 0x90000000, 0x94000000, 0x98000000, 0x9C000000,
+ 0xA0000000, 0xA4000000, 0xA8000000, 0xAC000000,
+ 0xB0000000, 0xB4000000, 0xB8000000, 0xBC000000,
+ 0xC0000000, 0xC4000000, 0xC8000000, 0xCC000000,
+ 0xD0000000, 0xD4000000, 0xD8000000, 0xDC000000,
+ 0xE0000000, 0xE4000000, 0xE8000000, 0xEC000000,
+ 0xF0000000, 0xF4000000, 0xF8000000, 0xFC000000
+};
+
+/* Array of angles for arm math library Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAnglesLib[ARRAY_SIZE] =
+{
+ 0x00000000, 0x02000000, 0x04000000, 0x06000000,
+ 0x08000000, 0x0A000000, 0x0C000000, 0x0E000000,
+ 0x10000000, 0x12000000, 0x14000000, 0x16000000,
+ 0x18000000, 0x1A000000, 0x1C000000, 0x1E000000,
+ 0x20000000, 0x22000000, 0x24000000, 0x26000000,
+ 0x28000000, 0x2A000000, 0x2C000000, 0x2E000000,
+ 0x30000000, 0x32000000, 0x34000000, 0x36000000,
+ 0x38000000, 0x3A000000, 0x3C000000, 0x3E000000,
+ 0x40000000, 0x42000000, 0x44000000, 0x46000000,
+ 0x48000000, 0x4A000000, 0x4C000000, 0x4E000000,
+ 0x50000000, 0x52000000, 0x54000000, 0x56000000,
+ 0x58000000, 0x5A000000, 0x5C000000, 0x5E000000,
+ 0x60000000, 0x62000000, 0x64000000, 0x66000000,
+ 0x68000000, 0x6A000000, 0x6C000000, 0x6E000000,
+ 0x70000000, 0x72000000, 0x74000000, 0x76000000,
+ 0x78000000, 0x7A000000, 0x7C000000, 0x7E000000
+};
+
+/* Array of reference sines in Q1.31 format */
+static int32_t aRefSin[ARRAY_SIZE] =
+{
+ 0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+ 0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+ 0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+ 0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F,
+ 0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+ 0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+ 0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+ 0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+ 0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+ 0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+ 0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+ 0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+ 0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+ 0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+ 0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+ 0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2
+};
+
+/* Array of reference cosines in Q1.31 format */
+static int32_t aRefCos[ARRAY_SIZE] =
+{
+ 0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+ 0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+ 0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+ 0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+ 0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+ 0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+ 0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+ 0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+ 0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+ 0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+ 0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+ 0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2,
+ 0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+ 0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+ 0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+ 0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F
+};
+
+/* Array of calculation results in Q1.31 format.
+ Will contain alternatively Sine and Cosine of input angles */
+static int32_t aResults[2 * ARRAY_SIZE];
+
+/* User button event */
+__IO uint32_t UserButtonEvent = RESET; /* Event is SET when User Button interrupt occurs */
+
+/* Step */
+uint32_t Step = 0; /* 0: use CORDIC processor
+ 1: use arm math library */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_DMA_Init(void);
+static void MX_CORDIC_Init(void);
+/* USER CODE BEGIN PFP */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* Configure LED1 */
+ BSP_LED_Init(LED1);
+
+ /* Configure User Button */
+ BSP_PB_Init(BUTTON_USER, BUTTON_MODE_EXTI);
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_DMA_Init();
+ MX_CORDIC_Init();
+ /* USER CODE BEGIN 2 */
+ /*##-2- Configure the CORDIC peripheral ####################################*/
+ sCordicConfig.Function = CORDIC_FUNCTION_SINE; /* sine function */
+ sCordicConfig.Precision = CORDIC_PRECISION_6CYCLES; /* max precision for q1.31 sine */
+ sCordicConfig.Scale = CORDIC_SCALE_0; /* no scale */
+ sCordicConfig.NbWrite = CORDIC_NBWRITE_1; /* One input data: angle. Second input data (modulus) is 1 after cordic reset */
+ sCordicConfig.NbRead = CORDIC_NBREAD_2; /* Two output data: sine then cosine */
+ sCordicConfig.InSize = CORDIC_INSIZE_32BITS; /* q1.31 format for input data */
+ sCordicConfig.OutSize = CORDIC_OUTSIZE_32BITS; /* q1.31 format for output data */
+
+ if (HAL_CORDIC_Configure(&hcordic, &sCordicConfig) != HAL_OK)
+ {
+ /* Configuration Error */
+ Error_Handler();
+ }
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* Loop until user push button */
+ while(UserButtonEvent == RESET)
+ {
+ switch (Step)
+ {
+ /*################### Calculation using CORDIC #######################*/
+ case 0:
+ for (uint32_t i = 0; i < LOOP_NB; i++)
+ {
+
+ /* Start calculation of sines in DMA mode */
+ if (HAL_CORDIC_Calculate_DMA(&hcordic, aAnglesCordic, aResults,
+ ARRAY_SIZE, CORDIC_DMA_DIR_IN_OUT) != HAL_OK)
+ {
+ /* Processing Error */
+ Error_Handler();
+ }
+
+ /* Before starting a new process, you need to check the current state of the peripheral;
+ if it is busy you need to wait for the end of current transfer before starting a new one.
+ For simplicity reasons, this example is just waiting till the end of the
+ process, but application may perform other tasks while transfer operation
+ is ongoing. */
+ while (HAL_CORDIC_GetState(&hcordic) != HAL_CORDIC_STATE_READY)
+ {
+ }
+ }
+
+ break;
+
+ /*################### Calculation using arm math library #############*/
+ case 1:
+ for (uint32_t i = 0; i < LOOP_NB; i++)
+ {
+ for (uint32_t j = 0; j < ARRAY_SIZE; j++)
+ {
+ /* Calculate sine */
+ aResults[2*j] = arm_sin_q31(aAnglesLib[j]);
+
+ /* Calculate cosine */
+ aResults[(2*j) + 1] = arm_cos_q31(aAnglesLib[j]);
+ }
+ }
+
+ break;
+
+ /* Should not occur */
+ default :
+ Error_Handler();
+ }
+
+ /* Toggle LED1 */
+ BSP_LED_Toggle(LED1);
+ }
+
+ /* Compare calculated results to the reference values */
+ for (uint32_t i = 0; i < ARRAY_SIZE; i++)
+ {
+ if ((Check_Residual_Error(aResults[2*i], aRefSin[i], DELTA) == FAIL) ||
+ (Check_Residual_Error(aResults[(2*i) + 1], aRefCos[i], DELTA) == FAIL))
+ {
+ Error_Handler();
+ }
+ }
+
+ /* Toggle Step number */
+ Step = (Step + 1) % 2;
+
+ /* Reset UserButtonEvent */
+ UserButtonEvent = RESET;
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief CORDIC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_CORDIC_Init(void)
+{
+
+ /* USER CODE BEGIN CORDIC_Init 0 */
+
+ /* USER CODE END CORDIC_Init 0 */
+
+ /* USER CODE BEGIN CORDIC_Init 1 */
+
+ /* USER CODE END CORDIC_Init 1 */
+ hcordic.Instance = CORDIC;
+ if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN CORDIC_Init 2 */
+
+ /* USER CODE END CORDIC_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+ /* DMA1_Channel2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief EXTI line detection callbacks
+ * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
+ * @retval None
+ */
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ if (GPIO_Pin == USER_BUTTON_PIN)
+ {
+ /* Set variable to report push button event to main program */
+ UserButtonEvent = SET;
+ }
+}
+
+/**
+ * @brief Check delta between two values is below threshold
+ * @param VarA First input variable
+ * @param VarB Second input variable
+ * @param MaxError Maximum delta allowed between VarA and VarB
+ * @retval Status
+ * PASS: Delta is below threshold
+ * FAIL: Delta is above threshold
+ */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError)
+{
+ uint32_t status = PASS;
+
+ if ((VarA - VarB) >= 0)
+ {
+ if ((VarA - VarB) > MaxError)
+ {
+ status = FAIL;
+ }
+ }
+ else
+ {
+ if ((VarB - VarA) > MaxError)
+ {
+ status = FAIL;
+ }
+ }
+
+ return status;
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* LED1 is switched-off */
+ BSP_LED_Off(LED1);
+
+ while(1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..417056c1f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,176 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_cordic_write;
+
+extern DMA_HandleTypeDef hdma_cordic_read;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CORDIC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
+{
+ if(hcordic->Instance==CORDIC)
+ {
+ /* USER CODE BEGIN CORDIC_MspInit 0 */
+
+ /* USER CODE END CORDIC_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_CORDIC_CLK_ENABLE();
+
+ /* CORDIC DMA Init */
+ /* CORDIC_WRITE Init */
+ hdma_cordic_write.Instance = DMA1_Channel1;
+ hdma_cordic_write.Init.Request = DMA_REQUEST_CORDIC_WRITE;
+ hdma_cordic_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_cordic_write.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_cordic_write.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_cordic_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+ hdma_cordic_write.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+ hdma_cordic_write.Init.Mode = DMA_NORMAL;
+ hdma_cordic_write.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_cordic_write) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hcordic,hdmaIn,hdma_cordic_write);
+
+ /* CORDIC_READ Init */
+ hdma_cordic_read.Instance = DMA1_Channel2;
+ hdma_cordic_read.Init.Request = DMA_REQUEST_CORDIC_READ;
+ hdma_cordic_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_cordic_read.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_cordic_read.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_cordic_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+ hdma_cordic_read.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+ hdma_cordic_read.Init.Mode = DMA_NORMAL;
+ hdma_cordic_read.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_cordic_read) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hcordic,hdmaOut,hdma_cordic_read);
+
+ /* USER CODE BEGIN CORDIC_MspInit 1 */
+
+ /* USER CODE END CORDIC_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief CORDIC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
+{
+ if(hcordic->Instance==CORDIC)
+ {
+ /* USER CODE BEGIN CORDIC_MspDeInit 0 */
+ /* Reset CORDIC peripheral */
+ __HAL_RCC_CORDIC_FORCE_RESET();
+ __HAL_RCC_CORDIC_RELEASE_RESET();
+
+ /* USER CODE END CORDIC_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_CORDIC_CLK_DISABLE();
+
+ /* CORDIC DMA DeInit */
+ HAL_DMA_DeInit(hcordic->hdmaIn);
+ HAL_DMA_DeInit(hcordic->hdmaOut);
+ /* USER CODE BEGIN CORDIC_MspDeInit 1 */
+
+ /* USER CODE END CORDIC_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..1573168b8
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
@@ -0,0 +1,243 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_cordic_write;
+extern DMA_HandleTypeDef hdma_cordic_read;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles DMA1 channel1 global interrupt.
+ */
+void DMA1_Channel1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_cordic_write);
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 channel2 global interrupt.
+ */
+void DMA1_Channel2_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel2_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_cordic_read);
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+/**
+ * @brief This function handles external lines 10 to 15 interrupt request.
+ * @param None
+ * @retval None
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(USER_BUTTON_PIN);
+}
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
new file mode 100644
index 000000000..9f1a4e881
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
@@ -0,0 +1,97 @@
+/**
+ @page CORDIC_SinCos_DMA_Perf CORDIC Sine and Cosine calculation on array in DMA mode example
+
+ @verbatim
+ ******************************************************************************
+ * @file CORDIC/CORDIC_SinCos_DMA_Perf/readme.txt
+ * @author MCD Application Team
+ * @brief Sine and Cosine calculation on array in DMA mode example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+How to use the CORDIC peripheral to calculate sines and cosines array in DMA mode.
+
+This example is based on the STM32G4xx CORDIC HAL API.
+
+In this example, the CORDIC peripheral is configured in sine function, q1.31
+format for both input and output data, and with 6 cycles of precision.
+The input data provided to CORDIC peripheral are angles in radians
+divided by PI, in q1.31 format. The output data are sines and cosines in q1.31
+format. For 6 cycles of precision, the maximal expected residual error of the
+calculated sines is 2^-19.
+
+DMA is used to transfer input data from memory to the CORDIC peripheral and
+output data from CORDIC peripheral to memory, so that CPU is offloaded.
+
+At start of execution, the calculation of sines and cosines are performed
+in loop using CORDIC peripheral. When User push-button is pushed, the same
+calculation is performed in loop using arm math software library. Each time
+the User push-button is pushed again the calculation toggles between CORDIC
+peripheral and arm math software library usage.
+
+LED1 blinks at speed of calculation loops.
+This shows the performance gain of CORDIC peripheral usage (fast blink)
+compared to arm math software library usage (slow blink) in this use case.
+
+The calculated sines are stored in aResults[] array.
+This array contains alternatively the calculated sine and the calculated cosine
+of each input angle provided.
+The residual error of calculation results is verified, by comparing to
+reference values in aRefSin[] and aRefCos[] obtained from double precision
+floating point calculation.
+In case of exceeding residual error, the LED1 is turned off and stops blinking.
+
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+CORDIC, Sine, Cosine, DMA mode.
+
+@par Directory contents
+
+ - CORDIC/CORDIC_SinCos_DMA_Perf/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/main.h Header for main.c module
+ - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_it.c Interrupt handlers
+ - CORDIC/CORDIC_Sinus_DMA/Src/main.c Main program
+ - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_hal_msp.c HAL MSP module
+ - CORDIC/CORDIC_Sinus_DMA/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474QETx devices.
+
+ - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+ board and can be easily tailored to any other supported device
+ and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc
new file mode 100644
index 000000000..304679844
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/CORDIC_Sin_DMA.ioc
@@ -0,0 +1,162 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.CORDIC_READ.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.CORDIC_READ.1.EventEnable=DISABLE
+Dma.CORDIC_READ.1.Instance=DMA1_Channel2
+Dma.CORDIC_READ.1.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_READ.1.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_READ.1.Mode=DMA_NORMAL
+Dma.CORDIC_READ.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_READ.1.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_READ.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_READ.1.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_READ.1.RequestNumber=1
+Dma.CORDIC_READ.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_READ.1.SignalID=NONE
+Dma.CORDIC_READ.1.SyncEnable=DISABLE
+Dma.CORDIC_READ.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_READ.1.SyncRequestNumber=1
+Dma.CORDIC_READ.1.SyncSignalID=NONE
+Dma.CORDIC_WRITE.0.Direction=DMA_MEMORY_TO_PERIPH
+Dma.CORDIC_WRITE.0.EventEnable=DISABLE
+Dma.CORDIC_WRITE.0.Instance=DMA1_Channel1
+Dma.CORDIC_WRITE.0.MemDataAlignment=DMA_MDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.MemInc=DMA_MINC_ENABLE
+Dma.CORDIC_WRITE.0.Mode=DMA_NORMAL
+Dma.CORDIC_WRITE.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
+Dma.CORDIC_WRITE.0.PeriphInc=DMA_PINC_DISABLE
+Dma.CORDIC_WRITE.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.CORDIC_WRITE.0.Priority=DMA_PRIORITY_LOW
+Dma.CORDIC_WRITE.0.RequestNumber=1
+Dma.CORDIC_WRITE.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.CORDIC_WRITE.0.SignalID=NONE
+Dma.CORDIC_WRITE.0.SyncEnable=DISABLE
+Dma.CORDIC_WRITE.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.CORDIC_WRITE.0.SyncRequestNumber=1
+Dma.CORDIC_WRITE.0.SyncSignalID=NONE
+Dma.Request0=CORDIC_WRITE
+Dma.Request1=CORDIC_READ
+Dma.RequestsNb=2
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CORDIC
+Mcu.IP1=DMA
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IPNb=5
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CORDIC_VS_CORDIC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CORDIC_Sin_DMA.ioc
+ProjectManager.ProjectName=CORDIC_Sin_DMA
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_DMA_Init-DMA-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORDIC_Init-CORDIC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CORDIC_VS_CORDIC.Mode=CORDIC_Activate
+VP_CORDIC_VS_CORDIC.Signal=CORDIC_VS_CORDIC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CORDIC_Sin_DMA
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd
new file mode 100644
index 000000000..c5398a61c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ CORDIC_Sin_DMA
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp
new file mode 100644
index 000000000..6cda4043d
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/CORDIC_Sin_DMA.ewp
@@ -0,0 +1,1150 @@
+
+
+ 3
+
+ CORDIC_Sin_DMA
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ CORDIC_Sin_DMA/Exe
+
+
+ ObjPath
+ CORDIC_Sin_DMA/Obj
+
+
+ ListPath
+ CORDIC_Sin_DMA/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ CORDIC_Sin_DMA.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ CORDIC_Sin_DMA.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww
new file mode 100644
index 000000000..db8d616ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\CORDIC_Sin_DMA.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h
new file mode 100644
index 000000000..7ba454709
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/main.h
@@ -0,0 +1,79 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* Pass/Fail Status */
+#define PASS 0
+#define FAIL 1
+
+/* Size of data array */
+#define ARRAY_SIZE 64U
+
+/* Reference values in Q1.31 format */
+#define DELTA (int32_t)0x00001000 /* Max residual error for sines, with 6 cycle precision:
+ 2^-19 max residual error, ie 31-19=12 LSB, ie <0x1000 */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..426b7a1f2
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+#define HAL_CORDIC_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..bd660fc6a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx
new file mode 100644
index 000000000..c4deed390
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvoptx
@@ -0,0 +1,633 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ CORDIC_Sin_DMA
+ 0x4
+ ARM-ADS
+
+ 8000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U-O142 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 1
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+ stm32g4xx_hal_cordic.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx
new file mode 100644
index 000000000..0c03c5289
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/CORDIC_Sin_DMA.uvprojx
@@ -0,0 +1,592 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ CORDIC_Sin_DMA
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IROM(0x08000000-0x807FFFF) IRAM(0x20000000-0x2001FFFF) IRAM(0x10000000-0x10007FFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$CMSIS\SVD\STM32G4_v0r8.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ CORDIC_Sin_DMA\Exe\
+ CORDIC_Sin_DMA
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4101
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+ "" ()
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x10000000
+ 0x8000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx,
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_cordic.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..6aebcbd38
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.cproject
@@ -0,0 +1,171 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project
new file mode 100644
index 000000000..833e864be
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/.project
@@ -0,0 +1,195 @@
+
+
+ CORDIC_Sin_DMA
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ CORDIC_Sin_DMA.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/CORDIC_Sin_DMA.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cordic.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c
new file mode 100644
index 000000000..2d31dd97c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/main.c
@@ -0,0 +1,375 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/Src/main.c
+ * @author MCD Application Team
+ * @brief This sample code shows how to use the STM32G4xx CORDIC HAL API
+ * to compute Sine on arrays of data (Q1.31 format) in DMA mode.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CORDIC_HandleTypeDef hcordic;
+DMA_HandleTypeDef hdma_cordic_write;
+DMA_HandleTypeDef hdma_cordic_read;
+
+/* USER CODE BEGIN PV */
+/* CORDIC configuration structure */
+CORDIC_ConfigTypeDef sCordicConfig;
+
+/* Array of angles in Q1.31 format, regularly incremented from 0 to 2*pi */
+static int32_t aAngles[ARRAY_SIZE] =
+{
+ 0x00000000, 0x04000000, 0x08000000, 0x0C000000,
+ 0x10000000, 0x14000000, 0x18000000, 0x1C000000,
+ 0x20000000, 0x24000000, 0x28000000, 0x2C000000,
+ 0x30000000, 0x34000000, 0x38000000, 0x3C000000,
+ 0x40000000, 0x44000000, 0x48000000, 0x4C000000,
+ 0x50000000, 0x54000000, 0x58000000, 0x5C000000,
+ 0x60000000, 0x64000000, 0x68000000, 0x6C000000,
+ 0x70000000, 0x74000000, 0x78000000, 0x7C000000,
+ 0x80000000, 0x84000000, 0x88000000, 0x8C000000,
+ 0x90000000, 0x94000000, 0x98000000, 0x9C000000,
+ 0xA0000000, 0xA4000000, 0xA8000000, 0xAC000000,
+ 0xB0000000, 0xB4000000, 0xB8000000, 0xBC000000,
+ 0xC0000000, 0xC4000000, 0xC8000000, 0xCC000000,
+ 0xD0000000, 0xD4000000, 0xD8000000, 0xDC000000,
+ 0xE0000000, 0xE4000000, 0xE8000000, 0xEC000000,
+ 0xF0000000, 0xF4000000, 0xF8000000, 0xFC000000
+};
+
+/* Array of reference sines in Q1.31 format */
+static int32_t aRefSin[ARRAY_SIZE] =
+{
+ 0x00000000, 0x0C8BD35E, 0x18F8B83C, 0x25280C5D,
+ 0x30FBC54D, 0x3C56BA70, 0x471CECE6, 0x5133CC94,
+ 0x5A827999, 0x62F201AC, 0x6A6D98A4, 0x70E2CBC6,
+ 0x7641AF3C, 0x7A7D055B, 0x7D8A5F3F, 0x7F62368F,
+ 0x80000000, 0x7F62368F, 0x7D8A5F3F, 0x7A7D055B,
+ 0x7641AF3C, 0x70E2CBC6, 0x6A6D98A4, 0x62F201AC,
+ 0x5A827999, 0x5133CC94, 0x471CECE6, 0x3C56BA70,
+ 0x30FBC54D, 0x25280C5D, 0x18F8B83C, 0x0C8BD35E,
+ 0x00000000, 0xF3742CA2, 0xE70747C4, 0xDAD7F3A3,
+ 0xCF043AB3, 0xC3A94590, 0xB8E3131A, 0xAECC336C,
+ 0xA57D8667, 0x9D0DFE54, 0x9592675C, 0x8F1D343A,
+ 0x89BE50C4, 0x8582FAA5, 0x8275A0C1, 0x809DC971,
+ 0x80000000, 0x809DC971, 0x8275A0C1, 0x8582FAA5,
+ 0x89BE50C4, 0x8F1D343A, 0x9592675C, 0x9D0DFE54,
+ 0xA57D8667, 0xAECC336C, 0xB8E3131A, 0xC3A94590,
+ 0xCF043AB3, 0xDAD7F3A3, 0xE70747C4, 0xF3742CA2
+};
+
+/* Array of calculated sines in Q1.31 format */
+static int32_t aCalculatedSin[ARRAY_SIZE];
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_DMA_Init(void);
+static void MX_CORDIC_Init(void);
+/* USER CODE BEGIN PFP */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError);
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+ /* Configure LED1 and LED3 */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED3);
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_DMA_Init();
+ MX_CORDIC_Init();
+ /* USER CODE BEGIN 2 */
+ /*## Configure the CORDIC peripheral ####################################*/
+ sCordicConfig.Function = CORDIC_FUNCTION_SINE; /* sine function */
+ sCordicConfig.Precision = CORDIC_PRECISION_6CYCLES; /* max precision for q1.31 sine */
+ sCordicConfig.Scale = CORDIC_SCALE_0; /* no scale */
+ sCordicConfig.NbWrite = CORDIC_NBWRITE_1; /* One input data: angle. Second input data (modulus) is 1 after cordic reset */
+ sCordicConfig.NbRead = CORDIC_NBREAD_1; /* One output data: sine */
+ sCordicConfig.InSize = CORDIC_INSIZE_32BITS; /* q1.31 format for input data */
+ sCordicConfig.OutSize = CORDIC_OUTSIZE_32BITS; /* q1.31 format for output data */
+
+ if (HAL_CORDIC_Configure(&hcordic, &sCordicConfig) != HAL_OK)
+ {
+ /* Configuration Error */
+ Error_Handler();
+ }
+
+ /*## Start calculation of sines in DMA mode #############################*/
+ if (HAL_CORDIC_Calculate_DMA(&hcordic, aAngles, aCalculatedSin,
+ ARRAY_SIZE, CORDIC_DMA_DIR_IN_OUT) != HAL_OK)
+ {
+ /* Processing Error */
+ Error_Handler();
+ }
+
+ /* Before starting a new process, you need to check the current state of the peripheral;
+ if it’s busy you need to wait for the end of current transfer before starting a new one.
+ For simplicity reasons, this example is just waiting till the end of the
+ process, but application may perform other tasks while transfer operation
+ is ongoing. */
+ while (HAL_CORDIC_GetState(&hcordic) != HAL_CORDIC_STATE_READY)
+ {
+ }
+
+ /*## Compare CORDIC results to the reference values #####################*/
+ for (uint32_t i = 0; i < ARRAY_SIZE; i++)
+ {
+ if (Check_Residual_Error(aCalculatedSin[i], aRefSin[i], DELTA) == FAIL)
+ {
+ Error_Handler();
+ }
+ }
+
+ /* Correct CORDIC output values: Turn LED1 on */
+ BSP_LED_On(LED1);
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief CORDIC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_CORDIC_Init(void)
+{
+
+ /* USER CODE BEGIN CORDIC_Init 0 */
+
+ /* USER CODE END CORDIC_Init 0 */
+
+ /* USER CODE BEGIN CORDIC_Init 1 */
+
+ /* USER CODE END CORDIC_Init 1 */
+ hcordic.Instance = CORDIC;
+ if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN CORDIC_Init 2 */
+
+ /* USER CODE END CORDIC_Init 2 */
+
+}
+
+/**
+ * Enable DMA controller clock
+ */
+static void MX_DMA_Init(void)
+{
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMAMUX1_CLK_ENABLE();
+ __HAL_RCC_DMA1_CLK_ENABLE();
+
+ /* DMA interrupt init */
+ /* DMA1_Channel1_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+ /* DMA1_Channel2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
+/* USER CODE BEGIN 4 */
+/**
+ * @brief Check delta between two values is below threshold
+ * @param VarA First input variable
+ * @param VarB Second input variable
+ * @param MaxError Maximum delta allowed between VarA and VarB
+ * @retval Status
+ * PASS: Delta is below threshold
+ * FAIL: Delta is above threshold
+ */
+uint32_t Check_Residual_Error(int32_t VarA, int32_t VarB, uint32_t MaxError)
+{
+ uint32_t status = PASS;
+
+ if ((VarA - VarB) >= 0)
+ {
+ if ((VarA - VarB) > MaxError)
+ {
+ status = FAIL;
+ }
+ }
+ else
+ {
+ if ((VarB - VarA) > MaxError)
+ {
+ status = FAIL;
+ }
+ }
+
+ return status;
+}
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ while (1)
+ {
+ /* LED3 is blinking */
+ BSP_LED_Toggle(LED3);
+ HAL_Delay(500);
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+
+ /* Infinite loop */
+ while (1)
+ {
+ }
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..40c3948ba
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,176 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_cordic_write;
+
+extern DMA_HandleTypeDef hdma_cordic_read;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CORDIC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
+{
+ if(hcordic->Instance==CORDIC)
+ {
+ /* USER CODE BEGIN CORDIC_MspInit 0 */
+
+ /* USER CODE END CORDIC_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_CORDIC_CLK_ENABLE();
+
+ /* CORDIC DMA Init */
+ /* CORDIC_WRITE Init */
+ hdma_cordic_write.Instance = DMA1_Channel1;
+ hdma_cordic_write.Init.Request = DMA_REQUEST_CORDIC_WRITE;
+ hdma_cordic_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_cordic_write.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_cordic_write.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_cordic_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+ hdma_cordic_write.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+ hdma_cordic_write.Init.Mode = DMA_NORMAL;
+ hdma_cordic_write.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_cordic_write) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hcordic,hdmaIn,hdma_cordic_write);
+
+ /* CORDIC_READ Init */
+ hdma_cordic_read.Instance = DMA1_Channel2;
+ hdma_cordic_read.Init.Request = DMA_REQUEST_CORDIC_READ;
+ hdma_cordic_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_cordic_read.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_cordic_read.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_cordic_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
+ hdma_cordic_read.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+ hdma_cordic_read.Init.Mode = DMA_NORMAL;
+ hdma_cordic_read.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_cordic_read) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(hcordic,hdmaOut,hdma_cordic_read);
+
+ /* USER CODE BEGIN CORDIC_MspInit 1 */
+
+ /* USER CODE END CORDIC_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief CORDIC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcordic: CORDIC handle pointer
+* @retval None
+*/
+void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
+{
+ if(hcordic->Instance==CORDIC)
+ {
+ /* USER CODE BEGIN CORDIC_MspDeInit 0 */
+ /* Reset CORDIC peripheral */
+ __HAL_RCC_CORDIC_FORCE_RESET();
+ __HAL_RCC_CORDIC_RELEASE_RESET();
+
+ /* USER CODE END CORDIC_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_CORDIC_CLK_DISABLE();
+
+ /* CORDIC DMA DeInit */
+ HAL_DMA_DeInit(hcordic->hdmaIn);
+ HAL_DMA_DeInit(hcordic->hdmaOut);
+ /* USER CODE BEGIN CORDIC_MspDeInit 1 */
+
+ /* USER CODE END CORDIC_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..dd01dbb70
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
@@ -0,0 +1,234 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include "stm32g474e_eval.h"
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_HandleTypeDef hdma_cordic_write;
+extern DMA_HandleTypeDef hdma_cordic_read;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles DMA1 channel1 global interrupt.
+ */
+void DMA1_Channel1_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_cordic_write);
+ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA1 channel2 global interrupt.
+ */
+void DMA1_Channel2_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
+
+ /* USER CODE END DMA1_Channel2_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_cordic_read);
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
+
+ /* USER CODE END DMA1_Channel2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt
new file mode 100644
index 000000000..210228c06
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CORDIC/CORDIC_Sin_DMA/readme.txt
@@ -0,0 +1,86 @@
+/**
+ @page CORDIC_Sin_DMA CORDIC Sines calculation in DMA mode example
+
+ @verbatim
+ ******************************************************************************
+ * @file CORDIC/CORDIC_Sin_DMA/readme.txt
+ * @author MCD Application Team
+ * @brief Sines calculation in DMA mode example.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+How to use the CORDIC peripheral to calculate array of sines in DMA mode.
+
+In this example, the CORDIC peripheral is configured in sine function, q1.31
+format for both input and output data, and with 6 cycles of precision.
+The input data provided to CORDIC peripheral are angles in radians
+divided by PI, in q1.31 format. The output data are sines in q1.31 format.
+For 6 cycles of precision, the maximal expected residual error of the
+calculated sines is 2^-19.
+
+DMA is used to transfer input data from memory to the CORDIC peripheral and
+output data from CORDIC peripheral to memory, so that CPU is offloaded.
+
+The calculated sines are stored in aCalculatedSin[] array.
+The residual error of calculation results is verified, by comparing to
+reference values in aRefSin[] obtained from double precision floating point
+calculation.
+
+STM32 board LEDs are used to monitor the example status:
+ - LED1 is ON when correct CORDIC sine results are calculated.
+ - LED3 is blinking (1 second period) when exceeding residual error
+ on CORDIC sine results is detected or when there is an initialization error.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+CORDIC, Sine, DMA mode.
+
+@par Directory contents
+
+ - CORDIC/CORDIC_Sin_DMA/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - CORDIC/CORDIC_Sinus_DMA/Inc/main.h Header for main.c module
+ - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_it.c Interrupt handlers
+ - CORDIC/CORDIC_Sinus_DMA/Src/main.c Main program
+ - CORDIC/CORDIC_Sinus_DMA/Src/stm32g4xx_hal_msp.c HAL MSP module
+ - CORDIC/CORDIC_Sinus_DMA/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474QETx devices.
+
+ - This example has been tested with STMicroelectronics STM32G474E-EVAL1 Rev B
+ board and can be easily tailored to any other supported device
+ and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc
new file mode 100644
index 000000000..f893585f6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/CRC_Bytes_Stream_7bit_CRC.ioc
@@ -0,0 +1,130 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.CRCLength=CRC_POLYLENGTH_7B
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_ENABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
+CRC.GeneratingPolynomial=X6+X5+X2+X0
+CRC.IPParameters=DefaultPolynomialUse,CRCLength,GeneratingPolynomial,DefaultInitValueUse,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_BYTES
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_NONE
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_DISABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_Bytes_Stream_7bit_CRC.ioc
+ProjectManager.ProjectName=CRC_Bytes_Stream_7bit_CRC
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_Bytes_Stream_7bit_CRC
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd
new file mode 100644
index 000000000..943f1f6b1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ CRC_Bytes_Stream_7bit_CRC
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp
new file mode 100644
index 000000000..2d6e10b0a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/CRC_Bytes_Stream_7bit_CRC.ewp
@@ -0,0 +1,1153 @@
+
+
+ 3
+
+ CRC_Bytes_Stream_7bit_CRC
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ CRC_Bytes_Stream_7bit_CRC/Exe
+
+
+ ObjPath
+ CRC_Bytes_Stream_7bit_CRC/Obj
+
+
+ ListPath
+ CRC_Bytes_Stream_7bit_CRC/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ CRC_Bytes_Stream_7bit_CRC.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ CRC_Bytes_Stream_7bit_CRC.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww
new file mode 100644
index 000000000..74343f16c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\CRC_Bytes_Stream_7bit_CRC.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
new file mode 100644
index 000000000..667a377c3
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..f9a39e1b1
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx
new file mode 100644
index 000000000..8789e6805
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvoptx
@@ -0,0 +1,657 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ CRC_Bytes_Stream_7bit_CRC
+ 0x4
+ ARM-ADS
+
+ 170000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+ stm32g4xx_hal_crc.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+ stm32g4xx_hal_crc_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+ stm32g4xx_ll_pwr.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx
new file mode 100644
index 000000000..415a892dd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/CRC_Bytes_Stream_7bit_CRC.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ CRC_Bytes_Stream_7bit_CRC
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ CRC_Bytes_Stream_7bit_CRC\
+ CRC_Bytes_Stream_7bit_CRC
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x80000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 4
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ USE_HAL_DRIVER,STM32G474xx
+
+ ../Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc;../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include;../../../../../../Drivers/CMSIS/Include;../../../../../../Drivers/BSP/STM32G474E-EVAL;../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32g474xx.s
+ 2
+ startup_stm32g474xx.s
+
+
+
+
+ Application/User
+
+
+ main.c
+ 1
+ ../Src/main.c
+
+
+ stm32g4xx_it.c
+ 1
+ ../Src/stm32g4xx_it.c
+
+
+ stm32g4xx_hal_msp.c
+ 1
+ ../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ../readme.txt
+
+
+
+
+ Drivers/BSP/Components
+
+
+ mfxstm32l152_reg.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ mfxstm32l152.c
+ 1
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+
+
+ stm32g474e_eval_bus.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ stm32g474e_eval_io.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ stm32g474e_eval.c
+ 1
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+
+
+ stm32g4xx_hal_i2c.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ stm32g4xx_hal_i2c_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ stm32g4xx_hal_spi.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ stm32g4xx_hal_spi_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ stm32g4xx_hal_crc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+
+
+ stm32g4xx_hal_crc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+
+
+ stm32g4xx_hal_gpio.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ stm32g4xx_hal.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ stm32g4xx_hal_rcc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ stm32g4xx_hal_rcc_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ stm32g4xx_hal_flash.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ stm32g4xx_hal_flash_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ stm32g4xx_hal_flash_ramfunc.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ stm32g4xx_hal_exti.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ stm32g4xx_hal_dma.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ stm32g4xx_hal_dma_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ stm32g4xx_hal_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ stm32g4xx_hal_pwr_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ stm32g4xx_hal_cortex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ stm32g4xx_hal_tim.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ stm32g4xx_hal_tim_ex.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ stm32g4xx_ll_pwr.c
+ 1
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32g4xx.c
+ 1
+ ../Src/system_stm32g4xx.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ef6bc3dbf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/MDK-ARM/startup_stm32g474xx.s
@@ -0,0 +1,486 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : Vector table for MDK-ARM toolchain
+;*******************************************************************************
+;* Description : STM32G474xx Mainstream devices vector table for
+;* MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;* <<< Use Configuration Wizard in Context Menu >>>
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_PVM_IRQHandler [WEAK]
+ EXPORT RTC_TAMP_LSECSS_IRQHandler [WEAK]
+ EXPORT RTC_WKUP_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_IRQHandler [WEAK]
+ EXPORT EXTI0_IRQHandler [WEAK]
+ EXPORT EXTI1_IRQHandler [WEAK]
+ EXPORT EXTI2_IRQHandler [WEAK]
+ EXPORT EXTI3_IRQHandler [WEAK]
+ EXPORT EXTI4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_IRQHandler [WEAK]
+ EXPORT DMA1_Channel3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_IRQHandler [WEAK]
+ EXPORT DMA1_Channel5_IRQHandler [WEAK]
+ EXPORT DMA1_Channel6_IRQHandler [WEAK]
+ EXPORT DMA1_Channel7_IRQHandler [WEAK]
+ EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT USB_HP_IRQHandler [WEAK]
+ EXPORT USB_LP_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN1_IT1_IRQHandler [WEAK]
+ EXPORT EXTI9_5_IRQHandler [WEAK]
+ EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
+ EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
+ EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
+ EXPORT TIM1_CC_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM3_IRQHandler [WEAK]
+ EXPORT TIM4_IRQHandler [WEAK]
+ EXPORT I2C1_EV_IRQHandler [WEAK]
+ EXPORT I2C1_ER_IRQHandler [WEAK]
+ EXPORT I2C2_EV_IRQHandler [WEAK]
+ EXPORT I2C2_ER_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT USART3_IRQHandler [WEAK]
+ EXPORT EXTI15_10_IRQHandler [WEAK]
+ EXPORT RTC_Alarm_IRQHandler [WEAK]
+ EXPORT USBWakeUp_IRQHandler [WEAK]
+ EXPORT TIM8_BRK_IRQHandler [WEAK]
+ EXPORT TIM8_UP_IRQHandler [WEAK]
+ EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM8_CC_IRQHandler [WEAK]
+ EXPORT ADC3_IRQHandler [WEAK]
+ EXPORT FMC_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM5_IRQHandler [WEAK]
+ EXPORT SPI3_IRQHandler [WEAK]
+ EXPORT UART4_IRQHandler [WEAK]
+ EXPORT UART5_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM7_DAC_IRQHandler [WEAK]
+ EXPORT DMA2_Channel1_IRQHandler [WEAK]
+ EXPORT DMA2_Channel2_IRQHandler [WEAK]
+ EXPORT DMA2_Channel3_IRQHandler [WEAK]
+ EXPORT DMA2_Channel4_IRQHandler [WEAK]
+ EXPORT DMA2_Channel5_IRQHandler [WEAK]
+ EXPORT ADC4_IRQHandler [WEAK]
+ EXPORT ADC5_IRQHandler [WEAK]
+ EXPORT UCPD1_IRQHandler [WEAK]
+ EXPORT COMP1_2_3_IRQHandler [WEAK]
+ EXPORT COMP4_5_6_IRQHandler [WEAK]
+ EXPORT COMP7_IRQHandler [WEAK]
+ EXPORT HRTIM1_Master_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIME_IRQHandler [WEAK]
+ EXPORT HRTIM1_FLT_IRQHandler [WEAK]
+ EXPORT HRTIM1_TIMF_IRQHandler [WEAK]
+ EXPORT CRS_IRQHandler [WEAK]
+ EXPORT SAI1_IRQHandler [WEAK]
+ EXPORT TIM20_BRK_IRQHandler [WEAK]
+ EXPORT TIM20_UP_IRQHandler [WEAK]
+ EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
+ EXPORT TIM20_CC_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT I2C4_EV_IRQHandler [WEAK]
+ EXPORT I2C4_ER_IRQHandler [WEAK]
+ EXPORT SPI4_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN2_IT1_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT0_IRQHandler [WEAK]
+ EXPORT FDCAN3_IT1_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT LPUART1_IRQHandler [WEAK]
+ EXPORT I2C3_EV_IRQHandler [WEAK]
+ EXPORT I2C3_ER_IRQHandler [WEAK]
+ EXPORT DMAMUX_OVR_IRQHandler [WEAK]
+ EXPORT QUADSPI_IRQHandler [WEAK]
+ EXPORT DMA1_Channel8_IRQHandler [WEAK]
+ EXPORT DMA2_Channel6_IRQHandler [WEAK]
+ EXPORT DMA2_Channel7_IRQHandler [WEAK]
+ EXPORT DMA2_Channel8_IRQHandler [WEAK]
+ EXPORT CORDIC_IRQHandler [WEAK]
+ EXPORT FMAC_IRQHandler [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+RTC_TAMP_LSECSS_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_2_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+FDCAN1_IT0_IRQHandler
+FDCAN1_IT1_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_TIM17_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USBWakeUp_IRQHandler
+TIM8_BRK_IRQHandler
+TIM8_UP_IRQHandler
+TIM8_TRG_COM_IRQHandler
+TIM8_CC_IRQHandler
+ADC3_IRQHandler
+FMC_IRQHandler
+LPTIM1_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_DAC_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+ADC4_IRQHandler
+ADC5_IRQHandler
+UCPD1_IRQHandler
+COMP1_2_3_IRQHandler
+COMP4_5_6_IRQHandler
+COMP7_IRQHandler
+HRTIM1_Master_IRQHandler
+HRTIM1_TIMA_IRQHandler
+HRTIM1_TIMB_IRQHandler
+HRTIM1_TIMC_IRQHandler
+HRTIM1_TIMD_IRQHandler
+HRTIM1_TIME_IRQHandler
+HRTIM1_FLT_IRQHandler
+HRTIM1_TIMF_IRQHandler
+CRS_IRQHandler
+SAI1_IRQHandler
+TIM20_BRK_IRQHandler
+TIM20_UP_IRQHandler
+TIM20_TRG_COM_IRQHandler
+TIM20_CC_IRQHandler
+FPU_IRQHandler
+I2C4_EV_IRQHandler
+I2C4_ER_IRQHandler
+SPI4_IRQHandler
+FDCAN2_IT0_IRQHandler
+FDCAN2_IT1_IRQHandler
+FDCAN3_IT0_IRQHandler
+FDCAN3_IT1_IRQHandler
+RNG_IRQHandler
+LPUART1_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+DMAMUX_OVR_IRQHandler
+QUADSPI_IRQHandler
+DMA1_Channel8_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+DMA2_Channel8_IRQHandler
+CORDIC_IRQHandler
+FMAC_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject
new file mode 100644
index 000000000..aeb04e89e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.cproject
@@ -0,0 +1,173 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project
new file mode 100644
index 000000000..9e838952e
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/.project
@@ -0,0 +1,200 @@
+
+
+ CRC_Bytes_Stream_7bit_CRC
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
+ com.st.stm32cube.ide.mcu.MCUNonUnderRootProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
+
+ CRC_Bytes_Stream_7bit_CRC.ioc
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/CRC_Bytes_Stream_7bit_CRC.ioc
+
+
+ Doc/readme.txt
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/readme.txt
+
+
+ Application/User/main.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/main.c
+
+
+ Application/User/stm32g4xx_hal_msp.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_hal_msp.c
+
+
+ Application/User/stm32g4xx_it.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/stm32g4xx_it.c
+
+
+ Drivers/CMSIS/system_stm32g4xx.c
+ 1
+ $%7BPARENT-1-PROJECT_LOC%7D/Src/system_stm32g4xx.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_cortex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_crc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_dma_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_exti.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_flash_ramfunc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_gpio.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_i2c_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_pwr_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_rcc_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_spi_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_hal_tim_ex.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ Drivers/STM32G4xx_HAL_Driver/stm32g4xx_ll_pwr.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+
+
+ Drivers/BSP/Components/mfxstm32l152.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+ Drivers/BSP/Components/mfxstm32l152_reg.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ 1
+ $%7BPARENT-6-PROJECT_LOC%7D/Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
new file mode 100644
index 000000000..2477dc46c
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/Startup/startup_stm32g474qetx.s
@@ -0,0 +1,592 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32g474xx.s
+ * @author MCD Application Team
+ * @brief STM32G474xx devices vector table GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr r0, =_estack
+ mov sp, r0 /* set stack pointer */
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word RTC_TAMP_LSECSS_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word USB_HP_IRQHandler
+ .word USB_LP_IRQHandler
+ .word FDCAN1_IT0_IRQHandler
+ .word FDCAN1_IT1_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word USBWakeUp_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_DAC_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word ADC4_IRQHandler
+ .word ADC5_IRQHandler
+ .word UCPD1_IRQHandler
+ .word COMP1_2_3_IRQHandler
+ .word COMP4_5_6_IRQHandler
+ .word COMP7_IRQHandler
+ .word HRTIM1_Master_IRQHandler
+ .word HRTIM1_TIMA_IRQHandler
+ .word HRTIM1_TIMB_IRQHandler
+ .word HRTIM1_TIMC_IRQHandler
+ .word HRTIM1_TIMD_IRQHandler
+ .word HRTIM1_TIME_IRQHandler
+ .word HRTIM1_FLT_IRQHandler
+ .word HRTIM1_TIMF_IRQHandler
+ .word CRS_IRQHandler
+ .word SAI1_IRQHandler
+ .word TIM20_BRK_IRQHandler
+ .word TIM20_UP_IRQHandler
+ .word TIM20_TRG_COM_IRQHandler
+ .word TIM20_CC_IRQHandler
+ .word FPU_IRQHandler
+ .word I2C4_EV_IRQHandler
+ .word I2C4_ER_IRQHandler
+ .word SPI4_IRQHandler
+ .word 0
+ .word FDCAN2_IT0_IRQHandler
+ .word FDCAN2_IT1_IRQHandler
+ .word FDCAN3_IT0_IRQHandler
+ .word FDCAN3_IT1_IRQHandler
+ .word RNG_IRQHandler
+ .word LPUART1_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word DMAMUX_OVR_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word DMA1_Channel8_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word DMA2_Channel8_IRQHandler
+ .word CORDIC_IRQHandler
+ .word FMAC_IRQHandler
+
+ .size g_pfnVectors, .-g_pfnVectors
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak RTC_TAMP_LSECSS_IRQHandler
+ .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak USB_HP_IRQHandler
+ .thumb_set USB_HP_IRQHandler,Default_Handler
+
+ .weak USB_LP_IRQHandler
+ .thumb_set USB_LP_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT0_IRQHandler
+ .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN1_IT1_IRQHandler
+ .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak USBWakeUp_IRQHandler
+ .thumb_set USBWakeUp_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_DAC_IRQHandler
+ .thumb_set TIM7_DAC_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak ADC4_IRQHandler
+ .thumb_set ADC4_IRQHandler,Default_Handler
+
+ .weak ADC5_IRQHandler
+ .thumb_set ADC5_IRQHandler,Default_Handler
+
+ .weak UCPD1_IRQHandler
+ .thumb_set UCPD1_IRQHandler,Default_Handler
+
+ .weak COMP1_2_3_IRQHandler
+ .thumb_set COMP1_2_3_IRQHandler,Default_Handler
+
+ .weak COMP4_5_6_IRQHandler
+ .thumb_set COMP4_5_6_IRQHandler,Default_Handler
+
+ .weak COMP7_IRQHandler
+ .thumb_set COMP7_IRQHandler,Default_Handler
+
+ .weak HRTIM1_Master_IRQHandler
+ .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMA_IRQHandler
+ .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMB_IRQHandler
+ .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMC_IRQHandler
+ .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMD_IRQHandler
+ .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIME_IRQHandler
+ .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
+
+ .weak HRTIM1_FLT_IRQHandler
+ .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
+
+ .weak HRTIM1_TIMF_IRQHandler
+ .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
+
+ .weak CRS_IRQHandler
+ .thumb_set CRS_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak TIM20_BRK_IRQHandler
+ .thumb_set TIM20_BRK_IRQHandler,Default_Handler
+
+ .weak TIM20_UP_IRQHandler
+ .thumb_set TIM20_UP_IRQHandler,Default_Handler
+
+ .weak TIM20_TRG_COM_IRQHandler
+ .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM20_CC_IRQHandler
+ .thumb_set TIM20_CC_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
+ .weak I2C4_EV_IRQHandler
+ .thumb_set I2C4_EV_IRQHandler,Default_Handler
+
+ .weak I2C4_ER_IRQHandler
+ .thumb_set I2C4_ER_IRQHandler,Default_Handler
+
+ .weak SPI4_IRQHandler
+ .thumb_set SPI4_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT0_IRQHandler
+ .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN2_IT1_IRQHandler
+ .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT0_IRQHandler
+ .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
+
+ .weak FDCAN3_IT1_IRQHandler
+ .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak DMAMUX_OVR_IRQHandler
+ .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel8_IRQHandler
+ .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel8_IRQHandler
+ .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
+
+ .weak CORDIC_IRQHandler
+ .thumb_set CORDIC_IRQHandler,Default_Handler
+
+ .weak FMAC_IRQHandler
+ .thumb_set FMAC_IRQHandler,Default_Handler
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c
new file mode 100644
index 000000000..d190edf31
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c
new file mode 100644
index 000000000..921ecef9a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/Application/User/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
new file mode 100644
index 000000000..28a23f64b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/STM32CubeIDE/STM32G474QETX_FLASH.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32G474QETx Device from stm32g4 series
+** 512Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
new file mode 100644
index 000000000..24a0971bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
@@ -0,0 +1,349 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c
+ * @author MCD Application Team
+ * @brief This sample code shows how to use the STM32G4xx CRC HAL API
+ * to compute 7-bit CRC codes from buffers of data bytes (8-bit data),
+ * based on a user-defined generating polynomial.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define BUFFER_SIZE_5 5 /* CRC7_DATA8_TEST5[] is 5-byte long */
+#define BUFFER_SIZE_17 17 /* CRC7_DATA8_TEST17[] is 17-byte long */
+#define BUFFER_SIZE_1 1 /* CRC7_DATA8_TEST1[] is 1-byte long */
+#define BUFFER_SIZE_2 2 /* CRC7_DATA8_TEST2[] is 2-byte long */
+
+/* User-defined polynomial */
+#define CRC_POLYNOMIAL_7B 0x65 /* X^7 + X^6 + X^5 + X^2 + 1,
+ used in Train Communication Network, IEC 60870-5[17] */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN PV */
+/* Used for storing CRC Value */
+__IO uint32_t uwCRCValue = 0;
+
+/* Bytes buffers that will consecutively yield CRCs */
+static const uint8_t CRC7_DATA8_TEST5[5] = {0x12, 0x34, 0xBA, 0x71, 0xAD};
+static const uint8_t CRC7_DATA8_TEST17[17] = {0x12, 0x34, 0xBA, 0x71, 0xAD,
+ 0x11, 0x56, 0xDC, 0x88, 0x1B,
+ 0xEE, 0x4D, 0x82, 0x93, 0xA6,
+ 0x7F, 0xC3
+ };
+static const uint8_t CRC7_DATA8_TEST1[1] = {0x19};
+static const uint8_t CRC7_DATA8_TEST2[2] = {0xAB, 0xCD};
+
+uint32_t * CRC7_DATA8_PTR_TEST1 = (uint32_t *)CRC7_DATA8_TEST1;
+uint32_t * CRC7_DATA8_PTR_TEST2 = (uint32_t *)CRC7_DATA8_TEST2;
+
+
+/* Expected CRC Values */
+/* The 7 LSB bits are the 7-bit long CRC */
+uint32_t uwExpectedCRCValue_1 = 0x00000057; /* First byte stream CRC */
+uint32_t uwExpectedCRCValue_2 = 0x0000006E; /* Second byte stream CRC */
+uint32_t uwExpectedCRCValue_3 = 0x0000004B; /* Third byte stream CRC */
+uint32_t uwExpectedCRCValue_4 = 0x00000026; /* Fourth byte stream CRC */
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_CRC_Init(void);
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* STM32G4xx HAL library initialization:
+ - Configure the Flash prefetch
+ - Systick timer is configured by default as source of time base, but user
+ can eventually implement his proper time base source (a general purpose
+ timer for example or other time source), keeping in mind that Time base
+ duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
+ handled in milliseconds basis.
+ - Set NVIC Group Priority to 4
+ - Low Level Initialization
+ */
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_CRC_Init();
+ /* USER CODE BEGIN 2 */
+ /* Configure LED1 and LED3 */
+ BSP_LED_Init(LED1);
+ BSP_LED_Init(LED3);
+
+ /****************************************************************************/
+ /* */
+ /* CRC computation of a first bytes stream */
+ /* */
+ /****************************************************************************/
+
+ /* The 7-bit long CRC of a 5-byte buffer is computed. After peripheral initialization,
+ the CRC calculator is initialized with the default value that is 0x7F for
+ a 7-bit CRC.
+
+ The computed CRC is stored in uint32_t uwCRCValue. The 7-bit long CRC is made of
+ uwCRCValue 7 LSB bits. */
+
+ uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC7_DATA8_TEST5, BUFFER_SIZE_5);
+
+ /* Compare the CRC value to the expected one */
+ if (uwCRCValue != uwExpectedCRCValue_1)
+ {
+ /* Wrong CRC value: Turn LED3 on */
+ Error_Handler();
+ }
+
+
+ /****************************************************************************/
+ /* */
+ /* CRC computation of a second bytes stream */
+ /* */
+ /****************************************************************************/
+
+ /* The 7-bit long CRC of a 17-byte buffer is computed. The CRC calculator
+ is not re-initialized, instead the previously computed CRC is used
+ as initial value. */
+
+ uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)&CRC7_DATA8_TEST17, BUFFER_SIZE_17);
+
+ /* Compare the CRC value to the expected one */
+ if (uwCRCValue != uwExpectedCRCValue_2)
+ {
+ /* Wrong CRC value: Turn LED3 on */
+ Error_Handler();
+ }
+
+
+ /****************************************************************************/
+ /* */
+ /* CRC computation of a single byte */
+ /* */
+ /****************************************************************************/
+
+ /* The 7-bit long CRC of a 1-byte buffer is computed. The CRC calculator
+ is not re-initialized, instead the previously computed CRC is used
+ as initial value. */
+
+ uwCRCValue = HAL_CRC_Accumulate(&hcrc, (uint32_t *)CRC7_DATA8_PTR_TEST1, BUFFER_SIZE_1);
+
+ /* Compare the CRC value to the expected one */
+ if (uwCRCValue != uwExpectedCRCValue_3)
+ {
+ /* Wrong CRC value: Turn LED3 on */
+ Error_Handler();
+ }
+
+
+ /****************************************************************************/
+ /* */
+ /* CRC computation of the last bytes stream */
+ /* */
+ /****************************************************************************/
+
+ /* The 7-bit long CRC of a 2-byte buffer is computed. The CRC calculator
+ is re-initialized with the default value that is 0x7F for a 7-bit CRC.
+ This is done with a call to HAL_CRC_Calculate() instead of
+ HAL_CRC_Accumulate(). */
+
+ uwCRCValue = HAL_CRC_Calculate(&hcrc, (uint32_t *)CRC7_DATA8_PTR_TEST2, BUFFER_SIZE_2);
+
+ /* Compare the CRC value to the expected one */
+ if (uwCRCValue != uwExpectedCRCValue_4)
+ {
+ /* Wrong CRC value: Turn LED3 on */
+ Error_Handler();
+ }
+ else
+ {
+ /* Right CRC value: Turn LED1 on */
+ BSP_LED_On(LED1);
+ }
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/**
+ * @brief CRC Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_CRC_Init(void)
+{
+
+ /* USER CODE BEGIN CRC_Init 0 */
+
+ /* USER CODE END CRC_Init 0 */
+
+ /* USER CODE BEGIN CRC_Init 1 */
+
+ /* USER CODE END CRC_Init 1 */
+ hcrc.Instance = CRC;
+ hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
+ hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+ hcrc.Init.GeneratingPolynomial = 101;
+ hcrc.Init.CRCLength = CRC_POLYLENGTH_7B;
+ hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+ hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+ hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+ if (HAL_CRC_Init(&hcrc) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN CRC_Init 2 */
+
+ /* USER CODE END CRC_Init 2 */
+
+}
+
+/* USER CODE BEGIN 4 */
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* Turn LED3 on */
+ BSP_LED_On(LED3);
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
new file mode 100644
index 000000000..bd4dbf467
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
@@ -0,0 +1,130 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c
+ * @author MCD Application Team
+ * @brief HAL MSP module.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
+ */
+ HAL_PWREx_DisableUCPDDeadBattery();
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+ if(hcrc->Instance==CRC)
+ {
+ /* USER CODE BEGIN CRC_MspInit 0 */
+
+ /* USER CODE END CRC_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_CRC_CLK_ENABLE();
+ /* USER CODE BEGIN CRC_MspInit 1 */
+
+ /* USER CODE END CRC_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+ if(hcrc->Instance==CRC)
+ {
+ /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+ /* USER CODE END CRC_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_CRC_CLK_DISABLE();
+ /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+ /* USER CODE END CRC_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
new file mode 100644
index 000000000..29cb96337
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
@@ -0,0 +1,120 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c
+ * @author MCD Application Team
+ * @brief Main Interrupt Service Routines.
+ * This file provides template for all exceptions handler and
+ * peripherals interrupt service routine.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32g4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32G4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32g4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+
+/* USER CODE END 1 */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c
new file mode 100644
index 000000000..61eb310e4
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c
@@ -0,0 +1,270 @@
+/**
+ ******************************************************************************
+ * @file system_stm32g4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32g4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the HSI (16 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | HSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 16000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 16
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for RNG | Disabled
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32g4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32g4xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = HSI_VALUE;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32G4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
+ #endif
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
+ * 24 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, pllvco, pllr, pllsource, pllm;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
+ if (pllsource == 0x02UL) /* HSI used as PLL clock source */
+ {
+ pllvco = (HSI_VALUE / pllm);
+ }
+ else /* HSE used as PLL clock source */
+ {
+ pllvco = (HSE_VALUE / pllm);
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
new file mode 100644
index 000000000..0ee94b476
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
@@ -0,0 +1,104 @@
+/**
+ @page CRC_Bytes_Stream_7bit_CRC Bytes Buffers 7-bit CRC Computation Example
+
+ @verbatim
+ ******************************************************************************
+ * @file CRC/CRC_Bytes_Stream_7bit_CRC/readme.txt
+ * @author MCD Application Team
+ * @brief 7-bit long CRC computation from bytes (8-bit data) buffers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ @endverbatim
+
+@par Example Description
+
+How to configure the CRC using the HAL API. The CRC (cyclic
+redundancy check) calculation unit computes 7-bit CRC codes derived from buffers
+of 8-bit data (bytes). The user-defined generating polynomial is manually set
+to 0x65, that is, X^7 + X^6 + X^5 + X^2 + 1, as used in the Train Communication
+Network, IEC 60870-5[17].
+
+At the beginning of the main program, the HAL_Init() function is called to reset
+all the peripherals, initialize the Flash interface and the systick.
+Then the SystemClock_Config() function is used to configure the system
+clock (SYSCLK).
+
+The CRC peripheral configuration is ensured by HAL_CRC_Init() function.
+The latter is calling HAL_CRC_MspInit() function which core is implementing
+the configuration of the needed CRC resources according to the used hardware (CLOCK).
+You can update HAL_CRC_Init() input parameters to change the CRC configuration.
+
+In this example, the user-defined generating polynomial is configured by
+HAL_CRC_Init(). At the same time, it is set that neither input or output data
+must be reversed, the default init value is used and it is specified that input
+data type is byte.
+
+First, a 5-byte long buffer is processed to yield a first CRC.
+
+Next, a second CRC is computed from a 17-byte long buffer. For the latter,
+the CRC calculator is not re-initialized and instead the previously computed CRC
+is used as initial value.
+
+Then, a third CRC is computed from a 1-byte long buffer. Again, the CRC calculator
+is not re-initialized, the previously computed CRC is used as initial value.
+
+Finally, a fourth CRC is computed from a 2-byte long buffer. This time, the CRC
+calculator is re-initialized with the IP default value that is 0x7F for a 7-bit CRC.
+This is done with a call to HAL_CRC_Calculate() instead of HAL_CRC_Accumulate().
+
+Each time, the calculated CRC code is stored in uwCRCValue variable.
+Once calculated, the CRC value (uwCRCValue) is compared to the CRC expected value (uwExpectedCRCValue_1, 2, 3 or 4).
+
+STM32 board LEDs are used to monitor the example status:
+ - LED1 (GREEN) is ON when the correct CRC value is calculated
+ - LED3 (RED) is ON when there is an error in initialization or if an incorrect CRC value is calculated.
+
+@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
+ based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
+ a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
+ than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
+ To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
+
+@note The example needs to ensure that the SysTick time base is always set to 1 millisecond
+ to have correct HAL operation.
+
+@par Keywords
+
+Security, CRC, CRC Polynomial, IEC 60870-5
+
+@par Directory contents
+
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g474e_eval_conf.h BSP configuration file
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_hal_conf.h HAL configuration file
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/stm32g4xx_it.h Interrupt handlers header file
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Inc/main.h Header for main.c module
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_it.c Interrupt handlers
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Src/main.c Main program
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Src/stm32g4xx_hal_msp.c HAL MSP module
+ - CRC/CRC_Bytes_Stream_7bit_CRC/Src/system_stm32g4xx.c STM32G4xx system source file
+
+
+@par Hardware and Software environment
+
+ - This example runs on STM32G474QETx devices.
+ - This example has been tested with STM32G474E-EVAL1 Rev B board and can be
+ easily tailored to any other supported device and development board.
+
+@par How to use it ?
+
+In order to make the program work, you must do the following:
+ - Open your preferred toolchain
+ - Rebuild all files and load your image into target memory
+ - Run the example
+
+ */
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings
new file mode 100644
index 000000000..1517cc5bf
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/.extSettings
@@ -0,0 +1,9 @@
+[ProjectFiles]
+HeaderPath=..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc;..\..\..\..\..\..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\..\..\..\..\..\Drivers\CMSIS\Include;..\..\..\..\..\..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\..\..\..\..\..\Drivers\BSP\STM32G474E-EVAL;..\..\..\..\..\..\Drivers\BSP\Components\mfxstm32l152
+[Others]
+Define=
+HALModule=I2C;EXTI;SPI
+[Groups]
+Doc=../readme.txt;
+Drivers/BSP/Components=../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c;../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c;
+Drivers/BSP/STM32G474E-EVAL=../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c;../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c;
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc
new file mode 100644
index 000000000..dd2de928b
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/CRC_Data_Reversing_16bit_CRC.ioc
@@ -0,0 +1,131 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CRC.CRCLength=CRC_POLYLENGTH_16B
+CRC.DefaultInitValueUse=DEFAULT_INIT_VALUE_DISABLE
+CRC.DefaultPolynomialUse=DEFAULT_POLYNOMIAL_DISABLE
+CRC.GeneratingPolynomial=X12+X5+X0
+CRC.IPParameters=DefaultPolynomialUse,CRCLength,GeneratingPolynomial,DefaultInitValueUse,InitValue,InputDataInversionMode,OutputDataInversionMode,InputDataFormat
+CRC.InitValue=0x5ABE
+CRC.InputDataFormat=CRC_INPUTDATA_FORMAT_BYTES
+CRC.InputDataInversionMode=CRC_INPUTDATA_INVERSION_WORD
+CRC.OutputDataInversionMode=CRC_OUTPUTDATA_INVERSION_ENABLE
+File.Version=6
+KeepUserPlacement=true
+Mcu.CPN=STM32G474QET6
+Mcu.Family=STM32G4
+Mcu.IP0=CRC
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IPNb=4
+Mcu.Name=STM32G474Q(B-C-E)Tx
+Mcu.Package=LQFP128
+Mcu.Pin0=VP_CRC_VS_CRC
+Mcu.Pin1=VP_SYS_VS_Systick
+Mcu.Pin2=VP_SYS_VS_DBSignals
+Mcu.PinsNb=3
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474QETx
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474QETx
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CRC_Data_Reversing_16bit_CRC.ioc
+ProjectManager.ProjectName=CRC_Data_Reversing_16bit_CRC
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8.32
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_CRC_Init-CRC-false-HAL-true
+RCC.ADC12Freq_Value=170000000
+RCC.ADC345Freq_Value=170000000
+RCC.AHBFreq_Value=170000000
+RCC.APB1Freq_Value=170000000
+RCC.APB1TimFreq_Value=170000000
+RCC.APB2Freq_Value=170000000
+RCC.APB2TimFreq_Value=170000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=170000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=170000000
+RCC.FDCANFreq_Value=170000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=170000000
+RCC.HRTIM1Freq_Value=170000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=170000000
+RCC.I2C2Freq_Value=170000000
+RCC.I2C3Freq_Value=170000000
+RCC.I2C4Freq_Value=170000000
+RCC.I2SFreq_Value=170000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=170000000
+RCC.LPUART1Freq_Value=170000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=85
+RCC.PLLPoutputFreq_Value=170000000
+RCC.PLLQoutputFreq_Value=170000000
+RCC.PLLRCLKFreq_Value=170000000
+RCC.PWRFreq_Value=170000000
+RCC.QSPIFreq_Value=170000000
+RCC.RNGFreq_Value=170000000
+RCC.SAI1Freq_Value=170000000
+RCC.SYSCLKFreq_VALUE=170000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=170000000
+RCC.UART5Freq_Value=170000000
+RCC.USART1Freq_Value=170000000
+RCC.USART2Freq_Value=170000000
+RCC.USART3Freq_Value=170000000
+RCC.USBFreq_Value=170000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=340000000
+VP_CRC_VS_CRC.Mode=CRC_Activate
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
+ProjectManager.Example=CRC_Data_Reversing_16bit_CRC
+ProjectManager.ExampleSource=CubeFw
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd
new file mode 100644
index 000000000..f2d300a23
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewd
@@ -0,0 +1,1419 @@
+
+
+ 3
+
+ CRC_Data_Reversing_16bit_CRC
+
+ ARM
+
+ 1
+
+ C-SPY
+ 2
+
+ 29
+ 1
+ 1
+
+ CInput
+ 1
+
+
+ CEndian
+ 1
+
+
+ CProcessor
+ 1
+
+
+ OCVariant
+ 0
+
+
+ MacOverride
+ 0
+
+
+ MacFile
+
+
+
+ MemOverride
+ 0
+
+
+ MemFile
+
+
+
+ RunToEnable
+ 1
+
+
+ RunToName
+ main
+
+
+ CExtraOptionsCheck
+ 0
+
+
+ CExtraOptions
+
+
+
+ CFpuProcessor
+ 1
+
+
+ OCDDFArgumentProducer
+
+
+
+ OCDownloadSuppressDownload
+ 0
+
+
+ OCDownloadVerifyAll
+ 1
+
+
+ OCProductVersion
+ 7.10.3.6927
+
+
+ OCDynDriverList
+ STLINK_ID
+
+
+ OCLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ UseFlashLoader
+ 1
+
+
+ CLowLevel
+ 1
+
+
+ OCBE8Slave
+ 1
+
+
+ MacFile2
+
+
+
+ CDevice
+ 1
+
+
+ FlashLoadersV3
+
+
+
+ OCImagesSuppressCheck1
+ 0
+
+
+ OCImagesPath1
+
+
+
+ OCImagesSuppressCheck2
+ 0
+
+
+ OCImagesPath2
+
+
+
+ OCImagesSuppressCheck3
+ 0
+
+
+ OCImagesPath3
+
+
+
+ OverrideDefFlashBoard
+ 0
+
+
+ OCImagesOffset1
+
+
+
+ OCImagesOffset2
+
+
+
+ OCImagesOffset3
+
+
+
+ OCImagesUse1
+ 0
+
+
+ OCImagesUse2
+ 0
+
+
+ OCImagesUse3
+ 0
+
+
+ OCDeviceConfigMacroFile
+ 1
+
+
+ OCDebuggerExtraOption
+ 1
+
+
+ OCAllMTBOptions
+ 1
+
+
+ OCMulticoreNrOfCores
+ 1
+
+
+ OCMulticoreMaster
+ 0
+
+
+ OCMulticorePort
+ 53461
+
+
+ OCMulticoreWorkspace
+
+
+
+ OCMulticoreSlaveProject
+
+
+
+ OCMulticoreSlaveConfiguration
+
+
+
+ OCDownloadExtraImage
+ 1
+
+
+ OCAttachSlave
+ 0
+
+
+ MassEraseBeforeFlashing
+ 0
+
+
+
+
+ ARMSIM_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCSimDriverInfo
+ 1
+
+
+ OCSimEnablePSP
+ 0
+
+
+ OCSimPspOverrideConfig
+ 0
+
+
+ OCSimPspConfigFile
+
+
+
+
+
+ CADI_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CCadiMemory
+ 1
+
+
+ Fast Model
+
+
+
+ CCADILogFileCheck
+ 0
+
+
+ CCADILogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ CMSISDAP_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ CMSISDAPResetList
+ 1
+ 10
+
+
+ CMSISDAPHWResetDuration
+ 300
+
+
+ CMSISDAPHWResetDelay
+ 200
+
+
+ CMSISDAPDoLogfile
+ 0
+
+
+ CMSISDAPLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CMSISDAPInterfaceRadio
+ 0
+
+
+ CMSISDAPInterfaceCmdLine
+ 0
+
+
+ CMSISDAPMultiTargetEnable
+ 0
+
+
+ CMSISDAPMultiTarget
+ 0
+
+
+ CMSISDAPJtagSpeedList
+ 0
+ 0
+
+
+ CMSISDAPBreakpointRadio
+ 0
+
+
+ CMSISDAPRestoreBreakpointsCheck
+ 0
+
+
+ CMSISDAPUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ CMSISDAPMultiCPUEnable
+ 0
+
+
+ CMSISDAPMultiCPUNumber
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ CMSISDAPProbeConfigRadio
+ 0
+
+
+ CMSISDAPSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ CCCMSISDAPUsbSerialNo
+
+
+
+ CCCMSISDAPUsbSerialNoSelect
+ 0
+
+
+
+
+ GDBSERVER_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TCPIP
+ aaa.bbb.ccc.ddd
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJTagBreakpointRadio
+ 0
+
+
+ CCJTagDoUpdateBreakpoints
+ 0
+
+
+ CCJTagUpdateBreakpoints
+ _call_main
+
+
+
+
+ IJET_ID
+ 2
+
+ 8
+ 1
+ 1
+
+ CatchSFERR
+ 1
+
+
+ OCDriverInfo
+ 1
+
+
+ OCIarProbeScriptFile
+ 1
+
+
+ IjetResetList
+ 1
+ 10
+
+
+ IjetHWResetDuration
+ 300
+
+
+ IjetHWResetDelay
+ 200
+
+
+ IjetPowerFromProbe
+ 1
+
+
+ IjetPowerRadio
+ 0
+
+
+ IjetDoLogfile
+ 0
+
+
+ IjetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ IjetInterfaceRadio
+ 0
+
+
+ IjetInterfaceCmdLine
+ 0
+
+
+ IjetMultiTargetEnable
+ 0
+
+
+ IjetMultiTarget
+ 0
+
+
+ IjetScanChainNonARMDevices
+ 0
+
+
+ IjetIRLength
+ 0
+
+
+ IjetJtagSpeedList
+ 0
+ 0
+
+
+ IjetProtocolRadio
+ 0
+
+
+ IjetSwoPin
+ 0
+
+
+ IjetCpuClockEdit
+ 72.0
+
+
+ IjetSwoPrescalerList
+ 1
+ 0
+
+
+ IjetBreakpointRadio
+ 0
+
+
+ IjetRestoreBreakpointsCheck
+ 0
+
+
+ IjetUpdateBreakpointsEdit
+ _call_main
+
+
+ RDICatchReset
+ 0
+
+
+ RDICatchUndef
+ 1
+
+
+ RDICatchSWI
+ 0
+
+
+ RDICatchData
+ 1
+
+
+ RDICatchPrefetch
+ 1
+
+
+ RDICatchIRQ
+ 0
+
+
+ RDICatchFIQ
+ 0
+
+
+ CatchCORERESET
+ 0
+
+
+ CatchMMERR
+ 1
+
+
+ CatchNOCPERR
+ 1
+
+
+ CatchCHKERR
+ 1
+
+
+ CatchSTATERR
+ 1
+
+
+ CatchBUSERR
+ 1
+
+
+ CatchINTERR
+ 1
+
+
+ CatchHARDERR
+ 1
+
+
+ CatchDummy
+ 0
+
+
+ OCProbeCfgOverride
+ 0
+
+
+ OCProbeConfig
+
+
+
+ IjetProbeConfigRadio
+ 0
+
+
+ IjetMultiCPUEnable
+ 0
+
+
+ IjetMultiCPUNumber
+ 0
+
+
+ IjetSelectedCPUBehaviour
+ 0
+
+
+ ICpuName
+
+
+
+ OCJetEmuParams
+ 1
+
+
+ IjetPreferETB
+ 1
+
+
+ IjetTraceSettingsList
+ 0
+ 0
+
+
+ IjetTraceSizeList
+ 0
+ 4
+
+
+ FlashBoardPathSlave
+ 0
+
+
+ CCIjetUsbSerialNo
+
+
+
+ CCIjetUsbSerialNoSelect
+ 0
+
+
+
+
+ JLINK_ID
+ 2
+
+ 16
+ 1
+ 1
+
+ CCCatchSFERR
+ 0
+
+
+ JLinkSpeed
+ 1000
+
+
+ CCJLinkDoLogfile
+ 0
+
+
+ CCJLinkLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCJLinkHWResetDelay
+ 0
+
+
+ OCDriverInfo
+ 1
+
+
+ JLinkInitialSpeed
+ 1000
+
+
+ CCDoJlinkMultiTarget
+ 0
+
+
+ CCScanChainNonARMDevices
+ 0
+
+
+ CCJLinkMultiTarget
+ 0
+
+
+ CCJLinkIRLength
+ 0
+
+
+ CCJLinkCommRadio
+ 0
+
+
+ CCJLinkTCPIP
+ aaa.bbb.ccc.ddd
+
+
+ CCJLinkSpeedRadioV2
+ 0
+
+
+ CCUSBDevice
+ 1
+ 1
+
+
+ CCRDICatchReset
+ 0
+
+
+ CCRDICatchUndef
+ 0
+
+
+ CCRDICatchSWI
+ 0
+
+
+ CCRDICatchData
+ 0
+
+
+ CCRDICatchPrefetch
+ 0
+
+
+ CCRDICatchIRQ
+ 0
+
+
+ CCRDICatchFIQ
+ 0
+
+
+ CCJLinkBreakpointRadio
+ 0
+
+
+ CCJLinkDoUpdateBreakpoints
+ 0
+
+
+ CCJLinkUpdateBreakpoints
+ _call_main
+
+
+ CCJLinkInterfaceRadio
+ 0
+
+
+ CCJLinkResetList
+ 6
+ 7
+
+
+ CCJLinkInterfaceCmdLine
+ 0
+
+
+ CCCatchCORERESET
+ 0
+
+
+ CCCatchMMERR
+ 0
+
+
+ CCCatchNOCPERR
+ 0
+
+
+ CCCatchCHRERR
+ 0
+
+
+ CCCatchSTATERR
+ 0
+
+
+ CCCatchBUSERR
+ 0
+
+
+ CCCatchINTERR
+ 0
+
+
+ CCCatchHARDERR
+ 0
+
+
+ CCCatchDummy
+ 0
+
+
+ OCJLinkScriptFile
+ 1
+
+
+ CCJLinkUsbSerialNo
+
+
+
+ CCTcpIpAlt
+ 0
+ 0
+
+
+ CCJLinkTcpIpSerialNo
+
+
+
+ CCCpuClockEdit
+ 72.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ OCJLinkTraceSource
+ 0
+
+
+ OCJLinkTraceSourceDummy
+ 0
+
+
+ OCJLinkDeviceName
+ 1
+
+
+
+
+ LMIFTDI_ID
+ 2
+
+ 2
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ LmiftdiSpeed
+ 500
+
+
+ CCLmiftdiDoLogfile
+ 0
+
+
+ CCLmiftdiLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCLmiFtdiInterfaceRadio
+ 0
+
+
+ CCLmiFtdiInterfaceCmdLine
+ 0
+
+
+
+
+ PEMICRO_ID
+ 2
+
+ 3
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCJPEMicroShowSettings
+ 0
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+
+
+ STLINK_ID
+ 2
+
+ 4
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCSTLinkInterfaceRadio
+ 1
+
+
+ CCSTLinkInterfaceCmdLine
+ 0
+
+
+ CCSTLinkResetList
+ 3
+ 4
+
+
+ CCCpuClockEdit
+ 170.0
+
+
+ CCSwoClockAuto
+ 0
+
+
+ CCSwoClockEdit
+ 2000
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCSTLinkDoUpdateBreakpoints
+ 0
+
+
+ CCSTLinkUpdateBreakpoints
+ _call_main
+
+
+ CCSTLinkCatchCORERESET
+ 0
+
+
+ CCSTLinkCatchMMERR
+ 0
+
+
+ CCSTLinkCatchNOCPERR
+ 0
+
+
+ CCSTLinkCatchCHRERR
+ 0
+
+
+ CCSTLinkCatchSTATERR
+ 0
+
+
+ CCSTLinkCatchBUSERR
+ 0
+
+
+ CCSTLinkCatchINTERR
+ 0
+
+
+ CCSTLinkCatchSFERR
+ 0
+
+
+ CCSTLinkCatchHARDERR
+ 0
+
+
+ CCSTLinkCatchDummy
+ 0
+
+
+ CCSTLinkUsbSerialNo
+
+
+
+ CCSTLinkUsbSerialNoSelect
+ 0
+
+
+ CCSTLinkJtagSpeedList
+ 0
+ 0
+
+
+ CCSTLinkDAPNumber
+
+
+
+ CCSTLinkDebugAccessPortRadio
+ 0
+
+
+
+
+ THIRDPARTY_ID
+ 2
+
+ 0
+ 1
+ 1
+
+ CThirdPartyDriverDll
+ ###Uninitialized###
+
+
+ CThirdPartyLogFileCheck
+ 0
+
+
+ CThirdPartyLogFileEditB
+ $PROJ_DIR$\cspycomm.log
+
+
+ OCDriverInfo
+ 1
+
+
+
+
+ TIFET_ID
+ 2
+
+ 1
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ CCMSPFetResetList
+ 0
+ 0
+
+
+ CCMSPFetInterfaceRadio
+ 0
+
+
+ CCMSPFetInterfaceCmdLine
+ 0
+
+
+ CCMSPFetTargetVccTypeDefault
+ 0
+
+
+ CCMSPFetTargetVoltage
+ ###Uninitialized###
+
+
+ CCMSPFetVCCDefault
+ 1
+
+
+ CCMSPFetTargetSettlingtime
+ 0
+
+
+ CCMSPFetRadioJtagSpeedType
+ 1
+
+
+ CCMSPFetConnection
+ 0
+ 0
+
+
+ CCMSPFetUsbComPort
+ Automatic
+
+
+ CCMSPFetAllowAccessToBSL
+ 0
+
+
+ CCMSPFetDoLogfile
+ 0
+
+
+ CCMSPFetLogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCMSPFetRadioEraseFlash
+ 1
+
+
+
+
+ XDS100_ID
+ 2
+
+ 6
+ 1
+ 1
+
+ OCDriverInfo
+ 1
+
+
+ TIPackageOverride
+ 0
+
+
+ TIPackage
+
+
+
+ BoardFile
+
+
+
+ DoLogfile
+ 0
+
+
+ LogFile
+ $PROJ_DIR$\cspycomm.log
+
+
+ CCXds100BreakpointRadio
+ 0
+
+
+ CCXds100DoUpdateBreakpoints
+ 0
+
+
+ CCXds100UpdateBreakpoints
+ _call_main
+
+
+ CCXds100CatchReset
+ 0
+
+
+ CCXds100CatchUndef
+ 0
+
+
+ CCXds100CatchSWI
+ 0
+
+
+ CCXds100CatchData
+ 0
+
+
+ CCXds100CatchPrefetch
+ 0
+
+
+ CCXds100CatchIRQ
+ 0
+
+
+ CCXds100CatchFIQ
+ 0
+
+
+ CCXds100CatchCORERESET
+ 0
+
+
+ CCXds100CatchMMERR
+ 0
+
+
+ CCXds100CatchNOCPERR
+ 0
+
+
+ CCXds100CatchCHRERR
+ 0
+
+
+ CCXds100CatchSTATERR
+ 0
+
+
+ CCXds100CatchBUSERR
+ 0
+
+
+ CCXds100CatchINTERR
+ 0
+
+
+ CCXds100CatchSFERR
+ 0
+
+
+ CCXds100CatchHARDERR
+ 0
+
+
+ CCXds100CatchDummy
+ 0
+
+
+ CCXds100CpuClockEdit
+
+
+
+ CCXds100SwoClockAuto
+ 0
+
+
+ CCXds100SwoClockEdit
+ 1000
+
+
+ CCXds100HWResetDelay
+ 0
+
+
+ CCXds100ResetList
+ 0
+ 0
+
+
+ CCXds100UsbSerialNo
+
+
+
+ CCXds100UsbSerialNoSelect
+ 0
+
+
+ CCXds100JtagSpeedList
+ 0
+ 0
+
+
+ CCXds100InterfaceRadio
+ 0
+
+
+ CCXds100InterfaceCmdLine
+ 0
+
+
+ CCXds100ProbeList
+ 0
+ 0
+
+
+ CCXds100SWOPortRadio
+ 0
+
+
+ CCXds100SWOPort
+ 1
+
+
+
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+ 0
+
+
+ $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+ 1
+
+
+ $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin
+ 0
+
+
+ $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+ 0
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp
new file mode 100644
index 000000000..767ba9afd
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/CRC_Data_Reversing_16bit_CRC.ewp
@@ -0,0 +1,1153 @@
+
+
+ 3
+
+ CRC_Data_Reversing_16bit_CRC
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+ ExePath
+ CRC_Data_Reversing_16bit_CRC/Exe
+
+
+ ObjPath
+ CRC_Data_Reversing_16bit_CRC/Obj
+
+
+ ListPath
+ CRC_Data_Reversing_16bit_CRC/List
+
+
+ GEndianMode
+ 0
+
+
+ Input description
+ No specifier n, no float nor long long, no scan set, no assignment suppressing, with multibyte support.
+
+
+ Output description
+ No specifier a, A, no specifier n, no float nor long long, with multibyte support.
+
+
+ GOutputBinary
+ 0
+
+
+ OGCoreOrChip
+ 1
+
+
+ GRuntimeLibSelect
+ 0
+ 2
+
+
+ GRuntimeLibSelectSlave
+ 0
+ 2
+
+
+ RTDescription
+ Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.
+
+
+ OGProductVersion
+ 4.41A
+
+
+ OGLastSavedByProductVersion
+ 8.20.1.14181
+
+
+ GeneralEnableMisra
+ 0
+
+
+ GeneralMisraVerbose
+ 0
+
+
+ OGChipSelectEditMenu
+ STM32G474QE ST STM32G474QE
+
+
+ GenLowLevelInterface
+ 1
+
+
+ GEndianModeBE
+ 1
+
+
+ OGBufferedTerminalOutput
+ 0
+
+
+ GenStdoutInterface
+ 0
+
+
+ GeneralMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ GeneralMisraVer
+ 0
+
+
+ GeneralMisraRules04
+ 0
+ 011111111111111110111111111111011111111111111011110100111111111111111111111111111111111111111111101111111111111011111111111111111111111111111
+
+
+ RTConfigPath2
+ $TOOLKIT_DIR$\INC\c\DLib_Config_Full.h
+
+
+ GBECoreSlave
+ 26
+ 39
+
+
+ OGUseCmsis
+ 0
+
+
+ OGUseCmsisDspLib
+ 0
+
+
+ GRuntimeLibThreads
+ 0
+
+
+ CoreVariant
+ 26
+ 39
+
+
+ GFPUDeviceSlave
+
+
+
+ FPU2
+ 0
+ 6
+
+
+ NrRegs
+ 0
+ 1
+
+
+ NEON
+ 0
+
+
+ GFPUCoreSlave2
+ 26
+ 39
+
+
+ OGCMSISPackSelectDevice
+
+
+ OgLibHeap
+ 0
+
+
+ OGLibAdditionalLocale
+ 0
+
+
+ OGPrintfVariant
+ 0
+ 1
+
+
+ OGPrintfMultibyteSupport
+ 1
+
+
+ OGScanfVariant
+ 0
+ 1
+
+
+ OGScanfMultibyteSupport
+ 1
+
+
+ GenLocaleTags
+
+
+
+ GenLocaleDisplayOnly
+
+
+
+ DSPExtension
+ 1
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+ CCOptimizationNoSizeConstraints
+ 0
+
+
+ CCDefines
+ USE_HAL_DRIVER
+ STM32G474xx
+
+
+
+ CCPreprocFile
+ 0
+
+
+ CCPreprocComments
+ 0
+
+
+ CCPreprocLine
+ 0
+
+
+ CCListCFile
+ 0
+
+
+ CCListCMnemonics
+ 0
+
+
+ CCListCMessages
+ 0
+
+
+ CCListAssFile
+ 0
+
+
+ CCListAssSource
+ 0
+
+
+ CCEnableRemarks
+ 0
+
+
+ CCDiagSuppress
+
+
+
+ CCDiagRemark
+
+
+
+ CCDiagWarning
+
+
+
+ CCDiagError
+
+
+
+ CCObjPrefix
+ 1
+
+
+ CCAllowList
+ 1
+ 11111110
+
+
+ CCDebugInfo
+ 1
+
+
+ IEndianMode
+ 1
+
+
+ IProcessor
+ 1
+
+
+ IExtraOptionsCheck
+ 0
+
+
+ IExtraOptions
+
+
+
+ CCLangConformance
+ 0
+
+
+ CCSignedPlainChar
+ 1
+
+
+ CCRequirePrototypes
+ 0
+
+
+ CCDiagWarnAreErr
+ 0
+
+
+ CCCompilerRuntimeInfo
+ 0
+
+
+ IFpuProcessor
+ 1
+
+
+ OutputFile
+ $FILE_BNAME$.o
+
+
+ CCLibConfigHeader
+ 1
+
+
+ PreInclude
+
+
+
+ CompilerMisraOverride
+ 0
+
+
+ CCIncludePath2
+ $PROJ_DIR$/../Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Inc/Legacy
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Device/ST/STM32G4xx/Include
+ $PROJ_DIR$/../../../../../../Drivers/CMSIS/Include
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152
+
+
+ CCStdIncCheck
+ 0
+
+
+ CCCodeSection
+ .text
+
+
+ IProcessorMode2
+ 1
+
+
+ CCOptLevel
+ 3
+
+
+ CCOptStrategy
+ 0
+ 1
+
+
+ CCOptLevelSlave
+ 3
+
+
+ CompilerMisraRules98
+ 0
+ 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111
+
+
+ CompilerMisraRules04
+ 0
+ 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111
+
+
+ CCPosIndRopi
+ 0
+
+
+ CCPosIndRwpi
+ 0
+
+
+ CCPosIndNoDynInit
+ 0
+
+
+ IccLang
+ 0
+
+
+ IccCDialect
+ 1
+
+
+ IccAllowVLA
+ 0
+
+
+ IccStaticDestr
+ 0
+
+
+ IccCppInlineSemantics
+ 0
+
+
+ IccCmsis
+ 1
+
+
+ IccFloatSemantics
+ 0
+
+
+ CCNoLiteralPool
+ 0
+
+
+ CCOptStrategySlave
+ 0
+ 1
+
+
+ CCGuardCalls
+ 1
+
+
+ CCEncSource
+ 0
+
+
+ CCEncOutput
+ 0
+
+
+ CCEncOutputBom
+ 1
+
+
+ CCEncInput
+ 0
+
+
+ IccExceptions2
+ 0
+
+
+ IccRTTI2
+ 0
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+ AObjPrefix
+ 1
+
+
+ AEndian
+ 1
+
+
+ ACaseSensitivity
+ 1
+
+
+ MacroChars
+ 0
+ 0
+
+
+ AWarnEnable
+ 0
+
+
+ AWarnWhat
+ 0
+
+
+ AWarnOne
+
+
+
+ AWarnRange1
+
+
+
+ AWarnRange2
+
+
+
+ ADebug
+ 1
+
+
+ AltRegisterNames
+ 0
+
+
+ ADefines
+
+
+
+ AList
+ 0
+
+
+ AListHeader
+ 1
+
+
+ AListing
+ 1
+
+
+ Includes
+ 0
+
+
+ MacDefs
+ 0
+
+
+ MacExps
+ 1
+
+
+ MacExec
+ 0
+
+
+ OnlyAssed
+ 0
+
+
+ MultiLine
+ 0
+
+
+ PageLengthCheck
+ 0
+
+
+ PageLength
+ 80
+
+
+ TabSpacing
+ 8
+
+
+ AXRef
+ 0
+
+
+ AXRefDefines
+ 0
+
+
+ AXRefInternal
+ 0
+
+
+ AXRefDual
+ 0
+
+
+ AProcessor
+ 1
+
+
+ AFpuProcessor
+ 1
+
+
+ AOutputFile
+ $FILE_BNAME$.o
+
+
+ ALimitErrorsCheck
+ 0
+
+
+ ALimitErrorsEdit
+ 100
+
+
+ AIgnoreStdInclude
+ 0
+
+
+ AUserIncludes
+
+
+
+ AExtraOptionsCheckV2
+ 0
+
+
+ AExtraOptionsV2
+
+
+
+ AsmNoLiteralPool
+ 0
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+ OOCOutputFormat
+ 3
+ 1
+
+
+ OCOutputOverride
+ 1
+
+
+ OOCOutputFile
+ CRC_Data_Reversing_16bit_CRC.hex
+
+
+ OOCCommandLineProducer
+ 1
+
+
+ OOCObjCopyEnable
+ 1
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+ IlinkLibIOConfig
+ 1
+
+
+ XLinkMisraHandler
+ 0
+
+
+ IlinkInputFileSlave
+ 0
+
+
+ IlinkOutputFile
+ CRC_Data_Reversing_16bit_CRC.out
+
+
+ IlinkDebugInfoEnable
+ 1
+
+
+ IlinkKeepSymbols
+
+
+
+ IlinkRawBinaryFile
+
+
+
+ IlinkRawBinarySymbol
+
+
+
+ IlinkRawBinarySegment
+
+
+
+ IlinkRawBinaryAlign
+
+
+
+ IlinkDefines
+
+
+
+ IlinkConfigDefines
+
+
+
+ IlinkMapFile
+ 1
+
+
+ IlinkLogFile
+ 0
+
+
+ IlinkLogInitialization
+ 0
+
+
+ IlinkLogModule
+ 0
+
+
+ IlinkLogSection
+ 0
+
+
+ IlinkLogVeneer
+ 0
+
+
+ IlinkIcfOverride
+ 1
+
+
+ IlinkIcfFile
+ $PROJ_DIR$/stm32g474xx_flash.icf
+
+
+ IlinkIcfFileSlave
+
+
+
+ IlinkEnableRemarks
+ 0
+
+
+ IlinkSuppressDiags
+
+
+
+ IlinkTreatAsRem
+
+
+
+ IlinkTreatAsWarn
+
+
+
+ IlinkTreatAsErr
+
+
+
+ IlinkWarningsAreErrors
+ 0
+
+
+ IlinkUseExtraOptions
+ 0
+
+
+ IlinkExtraOptions
+
+
+
+ IlinkLowLevelInterfaceSlave
+ 1
+
+
+ IlinkAutoLibEnable
+ 1
+
+
+ IlinkAdditionalLibs
+
+
+
+ IlinkOverrideProgramEntryLabel
+ 0
+
+
+ IlinkProgramEntryLabelSelect
+ 0
+
+
+ IlinkProgramEntryLabel
+ __iar_program_start
+
+
+ DoFill
+ 0
+
+
+ FillerByte
+ 0xFF
+
+
+ FillerStart
+ 0x0
+
+
+ FillerEnd
+ 0x0
+
+
+ CrcSize
+ 0
+ 1
+
+
+ CrcAlign
+ 1
+
+
+ CrcPoly
+ 0x11021
+
+
+ CrcCompl
+ 0
+ 0
+
+
+ CrcBitOrder
+ 0
+ 0
+
+
+ CrcInitialValue
+ 0x0
+
+
+ DoCrc
+ 0
+
+
+ IlinkBE8Slave
+ 1
+
+
+ IlinkBufferedTerminalOutput
+ 1
+
+
+ IlinkStdoutInterfaceSlave
+ 1
+
+
+ CrcFullSize
+ 0
+
+
+ IlinkIElfToolPostProcess
+ 0
+
+
+ IlinkLogAutoLibSelect
+ 0
+
+
+ IlinkLogRedirSymbols
+ 0
+
+
+ IlinkLogUnusedFragments
+ 0
+
+
+ IlinkCrcReverseByteOrder
+ 0
+
+
+ IlinkCrcUseAsInput
+ 1
+
+
+ IlinkOptInline
+ 0
+
+
+ IlinkOptExceptionsAllow
+ 1
+
+
+ IlinkOptExceptionsForce
+ 0
+
+
+ IlinkCmsis
+ 1
+
+
+ IlinkOptMergeDuplSections
+ 0
+
+
+ IlinkOptUseVfe
+ 1
+
+
+ IlinkOptForceVfe
+ 0
+
+
+ IlinkStackAnalysisEnable
+ 0
+
+
+ IlinkStackControlFile
+
+
+
+ IlinkStackCallGraphFile
+
+
+
+ CrcAlgorithm
+ 1
+ 1
+
+
+ CrcUnitSize
+ 0
+ 0
+
+
+ IlinkThreadsSlave
+ 1
+
+
+ IlinkLogCallGraph
+ 0
+
+
+ IlinkIcfFile_AltDefault
+
+
+
+ IlinkEncInput
+ 0
+
+
+ IlinkEncOutput
+ 0
+
+
+ IlinkEncOutputBom
+ 1
+
+
+ IlinkHeapSelect
+ 1
+
+
+ IlinkLocaleSelect
+ 1
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+ IarchiveInputs
+
+
+
+ IarchiveOverride
+ 0
+
+
+ IarchiveOutput
+ ###Unitialized###
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Application
+
+ EWARM
+
+ $PROJ_DIR$/startup_stm32g474xx.s
+
+
+
+ User
+
+ $PROJ_DIR$/../Src/main.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_it.c
+
+
+ $PROJ_DIR$/../Src/stm32g4xx_hal_msp.c
+
+
+
+
+ Doc
+
+ $PROJ_DIR$/../readme.txt
+
+
+
+ Drivers
+
+ BSP
+
+ Components
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+
+
+
+ STM32G474E-EVAL1
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+
+
+
+
+ STM32G4xx_HAL_Driver
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+
+
+ $PROJ_DIR$/../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+
+
+
+ CMSIS
+
+ $PROJ_DIR$/../Src/system_stm32g4xx.c
+
+
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww
new file mode 100644
index 000000000..331d40ecb
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/Project.eww
@@ -0,0 +1,7 @@
+
+
+
+ $WS_DIR$\CRC_Data_Reversing_16bit_CRC.ewp
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s
new file mode 100644
index 000000000..ad30593b5
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/startup_stm32g474xx.s
@@ -0,0 +1,742 @@
+;*******************************************************************************
+;* @File Name : startup_stm32g474xx.s
+;* @Author : MCD Application Team
+;* @Brief : STM32G474xx Devices vector
+;*******************************************************************************
+;* Description : This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == _iar_program_start,
+;* - Set the vector table entries with the exceptions ISR
+;* address.
+;* - Branches to main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M4 processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2019 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+
+ DATA
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler ; Reset Handler
+
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD MemManage_Handler ; MPU Fault Handler
+ DCD BusFault_Handler ; Bus Fault Handler
+ DCD UsageFault_Handler ; Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD DebugMon_Handler ; Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window WatchDog
+ DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+ DCD RTC_TAMP_LSECSS_IRQHandler ; RTC, TAMP and RCC LSE_CSS through the EXTI line
+ DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_IRQHandler ; RCC
+ DCD EXTI0_IRQHandler ; EXTI Line0
+ DCD EXTI1_IRQHandler ; EXTI Line1
+ DCD EXTI2_IRQHandler ; EXTI Line2
+ DCD EXTI3_IRQHandler ; EXTI Line3
+ DCD EXTI4_IRQHandler ; EXTI Line4
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
+ DCD ADC1_2_IRQHandler ; ADC1 and ADC2
+ DCD USB_HP_IRQHandler ; USB Device High Priority
+ DCD USB_LP_IRQHandler ; USB Device Low Priority
+ DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
+ DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
+ DCD EXTI9_5_IRQHandler ; External Line[9:5]s
+ DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break, Transition error, Index error and TIM15
+ DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
+ DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger, Commutation, Direction change, Index and TIM17
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
+ DCD TIM2_IRQHandler ; TIM2
+ DCD TIM3_IRQHandler ; TIM3
+ DCD TIM4_IRQHandler ; TIM4
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD USART3_IRQHandler ; USART3
+ DCD EXTI15_10_IRQHandler ; External Line[15:10]
+ DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
+ DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break, Transition error and Index error Interrupt
+ DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger, Commutation, Direction change and Index Interrupt
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
+ DCD ADC3_IRQHandler ; ADC3
+ DCD FMC_IRQHandler ; FMC
+ DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
+ DCD TIM5_IRQHandler ; TIM5
+ DCD SPI3_IRQHandler ; SPI3
+ DCD UART4_IRQHandler ; UART4
+ DCD UART5_IRQHandler ; UART5
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&3 underrun errors
+ DCD TIM7_DAC_IRQHandler ; TIM7 and DAC2&4 underrun errors
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
+ DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
+ DCD ADC4_IRQHandler ; ADC4
+ DCD ADC5_IRQHandler ; ADC5
+ DCD UCPD1_IRQHandler ; UCPD1
+ DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
+ DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
+ DCD COMP7_IRQHandler ; COMP7
+ DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
+ DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
+ DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
+ DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
+ DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
+ DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
+ DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
+ DCD HRTIM1_TIMF_IRQHandler ; HRTIM Timer F global Interrupt
+ DCD CRS_IRQHandler ; CRS Interrupt
+ DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
+ DCD TIM20_BRK_IRQHandler ; TIM20 Break, Transition error and Index error
+ DCD TIM20_UP_IRQHandler ; TIM20 Update
+ DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger, Commutation, Direction change and Index
+ DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
+ DCD FPU_IRQHandler ; FPU
+ DCD I2C4_EV_IRQHandler ; I2C4 event
+ DCD I2C4_ER_IRQHandler ; I2C4 error
+ DCD SPI4_IRQHandler ; SPI4
+ DCD 0 ; Reserved
+ DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
+ DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
+ DCD FDCAN3_IT0_IRQHandler ; FDCAN3 interrupt line 0
+ DCD FDCAN3_IT1_IRQHandler ; FDCAN3 interrupt line 1
+ DCD RNG_IRQHandler ; RNG global interrupt
+ DCD LPUART1_IRQHandler ; LP UART 1 interrupt
+ DCD I2C3_EV_IRQHandler ; I2C3 Event
+ DCD I2C3_ER_IRQHandler ; I2C3 Error
+ DCD DMAMUX_OVR_IRQHandler ; DMAMUX overrun global interrupt
+ DCD QUADSPI_IRQHandler ; QUADSPI
+ DCD DMA1_Channel8_IRQHandler ; DMA1 Channel 8
+ DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
+ DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
+ DCD DMA2_Channel8_IRQHandler ; DMA2 Channel 8
+ DCD CORDIC_IRQHandler ; CORDIC
+ DCD FMAC_IRQHandler ; FMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+ THUMB
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:NOROOT:REORDER(2)
+Reset_Handler
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+NMI_Handler
+ B NMI_Handler
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HardFault_Handler
+ B HardFault_Handler
+
+ PUBWEAK MemManage_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+MemManage_Handler
+ B MemManage_Handler
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+BusFault_Handler
+ B BusFault_Handler
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UsageFault_Handler
+ B UsageFault_Handler
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SVC_Handler
+ B SVC_Handler
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DebugMon_Handler
+ B DebugMon_Handler
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PendSV_Handler
+ B PendSV_Handler
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SysTick_Handler
+ B SysTick_Handler
+
+ PUBWEAK WWDG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+WWDG_IRQHandler
+ B WWDG_IRQHandler
+
+ PUBWEAK PVD_PVM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+PVD_PVM_IRQHandler
+ B PVD_PVM_IRQHandler
+
+ PUBWEAK RTC_TAMP_LSECSS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_TAMP_LSECSS_IRQHandler
+ B RTC_TAMP_LSECSS_IRQHandler
+
+ PUBWEAK RTC_WKUP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_WKUP_IRQHandler
+ B RTC_WKUP_IRQHandler
+
+ PUBWEAK FLASH_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FLASH_IRQHandler
+ B FLASH_IRQHandler
+
+ PUBWEAK RCC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RCC_IRQHandler
+ B RCC_IRQHandler
+
+ PUBWEAK EXTI0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI0_IRQHandler
+ B EXTI0_IRQHandler
+
+ PUBWEAK EXTI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI1_IRQHandler
+ B EXTI1_IRQHandler
+
+ PUBWEAK EXTI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI2_IRQHandler
+ B EXTI2_IRQHandler
+
+ PUBWEAK EXTI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI3_IRQHandler
+ B EXTI3_IRQHandler
+
+ PUBWEAK EXTI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI4_IRQHandler
+ B EXTI4_IRQHandler
+
+ PUBWEAK DMA1_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel1_IRQHandler
+ B DMA1_Channel1_IRQHandler
+
+ PUBWEAK DMA1_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel2_IRQHandler
+ B DMA1_Channel2_IRQHandler
+
+ PUBWEAK DMA1_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel3_IRQHandler
+ B DMA1_Channel3_IRQHandler
+
+ PUBWEAK DMA1_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel4_IRQHandler
+ B DMA1_Channel4_IRQHandler
+
+ PUBWEAK DMA1_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel5_IRQHandler
+ B DMA1_Channel5_IRQHandler
+
+ PUBWEAK DMA1_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel6_IRQHandler
+ B DMA1_Channel6_IRQHandler
+
+ PUBWEAK DMA1_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel7_IRQHandler
+ B DMA1_Channel7_IRQHandler
+
+ PUBWEAK ADC1_2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC1_2_IRQHandler
+ B ADC1_2_IRQHandler
+
+ PUBWEAK USB_HP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_HP_IRQHandler
+ B USB_HP_IRQHandler
+
+ PUBWEAK USB_LP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USB_LP_IRQHandler
+ B USB_LP_IRQHandler
+
+ PUBWEAK FDCAN1_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT0_IRQHandler
+ B FDCAN1_IT0_IRQHandler
+
+ PUBWEAK FDCAN1_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN1_IT1_IRQHandler
+ B FDCAN1_IT1_IRQHandler
+
+ PUBWEAK EXTI9_5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI9_5_IRQHandler
+ B EXTI9_5_IRQHandler
+
+ PUBWEAK TIM1_BRK_TIM15_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_BRK_TIM15_IRQHandler
+ B TIM1_BRK_TIM15_IRQHandler
+
+ PUBWEAK TIM1_UP_TIM16_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_UP_TIM16_IRQHandler
+ B TIM1_UP_TIM16_IRQHandler
+
+ PUBWEAK TIM1_TRG_COM_TIM17_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_TRG_COM_TIM17_IRQHandler
+ B TIM1_TRG_COM_TIM17_IRQHandler
+
+ PUBWEAK TIM1_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM1_CC_IRQHandler
+ B TIM1_CC_IRQHandler
+
+ PUBWEAK TIM2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM2_IRQHandler
+ B TIM2_IRQHandler
+
+ PUBWEAK TIM3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM3_IRQHandler
+ B TIM3_IRQHandler
+
+ PUBWEAK TIM4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM4_IRQHandler
+ B TIM4_IRQHandler
+
+ PUBWEAK I2C1_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_EV_IRQHandler
+ B I2C1_EV_IRQHandler
+
+ PUBWEAK I2C1_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C1_ER_IRQHandler
+ B I2C1_ER_IRQHandler
+
+ PUBWEAK I2C2_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_EV_IRQHandler
+ B I2C2_EV_IRQHandler
+
+ PUBWEAK I2C2_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C2_ER_IRQHandler
+ B I2C2_ER_IRQHandler
+
+ PUBWEAK SPI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI1_IRQHandler
+ B SPI1_IRQHandler
+
+ PUBWEAK SPI2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI2_IRQHandler
+ B SPI2_IRQHandler
+
+ PUBWEAK USART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART1_IRQHandler
+ B USART1_IRQHandler
+
+ PUBWEAK USART2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART2_IRQHandler
+ B USART2_IRQHandler
+
+ PUBWEAK USART3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USART3_IRQHandler
+ B USART3_IRQHandler
+
+ PUBWEAK EXTI15_10_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+EXTI15_10_IRQHandler
+ B EXTI15_10_IRQHandler
+
+ PUBWEAK RTC_Alarm_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RTC_Alarm_IRQHandler
+ B RTC_Alarm_IRQHandler
+
+ PUBWEAK USBWakeUp_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+USBWakeUp_IRQHandler
+ B USBWakeUp_IRQHandler
+
+ PUBWEAK TIM8_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_BRK_IRQHandler
+ B TIM8_BRK_IRQHandler
+
+ PUBWEAK TIM8_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_UP_IRQHandler
+ B TIM8_UP_IRQHandler
+
+ PUBWEAK TIM8_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_TRG_COM_IRQHandler
+ B TIM8_TRG_COM_IRQHandler
+
+ PUBWEAK TIM8_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM8_CC_IRQHandler
+ B TIM8_CC_IRQHandler
+
+ PUBWEAK ADC3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC3_IRQHandler
+ B ADC3_IRQHandler
+
+ PUBWEAK FMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMC_IRQHandler
+ B FMC_IRQHandler
+
+ PUBWEAK LPTIM1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPTIM1_IRQHandler
+ B LPTIM1_IRQHandler
+
+ PUBWEAK TIM5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM5_IRQHandler
+ B TIM5_IRQHandler
+
+ PUBWEAK SPI3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI3_IRQHandler
+ B SPI3_IRQHandler
+
+ PUBWEAK UART4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART4_IRQHandler
+ B UART4_IRQHandler
+
+ PUBWEAK UART5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UART5_IRQHandler
+ B UART5_IRQHandler
+
+ PUBWEAK TIM6_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM6_DAC_IRQHandler
+ B TIM6_DAC_IRQHandler
+
+ PUBWEAK TIM7_DAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM7_DAC_IRQHandler
+ B TIM7_DAC_IRQHandler
+
+ PUBWEAK DMA2_Channel1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel1_IRQHandler
+ B DMA2_Channel1_IRQHandler
+
+ PUBWEAK DMA2_Channel2_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel2_IRQHandler
+ B DMA2_Channel2_IRQHandler
+
+ PUBWEAK DMA2_Channel3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel3_IRQHandler
+ B DMA2_Channel3_IRQHandler
+
+ PUBWEAK DMA2_Channel4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel4_IRQHandler
+ B DMA2_Channel4_IRQHandler
+
+ PUBWEAK DMA2_Channel5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel5_IRQHandler
+ B DMA2_Channel5_IRQHandler
+
+ PUBWEAK ADC4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC4_IRQHandler
+ B ADC4_IRQHandler
+
+ PUBWEAK ADC5_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+ADC5_IRQHandler
+ B ADC5_IRQHandler
+
+ PUBWEAK UCPD1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+UCPD1_IRQHandler
+ B UCPD1_IRQHandler
+
+ PUBWEAK COMP1_2_3_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP1_2_3_IRQHandler
+ B COMP1_2_3_IRQHandler
+
+ PUBWEAK COMP4_5_6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP4_5_6_IRQHandler
+ B COMP4_5_6_IRQHandler
+
+ PUBWEAK COMP7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+COMP7_IRQHandler
+ B COMP7_IRQHandler
+
+ PUBWEAK HRTIM1_Master_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_Master_IRQHandler
+ B HRTIM1_Master_IRQHandler
+
+ PUBWEAK HRTIM1_TIMA_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMA_IRQHandler
+ B HRTIM1_TIMA_IRQHandler
+
+ PUBWEAK HRTIM1_TIMB_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMB_IRQHandler
+ B HRTIM1_TIMB_IRQHandler
+
+ PUBWEAK HRTIM1_TIMC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMC_IRQHandler
+ B HRTIM1_TIMC_IRQHandler
+
+ PUBWEAK HRTIM1_TIMD_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMD_IRQHandler
+ B HRTIM1_TIMD_IRQHandler
+
+ PUBWEAK HRTIM1_TIME_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIME_IRQHandler
+ B HRTIM1_TIME_IRQHandler
+
+ PUBWEAK HRTIM1_FLT_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_FLT_IRQHandler
+ B HRTIM1_FLT_IRQHandler
+
+ PUBWEAK HRTIM1_TIMF_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+HRTIM1_TIMF_IRQHandler
+ B HRTIM1_TIMF_IRQHandler
+
+ PUBWEAK CRS_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CRS_IRQHandler
+ B CRS_IRQHandler
+
+ PUBWEAK SAI1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SAI1_IRQHandler
+ B SAI1_IRQHandler
+
+ PUBWEAK TIM20_BRK_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_BRK_IRQHandler
+ B TIM20_BRK_IRQHandler
+
+ PUBWEAK TIM20_UP_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_UP_IRQHandler
+ B TIM20_UP_IRQHandler
+
+ PUBWEAK TIM20_TRG_COM_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_TRG_COM_IRQHandler
+ B TIM20_TRG_COM_IRQHandler
+
+ PUBWEAK TIM20_CC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+TIM20_CC_IRQHandler
+ B TIM20_CC_IRQHandler
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FPU_IRQHandler
+ B FPU_IRQHandler
+
+ PUBWEAK I2C4_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_EV_IRQHandler
+ B I2C4_EV_IRQHandler
+
+ PUBWEAK I2C4_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C4_ER_IRQHandler
+ B I2C4_ER_IRQHandler
+
+ PUBWEAK SPI4_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+SPI4_IRQHandler
+ B SPI4_IRQHandler
+
+ PUBWEAK FDCAN2_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT0_IRQHandler
+ B FDCAN2_IT0_IRQHandler
+
+ PUBWEAK FDCAN2_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN2_IT1_IRQHandler
+ B FDCAN2_IT1_IRQHandler
+
+ PUBWEAK FDCAN3_IT0_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT0_IRQHandler
+ B FDCAN3_IT0_IRQHandler
+
+ PUBWEAK FDCAN3_IT1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FDCAN3_IT1_IRQHandler
+ B FDCAN3_IT1_IRQHandler
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+RNG_IRQHandler
+ B RNG_IRQHandler
+
+ PUBWEAK LPUART1_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+LPUART1_IRQHandler
+ B LPUART1_IRQHandler
+
+ PUBWEAK I2C3_EV_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_EV_IRQHandler
+ B I2C3_EV_IRQHandler
+
+ PUBWEAK I2C3_ER_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+I2C3_ER_IRQHandler
+ B I2C3_ER_IRQHandler
+
+ PUBWEAK DMAMUX_OVR_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMAMUX_OVR_IRQHandler
+ B DMAMUX_OVR_IRQHandler
+
+ PUBWEAK QUADSPI_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+QUADSPI_IRQHandler
+ B QUADSPI_IRQHandler
+
+ PUBWEAK DMA1_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA1_Channel8_IRQHandler
+ B DMA1_Channel8_IRQHandler
+
+ PUBWEAK DMA2_Channel6_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel6_IRQHandler
+ B DMA2_Channel6_IRQHandler
+
+ PUBWEAK DMA2_Channel7_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel7_IRQHandler
+ B DMA2_Channel7_IRQHandler
+
+ PUBWEAK DMA2_Channel8_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+DMA2_Channel8_IRQHandler
+ B DMA2_Channel8_IRQHandler
+
+ PUBWEAK CORDIC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+CORDIC_IRQHandler
+ B CORDIC_IRQHandler
+
+ PUBWEAK FMAC_IRQHandler
+ SECTION .text:CODE:NOROOT:REORDER(1)
+FMAC_IRQHandler
+ B FMAC_IRQHandler
+
+ END
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf
new file mode 100644
index 000000000..c0983d456
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/EWARM/stm32g474xx_flash.icf
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
+define symbol __ICFEDIT_region_CCMSRAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_CCMSRAM_end__ = 0x10007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region CCMSRAM_region = mem:[from __ICFEDIT_region_CCMSRAM_start__ to __ICFEDIT_region_CCMSRAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in CCMSRAM_region { };
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
new file mode 100644
index 000000000..b5296adb7
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Data_Reversing_16bit_CRC/Inc/main.h
+ * @author MCD Application Team
+ * @brief Header for main.c module
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32g474e_eval.h"
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h
new file mode 100644
index 000000000..9fdcb47fa
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g474e_eval_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file stm32g474e_eval_conf.h
+ * @author MCD Application Team
+ * @brief STM32G474E-EVAL1 board configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G474E_EVAL1_CONF_H
+#define STM32G474E_EVAL1_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32g4xx_hal.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32G474E-EVAL1
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG Config
+ * @{
+ */
+
+/** @defgroup STM32G474E-EVAL1_CONFIG_Exported_Constants Exported Constants
+ * @{
+ */
+
+/* COM define */
+#define USE_BSP_COM_FEATURE 0U
+
+/* COM LOG define */
+#define USE_COM_LOG 0U
+
+/* POT define */
+#define USE_BSP_POT_FEATURE 0U
+
+/* COMP define :
+ depends on SB8 and SB10 configuration : refer to UM */
+#define USE_BSP_POT_COMP_FEATURE 0U
+
+/* IO Expander define */
+#define USE_BSP_IO_CLASS 1U
+
+/* JOY define */
+#define USE_BSP_JOY_FEATURE 1U
+
+/* IRQ priorities */
+#define BSP_SRAM_IT_PRIORITY 15U
+#define BSP_IOEXPANDER_IT_PRIORITY 14U
+#define BSP_BUTTON_USER_IT_PRIORITY 15U
+#define BSP_AUDIO_OUT_IT_PRIORITY 13U
+#define BSP_AUDIO_IN_IT_PRIORITY 12U
+
+/* Audio codecs defines */
+#define USE_AUDIO_CODEC_WM8994 1U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
+
+/* I2C3 Frequency in Hz */
+#define BUS_I2C3_FREQUENCY 100000U /* Frequency of I2C3 = 100 kHz*/
+
+/* SPI2 Baud rate in bps */
+#define BUS_SPI2_BAUDRATE 12500000U /* baud rate of SPIn = 12.5 Mbps */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G474E_EVAL1_CONF_H */
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h
new file mode 100644
index 000000000..4a7e0a82a
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_hal_conf.h
@@ -0,0 +1,380 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32g4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G4xx_HAL_CONF_H
+#define STM32G4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CORDIC_MODULE_ENABLED */
+#define HAL_CRC_MODULE_ENABLED
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FDCAN_MODULE_ENABLED */
+/*#define HAL_FMAC_MODULE_ENABLED */
+/*#define HAL_HRTIM_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_UART_MODULE_ENABLED */
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+ * @brief This is the list of modules where register callback can be used
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+/*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations in voltage and temperature.*/
+#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for I2S and SAI peripherals
+ * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
+ * frequency, this source is inserted directly through I2S_CKIN pad.
+ */
+#if !defined (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+#include "stm32g4xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g4xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+#include "stm32g4xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32g4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32g4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32g4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32g4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32g4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32g4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G4xx_HAL_CONF_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
new file mode 100644
index 000000000..bbb84344f
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
@@ -0,0 +1,61 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file CRC/CRC_Data_Reversing_16bit_CRC/Inc/stm32g4xx_it.h
+ * @author MCD Application Team
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32G4xx_IT_H
+#define __STM32G4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32G4xx_IT_H */
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx
new file mode 100644
index 000000000..1c4fd1318
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvoptx
@@ -0,0 +1,657 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ CRC_Data_Reversing_16bit_CRC
+ 0x4
+ ARM-ADS
+
+ 170000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 18
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 6
+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+ 0
+ DLGUARM
+ (105=-1,-1,-1,-1,0)
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U001B00313137510839383538 -O2254 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_512_Dual.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474QETx$Drivers\CMSIS\Flash\STM32G4xx_512_Dual.FLM)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ startup_stm32g474xx.s
+ startup_stm32g474xx.s
+ 0
+ 0
+
+
+
+
+ Application/User
+ 0
+ 0
+ 0
+ 0
+
+ 2
+ 2
+ 1
+ 0
+ 0
+ 0
+ ../Src/main.c
+ main.c
+ 0
+ 0
+
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_it.c
+ stm32g4xx_it.c
+ 0
+ 0
+
+
+ 2
+ 4
+ 1
+ 0
+ 0
+ 0
+ ../Src/stm32g4xx_hal_msp.c
+ stm32g4xx_hal_msp.c
+ 0
+ 0
+
+
+
+
+ Doc
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 5
+ 5
+ 0
+ 0
+ 0
+ ../readme.txt
+ readme.txt
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/Components
+ 0
+ 0
+ 0
+ 0
+
+ 4
+ 6
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152_reg.c
+ mfxstm32l152_reg.c
+ 0
+ 0
+
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/Components/mfxstm32l152/mfxstm32l152.c
+ mfxstm32l152.c
+ 0
+ 0
+
+
+
+
+ Drivers/BSP/STM32G474E-EVAL
+ 0
+ 0
+ 0
+ 0
+
+ 5
+ 8
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_bus.c
+ stm32g474e_eval_bus.c
+ 0
+ 0
+
+
+ 5
+ 9
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval_io.c
+ stm32g474e_eval_io.c
+ 0
+ 0
+
+
+ 5
+ 10
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/BSP/STM32G474E-EVAL/stm32g474e_eval.c
+ stm32g474e_eval.c
+ 0
+ 0
+
+
+
+
+ Drivers/STM32G4xx_HAL_Driver
+ 0
+ 0
+ 0
+ 0
+
+ 6
+ 11
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
+ stm32g4xx_hal_i2c.c
+ 0
+ 0
+
+
+ 6
+ 12
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
+ stm32g4xx_hal_i2c_ex.c
+ 0
+ 0
+
+
+ 6
+ 13
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
+ stm32g4xx_hal_spi.c
+ 0
+ 0
+
+
+ 6
+ 14
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
+ stm32g4xx_hal_spi_ex.c
+ 0
+ 0
+
+
+ 6
+ 15
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
+ stm32g4xx_hal_crc.c
+ 0
+ 0
+
+
+ 6
+ 16
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
+ stm32g4xx_hal_crc_ex.c
+ 0
+ 0
+
+
+ 6
+ 17
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
+ stm32g4xx_hal_gpio.c
+ 0
+ 0
+
+
+ 6
+ 18
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+ stm32g4xx_hal.c
+ 0
+ 0
+
+
+ 6
+ 19
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+ stm32g4xx_hal_rcc.c
+ 0
+ 0
+
+
+ 6
+ 20
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
+ stm32g4xx_hal_rcc_ex.c
+ 0
+ 0
+
+
+ 6
+ 21
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+ stm32g4xx_hal_flash.c
+ 0
+ 0
+
+
+ 6
+ 22
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+ stm32g4xx_hal_flash_ex.c
+ 0
+ 0
+
+
+ 6
+ 23
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
+ stm32g4xx_hal_flash_ramfunc.c
+ 0
+ 0
+
+
+ 6
+ 24
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+ stm32g4xx_hal_exti.c
+ 0
+ 0
+
+
+ 6
+ 25
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
+ stm32g4xx_hal_dma.c
+ 0
+ 0
+
+
+ 6
+ 26
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
+ stm32g4xx_hal_dma_ex.c
+ 0
+ 0
+
+
+ 6
+ 27
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
+ stm32g4xx_hal_pwr.c
+ 0
+ 0
+
+
+ 6
+ 28
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
+ stm32g4xx_hal_pwr_ex.c
+ 0
+ 0
+
+
+ 6
+ 29
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
+ stm32g4xx_hal_cortex.c
+ 0
+ 0
+
+
+ 6
+ 30
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+ stm32g4xx_hal_tim.c
+ 0
+ 0
+
+
+ 6
+ 31
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+ stm32g4xx_hal_tim_ex.c
+ 0
+ 0
+
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ../../../../../../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
+ stm32g4xx_ll_pwr.c
+ 0
+ 0
+
+
+
+
+ Drivers/CMSIS
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 33
+ 1
+ 0
+ 0
+ 0
+ ../Src/system_stm32g4xx.c
+ system_stm32g4xx.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx
new file mode 100644
index 000000000..663799ff6
--- /dev/null
+++ b/Projects/STM32G474E-EVAL1/Examples/CRC/CRC_Data_Reversing_16bit_CRC/MDK-ARM/CRC_Data_Reversing_16bit_CRC.uvprojx
@@ -0,0 +1,602 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ CRC_Data_Reversing_16bit_CRC
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32G474QETx
+ STMicroelectronics
+ Keil.STM32G4xx_DFP.1.1.2
+ http://www.keil.com/pack
+ IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32G474QETx$Drivers\CMSIS\SVD\STM32G474xx.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ CRC_Data_Reversing_16bit_CRC\
+ CRC_Data_Reversing_16bit_CRC
+ 1
+ 0
+ 1
+ 1
+ 0
+
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4107
+
+ 1
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 8
+ 1
+ 0
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+