Skip to content
View Saanlima's full-sized avatar
Block or Report

Block or report Saanlima

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories

  1. Pepino Pepino Public

    Verilog 26 15

  2. RISC5Verilog_psram RISC5Verilog_psram Public

    Verilog 13 2

  3. RISC5Verilog_lpddr RISC5Verilog_lpddr Public

    RISC5Verilog for Pipistrello using lpddr memory

    Verilog 12 1

  4. Pipistrello Pipistrello Public

    Pipistrello FPGA board by Saanlima Electronics

    Verilog 7 2

  5. Pano_G2C Pano_G2C Public

    Verilog 3

  6. Tools_src Tools_src Public

    C++ 1