diff --git a/src/lcd_sitronix_st7789s.c b/src/lcd_sitronix_st7789s.c index 51737b9..f88802d 100644 --- a/src/lcd_sitronix_st7789s.c +++ b/src/lcd_sitronix_st7789s.c @@ -35,67 +35,58 @@ extern vm_drv_lcd_function_list_t lcd_func_ST7789S; #define LCD_ENABLE_CS vm_dcl_control(lcd_cs_handle, VM_DCL_GPIO_COMMAND_WRITE_LOW, NULL) #define LCD_DISABLE_CS vm_dcl_control(lcd_cs_handle, VM_DCL_GPIO_COMMAND_WRITE_HIGH, NULL) -#define LCD_CtrlWrite_ST7789S(_data) \ - \ -{ \ - \ -LCD_ENABLE_CS; \ - \ -vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_LOW_ADDR, _data); \ - \ -LCD_DISABLE_CS; \ - \ +#define LCD_CtrlWrite_ST7789S(_data) \ +{\ +LCD_ENABLE_CS;\ +vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_LOW_ADDR, _data);\ +LCD_DISABLE_CS;\ } -#define LCD_DataWrite_ST7789S(_data) \ - \ -{ \ - \ -LCD_ENABLE_CS; \ - \ -vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, _data); \ - \ -LCD_DISABLE_CS; \ - \ +#define LCD_DataWrite_ST7789S(_data) \ +{\ +LCD_ENABLE_CS;\ +vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, _data);\ +LCD_DISABLE_CS;\ } void lcd_st7789s_init(void) { - lcd_reset_handle = vm_dcl_open(VM_DCL_GPIO, LCD_GPIO_RESET); - lcd_cs_handle = vm_dcl_open(VM_DCL_GPIO, LCD_GPIO_CS); + lcd_reset_handle = vm_dcl_open(VM_DCL_GPIO, LCD_GPIO_RESET); + lcd_cs_handle = vm_dcl_open(VM_DCL_GPIO, LCD_GPIO_CS); + + // Settings set in WFD_lcd_initialize + //LCD_SET_LCD_ROI_CTRL_OUTPUT_FORMAT(LCD_16BIT_16_BPP_RGB565_1); + + *VSIM1_CON2 = *VSIM1_CON2 | 0x0002; + *VSIM1_CON0 = *VSIM1_CON0 | 0x0001; + + //Serial Clock: + vm_drv_lcd_set_serial_clock(0, LCD_SERIAL_CLOCK_132MHZ); + + vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_SINGLE_A0); + vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_CS_STAY_LOW); + vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_SERIAL0_3WIRE); + //LCD_DISABLE_SERIAL0_SDI; + //vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_SINGLE_A0); + vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_HW_CS); + + vm_drv_lcd_operation2(VM_DRV_LCD_SET_SERIAL0_IF_SIZE,LCD_SCNF_IF_WIDTH_8); + //Timing need tuning + vm_drv_lcd_init_timing(0, 0, 0, 0, 0, 7, 7); + + //Set Driving current + //set_lcd_driving_current_centralize(LCD_DRIVING_12MA); + + vm_drv_lcd_set_serial0_1v8_driving(LCD_DRIVING_12MA); + vm_drv_lcd_setup_driver(&lcd_func_ST7789S); - // Settings set in WFD_lcd_initialize - // LCD_SET_LCD_ROI_CTRL_OUTPUT_FORMAT(LCD_16BIT_16_BPP_RGB565_1); - - *VSIM1_CON2 = *VSIM1_CON2 | 0x0002; - *VSIM1_CON0 = *VSIM1_CON0 | 0x0001; - - // Serial Clock: - vm_drv_lcd_set_serial_clock(0, LCD_SERIAL_CLOCK_132MHZ); - - vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_SINGLE_A0); - vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_CS_STAY_LOW); - vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_SERIAL0_3WIRE); - // LCD_DISABLE_SERIAL0_SDI; - // vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_SERIAL0_SINGLE_A0); - vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_HW_CS); - - vm_drv_lcd_operation2(VM_DRV_LCD_SET_SERIAL0_IF_SIZE, LCD_SCNF_IF_WIDTH_8); - // Timing need tuning - vm_drv_lcd_init_timing(0, 0, 0, 0, 0, 7, 7); - - // Set Driving current - // set_lcd_driving_current_centralize(LCD_DRIVING_12MA); - - vm_drv_lcd_set_serial0_1v8_driving(LCD_DRIVING_12MA); - vm_drv_lcd_setup_driver(&lcd_func_ST7789S); } void lcd_enter_sleep_st7789s(void) { LCD_CtrlWrite_ST7789S(0x10); - vm_drv_lcd_delay_ms(120); + vm_drv_lcd_delay_ms(120); } void lcd_exit_sleep_st7789s(void) @@ -104,90 +95,93 @@ void lcd_exit_sleep_st7789s(void) LCD_CtrlWrite_ST7789S(0x11); vm_drv_lcd_delay_ms(10); LCD_CtrlWrite_ST7789S(0x29); - vm_drv_lcd_delay_ms(120); + vm_drv_lcd_delay_ms(120); } VMUINT8 lcd_partial_line_st7789s(void) { - return 1; /* partial display in 1 line alignment */ + return 1; /* partial display in 1 line alignment */ } -void lcd_block_clear_st7789s(VMUINT16 x1, VMUINT16 y1, VMUINT16 x2, VMUINT16 y2, VMUINT16 data) +void lcd_block_clear_st7789s(VMUINT16 x1,VMUINT16 y1,VMUINT16 x2,VMUINT16 y2,VMUINT16 data) { - VMUINT16 LCD_x; - VMUINT16 LCD_y; - VMUINT8 r_color, g_color, b_color; - - r_color = ((data & 0xF800) >> 10) | (data >> 15); /* transfer to RGB666 */ - g_color = ((data >> 5) & 0x3F); - b_color = ((data & 0x1F) << 1) | ((data >> 4) & 0x1); - - LCD_CtrlWrite_ST7789S(0x2A); - LCD_DataWrite_ST7789S((x1 & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(x1 & 0xFF); - LCD_DataWrite_ST7789S((x2 & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(x2 & 0xFF); - - LCD_CtrlWrite_ST7789S(0x2B); - LCD_DataWrite_ST7789S((y1 & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(y1 & 0xFF); - LCD_DataWrite_ST7789S((y2 & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(y2 & 0xFF); - - LCD_CtrlWrite_ST7789S(0x2C); - - LCD_ENABLE_CS; - for(LCD_y = y1; LCD_y <= y2; LCD_y++) { - for(LCD_x = x1; LCD_x <= x2; LCD_x++) { - vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, ((data & 0xFF00) >> 8)); - vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, (data & 0xFF)); - } - } - LCD_DISABLE_CS; + VMUINT16 LCD_x; + VMUINT16 LCD_y; + VMUINT8 r_color,g_color,b_color; + + r_color=((data&0xF800)>>10)|(data>>15); /* transfer to RGB666 */ + g_color=((data>>5)&0x3F); + b_color=((data&0x1F)<<1)|((data>>4)&0x1); + + LCD_CtrlWrite_ST7789S(0x2A); + LCD_DataWrite_ST7789S((x1&0xFF00)>>8); + LCD_DataWrite_ST7789S(x1&0xFF); + LCD_DataWrite_ST7789S((x2&0xFF00)>>8); + LCD_DataWrite_ST7789S(x2&0xFF); + + LCD_CtrlWrite_ST7789S(0x2B); + LCD_DataWrite_ST7789S((y1&0xFF00)>>8); + LCD_DataWrite_ST7789S(y1&0xFF); + LCD_DataWrite_ST7789S((y2&0xFF00)>>8); + LCD_DataWrite_ST7789S(y2&0xFF); + + LCD_CtrlWrite_ST7789S(0x2C); + + LCD_ENABLE_CS; + for(LCD_y=y1;LCD_y<=y2;LCD_y++) + { + for(LCD_x=x1;LCD_x<=x2;LCD_x++) + { + vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, ((data&0xFF00)>>8)); + vm_drv_lcd_operation2(VM_DRV_LCD_WRITE_SERIAL0_A0_HIGH_ADDR, (data&0xFF)); + } + } + LCD_DISABLE_CS; } void LCD_ClearAll_ST7789S(VMUINT16 data) { - lcd_block_clear_st7789s(0, 0, 240 - 1, 240 - 1, data); + lcd_block_clear_st7789s(0,0,240-1,240-1,data); } -void lcd_init_st7789s(VMUINT32 bkground, void** buf_addr) -{ - // Do HW Reset - - vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_HIGH, NULL); - vm_drv_lcd_delay_ms(1); - vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_LOW, NULL); - vm_drv_lcd_delay_ms(10); - vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_HIGH, NULL); - vm_drv_lcd_delay_ms(120); - - LCD_CtrlWrite_ST7789S(0x11); - vm_drv_lcd_delay_ms(120); - - LCD_CtrlWrite_ST7789S(0x36); - LCD_DataWrite_ST7789S(0x00); // C0 40 60 - LCD_CtrlWrite_ST7789S(0x35); - LCD_DataWrite_ST7789S(0x00); // te on - - LCD_CtrlWrite_ST7789S(0x2a); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0xef); - - LCD_CtrlWrite_ST7789S(0x2b); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0x00); - LCD_DataWrite_ST7789S(0xef); - - LCD_CtrlWrite_ST7789S(0x3A); - LCD_DataWrite_ST7789S(0x55); - - LCD_CtrlWrite_ST7789S(0xB2); - LCD_DataWrite_ST7789S(0x1C); +void lcd_init_st7789s(VMUINT32 bkground, void **buf_addr) +{ + // Do HW Reset + vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_HIGH, NULL); + vm_drv_lcd_delay_ms(1); + vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_LOW, NULL); + vm_drv_lcd_delay_ms(10); + vm_dcl_control(lcd_reset_handle, VM_DCL_GPIO_COMMAND_WRITE_HIGH, NULL); + vm_drv_lcd_delay_ms(120); + + LCD_CtrlWrite_ST7789S(0x11); + vm_drv_lcd_delay_ms(120); + +#ifdef _TOUCH_SCREEN_V1_0_ + LCD_CtrlWrite_ST7789S(0x36); + LCD_DataWrite_ST7789S(0x00);// C0 40 60 + + LCD_CtrlWrite_ST7789S(0x35); + LCD_DataWrite_ST7789S(0x00); //te on + + LCD_CtrlWrite_ST7789S(0x2a); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0xef); + + LCD_CtrlWrite_ST7789S(0x2b); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0xef); + + LCD_CtrlWrite_ST7789S(0x3A); + LCD_DataWrite_ST7789S(0x55); + + LCD_CtrlWrite_ST7789S(0xB2); + LCD_DataWrite_ST7789S(0x1C); LCD_DataWrite_ST7789S(0x1C); LCD_DataWrite_ST7789S(0x01); LCD_DataWrite_ST7789S(0xFF); @@ -195,7 +189,7 @@ void lcd_init_st7789s(VMUINT32 bkground, void** buf_addr) LCD_CtrlWrite_ST7789S(0xB3); LCD_DataWrite_ST7789S(0x10); - LCD_DataWrite_ST7789S(0xFF); // 0x05 + LCD_DataWrite_ST7789S(0xFF); // 0x05 LCD_DataWrite_ST7789S(0x0F); LCD_CtrlWrite_ST7789S(0xB4); @@ -223,13 +217,13 @@ void lcd_init_st7789s(VMUINT32 bkground, void** buf_addr) LCD_DataWrite_ST7789S(0x01); LCD_CtrlWrite_ST7789S(0xC3); - LCD_DataWrite_ST7789S(0x1E); + LCD_DataWrite_ST7789S(0x1E); LCD_CtrlWrite_ST7789S(0xC4); LCD_DataWrite_ST7789S(0x20); - LCD_CtrlWrite_ST7789S(0xC6); // Normal mode frame rate - LCD_DataWrite_ST7789S(0x1E); // 0x0f 60Hz while FPA and BPA = 0x0C + LCD_CtrlWrite_ST7789S(0xC6); // Normal mode frame rate + LCD_DataWrite_ST7789S(0x1E); // 0x0f 60Hz while FPA and BPA = 0x0C LCD_CtrlWrite_ST7789S(0xD0); LCD_DataWrite_ST7789S(0xA4); @@ -266,137 +260,242 @@ void lcd_init_st7789s(VMUINT32 bkground, void** buf_addr) LCD_DataWrite_ST7789S(0x15); LCD_DataWrite_ST7789S(0x1B); LCD_DataWrite_ST7789S(0x1F); +#endif + +#ifdef _TOUCH_SCREEN_V1_1_ + LCD_CtrlWrite_ST7789S (0x36); + LCD_DataWrite_ST7789S(0x00); + LCD_CtrlWrite_ST7789S (0x3a); + LCD_DataWrite_ST7789S(0x05); + LCD_CtrlWrite_ST7789S (0x21); + LCD_CtrlWrite_ST7789S (0x2a); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0xef); + LCD_CtrlWrite_ST7789S (0x2b); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0xef); + //--------------------------------ST7789V Frame rate setting----------------------------------// + LCD_CtrlWrite_ST7789S (0xb2); + LCD_DataWrite_ST7789S(0x0c); + LCD_DataWrite_ST7789S(0x0c); + LCD_DataWrite_ST7789S(0x00); + LCD_DataWrite_ST7789S(0x33); + LCD_DataWrite_ST7789S(0x33); + LCD_CtrlWrite_ST7789S (0xb7); + LCD_DataWrite_ST7789S(0x35); + //---------------------------------ST7789V Power setting--------------------------------------// + LCD_CtrlWrite_ST7789S (0xbb); + LCD_DataWrite_ST7789S(0x1f); + LCD_CtrlWrite_ST7789S (0xc0); + LCD_DataWrite_ST7789S(0x2c); + LCD_CtrlWrite_ST7789S (0xc2); + LCD_DataWrite_ST7789S(0x01); + LCD_CtrlWrite_ST7789S (0xc3); + LCD_DataWrite_ST7789S(0x12); + LCD_CtrlWrite_ST7789S (0xc4); + LCD_DataWrite_ST7789S(0x20); + LCD_CtrlWrite_ST7789S (0xc6); + LCD_DataWrite_ST7789S(0x0f); + LCD_CtrlWrite_ST7789S (0xd0); + LCD_DataWrite_ST7789S(0xa4); + LCD_DataWrite_ST7789S(0xa1); + //--------------------------------ST7789V gamma setting--------------------------------------// + LCD_CtrlWrite_ST7789S (0xe0); + LCD_DataWrite_ST7789S(0xd0); + LCD_DataWrite_ST7789S(0x08); + LCD_DataWrite_ST7789S(0x11); + LCD_DataWrite_ST7789S(0x08); + LCD_DataWrite_ST7789S(0x0c); + LCD_DataWrite_ST7789S(0x15); + LCD_DataWrite_ST7789S(0x39); + LCD_DataWrite_ST7789S(0x33); + LCD_DataWrite_ST7789S(0x50); + LCD_DataWrite_ST7789S(0x36); + LCD_DataWrite_ST7789S(0x13); + LCD_DataWrite_ST7789S(0x14); + LCD_DataWrite_ST7789S(0x29); + LCD_DataWrite_ST7789S(0x2d); + LCD_CtrlWrite_ST7789S (0xe1); + LCD_DataWrite_ST7789S(0xd0); + LCD_DataWrite_ST7789S(0x08); + LCD_DataWrite_ST7789S(0x10); + LCD_DataWrite_ST7789S(0x08); + LCD_DataWrite_ST7789S(0x06); + LCD_DataWrite_ST7789S(0x06); + LCD_DataWrite_ST7789S(0x39); + LCD_DataWrite_ST7789S(0x44); + LCD_DataWrite_ST7789S(0x51); + LCD_DataWrite_ST7789S(0x0b); + LCD_DataWrite_ST7789S(0x16); + LCD_DataWrite_ST7789S(0x14); + LCD_DataWrite_ST7789S(0x2f); + LCD_DataWrite_ST7789S(0x31); + LCD_CtrlWrite_ST7789S (0x29); +#endif + // clear the screen with black color + LCD_CtrlWrite_ST7789S(0x2C); + LCD_ClearAll_ST7789S(0x00); + + vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_SERIAL0_2PIN); + vm_drv_lcd_operation2(VM_DRV_LCD_SET_SERIAL0_IF_2PIN_SIZE, LCD_SCNF_IF_2PIN_WIDTH_16); + + // 2 data lane + LCD_CtrlWrite_ST7789S(0xE7); + LCD_DataWrite_ST7789S(0x10); + + // display on + LCD_CtrlWrite_ST7789S(0x29); + vm_drv_lcd_delay_ms(120); - // clear the screen with black color - LCD_CtrlWrite_ST7789S(0x2C); - LCD_ClearAll_ST7789S(0x00); - - vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_SERIAL0_2PIN); - vm_drv_lcd_operation2(VM_DRV_LCD_SET_SERIAL0_IF_2PIN_SIZE, LCD_SCNF_IF_2PIN_WIDTH_16); - - // 2 data lane - LCD_CtrlWrite_ST7789S(0xE7); - LCD_DataWrite_ST7789S(0x10); - - // display on - LCD_CtrlWrite_ST7789S(0x29); - vm_drv_lcd_delay_ms(120); } + void lcd_power_on_st7789s(VM_DRV_LCD_BOOL on) { - if(on) { - lcd_exit_sleep_st7789s(); - } else { - lcd_enter_sleep_st7789s(); - } + if(on) + { + lcd_exit_sleep_st7789s(); + } + else + { + lcd_enter_sleep_st7789s(); + } } + void lcd_on_st7789s(VM_DRV_LCD_BOOL on) { - if(on) { - lcd_exit_sleep_st7789s(); - } else { - lcd_enter_sleep_st7789s(); - } + if (on) + { + lcd_exit_sleep_st7789s(); + } + else + { + lcd_enter_sleep_st7789s(); + } } -void lcd_block_write_st7789s(VMUINT16 startx, VMUINT16 starty, VMUINT16 endx, VMUINT16 endy) -{ - LCD_CtrlWrite_ST7789S(0x2A); - LCD_DataWrite_ST7789S((startx & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(startx & 0xFF); - LCD_DataWrite_ST7789S((endx & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(endx & 0xFF); - - LCD_CtrlWrite_ST7789S(0x2B); - LCD_DataWrite_ST7789S((starty & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(starty & 0xFF); - LCD_DataWrite_ST7789S((endy & 0xFF00) >> 8); - LCD_DataWrite_ST7789S(endy & 0xFF); - - LCD_CtrlWrite_ST7789S(0x2C); - - LCD_ENABLE_CS; - vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_LCD_CMD_COMPLETE_INT); - vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_LCD_ROI_CTRL_CMD_FIRST); - vm_drv_lcd_operation(VM_DRV_LCD_START_LCD_TRANSFER); +void lcd_block_write_st7789s(VMUINT16 startx,VMUINT16 starty,VMUINT16 endx,VMUINT16 endy) +{ + LCD_CtrlWrite_ST7789S(0x2A); + LCD_DataWrite_ST7789S((startx&0xFF00)>>8); + LCD_DataWrite_ST7789S(startx&0xFF); + LCD_DataWrite_ST7789S((endx&0xFF00)>>8); + LCD_DataWrite_ST7789S(endx&0xFF); + + LCD_CtrlWrite_ST7789S(0x2B); + LCD_DataWrite_ST7789S((starty&0xFF00)>>8); + LCD_DataWrite_ST7789S(starty&0xFF); + LCD_DataWrite_ST7789S((endy&0xFF00)>>8); + LCD_DataWrite_ST7789S(endy&0xFF); + + LCD_CtrlWrite_ST7789S(0x2C); + + LCD_ENABLE_CS; + vm_drv_lcd_operation(VM_DRV_LCD_ENABLE_LCD_CMD_COMPLETE_INT); + vm_drv_lcd_operation(VM_DRV_LCD_DISABLE_LCD_ROI_CTRL_CMD_FIRST); + vm_drv_lcd_operation(VM_DRV_LCD_START_LCD_TRANSFER); } -void lcd_size_st7789s(VMUINT16* out_LCD_width, VMUINT16* out_LCD_height) +void lcd_size_st7789s(VMUINT16 *out_LCD_width,VMUINT16 *out_LCD_height) { - *out_LCD_width = 240; - *out_LCD_height = 240; + *out_LCD_width = 240; + *out_LCD_height = 240; } VM_DRV_LCD_IOCTRL_STATUS lcd_io_ctrl_st7789s(VM_DRV_LCD_IOCTRL_ID ID, void* Parameters) { - switch(ID) { - case VM_DRV_LCD_IOCTRL_SET_FRAME_RATE: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_FRAME_MARKER: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_SET_FRAME_MARKER: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_H_V_SIGNAL_FUNC: - case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_V_PULSE_WIDTH: - case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_H_PULSE_WIDTH: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_BACK_PORCH: - *(VMUINT32*)(Parameters) = 12; - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_QUERY_FRONT_PORCH: - *(VMUINT32*)(Parameters) = 12; - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_SET_BACK_PORCH: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_SET_FRONT_PORCH: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_TE_EDGE_ATTRIB: - //*(VMUINT32 *)(Parameters) = 0; - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_READBACK_FUNC: - case VM_DRV_LCD_IOCTRL_QUERY_SCANLINE_REG: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - - case VM_DRV_LCD_IOCTRL_QUERY_IF_CS_NUMBER: - *(VMUINT32*)(Parameters) = 3; - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_QUERY_FRAME_RATE: - *((unsigned long*)(Parameters)) = 40; // 90 - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_QUERY_LCM_WIDTH: - *((unsigned long*)(Parameters)) = 240; // physical, not use app's VM_DRV_LCD_WIDTH - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_QUERY_LCM_HEIGHT: - *((unsigned long*)(Parameters)) = 240; // 320;// physical, not use app's VM_DRV_LCD_HEIGHT - return VM_DRV_LCD_IOCTRL_OK; - - case VM_DRV_LCD_IOCTRL_QUERY_SYNC_MODE: - *(VMUINT32*)(Parameters) = 1; - return VM_DRV_LCD_IOCTRL_OK; - - default: - return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; - } + switch (ID) + { + case VM_DRV_LCD_IOCTRL_SET_FRAME_RATE: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_FRAME_MARKER: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_SET_FRAME_MARKER: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_H_V_SIGNAL_FUNC: + case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_V_PULSE_WIDTH: + case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_H_PULSE_WIDTH: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_BACK_PORCH: + *(VMUINT32 *)(Parameters) = 12; + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_QUERY_FRONT_PORCH: + *(VMUINT32 *)(Parameters) = 12; + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_SET_BACK_PORCH: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_SET_FRONT_PORCH: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_TE_EDGE_ATTRIB: + //*(VMUINT32 *)(Parameters) = 0; + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_SUPPORT_READBACK_FUNC: + case VM_DRV_LCD_IOCTRL_QUERY_SCANLINE_REG: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + + case VM_DRV_LCD_IOCTRL_QUERY_IF_CS_NUMBER: + *(VMUINT32 *)(Parameters) = 3; + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_QUERY_FRAME_RATE: + *((unsigned long*)(Parameters)) = 40; // 90 + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_QUERY_LCM_WIDTH: + *((unsigned long*)(Parameters)) = 240;// physical, not use app's VM_DRV_LCD_WIDTH + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_QUERY_LCM_HEIGHT: + *((unsigned long*)(Parameters)) = 240;//320;// physical, not use app's VM_DRV_LCD_HEIGHT + return VM_DRV_LCD_IOCTRL_OK; + + case VM_DRV_LCD_IOCTRL_QUERY_SYNC_MODE: + *(VMUINT32 *)(Parameters) = 1; + return VM_DRV_LCD_IOCTRL_OK; + + default: + return VM_DRV_LCD_IOCTRL_NOT_SUPPORT; + } } vm_drv_lcd_function_list_t lcd_func_ST7789S = { - lcd_init_st7789s, lcd_power_on_st7789s, 0, lcd_on_st7789s, lcd_block_write_st7789s, - lcd_size_st7789s, lcd_enter_sleep_st7789s, lcd_exit_sleep_st7789s, 0, 0, - lcd_partial_line_st7789s, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, lcd_io_ctrl_st7789s + lcd_init_st7789s, + lcd_power_on_st7789s, + 0, + lcd_on_st7789s, + lcd_block_write_st7789s, + lcd_size_st7789s, + lcd_enter_sleep_st7789s, + lcd_exit_sleep_st7789s, + 0, + 0, + lcd_partial_line_st7789s, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + lcd_io_ctrl_st7789s }; diff --git a/src/lcd_sitronix_st7789s.h b/src/lcd_sitronix_st7789s.h index a08fc51..09ac720 100644 --- a/src/lcd_sitronix_st7789s.h +++ b/src/lcd_sitronix_st7789s.h @@ -1,145 +1,150 @@ -#define LCD_BASE (0xA0450000) -#define LCD_INT_ENABLE_REG (LCD_BASE + 0x0004) -#define LCD_START_REG (LCD_BASE + 0x000C) -#define LCD_SIF_CON_REG (LCD_BASE + 0x0028) -#define LCD_ROI_CTRL_REG (LCD_BASE + 0x0080) -#define LCD_SIF_PIX_CON_REG (LCD_BASE + 0x0018) -#define LCD_SERIAL0_A0_LOW_ADDR (LCD_BASE + 0x0F80) -#define LCD_SERIAL0_A0_HIGH_ADDR (LCD_BASE + 0x0F90) -#define LCD_SERIAL_PIX_CONFIG_SIF0_CS_STAY_LOW_BIT 0x0080 -#define LCD_ROI_CTRL_CMD_ENABLE_BIT 0x00008000 -#define LCD_ROI_CTRL_DATA_FORMAT_MASK 0x020000FF -#define LCD_SERIAL_CONFIG_SIF_HW_CS_CTRL_BIT 0x01000000 -#define LCD_SERIAL_PIX_CONFIG_SIF0_SINGLE_A0_BIT 0x0040 -#define LCD_SERIAL_CONFIG_SIF0_3WIRE_BIT 0x0008 -#define LCD_SERIAL_PIX_CONFIG_SIF0_PIX_2PIN_BIT 0x0010 -#define LCD_INT_ENABLE_CMD_COMPLETE_BIT 0x0004 -#define LCD_START_BIT 0x8000 -#define LCD_SERIAL_CONFIG_SIF0_SIZE_MASK 0x0007 -#define LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK 0x0007 -#define LCD_SERIAL_CONFIG_SIF0_SIZE_OFFSET 0 -#define LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_OFFSET 0 -#define LCD_SERIAL_CONFIG_SDI_ENALBE_BIT 0x0010 +#define _TOUCH_SCREEN_V1_0_ +//#define _TOUCH_SCREEN_V1_1_ -#define REG_LCD_ROI_CTRL *((volatile unsigned int*)(LCD_ROI_CTRL_REG)) -#define REG_LCD_SIF_CON_REG *((volatile unsigned int*)(LCD_SIF_CON_REG)) -#define REG_LCD_SIF_PIX_CON_REG *((volatile unsigned short*)LCD_SIF_PIX_CON_REG) -#define REG_LCD_INT_ENABLE *((volatile unsigned short*)(LCD_INT_ENABLE_REG)) -#define REG_LCD_START *((volatile unsigned short*)(LCD_START_REG)) +#define LCD_BASE (0xA0450000) +#define LCD_INT_ENABLE_REG (LCD_BASE+0x0004) +#define LCD_START_REG (LCD_BASE+0x000C) +#define LCD_SIF_CON_REG (LCD_BASE+0x0028) +#define LCD_ROI_CTRL_REG (LCD_BASE+0x0080) +#define LCD_SIF_PIX_CON_REG (LCD_BASE+0x0018) +#define LCD_SERIAL0_A0_LOW_ADDR (LCD_BASE+0x0F80) +#define LCD_SERIAL0_A0_HIGH_ADDR (LCD_BASE+0x0F90) -#define LCD_SET_SERIAL0_IF_SIZE(n) \ - REG_LCD_SIF_CON_REG &= ~(LCD_SERIAL_CONFIG_SIF0_SIZE_MASK); \ - REG_LCD_SIF_CON_REG |= ((n & LCD_SERIAL_CONFIG_SIF0_SIZE_MASK) << LCD_SERIAL_CONFIG_SIF0_SIZE_OFFSET) +#define LCD_SERIAL_PIX_CONFIG_SIF0_CS_STAY_LOW_BIT 0x0080 +#define LCD_ROI_CTRL_CMD_ENABLE_BIT 0x00008000 +#define LCD_ROI_CTRL_DATA_FORMAT_MASK 0x020000FF +#define LCD_SERIAL_CONFIG_SIF_HW_CS_CTRL_BIT 0x01000000 +#define LCD_SERIAL_PIX_CONFIG_SIF0_SINGLE_A0_BIT 0x0040 +#define LCD_SERIAL_CONFIG_SIF0_3WIRE_BIT 0x0008 +#define LCD_SERIAL_PIX_CONFIG_SIF0_PIX_2PIN_BIT 0x0010 +#define LCD_INT_ENABLE_CMD_COMPLETE_BIT 0x0004 +#define LCD_START_BIT 0x8000 +#define LCD_SERIAL_CONFIG_SIF0_SIZE_MASK 0x0007 +#define LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK 0x0007 +#define LCD_SERIAL_CONFIG_SIF0_SIZE_OFFSET 0 +#define LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_OFFSET 0 +#define LCD_SERIAL_CONFIG_SDI_ENALBE_BIT 0x0010 -#define LCD_SET_LCD_ROI_CTRL_OUTPUT_FORMAT(n) \ - REG_LCD_ROI_CTRL &= ~LCD_ROI_CTRL_DATA_FORMAT_MASK; \ - REG_LCD_ROI_CTRL |= n; -#define SET_LCD_SERIAL0_IF_2PIN_SIZE(n) \ - REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK); \ - REG_LCD_SIF_PIX_CON_REG |= \ - ((n & LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK) << LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_OFFSET) +#define REG_LCD_ROI_CTRL *((volatile unsigned int *) (LCD_ROI_CTRL_REG)) +#define REG_LCD_SIF_CON_REG *((volatile unsigned int *) (LCD_SIF_CON_REG)) +#define REG_LCD_SIF_PIX_CON_REG *((volatile unsigned short *) LCD_SIF_PIX_CON_REG) +#define REG_LCD_INT_ENABLE *((volatile unsigned short *) (LCD_INT_ENABLE_REG)) +#define REG_LCD_START *((volatile unsigned short *) (LCD_START_REG)) -#define LCD_DISABLE_SERIAL0_SDI REG_LCD_SIF_CON_REG &= ~(LCD_SERIAL_CONFIG_SDI_ENALBE_BIT) -#define LCD_DISABLE_SERIAL0_SINGLE_A0 REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_SINGLE_A0_BIT) -#define LCD_DISABLE_SERIAL0_CS_STAY_LOW REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_CS_STAY_LOW_BIT) -#define LCD_ENABLE_SERIAL0_3WIRE REG_LCD_SIF_CON_REG |= LCD_SERIAL_CONFIG_SIF0_3WIRE_BIT -#define LCD_ENABLE_HW_CS REG_LCD_SIF_CON_REG |= LCD_SERIAL_CONFIG_SIF_HW_CS_CTRL_BIT -#define LCD_ENABLE_SERIAL0_2PIN REG_LCD_SIF_PIX_CON_REG |= LCD_SERIAL_PIX_CONFIG_SIF0_PIX_2PIN_BIT -#define LCD_ENABLE_LCD_CMD_COMPLETE_INT REG_LCD_INT_ENABLE |= LCD_INT_ENABLE_CMD_COMPLETE_BIT; -#define LCD_DISABLE_LCD_ROI_CTRL_CMD_FIRST REG_LCD_ROI_CTRL &= ~LCD_ROI_CTRL_CMD_ENABLE_BIT; -#define LCD_START_LCD_TRANSFER \ - REG_LCD_START = 0; \ - REG_LCD_START = LCD_START_BIT; +#define LCD_SET_SERIAL0_IF_SIZE(n) REG_LCD_SIF_CON_REG &= ~(LCD_SERIAL_CONFIG_SIF0_SIZE_MASK);\ + REG_LCD_SIF_CON_REG |= ((n & LCD_SERIAL_CONFIG_SIF0_SIZE_MASK) << LCD_SERIAL_CONFIG_SIF0_SIZE_OFFSET) -typedef enum { - LCD_8BIT_8_BPP_RGB332_1 = 0x00, /* RRRGGBB */ - LCD_8BIT_8_BPP_RGB332_2 = 0x01, /* BBGGGRR */ - LCD_8BIT_12_BPP_RGB444_1 = 0x08, /* RRRRGGGG, BBBBRRRR, GGGGBBBB */ - LCD_8BIT_12_BPP_RGB444_2 = 0x0B, /* GGGGRRRR, RRRRBBBB, BBBBGGGG */ - LCD_8BIT_16_BPP_RGB565_1 = 0x10, /* RRRRRGGG, GGGBBBBB */ - LCD_8BIT_16_BPP_RGB565_2 = 0x12, /* GGGBBBBB, RRRRRGGG */ - LCD_8BIT_16_BPP_BGR565_1 = 0x11, /* BBBBBGGG, GGGRRRRR */ - LCD_8BIT_16_BPP_BGR565_2 = 0x13, /* GGGRRRRR, BBBBBGGG */ - LCD_8BIT_18_BPP_RGB666_1 = 0x18, /* RRRRRRXX, GGGGGGXX, BBBBBBXX */ - LCD_8BIT_18_BPP_RGB666_2 = 0x1C, /* XXRRRRRR, XXGGGGGG, XXBBBBBB */ - LCD_8BIT_24_BPP_RGB888_1 = 0x20, /* RRRRRRRR, GGGGGGGG, BBBBBBBB */ - LCD_16BIT_8_BPP_RGB332_1 = 0x40, /* RRRGGGBBRRRGGGBB, MSB first*/ - LCD_16BIT_8_BPP_RGB332_2 = 0x42, /* RRRGGGBBRRRGGGBB, LSB first*/ - LCD_16BIT_8_BPP_RGB332_3 = 0x41, /* BBGGGRRRBBGGGRRR, MSB first */ - LCD_16BIT_8_BPP_RGB332_4 = 0x43, /* BBGGGRRRBBGGGRRR, LSB first */ - LCD_16BIT_12_BPP_RGB444_1 = 0x4C, /* XXXXRRRRGGGGBBBB */ - LCD_16BIT_12_BPP_RGB444_2 = 0x4D, /* XXXXBBBBGGGGRRRR */ - LCD_16BIT_12_BPP_RGB444_3 = 0x48, /* RRRRGGGGBBBBXXXX */ - LCD_16BIT_12_BPP_RGB444_4 = 0x49, /* BBBBGGGGRRRRXXXX */ - LCD_16BIT_16_BPP_RGB565_1 = 0x50, /* RRRRRGGGGGGBBBBB */ - LCD_16BIT_16_BPP_RGB565_2 = 0x52, /* GGGBBBBBRRRRRGGG */ - LCD_16BIT_16_BPP_BGR565_1 = 0x51, /* BBBBBGGGGGGRRRRR */ - LCD_16BIT_16_BPP_BGR565_2 = 0x53, /* GGGRRRRRBBBBBGGG */ - LCD_16BIT_18_BPP_RGB666_1 = 0x5C, /* XXXXRRRRRRGGGGGG, XXXXBBBBBBRRRRRR, XXXXGGGGGGBBBBBB */ - LCD_16BIT_18_BPP_RGB666_2 = 0x5F, /* XXXXGGGGGGRRRRRR, XXXXRRRRRRBBBBBB, XXXXBBBBBBGGGGGG */ - LCD_16BIT_18_BPP_RGB666_3 = 0x58, /* RRRRRRGGGGGGXXXX, BBBBBBRRRRRRXXXX, GGGGGGBBBBBBXXXX */ - LCD_16BIT_18_BPP_RGB666_4 = 0x5B, /* GGGGGGRRRRRRXXXX, RRRRRRBBBBBBXXXX, BBBBBBGGGGGGXXXX */ - LCD_16BIT_24_BPP_RGB888_1 = 0x60, /* RRRRRRRRGGGGGGGG, BBBBBBBBRRRRRRRR, GGGGGGGGBBBBBBBB */ - LCD_16BIT_24_BPP_RGB888_2 = 0x63, /* GGGGGGGGRRRRRRRR, RRRRRRRRBBBBBBBB, BBBBBBBBGGGGGGGG */ +#define LCD_SET_LCD_ROI_CTRL_OUTPUT_FORMAT(n) REG_LCD_ROI_CTRL &= ~LCD_ROI_CTRL_DATA_FORMAT_MASK;\ + REG_LCD_ROI_CTRL |= n; - LCD_9BIT_8_BPP_RGB332_1 = 0x80, /* RRRGGGBBX */ - LCD_9BIT_8_BPP_RGB332_2 = 0x81, /* BBGGGRRRX */ - LCD_9BIT_12_BPP_RGB444_1 = 0x88, /* RRRRGGGGX, BBBBRRRRX, GGGGBBBBX */ - LCD_9BIT_12_BPP_RGB444_2 = 0x8B, /* GGGGRRRRX, RRRRBBBBX, BBBBGGGGX */ - LCD_9BIT_16_BPP_RGB565_1 = 0x90, /* RRRRRGGGX, GGGBBBBBX */ - LCD_9BIT_16_BPP_RGB565_2 = 0x93, /* GGGRRRRRX, BBBBBGGGX */ - LCD_9BIT_18_BPP_RGB666_1 = 0x98, /* RRRRRRGGG, GGGBBBBBB */ - LCD_9BIT_18_BPP_RGB666_2 = 0x9B, /* GGGRRRRRR, BBBBBBGGG */ - LCD_9BIT_24_BPP_RGB888_1 = 0xA0, /* RRRRRRRRX, GGGGGGGGX, BBBBBBBBX */ - LCD_18BIT_8_BPP_RGB332_1 = 0xC0, /* RRRGGGBBRRRGGGBBXX, MSB first */ - LCD_18BIT_8_BPP_RGB332_2 = 0xC2, /* RRRGGGBBRRRGGGBBXX, LSB first */ - LCD_18BIT_8_BPP_RGB332_3 = 0xC1, /* BBGGGRRRBBGGGRRRXX, MSB first */ - LCD_18BIT_8_BPP_RGB332_4 = 0xC3, /* BBGGGRRRBBGGGRRRXX, LSB first */ - LCD_18BIT_12_BPP_RGB444_1 = 0xCC, /* XXXXXXRRRRGGGGBBBB */ - LCD_18BIT_12_BPP_RGB444_2 = 0xCD, /* XXXXXXBBBBGGGGRRRR */ - LCD_18BIT_12_BPP_RGB444_3 = 0xC8, /* RRRRGGGGBBBBXXXXXX */ - LCD_18BIT_12_BPP_RGB444_4 = 0xC9, /* BBBBGGGGRRRRXXXXXX */ - LCD_18BIT_16_BPP_RGB565_1 = 0xD0, /* RRRRRGGGGGGBBBBBXX */ - LCD_18BIT_16_BPP_RGB565_2 = 0xD1, /* BBBBBGGGGGGRRRRRXX */ - LCD_18BIT_18_BPP_RGB666_1 = 0xD8, /* RRRRRRGGGGGGBBBBBB */ - LCD_18BIT_18_BPP_RGB666_2 = 0xD9, /* BBBBBBGGGGGGRRRRRR */ - LCD_18BIT_24_BPP_RGB888_1 = 0xE0, /* RRRRRRRRGGGGGGGGXX, BBBBBBBBRRRRRRRRXX, GGGGGGGGBBBBBBBBXX */ - LCD_18BIT_24_BPP_RGB888_2 = 0xE3 /* GGGGGGGGRRRRRRRRXX, RRRRRRRRBBBBBBBBXX, BBBBBBBBGGGGGGGGXX */ -} LCD_OUTPUT_FMT; +#define SET_LCD_SERIAL0_IF_2PIN_SIZE(n) REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK);\ + REG_LCD_SIF_PIX_CON_REG |= ((n & LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_MASK) << LCD_SERIAL_PIX_CONFIG_SIF0_2PIN_SIZE_OFFSET) -typedef enum { - LCD_SERIAL_CLOCK_132MHZ = 0, - LCD_SERIAL_CLOCK_104MHZ = 1, - LCD_SERIAL_CLOCK_91MHZ = 2, - LCD_SERIAL_CLOCK_78MHZ = 3, - LCD_SERIAL_CLOCK_65MHZ = 4, - LCD_SERIAL_CLOCK_26MHZ = 5, - LCD_SERIAL_CLOCK_RSVD = 6 -} LCD_SERIAL_IF_CLOCK; +#define LCD_DISABLE_SERIAL0_SDI REG_LCD_SIF_CON_REG &= ~(LCD_SERIAL_CONFIG_SDI_ENALBE_BIT) +#define LCD_DISABLE_SERIAL0_SINGLE_A0 REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_SINGLE_A0_BIT) +#define LCD_DISABLE_SERIAL0_CS_STAY_LOW REG_LCD_SIF_PIX_CON_REG &= ~(LCD_SERIAL_PIX_CONFIG_SIF0_CS_STAY_LOW_BIT) +#define LCD_ENABLE_SERIAL0_3WIRE REG_LCD_SIF_CON_REG |= LCD_SERIAL_CONFIG_SIF0_3WIRE_BIT +#define LCD_ENABLE_HW_CS REG_LCD_SIF_CON_REG |= LCD_SERIAL_CONFIG_SIF_HW_CS_CTRL_BIT +#define LCD_ENABLE_SERIAL0_2PIN REG_LCD_SIF_PIX_CON_REG |= LCD_SERIAL_PIX_CONFIG_SIF0_PIX_2PIN_BIT +#define LCD_ENABLE_LCD_CMD_COMPLETE_INT REG_LCD_INT_ENABLE |= LCD_INT_ENABLE_CMD_COMPLETE_BIT; +#define LCD_DISABLE_LCD_ROI_CTRL_CMD_FIRST REG_LCD_ROI_CTRL &= ~LCD_ROI_CTRL_CMD_ENABLE_BIT; +#define LCD_START_LCD_TRANSFER REG_LCD_START = 0;\ + REG_LCD_START = LCD_START_BIT; -typedef enum { - LCD_SCNF_IF_WIDTH_8 = 0, - LCD_SCNF_IF_WIDTH_9, - LCD_SCNF_IF_WIDTH_16, - LCD_SCNF_IF_WIDTH_18, - LCD_SCNF_IF_WIDTH_24, - LCD_SCNF_IF_WIDTH_32 -} LCD_SCNF_IF_WIDTH; +typedef enum + { + LCD_8BIT_8_BPP_RGB332_1 = 0x00, /* RRRGGBB */ + LCD_8BIT_8_BPP_RGB332_2 = 0x01, /* BBGGGRR */ + LCD_8BIT_12_BPP_RGB444_1 = 0x08, /* RRRRGGGG, BBBBRRRR, GGGGBBBB */ + LCD_8BIT_12_BPP_RGB444_2 = 0x0B, /* GGGGRRRR, RRRRBBBB, BBBBGGGG */ + LCD_8BIT_16_BPP_RGB565_1 = 0x10, /* RRRRRGGG, GGGBBBBB */ + LCD_8BIT_16_BPP_RGB565_2 = 0x12, /* GGGBBBBB, RRRRRGGG */ + LCD_8BIT_16_BPP_BGR565_1 = 0x11, /* BBBBBGGG, GGGRRRRR */ + LCD_8BIT_16_BPP_BGR565_2 = 0x13, /* GGGRRRRR, BBBBBGGG */ + LCD_8BIT_18_BPP_RGB666_1 = 0x18, /* RRRRRRXX, GGGGGGXX, BBBBBBXX */ + LCD_8BIT_18_BPP_RGB666_2 = 0x1C, /* XXRRRRRR, XXGGGGGG, XXBBBBBB */ + LCD_8BIT_24_BPP_RGB888_1 = 0x20, /* RRRRRRRR, GGGGGGGG, BBBBBBBB */ + LCD_16BIT_8_BPP_RGB332_1 = 0x40, /* RRRGGGBBRRRGGGBB, MSB first*/ + LCD_16BIT_8_BPP_RGB332_2 = 0x42, /* RRRGGGBBRRRGGGBB, LSB first*/ + LCD_16BIT_8_BPP_RGB332_3 = 0x41, /* BBGGGRRRBBGGGRRR, MSB first */ + LCD_16BIT_8_BPP_RGB332_4 = 0x43, /* BBGGGRRRBBGGGRRR, LSB first */ + LCD_16BIT_12_BPP_RGB444_1 = 0x4C, /* XXXXRRRRGGGGBBBB */ + LCD_16BIT_12_BPP_RGB444_2 = 0x4D, /* XXXXBBBBGGGGRRRR */ + LCD_16BIT_12_BPP_RGB444_3 = 0x48, /* RRRRGGGGBBBBXXXX */ + LCD_16BIT_12_BPP_RGB444_4 = 0x49, /* BBBBGGGGRRRRXXXX */ + LCD_16BIT_16_BPP_RGB565_1 = 0x50, /* RRRRRGGGGGGBBBBB */ + LCD_16BIT_16_BPP_RGB565_2 = 0x52, /* GGGBBBBBRRRRRGGG */ + LCD_16BIT_16_BPP_BGR565_1 = 0x51, /* BBBBBGGGGGGRRRRR */ + LCD_16BIT_16_BPP_BGR565_2 = 0x53, /* GGGRRRRRBBBBBGGG */ + LCD_16BIT_18_BPP_RGB666_1 = 0x5C, /* XXXXRRRRRRGGGGGG, XXXXBBBBBBRRRRRR, XXXXGGGGGGBBBBBB */ + LCD_16BIT_18_BPP_RGB666_2 = 0x5F, /* XXXXGGGGGGRRRRRR, XXXXRRRRRRBBBBBB, XXXXBBBBBBGGGGGG */ + LCD_16BIT_18_BPP_RGB666_3 = 0x58, /* RRRRRRGGGGGGXXXX, BBBBBBRRRRRRXXXX, GGGGGGBBBBBBXXXX */ + LCD_16BIT_18_BPP_RGB666_4 = 0x5B, /* GGGGGGRRRRRRXXXX, RRRRRRBBBBBBXXXX, BBBBBBGGGGGGXXXX */ + LCD_16BIT_24_BPP_RGB888_1 = 0x60, /* RRRRRRRRGGGGGGGG, BBBBBBBBRRRRRRRR, GGGGGGGGBBBBBBBB */ + LCD_16BIT_24_BPP_RGB888_2 = 0x63, /* GGGGGGGGRRRRRRRR, RRRRRRRRBBBBBBBB, BBBBBBBBGGGGGGGG */ + + LCD_9BIT_8_BPP_RGB332_1 = 0x80, /* RRRGGGBBX */ + LCD_9BIT_8_BPP_RGB332_2 = 0x81, /* BBGGGRRRX */ + LCD_9BIT_12_BPP_RGB444_1 = 0x88, /* RRRRGGGGX, BBBBRRRRX, GGGGBBBBX */ + LCD_9BIT_12_BPP_RGB444_2 = 0x8B, /* GGGGRRRRX, RRRRBBBBX, BBBBGGGGX */ + LCD_9BIT_16_BPP_RGB565_1 = 0x90, /* RRRRRGGGX, GGGBBBBBX */ + LCD_9BIT_16_BPP_RGB565_2 = 0x93, /* GGGRRRRRX, BBBBBGGGX */ + LCD_9BIT_18_BPP_RGB666_1 = 0x98, /* RRRRRRGGG, GGGBBBBBB */ + LCD_9BIT_18_BPP_RGB666_2 = 0x9B, /* GGGRRRRRR, BBBBBBGGG */ + LCD_9BIT_24_BPP_RGB888_1 = 0xA0, /* RRRRRRRRX, GGGGGGGGX, BBBBBBBBX */ + LCD_18BIT_8_BPP_RGB332_1 = 0xC0, /* RRRGGGBBRRRGGGBBXX, MSB first */ + LCD_18BIT_8_BPP_RGB332_2 = 0xC2, /* RRRGGGBBRRRGGGBBXX, LSB first */ + LCD_18BIT_8_BPP_RGB332_3 = 0xC1, /* BBGGGRRRBBGGGRRRXX, MSB first */ + LCD_18BIT_8_BPP_RGB332_4 = 0xC3, /* BBGGGRRRBBGGGRRRXX, LSB first */ + LCD_18BIT_12_BPP_RGB444_1 = 0xCC, /* XXXXXXRRRRGGGGBBBB */ + LCD_18BIT_12_BPP_RGB444_2 = 0xCD, /* XXXXXXBBBBGGGGRRRR */ + LCD_18BIT_12_BPP_RGB444_3 = 0xC8, /* RRRRGGGGBBBBXXXXXX */ + LCD_18BIT_12_BPP_RGB444_4 = 0xC9, /* BBBBGGGGRRRRXXXXXX */ + LCD_18BIT_16_BPP_RGB565_1 = 0xD0, /* RRRRRGGGGGGBBBBBXX */ + LCD_18BIT_16_BPP_RGB565_2 = 0xD1, /* BBBBBGGGGGGRRRRRXX */ + LCD_18BIT_18_BPP_RGB666_1 = 0xD8, /* RRRRRRGGGGGGBBBBBB */ + LCD_18BIT_18_BPP_RGB666_2 = 0xD9, /* BBBBBBGGGGGGRRRRRR */ + LCD_18BIT_24_BPP_RGB888_1 = 0xE0, /* RRRRRRRRGGGGGGGGXX, BBBBBBBBRRRRRRRRXX, GGGGGGGGBBBBBBBBXX */ + LCD_18BIT_24_BPP_RGB888_2 = 0xE3 /* GGGGGGGGRRRRRRRRXX, RRRRRRRRBBBBBBBBXX, BBBBBBBBGGGGGGGGXX */ +}LCD_OUTPUT_FMT; -typedef enum { - LCD_DRIVING_4MA = 0, - LCD_DRIVING_8MA = 1, - LCD_DRIVING_12MA = 2, - LCD_DRIVING_16MA = 3 -} LCD_DRIVING_CURRENT; +typedef enum +{ + LCD_SERIAL_CLOCK_132MHZ = 0, + LCD_SERIAL_CLOCK_104MHZ = 1, + LCD_SERIAL_CLOCK_91MHZ = 2, + LCD_SERIAL_CLOCK_78MHZ = 3, + LCD_SERIAL_CLOCK_65MHZ = 4, + LCD_SERIAL_CLOCK_26MHZ = 5, + LCD_SERIAL_CLOCK_RSVD = 6 +}LCD_SERIAL_IF_CLOCK; -typedef enum { - LCD_SCNF_IF_2PIN_WIDTH_16 = 2, - LCD_SCNF_IF_2PIN_WIDTH_18 = 3, - LCD_SCNF_IF_2PIN_WIDTH_24 = 4, - LCD_SCNF_IF_2PIN_WIDTH_12 = 6 -} LCD_SCNF_IF_2PIN_WIDTH; +typedef enum +{ + LCD_SCNF_IF_WIDTH_8 = 0, + LCD_SCNF_IF_WIDTH_9, + LCD_SCNF_IF_WIDTH_16, + LCD_SCNF_IF_WIDTH_18, + LCD_SCNF_IF_WIDTH_24, + LCD_SCNF_IF_WIDTH_32 +}LCD_SCNF_IF_WIDTH; + +typedef enum +{ + LCD_DRIVING_4MA = 0, + LCD_DRIVING_8MA = 1, + LCD_DRIVING_12MA = 2, + LCD_DRIVING_16MA = 3 +} LCD_DRIVING_CURRENT; + +typedef enum +{ + LCD_SCNF_IF_2PIN_WIDTH_16 = 2, + LCD_SCNF_IF_2PIN_WIDTH_18 =3, + LCD_SCNF_IF_2PIN_WIDTH_24 =4, + LCD_SCNF_IF_2PIN_WIDTH_12 =6 +}LCD_SCNF_IF_2PIN_WIDTH; void lcd_st7789s_init(void);