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app
axi
dev
eth
inf
pci
prm
pwk
top
tst
utl
wip
wrk
README

README

BSV Source Files from Atomic Rules LLC
This directory is split into these sub-directories:

 app - Applications, collections of worker componentes with well-defined interfaces
 axi - AXI, AXI bridges
 dev - Devices, code that reflects low-level devices, also importBVI to wrap Verilog devices
 eth - Ethernet devices and support
 inf - Infrastructure, OpenCPI Infrastructure IP
 pci - PCI Express definitions and implementations
 prm - Primatives, circuits that can be resued among modules, also importBVI of Verilog prims
 pwk - Platform-Workers, platform-specific aggregations of functions needed by platform, not application
 top - Top, FTop level of platform, typically platform-specific module just under fpgaTop
 tst - Test, testbenches and support
 utl - Utilities, code that can be reused with few, if any, technology or module depenedencies
 wip - Worker Interface Profiles, WIPs are OCP-specific for now
 wrk - Workers, OpenCPI IP cores used to compose applications, includes device workers
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