From 97e6b0a36a925f57568d8e411666cfb5034aa38b Mon Sep 17 00:00:00 2001 From: Jon Nettleton Date: Thu, 6 Feb 2020 20:11:02 +0100 Subject: [PATCH] NXP/LX2160A/AcpiTables: Sata add Class code for generic AHCI support Add this class code so AHCI functions properly on kernels that don't have the qoriq specific AHCI driver. This still misses the quirk for V1 silicon that if the device is hard reset the SerDes can lose link, but in general this is enough to boot and install an OS. Signed-off-by: Jon Nettleton --- Silicon/NXP/LX2160A/AcpiTables/Dsdt/Sata.asl | 24 ++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Silicon/NXP/LX2160A/AcpiTables/Dsdt/Sata.asl b/Silicon/NXP/LX2160A/AcpiTables/Dsdt/Sata.asl index 02fc7185230..d3345d632ec 100644 --- a/Silicon/NXP/LX2160A/AcpiTables/Dsdt/Sata.asl +++ b/Silicon/NXP/LX2160A/AcpiTables/Dsdt/Sata.asl @@ -23,6 +23,12 @@ Scope(_SB) Name(_HID, "NXP0004") Name(_CCA, 1) Name(_UID, 0) + Name (_CLS, Package (0x03) // _CLS: Class Code + { + 0x01, + 0x06, + 0x01 + }) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, SATA0_BASE, SATA_LEN) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) @@ -49,6 +55,12 @@ Scope(_SB) Name(_HID, "NXP0004") Name(_CCA, 1) Name(_UID, 1) + Name (_CLS, Package (0x03) // _CLS: Class Code + { + 0x01, + 0x06, + 0x01 + }) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, SATA1_BASE, SATA_LEN) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) @@ -62,6 +74,12 @@ Scope(_SB) Name(_HID, "NXP0004") Name(_CCA, 1) Name(_UID, 2) + Name (_CLS, Package (0x03) // _CLS: Class Code + { + 0x01, + 0x06, + 0x01 + }) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, SATA2_BASE, SATA_LEN) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) @@ -75,6 +93,12 @@ Scope(_SB) Name(_HID, "NXP0004") Name(_CCA, 1) Name(_UID, 3) + Name (_CLS, Package (0x03) // _CLS: Class Code + { + 0x01, + 0x06, + 0x01 + }) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, SATA3_BASE, SATA_LEN) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive)