Booting off SPI with LX2160a-CEX7 rev 1.4

[sirquietman]

Hello,
I would like to know if anyone has successfully been able to boot from the SPI memory?
And what steps where taken?
I have been able to build an *xspi.img file and flashed the first 64MB to the SPI flash.
However, nothing happens. It doesn't appears to load anything from this memory. No displays to the console what so ever.

I'm assuming this build worked before and either following dip switches should work?
1100 - Serial NAND 2KB (SPI)
1101 - Serial NAND 2KB (SPI)
https://developer.solid-run.com/knowledge-base/lx2160a-firmware/
https://developer.solid-run.com/download/lx2160a-cex7-simplified-schematics/

Though, I'm wondering if the runme.sh script is correct for building an xspi image because of the size issue. And that according to the README file in the u-boot/board/freescale/lx2160a, there appears to be a significant differences in the memory map for SD vs SPI media.

[sirquietman]

Hey,
I believe, I figured it.

1. rebuild the *xspi.img using the following command
   BOOT=xspi ./runme.sh
   copied the img file to the bootable flash SD card

2. brought the unit up in U-boot and entered the following:
   load mmc 0:1 $load_addr lx2160acex7_2000_700_3200_8_5_2_xspi.img
   sf probe
   sf erase 0 0x4000000
   sf write $load_addr 0 0x4000000

3. Set the dip switches as
   1111 - Serial NOR

[rabeeh]

The xspi image is now built separately; please refer to the latest patches on the master tree -
https://github.com/SolidRun/lx2160a_build

and the docs -
sf probe; setenv ipaddr 192.168.15.223; setenv serverip 192.168.15.3; tftp 0xa0000000 lx2160acex7_xspi_2000_700_2600_8_5_2_xspi.img;sf update 0xa0000000 0 $filesize; sf read 0xa4000000 0 $filesize; cmp 0xa0000000 0xa4000000 $filesize

notice that now we support unified image to boot from sd, emmc and spi.
booting from emmc is available only on silicon rev2 (starting from PCB rev 1.5 which has started shipping April/2020).

[sirquietman]

Hello,     thank you for your help. However, I would like know, if someone does not access tftp service on their lan, is it still possible to load the lx2160acex7_xspi_2000_700_2600_8_5_2_xspi.img from a SD card? I down loaded and build from the latest master branch.Flashed to the spi memory, flipped the dip switches as to boot spi. Everything worked as expected, but still not recognizing the SD card. First attachment shows how the spi memory was flashed. Second attachment shows the boot up messages from the spi memory.  Sorry, at this point, I'm assuming it's something wrong on my end. Thanks again, for your support. On Sunday, May 17, 2020, 04:47:07 PM CDT, Rabeeh Khoury <notifications@github.com> wrote: The xspi image is now built separately; please refer to the latest patches on the master tree - https://github.com/SolidRun/lx2160a_build and the docs - sf probe; setenv ipaddr 192.168.15.223; setenv serverip 192.168.15.3; tftp 0xa0000000 lx2160acex7_xspi_2000_700_2600_8_5_2_xspi.img;sf update 0xa0000000 0 $filesize; sf read 0xa4000000 0 $filesize; cmp 0xa0000000 0xa4000000 $filesize notice that now we support unified image to boot from sd, emmc and spi. booting from emmc is available only on silicon rev2 (starting from PCB rev 1.5 which has started shipping April/2020). — You are receiving this because you modified the open/close state. Reply to this email directly, view it on GitHub, or unsubscribe. NOTICE: BL2: Built : 03:07:19, May 20 2020 NOTICE: UDIMM KHX3200C20S4/16GX NOTICE: DDR4 UDIMM with 2-rank 64-bit bus (x8) NOTICE: 32 GB DDR4, 64-bit, CL=20, ECC off, 256B, CS0+CS1 NOTICE: BL2: Booting BL31 NOTICE: BL31: v1.5(release):LSDK-20.04-2-ga14f9da77 NOTICE: BL31: Built : 03:07:19, May 20 2020 NOTICE: Welcome to LX2160 BL31 Phase U-Boot 2019.10-00017-g343e527608 (May 20 2020 - 03:07:12 +0000) SoC: unknown (0x87361010) Clock Configuration: CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz CPU6(A72):2000 MHz CPU7(A72):2000 MHz CPU8(A72):2000 MHz CPU9(A72):2000 MHz CPU10(A72):2000 MHz CPU11(A72):2000 MHz CPU12(A72):2000 MHz CPU13(A72):2000 MHz CPU14(A72):2000 MHz CPU15(A72):2000 MHz Bus: 700 MHz DDR: 3200 MT/s Reset Configuration Word (RCW): 00000000: 50838338 24500050 00000000 00000000 00000010: 00000000 0e010000 00000000 00000000 00000020: 0fc001a0 00002580 00000000 08000081 00000030: 09240000 00000001 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 08a80001 00151020 Model: SolidRun LX2160ACEX7 COM express type 7 based board Board: unknown-CEX7, SD SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz SERDES3 Reference: Clock1 = 100MHz Clock2 = 100Hz DRAM: 31.9 GiB DDR 31.9 GiB (DDR4, 64-bit, CL=20, ECC off) DDR Controller Interleaving Mode: 256B DDR Chip-Select Interleaving Mode: CS0+CS1 Using SERDES1 Protocol: 8 (0x8) Using SERDES2 Protocol: 5 (0x5) Using SERDES3 Protocol: 2 (0x2) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial_pl01x Out: serial_pl01x Err: serial_pl01x Net: PCIe0: pcie@3400000 disabled PCIe1: pcie@3500000 disabled PCIe2: pcie@3600000 Root Complex: no link PCIe3: pcie@3700000 disabled PCIe4: pcie@3800000 Root Complex: x8 gen3 PCIe5: pcie@3900000 disabled DPMAC3@xgmii Warning: DPMAC3@xgmii (eth0) using random MAC address - 96:de:b9:4b:d7:32 , DPMAC4@xgmii Warning: DPMAC4@xgmii (eth1) using random MAC address - 26:21:44:79:38:e8 , DPMAC5@xgmii Warning: DPMAC5@xgmii (eth2) using random MAC address - f2:cf:10:9f:e4:f6 , DPMAC6@xgmii Warning: DPMAC6@xgmii (eth3) using random MAC address - 1e:7c:fd:f1:1c:21 , DPMAC7@xgmii Warning: DPMAC7@xgmii (eth4) using random MAC address - 76:bf:72:3a:2c:6d , DPMAC8@xgmii Warning: DPMAC8@xgmii (eth5) using random MAC address - 0a:a8:fd:9b:b9:f8 , DPMAC9@xgmii Warning: DPMAC9@xgmii (eth6) using random MAC address - e6:4d:1f:51:94:c7 , DPMAC10@xgmii Warning: DPMAC10@xgmii (eth7) using random MAC address - 02:ee:dc:4b:78:f2 , DPMAC17@rgmii-id [PRIME] Warning: DPMAC17@rgmii-id (eth8) using random MAC address - ba:f1:0d:a3:c6:1d MMC read: dev # 0, block # 20480, count 4608 ... 4608 blocks read: OK MMC read: dev # 0, block # 28672, count 2048 ... 2048 blocks read: OK crc32+ fsl-mc: Booting Management Complex ... SUCCESS fsl-mc: Management Complex booted (version: 10.20.4, boot status: 0x1) Hit any key to stop autoboot: 0 => sf probe SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB => setenv ipaddr 192.168.15.223 => setenv serverip 192.168.15.3 => load mmc 0:1 0xa0000000 xspi.img 67108864 bytes read in 3194 ms (20 MiB/s) => sf update 0xa0000000 0 $filesize device 0 whole chip 0 bytes written, 67108864 bytes skipped in 11.185s, speed 6710886 B/s => sf read 0xa4000000 0 $filesize device 0 whole chip SF: 67108864 bytes @ 0x0 Read: OK => cmp 0xa0000000 0xa4000000 $filesize word at 0x00000000a4000000 (0xaa55aa55) != word at 0x00000000a8000000 (0xffffffff) Total of 16777216 word(s) were the same NOTICE: BL2: v1.5(release):LSDK-20.04-2-ga14f9da77 NOTICE: BL2: Built : 03:07:19, May 20 2020 NOTICE: UDIMM KHX3200C20S4/16GX NOTICE: DDR4 UDIMM with 2-rank 64-bit bus (x8) NOTICE: 32 GB DDR4, 64-bit, CL=20, ECC off, 256B, CS0+CS1 NOTICE: BL2: Booting BL31 NOTICE: BL31: v1.5(release):LSDK-20.04-2-ga14f9da77 NOTICE: BL31: Built : 03:07:19, May 20 2020 NOTICE: Welcome to LX2160 BL31 Phase U-Boot 2019.10-00017-g343e527608 (May 20 2020 - 03:07:12 +0000) SoC: unknown (0x87361010) Clock Configuration: CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz CPU6(A72):2000 MHz CPU7(A72):2000 MHz CPU8(A72):2000 MHz CPU9(A72):2000 MHz CPU10(A72):2000 MHz CPU11(A72):2000 MHz CPU12(A72):2000 MHz CPU13(A72):2000 MHz CPU14(A72):2000 MHz CPU15(A72):2000 MHz Bus: 700 MHz DDR: 3200 MT/s Reset Configuration Word (RCW): 00000000: 50838338 24500050 00000000 00000000 00000010: 00000000 0e010000 00000000 00000000 00000020: 0fc001a0 00002580 00000000 08000081 00000030: 09240000 00000001 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 08a80001 00151020 Model: SolidRun LX2160ACEX7 COM express type 7 based board Board: unknown-CEX7, FlexSPI DEV#0 SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz SERDES3 Reference: Clock1 = 100MHz Clock2 = 100Hz DRAM: 31.9 GiB DDR 31.9 GiB (DDR4, 64-bit, CL=20, ECC off) DDR Controller Interleaving Mode: 256B DDR Chip-Select Interleaving Mode: CS0+CS1 Using SERDES1 Protocol: 8 (0x8) Using SERDES2 Protocol: 5 (0x5) Using SERDES3 Protocol: 2 (0x2) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from SPI Flash... SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB *** Warning - bad CRC, using default environment In: serial_pl01x Out: serial_pl01x Err: serial_pl01x Net: PCIe0: pcie@3400000 disabled PCIe1: pcie@3500000 disabled PCIe2: pcie@3600000 Root Complex: no link PCIe3: pcie@3700000 disabled PCIe4: pcie@3800000 Root Complex: x8 gen3 PCIe5: pcie@3900000 disabled DPMAC3@xgmii Warning: DPMAC3@xgmii (eth0) using random MAC address - 9e:2b:9d:0a:26:a8 , DPMAC4@xgmii Warning: DPMAC4@xgmii (eth1) using random MAC address - 2a:d7:dd:7c:03:d6 , DPMAC5@xgmii Warning: DPMAC5@xgmii (eth2) using random MAC address - a6:ab:2a:b7:c2:18 , DPMAC6@xgmii Warning: DPMAC6@xgmii (eth3) using random MAC address - 2a:15:68:68:f5:81 , DPMAC7@xgmii Warning: DPMAC7@xgmii (eth4) using random MAC address - 76:3b:19:d4:23:11 , DPMAC8@xgmii Warning: DPMAC8@xgmii (eth5) using random MAC address - 82:b4:26:e7:7a:25 , DPMAC9@xgmii Warning: DPMAC9@xgmii (eth6) using random MAC address - 4e:72:68:6f:af:de , DPMAC10@xgmii Warning: DPMAC10@xgmii (eth7) using random MAC address - 12:62:98:41:8d:47 , DPMAC17@rgmii-id [PRIME] Warning: DPMAC17@rgmii-id (eth8) using random MAC address - 3e:54:ea:58:a7:f2 SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB device 0 offset 0x640000, size 0x80000 SF: 524288 bytes @ 0x640000 Read: OK device 0 offset 0xa00000, size 0x300000 SF: 3145728 bytes @ 0xa00000 Read: OK device 0 offset 0xe00000, size 0x100000 SF: 1048576 bytes @ 0xe00000 Read: OK crc32+ fsl-mc: Booting Management Complex ... SUCCESS fsl-mc: Management Complex booted (version: 10.20.4, boot status: 0x1) Hit any key to stop autoboot: 0 => mmc rescan MMC: no card present => mmc rescan MMC: no card present =>