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EMITTER.C
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EMITTER.C
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/****************************************************************************/
/* COPYRIGHT NOTICE */
/****************************************************************************/
/* A PL/I Compiler for the Win32 platform. */
/* Copyright (C) 1997 - 2006 Hugh Gleaves. */
/* */
/* This program is free software; you can redistribute it and/or */
/* modify it under the terms of the GNU General Public License */
/* as published by the Free Software Foundation; either version 2 */
/* */
/* This program is distributed in the hope that it will be useful, */
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
/* GNU General Public License for more details. */
/* */
/* You should have received a copy of the GNU General Public License */
/* along with this program; if not, write to the Free Software */
/* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 */
/* USA. */
/****************************************************************************/
/***************************************************************************/
/* Modification History */
/***************************************************************************/
/* */
/* When Who What */
/* */
/***************************************************************************/
/* */
/* 04-10-91 HWG Initial Version. */
/* 18-10-91 HWG emit_mov did not cater for move to/from segreg. */
/* 18-10-91 HWG Assembly listing didnt print: MOV DS,_CX. */
/* 24-12-91 HWG SEGDEF records were not having their correct */
/* 'segment length' value set. The compiler now */
/* backs-up after emiting all code for a block */
/* and patches the correct value into the SEGDEF. */
/* */
/* 24-12-91 HWG 'start_code' now sets 'offset_in_code_seg' to 0 */
/* so that the offset is zeroised every time a new */
/* code segment generation begins. */
/* */
/* 21-01-92 HWG 'start_code' and 'write_code' modified so that */
/* code generation may produce multiple LEDATA recs. */
/* */
/* 22-01-92 HWG The flag 'fixup_pending' prevents a new LEDATA */
/* rec from being started, when a Fixup is still */
/* being built by codegen. */
/* */
/* 22-01-92 HWG patch_code is now a generic function that may be */
/* called to 'patch' previously emited code. */
/* */
/* 14-03-92 HWG When generating the 'mod' bits, the case of an */
/* index reg WITHOUT a displacement was NOT being */
/* specially catered for. */
/* */
/* 30-03-92 HWG Added support for conditional jumps. */
/* */
/* 20-06-93 HWG The variable 'machine_code' was too short, and */
/* sometimes caused a compiler crash, when it was */
/* assigned too long a string value. It is now 32. */
/* */
/* 21-06-93 HWG memset used to replace slow loops !! */
/* */
/* 04-07-93 HWG MUL and DIV merged into a single function, also */
/* add_sub, adc_sbb, inc_dec etc... */
/* 13-10-02 HWG Massive restructuring underway to support 32 bit */
/* Intel Pentium class processors. */
/***************************************************************************/
/***************************************************************************/
/* Functional Description */
/***************************************************************************/
/* This is the compiler code emiter, it accepts a data structure holding */
/* details of the instruction to be generated into raw 80286 instructions. */
/* The production of an assembler-like listing is handled by this module */
/* by performing a simple conversion of the instruction node to text. */
/* Note that the algorithms used in here for instruction building, were */
/* designed after analysis of the Intel instruction set reference. */
/* Please refer to the: Turbo Assembler Quick Reference Guide, or the book */
/* 'Programming the 80286' by Sybex, in the event of any queries. */
/* */
/* V E R Y I M P O R T A N T */
/* ----------------------------------------------------------------------- */
/* You MUST test the compiler with great thoroughness after making ANY */
/* change to this module, no matter how trivial it may appear. This module */
/* is very carefully coded, and not documented as well as it could be. */
/* There are many interdependencies between the various functions. */
/***************************************************************************/
/***************************************************************************/
/* D E F I N E D S Y M B O L S */
/***************************************************************************/
# define chur unsigned char
# define _LINE_ ((short)__LINE__)
# define NOT(x) (!(x))
/***************************************************************************/
/* I N C L U D E F I L E S */
/***************************************************************************/
# include "stdlib.h"
# include "setjmp.h"
# include "stdio.h"
# include "string.h"
# include "c_types.h"
# include "pentium.h"
# include "opcodes.h"
# include "objdefs.h"
//# include "acbp.h"
# include "fixup.h"
# include "nodes.h"
# include "coff.h"
# include "globals.h"
/***************************************************************************/
/* E X T E R N A L L Y D E F I N E D P R O T O T Y P E S */
/***************************************************************************/
void report (short,char *,short);
/***************************************************************************/
/* E X T E R N A L L Y D E F I N E D V A R I A B L E S */
/***************************************************************************/
extern char line_no[10];
extern short listing_reqd;
extern short system_reqd;
extern long lines_printed;
extern FILE *LISTING; /* see list.c */
extern jmp_buf exit_code; /* set in code.c */
extern short current_seg; /* set in allocate.c */
extern short block_counter;
extern short trace_code;
extern short curr_index_num;
extern unsigned long bytes_read;
extern Block_ptr curr_ES_block;
extern Block_ptr curr_EBX_block;
Instruction Inst;
fixup Fixup;
static char Initialized = 0;
/***************************************************************************/
/* L O C A L S T A T I C V A R I A B L E S */
/***************************************************************************/
short fixup_pending = 0;
Block_ptr curr_code_block = NULL; /* the block for which code is currently */
long operand_chars = 0;/* being generated */
char prev_line_no[10]="";
short machine_bytes=0;
unsigned short machine_code[32];
short block_number = 0;
unsigned long code_bytes = 0;
unsigned long curr_offset = 0;
unsigned long offset_in_code_seg;
chur code_rec[2048];
chur fix_rec[2048];
short fix_len = 0;
short code_len = 0; /* curr length of code rec */
short first_time_called = 1;
long current_frame_size = 0;
long recs_written = 0; /* Number of objrecs written by */
/* THIS phase. */
static Section_ptr curr_sect_ptr = NULL; /* local static ptr to COFF code section */
static char emitter_initialized = 0;
/* These strucs are used to build the mod r/m byte and sib byte */
static Mrm mod;
static Sib sib;
static chur mod_reqd;
static chur sib_reqd;
static AddrType T;
static AddrType S;
chur OPER;
/***************************************************************************/
/* L O C A L Y D E F I N E D F U N C T I O N S */
/***************************************************************************/
#define emit(x) EmitByte((chur)(x))
static AddrType GetAddrType (Address_ptr);
static AddrClass GetAddrClass (AddrType);
static AddrSize GetAddrSize (Address_ptr);
static void GenTwoOperandInstruction (Instruction);
static void GenOneOperandInstruction (Instruction);
static void GenZeroOperandInstruction (Instruction);
static void InitMachine (void);
static void ResetInstruction (void);
static short GetSource (void);
static short GetTarget (void);
static void EmitExtra (void);
static void EmitByte (chur);
static void EmitData8 (long);
static void EmitData16 (long);
static void EmitData32 (long);
static void EmitDisp8 (long);
static void EmitDisp16 (long);
static void EmitDisp32 (long);
static void EmitDisp (long);
static short ByteSize (Reg);
static short WordSize (Reg);
static short DwordSize (Reg);
//static short data_size (long);
static short RegisterNumber (Reg);
static void set_mod_rm (void);
static void set_mod (void);
static void set_rm (void);
static void set_reg (void);
static void set_sib (void);
void write_code_rec (void);
void clean_code_rec (void);
void write_fixup (void);
void begin_fixup (void);
static void emit_fimul (void);
static void emit_int (void);
static void emit_exit (void); /* ie leave */
static chur short_idx (short,short);
static short long_idx (short,short);
static void print_assembly (void);
//static chur C (mrm); /* convert mod struc into a char */
void check_print (short);
static void print_asm_heading (void);
static void print_offset (unsigned long);
static void print_operation (Opcode);
static void print_register (Reg);
static void print_memory (Address);
static void print_imm (long);
static void print_code (void);
static void print_line_number (void);
static void print_sundry (void);
void emit_fixup (chur);
static void emit_override (void);
/*-----------------------------------------------------------------------------*/
/* CpuGenerate */
/*-----------------------------------------------------------------------------*/
/* This function will generate the CPU instruction bytes based upon the values */
/* in the instruction structure. It handles all aspects of this activity and */
/* creates the Mod R/M byte and SIB byte whenever it determines these are */
/* required. */
/* The generated bytes are appended to the Raw data that is attached to the */
/* current COFF section node. */
/*-----------------------------------------------------------------------------*/
void CpuGenerate (void)
{
AddrType TFirst,TSecond;
if (curr_sect_ptr == NULL)
{
report(198,"",_LINE_);
longjmp(exit_code,3);
}
if (NOT(emitter_initialized))
InitMachine();
/*********************************************************************/
/* These statements are used to reset certain register optimization */
/* variables whenever a reg is modified. */
/*********************************************************************/
if (Inst.target.reg == ES)
curr_ES_block = NULL;
if (Inst.target.reg == _EBX)
curr_EBX_block = NULL;
set_mod_rm(); /* set these flags here and now */
machine_bytes = 0;
/*-----------------------------------------------------------------*/
/* Get the offset at which the first byte of this instruction will */
/* be written. This is used to indicate the per-block offset in */
/* the assembly language listing for each instruction. */
/*-----------------------------------------------------------------*/
curr_offset = curr_sect_ptr->sect.SizeOfRawData;
emit_override(); /* emit segment prefix (if any) right now */
/*-------------------------------------------*/
/* If there is a map defined then process it */
/*-------------------------------------------*/
if (map_table[Inst.opcode] != NULL)
{
TFirst = GetAddrType (&Inst.target);
TSecond = GetAddrType (&Inst.source);
if ((TFirst != A_NOT_PRESENT) && (TSecond != A_NOT_PRESENT))
GenTwoOperandInstruction(Inst);
else
if ((TFirst == A_NOT_PRESENT) && (TSecond == A_NOT_PRESENT))
GenZeroOperandInstruction(Inst);
else
GenOneOperandInstruction(Inst);
print_assembly();
fflush(LISTING);
ResetInstruction();
return;
}
switch (Inst.opcode) {
case(EXIT):
emit_exit();
break;
case(FIMUL):
emit_fimul();
break;
case(INT):
emit_int();
break;
default:
{
report(108,"",_LINE_); /* bad instruction */
longjmp(exit_code,3);
}
}
print_assembly();
fflush(LISTING);
ResetInstruction();
}
/*-----------------------------------------------------------------------------*/
/* ResetInstruction */
/*-----------------------------------------------------------------------------*/
static void ResetInstruction (void)
{
Inst.target.reg = UNSPECIFIED;
Inst.target.len = 0;
Inst.target.dis = 0;
Inst.target.idx = UNSPECIFIED;
Inst.target.bas = UNSPECIFIED;
Inst.target.seg = UNSPECIFIED;
Inst.target.imm = 0;
Inst.target.scale = 0;
Inst.source.reg = UNSPECIFIED;
Inst.source.len = 0;
Inst.source.dis = 0;
Inst.source.idx = UNSPECIFIED;
Inst.source.bas = UNSPECIFIED;
Inst.source.seg = UNSPECIFIED;
Inst.source.imm = 0;
Inst.source.scale = 0;
Inst.text[0] = 0; /* null string */
}
/***************************************************************************/
/* This function re-initialises all the fields in the instruction struc */
/* The opcode field is left as-is to simplify calling code slightly. */
/***************************************************************************/
static void InitMachine (void)
{
/*----------------------------------------------*/
/* Init the pointer array for the Opcode tables */
/*----------------------------------------------*/
map_table[ADD] = &(add_map);
map_table[ADC] = &(adc_map);
map_table[DEC] = &(dec_map);
map_table[INC] = &(inc_map);
map_table[SBB] = &(sbb_map);
map_table[SUB] = &(sub_map);
map_table[MUL] = &(mul_map);
map_table[DIV] = &(div_map);
map_table[MOV] = &(mov_map);
map_table[LEA] = &(lea_map);
map_table[CAL] = &(call_map);
map_table[RET] = &(ret_map);
map_table[ENTER] = &(enter_map);
map_table[JMP] = &(jmp_map);
map_table[PUSH] = &(push_map);
map_table[POP] = &(pop_map);
map_table[CMP] = &(cmp_map);
map_table[FILD] = &(fild_map);
map_table[FIST] = &(fist_map);
map_table[FISTP] = &(fistp_map);
map_table[JA] = &(ja_map);
map_table[JAE] = &(jae_map);
map_table[JB] = &(jb_map);
map_table[JBE] = &(jbe_map);
map_table[JC] = &(jc_map);
map_table[JE] = &(je_map);
map_table[JZ] = &(jz_map);
map_table[JG] = &(jg_map);
map_table[JGE] = &(jge_map);
map_table[JL] = &(jl_map);
map_table[JLE] = &(jle_map);
map_table[JNE] = &(jne_map);
map_table[JNG] = &(jng_map);
map_table[JNL] = &(jnl_map);
map_table[JNGE] = &(jnge_map);
map_table[JNLE] = &(jnle_map);
/*------------------------------------------------*/
/* Init the pointer array for the Cmd code tables */
/*------------------------------------------------*/
cmd_table[ADD] = &(add_ops);
cmd_table[ADC] = &(adc_ops);
cmd_table[DEC] = &(dec_ops);
cmd_table[INC] = &(inc_ops);
cmd_table[SBB] = &(sbb_ops);
cmd_table[SUB] = &(sub_ops);
cmd_table[MUL] = &(mul_ops);
cmd_table[DIV] = &(div_ops);
cmd_table[MOV] = &(mov_ops);
cmd_table[LEA] = &(lea_ops);
cmd_table[CAL] = &(call_ops);
cmd_table[RET] = &(ret_ops);
cmd_table[ENTER] = &(enter_ops);
cmd_table[JMP] = &(jmp_ops);
cmd_table[PUSH] = &(push_ops);
cmd_table[POP] = &(pop_ops);
cmd_table[CMP] = &(cmp_ops);
cmd_table[FILD] = &(fild_ops);
cmd_table[FIST] = &(fist_ops);
cmd_table[FISTP] = &(fistp_ops);
cmd_table[JA] = &(ja_ops);
cmd_table[JAE] = &(jae_ops);
cmd_table[JB] = &(jb_ops);
cmd_table[JBE] = &(jbe_ops);
cmd_table[JC] = &(jc_ops);
cmd_table[JE] = &(je_ops);
cmd_table[JZ] = &(jz_ops);
cmd_table[JG] = &(jg_ops);
cmd_table[JGE] = &(jge_ops);
cmd_table[JL] = &(jl_ops);
cmd_table[JLE] = &(jle_ops);
cmd_table[JNE] = &(jne_ops);
cmd_table[JNG] = &(jng_ops);
cmd_table[JNL] = &(jnl_ops);
cmd_table[JNGE] = &(jnge_ops);
cmd_table[JNLE] = &(jnle_ops);
}
/***************************************************************************/
/* This is the LEDATA header creation pseudo-op. */
/* This op will initialise the header details of a new LEDATA code record. */
/***************************************************************************/
void CpuSetSectPtr (Section_ptr sect_ptr)
{
curr_sect_ptr = sect_ptr;
}
/***************************************************************************/
/* The code generator can invoke this pseudo op to write out the current */
/* code record as it stands. */
/***************************************************************************/
void
write_code (void)
{
;
}
/***************************************************************************/
/* Create an 80286 LEAVE instruction. */
/***************************************************************************/
static void
emit_exit (void)
{
emit (OPC9);
}
/***************************************************************************/
/* Create an 80286 INT instruction. */
/***************************************************************************/
static void
emit_int (void)
{
emit(OPCD);
EmitData8(Inst.source.imm);
}
/****************************************************************************/
/* This function emits the machine instructions for a FIMUL instruction. */
/****************************************************************************/
static void
emit_fimul (void)
{
if ((GetTarget() == REGISTER) && (GetSource() == MEMORY))
{
emit(OPDE);
EmitExtra();
EmitDisp(Inst.source.dis);
return;
}
report(136,"",_LINE_); /* bad NDP instruction */
}
/****************************************************************************/
/* This function returns the type of the required target address reference. */
/****************************************************************************/
static short GetTarget (void)
{
AddrType A;
Address R;
R = Inst.target;
A = GetAddrType (&R);
if (A == A_IMMEDIATE)
return(IMMEDIATE);
if (A == A_REGISTER)
return(REGISTER);
if ((A == A_NOT_PRESENT) || (A == A_INVALID))
return(UNSPECIFIED);
return(MEMORY);
}
/****************************************************************************/
/* This function returns the type of the required source address reference. */
/****************************************************************************/
static short GetSource (void)
{
AddrType A;
Address R;
R = Inst.source;
A = GetAddrType (&R);
if (A == A_IMMEDIATE)
return(IMMEDIATE);
if (A == A_REGISTER)
return(REGISTER);
if ((A == A_NOT_PRESENT) || (A == A_INVALID))
return(UNSPECIFIED);
return(MEMORY);
}
/****************************************************************************/
/* This function returns true if a register number passed in is a byte reg */
/****************************************************************************/
static short
ByteSize (Reg value)
{
if ((value == _AL) || (value == _AH) ||
(value == _BL) || (value == _BH) ||
(value == _CL) || (value == _CH) ||
(value == _DL) || (value == _DH))
{
return(1);
}
return(0);
}
/***************************************************************************/
/* This function returns true if a register number passed in is a word reg */
/***************************************************************************/
static short
WordSize (Reg value)
{
if ((value == _AX) || (value == _BX) ||
(value == _CX) || (value == _DX) ||
(value == _SP) || (value == _BP) ||
(value == _SI) || (value == _DI) ||
(value == ES) || (value == CS) ||
(value == SS) || (value == DS))
{
return(1);
}
return(0);
}
/***************************************************************************/
/* This function returns true if a register number passed in is a word reg */
/***************************************************************************/
static short
DwordSize (Reg value)
{
if ((value == _EAX) || (value == _EBX) ||
(value == _ECX) || (value == _EDX) ||
(value == _ESP) || (value == _EBP) ||
(value == _ESI) || (value == _EDI))
{
return(1);
}
return(0);
}
/**************************************************************************/
/* This function returns the register number (80286 definition of) to the */
/* caller. */
/**************************************************************************/
static short
RegisterNumber (Reg inval)
{
switch(inval) {
case(UNSPECIFIED):
return(UNSPECIFIED);
case(_AL):
case(_AX):
case(_EAX):
return(0);
case(_CL):
case(_CX):
case(_ECX):
return(1);
case(_DL):
case(_DX):
case(_EDX):
return(2);
case(_BL):
case(_BX):
case(_EBX):
return(3);
case(_AH):
case(_SP):
case(_ESP):
return(4);
case(_CH):
case(_BP):
case(_EBP):
return(5);
case(_DH):
case(_SI):
case(_ESI):
return(6);
case(_BH):
case(_DI):
case(_EDI):
return(7);
/* for more info on these settings see Sybex 80286 book, p273 */
case(ES):
return(0);
case(CS):
return(1);
case(SS):
return(2);
case(DS):
return(3);
default:
{
report (109,"",_LINE_); /* we should die here */
longjmp(exit_code,3);
}
}
return(0);
}
/***************************************************************************/
/* This function puts the passed-in byte into the record buffer, to be */
/* written out to the object file. */
/***************************************************************************/
static void
EmitByte (chur byte)
{
Section_ptr sect_ptr;
if (system_reqd)
{
machine_code[machine_bytes] = byte;
machine_bytes += 1;
}
sect_ptr = curr_sect_ptr;
/*--------------------------------------------------------*/
/* If this is the first byte to be output to this section */
/* then allocate a 4k page. */
/*--------------------------------------------------------*/
if (sect_ptr->data_ptr == NULL)
{
sect_ptr->allocated_space = 4096;
sect_ptr->data_ptr = malloc(4096);
sect_ptr->sect.SizeOfRawData = 0;
}
/*-----------------------------------------------------------------------*/
/* If all space allocated so far is already used up, we must expand */
/* that space. We reallocate the space but make it 4K larger than it was */
/*-----------------------------------------------------------------------*/
if (sect_ptr->sect.SizeOfRawData == sect_ptr->allocated_space)
{
sect_ptr->data_ptr = realloc(sect_ptr->data_ptr,sect_ptr->sect.SizeOfRawData + 4096);
sect_ptr->allocated_space = sect_ptr->sect.SizeOfRawData + 4096;
}
sect_ptr->data_ptr[sect_ptr->sect.SizeOfRawData] = byte;
sect_ptr->sect.SizeOfRawData++;
code_len++;
offset_in_code_seg++; /* Total bytes emited in current seg */
code_bytes++; /* Total bytes of code emited period! */
}
/***************************************************************************/
/* This function returns the current offset within the LEDATA record that */
/* is currently being built. */
/***************************************************************************/
short
get_ledata_offset (void)
{
return (code_len-6); /* ie first 6 bytes in buffer are header etc */
}
/***************************************************************************/
/* This function returns the current offset within the code segment that */
/* is currently being built. */
/***************************************************************************/
short
get_segment_offset (void)
{
return ((short)offset_in_code_seg);
}
/***************************************************************************/
/* This function 't' (for translate) converts an mrm struc into a char. */
/* this is cos 'emit' needs a char argument. */
/***************************************************************************/
static void EmitExtra(void)
{
union temp
{
Mrm mbyte;
Sib sbyte;
chur mask;
} uni;
if (mod_reqd)
{
uni.mbyte = mod;
EmitByte(uni.mask);
mod_reqd = 0;
if (sib_reqd)
{
uni.sbyte = sib;
EmitByte(uni.mask);
sib_reqd = 0;
}
}
}
/***************************************************************************/
/* Set the Mod-R/M byte from the details of this instruction. */
/***************************************************************************/
static void
set_mod_rm (void)
{
mod_reqd = 0;
sib_reqd = 0;
mod.mod = 0;
mod.regop = 0;
mod.rm = 0;
sib.base = 0;
sib.index = 0;
sib.scale = 0;
/*--------------------------------------------------------------------*/
/* OK we must decide whether we need a Mod/RM byte and/or an SIB byte */
/*--------------------------------------------------------------------*/
S = GetAddrType(&Inst.source);
T = GetAddrType(&Inst.target);
if (S == A_INVALID)
{
report(182,"",_LINE_);
//longjmp(exit_code,3);
//return;
}
if (T == A_INVALID)
{
report(183,"",_LINE_);
//longjmp(exit_code,3);
//return;
}
/*-----------------------------------------------------------*/
/* This instruction specifies no operands so we dont require */
/* a Mod or SIB byte. */
/*-----------------------------------------------------------*/
if ((T == A_NOT_PRESENT) && (S == A_NOT_PRESENT))
return;
/*--------------------------------------------------------*/
/* If only one operand present, then it must be in target */
/* if caller has this wrong way, then its safe to sawp */
/* them. */
/*--------------------------------------------------------*/
if ((T == A_NOT_PRESENT) && (S != A_NOT_PRESENT))
{
Inst.target = Inst.source;
Inst.source.reg = UNSPECIFIED;
Inst.source.len = 0;
Inst.source.dis = 0;
Inst.source.idx = UNSPECIFIED;
Inst.source.bas = UNSPECIFIED;
Inst.source.seg = UNSPECIFIED;
Inst.source.imm = 0;
Inst.source.scale = 0;
/*-----------------------------------------------------------*/
/* Reset these target/source type variables as they are used */
/* below to drive other algorithms. */
/*-----------------------------------------------------------*/
S = GetAddrType(&Inst.source);
T = GetAddrType(&Inst.target);
}
/*----------------------------------------------------------------*/
/* Lets ensure that the combination of source and target is legal */
/*----------------------------------------------------------------*/
if ((T != A_NOT_PRESENT) && (S != A_NOT_PRESENT))
if ((T != A_IMMEDIATE) && (S != A_IMMEDIATE))
if ((T != A_REGISTER) && (S != A_REGISTER))
{
report(185,"",_LINE_);
//longjmp(exit_code,3);
//return;
}
/* It seems that no instruction that takes an IMMEDIATE operand */
/* can ever require a MODRM/SIB byte. However we wont assume this */
/* in the code until its verified */
//if (T == A_IMMEDIATE)
// return;
set_mod();
}
/***************************************************************************/
/* This function builds the mod bits in the Mod R/M byte from information */
/* containd in the instruction. */
/***************************************************************************/
static void
set_mod (void)
{
AddrType Atype,Rtype;
Address_ptr Aref, Rref;
long Disp;
/* Validate register usage first */