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TOC

0. Introduction
1. ISA
    0. General Overview
    1. Timing
        0. Full-range Delay
        1. Short-range Delay
    2. MMIO/BAR0 Access
        0. MMIO Write
        1. MMIO Mask
        2. MMIO Wait
    3. PDAEMON->Host Communication
        0. PDAEMON->Host message

= Introduction =

FSE (Fµc Scripting Engine) is a software engine implemented in PDAEMON.

Its role is to execute scripts, autonomously or not, generated by the HOST.
Those scripts will usually be related to power management but the ISA has been
designed to be generic-enough for any kind of work.

The reason we decided to implement a scripting language in Fµc PDAEMON is that
we didn't want the script to be able to interfere in any way with the other
missions of PDAEMON.
It is also important to restrict what PDAEMON can do in order to make it easier
to work with.
Lastly, from a security PoV, the scripting engine doesn't really help deter
attackers since they could all-together re-upload an entire new PDAEMON that
would be as malicious as needed for them.

= ISA =

== General Overview ==

An instruction is defined by its opcode (8 bit) followed by its operands. The
size of the operands depend on the opcode.

== Timing : Opcode Mask 0x0X ==

=== Full-range Delay : delay ===

Wait a definite amount of time. This time is expressed by two 32-bit words,
creating a 64-bit value. This value represents the number of nanoseconds that
should be waited.

Instructions:
delay - full-range wait opcode = 0
Operands: WAIT_HIGH, WAIT_LOW
Forms:
I32, I32
Operation:
N/A

== Short-range Delay : delay_ns, delay_us ==

Wait a definite amount of time.

The delay_ns instruction can only wait 32 ns by 32 ns.
Hence, the ns delay you want to wait should be stored shr 5.

Example:
$wanted_delay = 500ns
VALUE = $wanted_delay >> 5 = 15
$actual_delay = VALUE * 32 = 480 ns

Instructions:
delay_ns - wait nano seconds opcode = 1
delay_us - wait micro seconds opcode = 2
Operands: VALUE
Forms:
I16
Operation:
N/A

== MMIO/BAR0 access : Opcode Mask 0x1X ==

=== MMIO Write : mmio_wr ==

Write an unsigned 8-bit or 32-bit value to a MMIO/BAR0 register.

Instructions:
mmio_wr - Assign a value to an MMIO register
Operands: REG, VALUE
Forms:
REG, I32 opcode = 10
REG, I8 opcode = 11
Operation:
N/A

=== MMIO/BAR0 Mask : mmio_mask ==

Selectively update bits of a MMIO/BAR0 register.

Instructions:
mmio_mask - Selectively update bits of a MMIO register
Operands: REG, MASK, DATA
Forms:
I32, I32, I32 opcode = 12
Operation:
mmio_wr32((mmio_rd32(REG) & MASK) | DATA)

=== MMIO/BAR0 Wait : mmio_wait ==

Wait on some bits of a MMIO/BAR0 register to equal a pre-defined value.

Instructions:
mmio_wait - Wait on some bits of a register
Operands: REG, MASK, DATA
Forms:
I32, I32, I32 opcode = 13
Operation:
while((mmio_rd32(REG) & MASK) != DATA);

== PDAEMON->Host Communication : Opcode Mask 0x2X ==

=== PDAEMON->Host message : send_msg ==

Send the specified message to the HOST using RDISPATCH.

This instruction is unusual. It is like an inline definition of the actual
message that should be sent. The size of the message is set by SIZE. The message
to be sent should then be appended.

The purpose of this instruction is to warn the HOST about something that is
application-dependent.

Instructions:
send_msg - send a message to the host
Operands: SIZE, MSG0, MSG1, ...
Forms:
I16, I8, I8, ... opcode = 20
Operation:
N/A
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