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OOPS forget i said anything
#41 by ewoudje was closed Jun 14, 2020
Misaligned JAL(R) RD register writeback expectations
#38 by ultraembedded was closed Apr 20, 2020
4
Add support for optionally ignoring rmask
#37 by chgentso was closed Apr 22, 2020
1
more references
#35 by llelf was merged Mar 30, 2020
Proposal: RISC-V formal verification project
#33 by mrLSD was closed Oct 27, 2019
1
Small fixes for monitor generation
#31 by jleahy was merged Oct 22, 2019
Unexpected result in insn_div when dividing by 0 when not using RISCV_FORMAL_ALTOPS
#29 by Zeldax64 was closed Aug 7, 2019
2
Add a "mode" option to cfg file
#28 by AlAlves was merged Aug 9, 2019 • Approved
4
Don't use rd_wdata of instructions that trapped in the reg check
#26 by JobNoorman was closed Jul 18, 2019
2
Register checks do not seem to be checking anything
#25 by JobNoorman was closed Jun 30, 2019
3
Clarification needed for verification of MUL/DIV
#24 by JobNoorman was closed Jun 27, 2019
3
Update checks.cfg
#23 by AlAlves was merged Jun 26, 2019
Cannot generate trap on bad jump address (c.j/c.jal)
#22 by aignacio was closed Jun 20, 2019
3
Update cores/serv/checks.cfg
#21 by AlAlves was merged May 21, 2019
Initial questions about getting started with a new core
#20 by aignacio was closed Jun 7, 2019
2
C Extension Decoding
#19 by ben-marshall was closed Apr 26, 2019
3
Notion of a memory bus error
#18 by ben-marshall was closed Apr 19, 2019
1
rocket verification
#17 by towoe was closed Mar 2, 2019
1
Fix monitor/generate.py to support macros besides RISCV_FORMAL_COMPRE…
#16 by yx9527 was merged Nov 5, 2018
Endianness Confusion Load Inst test
#15 by mdxg was closed Nov 3, 2018
2
Serv
#14 by cliffordwolf was merged Nov 1, 2018
no vcd trace
#13 by towoe was closed Oct 19, 2018
6
Monitor generate has no misa check
#12 by towoe was closed Dec 21, 2018
1
RISCV_FORMAL_VALIDADDR ignored for loads and stores
#10 by acw1251 was closed Sep 12, 2018
1
Change mul formal to new method
#8 by tomverbeure was closed Aug 14, 2018
1
ProTip! Exclude everything labeled bug with -label:bug.