Prevent warning in icarus verilog with output of generate.py

This is unfortunate as it requires switching between wire/reg, but otherwise
icarus verilog complains that this always block has no sensitivity list.

monitor/generate.py

@@ -522,15 +522,18 @@ def usage():
         print("    output reg o%d_valid," % (chidx))
         print("    output reg [63:0] o%d_order," % (chidx))
         print("    output reg [%d:0] o%d_data," % (rob_data_width-1, chidx))
-    print("  output reg [15:0] errcode")
+    if robdepth == 0:
+        print("  output wire [15:0] errcode")
+    else:
+        print("  output reg [15:0] errcode")
     print(");")
 
     if robdepth == 0:
         for chidx in range(channels):
             print("  always @* o%d_valid = i%d_valid;" % (chidx, chidx))
             print("  always @* o%d_order = i%d_order;" % (chidx, chidx))
             print("  always @* o%d_data = i%d_data;" % (chidx, chidx))
-        print("  always @* errcode = 0;")
+        print("  assign errcode = 0;")
 
     else:
         orderbits = ceil(log2(robdepth))