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Wrong disassembly on Genesis/68000 #1458

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Grogir opened this issue Jan 20, 2019 · 2 comments

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commented Jan 20, 2019

There is a little issue with disassembly on Genesis/68000, instructions SUBI and ADDI are not showing the correct registers

I found in CPUs/68000/Instructions/IntegerMath.cs at lines 192 and 519 that
int reg = (op >> 0) & 3;

should probably be set to
int reg = (op >> 0) & 7;

as it is on the other 2 functions (lines 135 & 465).

The bug can be reproduced on "Tintin Au Tibet (E) (M6) [!]" using the following lua commands :
emu.disassemble(0x135C88)
emu.disassemble(0x135C94)
emu.disassemble(0x12D1EE)

On "Sonic The Hedgehog 2 (W) (REV00) [!]"
emu.disassemble(0x01704C)

On "Splatterhouse 2 (E) [c][!]"
emu.disassemble(0x0121FE)
emu.disassemble(0x06025E)

Example log on sonic :

017048:  3478  movea.w ($F714), A2                 D0:00000048 D1:0000FFFF D2:00640000 D3:00000000 D4:00000001 D5:000001C3 D6:0000FFFF D7:0000FFFF A0:FFFFB000 A1:FFFFE806 A2:FFFFE812 A3:FFFFEE50 A4:FFFFEEB2 A5:FFFFEED0 A6:FFFFE500 A7:FFFFFDF8 SR:2318 USP:00000000 XNzvc
01704C:  0644  addi.w  #$150, D0                   D0:00000048 D1:0000FFFF D2:00640000 D3:00000000 D4:00000151 D5:000001C3 D6:0000FFFF D7:0000FFFF A0:FFFFB000 A1:FFFFE806 A2:FFFFE812 A3:FFFFEE50 A4:FFFFEEB2 A5:FFFFEED0 A6:FFFFE500 A7:FFFFFDF8 SR:2300 USP:00000000 xnzvc

vadosnaprimer added a commit that referenced this issue Jan 23, 2019

@vadosnaprimer

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commented Jan 23, 2019

Please confirm.

@Grogir

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commented Jan 26, 2019

Works

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