Teros Technology: http://www.terostech.com/
Our philosophy is: think in hardware, develop hardware, take advantage of software tools.
The goal of TerosHDL is make the FPGA development easier and reliable. It is a powerful open source IDE.
Currently we support:
Soon we will support Verilog and others simulators.
- Symbolator: https://kevinpt.github.io/symbolator/#installation
- TerosHDLbackend >= 0.1.1:
pip install TerosHDL
pip install vunit_hdl
For code coverage:
- Ghdl with GCC backend.
apm install terosHDL
Getting started guide
Creating component diagram
State machine diagram
This is an experimental feature. Not all state machines are supported.
You have a complete user manual.
Copyright (c) 2018-Present
TerosHDL is licensed under GPLv3.