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@m-braunschweig m-braunschweig commented Mar 13, 2025

Summary of changes in this Pull Request:

  • Fixing a bug in the davinci GPIO driver (will also create an upstream PR shortly)
  • Splitting up the K3 Kconfig
  • Adding initial support for the AM2434 (necessary files and MPU configuration)
  • Adding the AM243x Launchpad (with LED and UART support)
  • Add a simple MSPI (Multi bit SPI) driver for interacting with the QuadSPI flash
  • Add an Infineon S25H flash driver (running in 4S-4S-4S mode with 4 byte addressing)

Edits:

  1. In a few minutes I will add the required image for the documentation. I will add it via an interactive rebase and force push. It would be preferable, if you could add an image from the TI website under https://www.ti.com/tool/LP-AM243
  2. Updated information about S25H flash driver

@m-braunschweig m-braunschweig marked this pull request as draft March 13, 2025 13:55
@m-braunschweig m-braunschweig marked this pull request as ready for review March 13, 2025 14:22
@m-braunschweig m-braunschweig force-pushed the mika/ti/ti-am2434-work branch 2 times, most recently from 1132946 to 2ef909f Compare March 17, 2025 13:00
Zephyr GPIO drivers require the pin mask `struct gpio_driver_data` to be
the first element of the driver config. Reordering fixes failures in ASSERT
statements of the GPIO driver due to the base address being interpreted as
supported pin mask.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Split up Kconfig settings for the ti Keystone 3 (K3) architecture. The old
configuration assumed that every R5F is initialized via a table that's
compatible with the linux remote proc framework and OpenAMP library.

Additionally the number of interrupts and speed of the system timer was
specified only by the cpu type for this series.

For better extendability this was split up into different files that
reflect the subseries of the soc.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add initial support for the Texas Instruments AM2434 SoC which allows using
it in combination with a board to build applications.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Adds a default MPU configuration based on the TI MCU+ SDK.

The SRAM region the core runs on needs to be marked as non-shareable since
atomic instructions are used on it and for this SoC it's connected in a way
that dosen't allow atomic instructions (e.g. ldrex) to have exclusive
access.

Due to that the Cortex-R causes a data abort in such cases. To allow these
instructions anyway the region is marked a non-shared which is fine as long
as only one core is accessing the memory area without external
synchronization.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add pinctrl node to the am2434 soc

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add UART devicetree nodes to the am2434 soc

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add initial support for the AM243x Launchpad. It's possible to run a blinky
program by manually modifying pinctrl and gpio registers of the board.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Enable the uart0 instance in the devicetree, configure the pinctrl, add it
as uart-shell/console and enable necessary Kconfig options for the board so
it can be used for the echo_bot sample.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add gpio nodes for the ti am2434 soc

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add one of the onboard LEDs to the am243x launchpad board. The blinky
example is working but since GPIO drivers only support the first 32 bit the
other LEDs weren't added yet.

Link: zephyrproject-rtos#81100

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add a pretty basic MSPI driver. The driver was tested in 1S-1S-1S mode on a
am243x-lp board with the onboard Infineon flash. Theoretically the driver
also has support for other MSPI modes though they weren't tested. The
command and dummy cycles are always taken from the xfer request and never
from the devicetree.

The driver is pretty basic for now and lacks e.g. callback implementation.
This is something that can be added in the future. If a non-supported /
invalid request is detected a error code is returned.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add the mspi0 bus in disabled state to the am2434 soc

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add a infineon s25h mspi nor flash driver. This driver was tested on the
am243x-lp board in 1S-1S-1S mode.

The driver doesn't check the configuration for dummy cycles and assumes a
factory default configuration. It also changes, if needed, a non-volatile
configuration bit so the erase sectors are uniform. On startup the JEDEC id
is read and checked as basic communication test.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add the Infineon flash chip to the devicetree of the am243x launchpad

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
The test looks for devices that are enabled on a bus that's aliased mspi0.
To allow the am243x launchpad to run this test it was needed to add an
overlay which creates this alias

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
The old implementation requested more often than neccessary to switch the
mspi device configuration which has now been removed.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
When using the function to write to a configuration/status register the
write protection should be automatically disabled so it doesn't have to be
done manually which can be easily forgotten. This has now been improved

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Until now the Infineon S25H driver ran MSPI only in single IO mode. With
this change the driver now switches the IO mode to Quad SPI at the end of
the initialization for higher transfer rates

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
The Infineon S25H driver requires the hybrid sectory architecture to be
disabled. For better readability this code has been moved into an own
function that is now called from the init function

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
To be able to address the full flash memory it's required to enter the 4
byte address mode. This is now done automatically during startup

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
@m-braunschweig m-braunschweig force-pushed the mika/ti/ti-am2434-work branch from 2ef909f to 09a1c7c Compare March 17, 2025 13:52
venkatesan-krishnamoorthy pushed a commit that referenced this pull request Dec 1, 2025
Map all pins of RT685's Flexcomm #1 peripheral.

Needed for opration of Flexcomm #1 in I2S mode or Flexcomm #3 in I2S
mode with shared signals.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
venkatesan-krishnamoorthy pushed a commit that referenced this pull request Dec 1, 2025
Add SCK and WS signals to a shared signal set between Flexcomm #1 and
Flexcomm #3 for the mimxrt685_evk/mimxrt685s/cm33.

This enables the board to both transmit and receive audio, as the BCK
and WS signals produced by the WM8904 codec are only connected to the
Flexcomm #1 peripheral.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
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